1 /* 2 * Microsemi Switchtec(tm) PCIe Management Driver 3 * Copyright (c) 2017, Microsemi Corporation 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 */ 15 16 #include <linux/switchtec.h> 17 #include <linux/switchtec_ioctl.h> 18 19 #include <linux/interrupt.h> 20 #include <linux/module.h> 21 #include <linux/fs.h> 22 #include <linux/uaccess.h> 23 #include <linux/poll.h> 24 #include <linux/wait.h> 25 26 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver"); 27 MODULE_VERSION("0.1"); 28 MODULE_LICENSE("GPL"); 29 MODULE_AUTHOR("Microsemi Corporation"); 30 31 static int max_devices = 16; 32 module_param(max_devices, int, 0644); 33 MODULE_PARM_DESC(max_devices, "max number of switchtec device instances"); 34 35 static dev_t switchtec_devt; 36 static DEFINE_IDA(switchtec_minor_ida); 37 38 struct class *switchtec_class; 39 EXPORT_SYMBOL_GPL(switchtec_class); 40 41 enum mrpc_state { 42 MRPC_IDLE = 0, 43 MRPC_QUEUED, 44 MRPC_RUNNING, 45 MRPC_DONE, 46 }; 47 48 struct switchtec_user { 49 struct switchtec_dev *stdev; 50 51 enum mrpc_state state; 52 53 struct completion comp; 54 struct kref kref; 55 struct list_head list; 56 57 u32 cmd; 58 u32 status; 59 u32 return_code; 60 size_t data_len; 61 size_t read_len; 62 unsigned char data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; 63 int event_cnt; 64 }; 65 66 static struct switchtec_user *stuser_create(struct switchtec_dev *stdev) 67 { 68 struct switchtec_user *stuser; 69 70 stuser = kzalloc(sizeof(*stuser), GFP_KERNEL); 71 if (!stuser) 72 return ERR_PTR(-ENOMEM); 73 74 get_device(&stdev->dev); 75 stuser->stdev = stdev; 76 kref_init(&stuser->kref); 77 INIT_LIST_HEAD(&stuser->list); 78 init_completion(&stuser->comp); 79 stuser->event_cnt = atomic_read(&stdev->event_cnt); 80 81 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser); 82 83 return stuser; 84 } 85 86 static void stuser_free(struct kref *kref) 87 { 88 struct switchtec_user *stuser; 89 90 stuser = container_of(kref, struct switchtec_user, kref); 91 92 dev_dbg(&stuser->stdev->dev, "%s: %p\n", __func__, stuser); 93 94 put_device(&stuser->stdev->dev); 95 kfree(stuser); 96 } 97 98 static void stuser_put(struct switchtec_user *stuser) 99 { 100 kref_put(&stuser->kref, stuser_free); 101 } 102 103 static void stuser_set_state(struct switchtec_user *stuser, 104 enum mrpc_state state) 105 { 106 /* requires the mrpc_mutex to already be held when called */ 107 108 const char * const state_names[] = { 109 [MRPC_IDLE] = "IDLE", 110 [MRPC_QUEUED] = "QUEUED", 111 [MRPC_RUNNING] = "RUNNING", 112 [MRPC_DONE] = "DONE", 113 }; 114 115 stuser->state = state; 116 117 dev_dbg(&stuser->stdev->dev, "stuser state %p -> %s", 118 stuser, state_names[state]); 119 } 120 121 static void mrpc_complete_cmd(struct switchtec_dev *stdev); 122 123 static void mrpc_cmd_submit(struct switchtec_dev *stdev) 124 { 125 /* requires the mrpc_mutex to already be held when called */ 126 127 struct switchtec_user *stuser; 128 129 if (stdev->mrpc_busy) 130 return; 131 132 if (list_empty(&stdev->mrpc_queue)) 133 return; 134 135 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user, 136 list); 137 138 stuser_set_state(stuser, MRPC_RUNNING); 139 stdev->mrpc_busy = 1; 140 memcpy_toio(&stdev->mmio_mrpc->input_data, 141 stuser->data, stuser->data_len); 142 iowrite32(stuser->cmd, &stdev->mmio_mrpc->cmd); 143 144 stuser->status = ioread32(&stdev->mmio_mrpc->status); 145 if (stuser->status != SWITCHTEC_MRPC_STATUS_INPROGRESS) 146 mrpc_complete_cmd(stdev); 147 148 schedule_delayed_work(&stdev->mrpc_timeout, 149 msecs_to_jiffies(500)); 150 } 151 152 static int mrpc_queue_cmd(struct switchtec_user *stuser) 153 { 154 /* requires the mrpc_mutex to already be held when called */ 155 156 struct switchtec_dev *stdev = stuser->stdev; 157 158 kref_get(&stuser->kref); 159 stuser->read_len = sizeof(stuser->data); 160 stuser_set_state(stuser, MRPC_QUEUED); 161 init_completion(&stuser->comp); 162 list_add_tail(&stuser->list, &stdev->mrpc_queue); 163 164 mrpc_cmd_submit(stdev); 165 166 return 0; 167 } 168 169 static void mrpc_complete_cmd(struct switchtec_dev *stdev) 170 { 171 /* requires the mrpc_mutex to already be held when called */ 172 struct switchtec_user *stuser; 173 174 if (list_empty(&stdev->mrpc_queue)) 175 return; 176 177 stuser = list_entry(stdev->mrpc_queue.next, struct switchtec_user, 178 list); 179 180 stuser->status = ioread32(&stdev->mmio_mrpc->status); 181 if (stuser->status == SWITCHTEC_MRPC_STATUS_INPROGRESS) 182 return; 183 184 stuser_set_state(stuser, MRPC_DONE); 185 stuser->return_code = 0; 186 187 if (stuser->status != SWITCHTEC_MRPC_STATUS_DONE) 188 goto out; 189 190 stuser->return_code = ioread32(&stdev->mmio_mrpc->ret_value); 191 if (stuser->return_code != 0) 192 goto out; 193 194 memcpy_fromio(stuser->data, &stdev->mmio_mrpc->output_data, 195 stuser->read_len); 196 197 out: 198 complete_all(&stuser->comp); 199 list_del_init(&stuser->list); 200 stuser_put(stuser); 201 stdev->mrpc_busy = 0; 202 203 mrpc_cmd_submit(stdev); 204 } 205 206 static void mrpc_event_work(struct work_struct *work) 207 { 208 struct switchtec_dev *stdev; 209 210 stdev = container_of(work, struct switchtec_dev, mrpc_work); 211 212 dev_dbg(&stdev->dev, "%s\n", __func__); 213 214 mutex_lock(&stdev->mrpc_mutex); 215 cancel_delayed_work(&stdev->mrpc_timeout); 216 mrpc_complete_cmd(stdev); 217 mutex_unlock(&stdev->mrpc_mutex); 218 } 219 220 static void mrpc_timeout_work(struct work_struct *work) 221 { 222 struct switchtec_dev *stdev; 223 u32 status; 224 225 stdev = container_of(work, struct switchtec_dev, mrpc_timeout.work); 226 227 dev_dbg(&stdev->dev, "%s\n", __func__); 228 229 mutex_lock(&stdev->mrpc_mutex); 230 231 status = ioread32(&stdev->mmio_mrpc->status); 232 if (status == SWITCHTEC_MRPC_STATUS_INPROGRESS) { 233 schedule_delayed_work(&stdev->mrpc_timeout, 234 msecs_to_jiffies(500)); 235 goto out; 236 } 237 238 mrpc_complete_cmd(stdev); 239 240 out: 241 mutex_unlock(&stdev->mrpc_mutex); 242 } 243 244 static ssize_t device_version_show(struct device *dev, 245 struct device_attribute *attr, char *buf) 246 { 247 struct switchtec_dev *stdev = to_stdev(dev); 248 u32 ver; 249 250 ver = ioread32(&stdev->mmio_sys_info->device_version); 251 252 return sprintf(buf, "%x\n", ver); 253 } 254 static DEVICE_ATTR_RO(device_version); 255 256 static ssize_t fw_version_show(struct device *dev, 257 struct device_attribute *attr, char *buf) 258 { 259 struct switchtec_dev *stdev = to_stdev(dev); 260 u32 ver; 261 262 ver = ioread32(&stdev->mmio_sys_info->firmware_version); 263 264 return sprintf(buf, "%08x\n", ver); 265 } 266 static DEVICE_ATTR_RO(fw_version); 267 268 static ssize_t io_string_show(char *buf, void __iomem *attr, size_t len) 269 { 270 int i; 271 272 memcpy_fromio(buf, attr, len); 273 buf[len] = '\n'; 274 buf[len + 1] = 0; 275 276 for (i = len - 1; i > 0; i--) { 277 if (buf[i] != ' ') 278 break; 279 buf[i] = '\n'; 280 buf[i + 1] = 0; 281 } 282 283 return strlen(buf); 284 } 285 286 #define DEVICE_ATTR_SYS_INFO_STR(field) \ 287 static ssize_t field ## _show(struct device *dev, \ 288 struct device_attribute *attr, char *buf) \ 289 { \ 290 struct switchtec_dev *stdev = to_stdev(dev); \ 291 return io_string_show(buf, &stdev->mmio_sys_info->field, \ 292 sizeof(stdev->mmio_sys_info->field)); \ 293 } \ 294 \ 295 static DEVICE_ATTR_RO(field) 296 297 DEVICE_ATTR_SYS_INFO_STR(vendor_id); 298 DEVICE_ATTR_SYS_INFO_STR(product_id); 299 DEVICE_ATTR_SYS_INFO_STR(product_revision); 300 DEVICE_ATTR_SYS_INFO_STR(component_vendor); 301 302 static ssize_t component_id_show(struct device *dev, 303 struct device_attribute *attr, char *buf) 304 { 305 struct switchtec_dev *stdev = to_stdev(dev); 306 int id = ioread16(&stdev->mmio_sys_info->component_id); 307 308 return sprintf(buf, "PM%04X\n", id); 309 } 310 static DEVICE_ATTR_RO(component_id); 311 312 static ssize_t component_revision_show(struct device *dev, 313 struct device_attribute *attr, char *buf) 314 { 315 struct switchtec_dev *stdev = to_stdev(dev); 316 int rev = ioread8(&stdev->mmio_sys_info->component_revision); 317 318 return sprintf(buf, "%d\n", rev); 319 } 320 static DEVICE_ATTR_RO(component_revision); 321 322 static ssize_t partition_show(struct device *dev, 323 struct device_attribute *attr, char *buf) 324 { 325 struct switchtec_dev *stdev = to_stdev(dev); 326 327 return sprintf(buf, "%d\n", stdev->partition); 328 } 329 static DEVICE_ATTR_RO(partition); 330 331 static ssize_t partition_count_show(struct device *dev, 332 struct device_attribute *attr, char *buf) 333 { 334 struct switchtec_dev *stdev = to_stdev(dev); 335 336 return sprintf(buf, "%d\n", stdev->partition_count); 337 } 338 static DEVICE_ATTR_RO(partition_count); 339 340 static struct attribute *switchtec_device_attrs[] = { 341 &dev_attr_device_version.attr, 342 &dev_attr_fw_version.attr, 343 &dev_attr_vendor_id.attr, 344 &dev_attr_product_id.attr, 345 &dev_attr_product_revision.attr, 346 &dev_attr_component_vendor.attr, 347 &dev_attr_component_id.attr, 348 &dev_attr_component_revision.attr, 349 &dev_attr_partition.attr, 350 &dev_attr_partition_count.attr, 351 NULL, 352 }; 353 354 ATTRIBUTE_GROUPS(switchtec_device); 355 356 static int switchtec_dev_open(struct inode *inode, struct file *filp) 357 { 358 struct switchtec_dev *stdev; 359 struct switchtec_user *stuser; 360 361 stdev = container_of(inode->i_cdev, struct switchtec_dev, cdev); 362 363 stuser = stuser_create(stdev); 364 if (IS_ERR(stuser)) 365 return PTR_ERR(stuser); 366 367 filp->private_data = stuser; 368 nonseekable_open(inode, filp); 369 370 dev_dbg(&stdev->dev, "%s: %p\n", __func__, stuser); 371 372 return 0; 373 } 374 375 static int switchtec_dev_release(struct inode *inode, struct file *filp) 376 { 377 struct switchtec_user *stuser = filp->private_data; 378 379 stuser_put(stuser); 380 381 return 0; 382 } 383 384 static int lock_mutex_and_test_alive(struct switchtec_dev *stdev) 385 { 386 if (mutex_lock_interruptible(&stdev->mrpc_mutex)) 387 return -EINTR; 388 389 if (!stdev->alive) { 390 mutex_unlock(&stdev->mrpc_mutex); 391 return -ENODEV; 392 } 393 394 return 0; 395 } 396 397 static ssize_t switchtec_dev_write(struct file *filp, const char __user *data, 398 size_t size, loff_t *off) 399 { 400 struct switchtec_user *stuser = filp->private_data; 401 struct switchtec_dev *stdev = stuser->stdev; 402 int rc; 403 404 if (size < sizeof(stuser->cmd) || 405 size > sizeof(stuser->cmd) + sizeof(stuser->data)) 406 return -EINVAL; 407 408 stuser->data_len = size - sizeof(stuser->cmd); 409 410 rc = lock_mutex_and_test_alive(stdev); 411 if (rc) 412 return rc; 413 414 if (stuser->state != MRPC_IDLE) { 415 rc = -EBADE; 416 goto out; 417 } 418 419 rc = copy_from_user(&stuser->cmd, data, sizeof(stuser->cmd)); 420 if (rc) { 421 rc = -EFAULT; 422 goto out; 423 } 424 425 data += sizeof(stuser->cmd); 426 rc = copy_from_user(&stuser->data, data, size - sizeof(stuser->cmd)); 427 if (rc) { 428 rc = -EFAULT; 429 goto out; 430 } 431 432 rc = mrpc_queue_cmd(stuser); 433 434 out: 435 mutex_unlock(&stdev->mrpc_mutex); 436 437 if (rc) 438 return rc; 439 440 return size; 441 } 442 443 static ssize_t switchtec_dev_read(struct file *filp, char __user *data, 444 size_t size, loff_t *off) 445 { 446 struct switchtec_user *stuser = filp->private_data; 447 struct switchtec_dev *stdev = stuser->stdev; 448 int rc; 449 450 if (size < sizeof(stuser->cmd) || 451 size > sizeof(stuser->cmd) + sizeof(stuser->data)) 452 return -EINVAL; 453 454 rc = lock_mutex_and_test_alive(stdev); 455 if (rc) 456 return rc; 457 458 if (stuser->state == MRPC_IDLE) { 459 mutex_unlock(&stdev->mrpc_mutex); 460 return -EBADE; 461 } 462 463 stuser->read_len = size - sizeof(stuser->return_code); 464 465 mutex_unlock(&stdev->mrpc_mutex); 466 467 if (filp->f_flags & O_NONBLOCK) { 468 if (!try_wait_for_completion(&stuser->comp)) 469 return -EAGAIN; 470 } else { 471 rc = wait_for_completion_interruptible(&stuser->comp); 472 if (rc < 0) 473 return rc; 474 } 475 476 rc = lock_mutex_and_test_alive(stdev); 477 if (rc) 478 return rc; 479 480 if (stuser->state != MRPC_DONE) { 481 mutex_unlock(&stdev->mrpc_mutex); 482 return -EBADE; 483 } 484 485 rc = copy_to_user(data, &stuser->return_code, 486 sizeof(stuser->return_code)); 487 if (rc) { 488 rc = -EFAULT; 489 goto out; 490 } 491 492 data += sizeof(stuser->return_code); 493 rc = copy_to_user(data, &stuser->data, 494 size - sizeof(stuser->return_code)); 495 if (rc) { 496 rc = -EFAULT; 497 goto out; 498 } 499 500 stuser_set_state(stuser, MRPC_IDLE); 501 502 out: 503 mutex_unlock(&stdev->mrpc_mutex); 504 505 if (stuser->status == SWITCHTEC_MRPC_STATUS_DONE) 506 return size; 507 else if (stuser->status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) 508 return -ENXIO; 509 else 510 return -EBADMSG; 511 } 512 513 static unsigned int switchtec_dev_poll(struct file *filp, poll_table *wait) 514 { 515 struct switchtec_user *stuser = filp->private_data; 516 struct switchtec_dev *stdev = stuser->stdev; 517 int ret = 0; 518 519 poll_wait(filp, &stuser->comp.wait, wait); 520 poll_wait(filp, &stdev->event_wq, wait); 521 522 if (lock_mutex_and_test_alive(stdev)) 523 return POLLIN | POLLRDHUP | POLLOUT | POLLERR | POLLHUP; 524 525 mutex_unlock(&stdev->mrpc_mutex); 526 527 if (try_wait_for_completion(&stuser->comp)) 528 ret |= POLLIN | POLLRDNORM; 529 530 if (stuser->event_cnt != atomic_read(&stdev->event_cnt)) 531 ret |= POLLPRI | POLLRDBAND; 532 533 return ret; 534 } 535 536 static int ioctl_flash_info(struct switchtec_dev *stdev, 537 struct switchtec_ioctl_flash_info __user *uinfo) 538 { 539 struct switchtec_ioctl_flash_info info = {0}; 540 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info; 541 542 info.flash_length = ioread32(&fi->flash_length); 543 info.num_partitions = SWITCHTEC_IOCTL_NUM_PARTITIONS; 544 545 if (copy_to_user(uinfo, &info, sizeof(info))) 546 return -EFAULT; 547 548 return 0; 549 } 550 551 static void set_fw_info_part(struct switchtec_ioctl_flash_part_info *info, 552 struct partition_info __iomem *pi) 553 { 554 info->address = ioread32(&pi->address); 555 info->length = ioread32(&pi->length); 556 } 557 558 static int ioctl_flash_part_info(struct switchtec_dev *stdev, 559 struct switchtec_ioctl_flash_part_info __user *uinfo) 560 { 561 struct switchtec_ioctl_flash_part_info info = {0}; 562 struct flash_info_regs __iomem *fi = stdev->mmio_flash_info; 563 struct sys_info_regs __iomem *si = stdev->mmio_sys_info; 564 u32 active_addr = -1; 565 566 if (copy_from_user(&info, uinfo, sizeof(info))) 567 return -EFAULT; 568 569 switch (info.flash_partition) { 570 case SWITCHTEC_IOCTL_PART_CFG0: 571 active_addr = ioread32(&fi->active_cfg); 572 set_fw_info_part(&info, &fi->cfg0); 573 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG0_RUNNING) 574 info.active |= SWITCHTEC_IOCTL_PART_RUNNING; 575 break; 576 case SWITCHTEC_IOCTL_PART_CFG1: 577 active_addr = ioread32(&fi->active_cfg); 578 set_fw_info_part(&info, &fi->cfg1); 579 if (ioread16(&si->cfg_running) == SWITCHTEC_CFG1_RUNNING) 580 info.active |= SWITCHTEC_IOCTL_PART_RUNNING; 581 break; 582 case SWITCHTEC_IOCTL_PART_IMG0: 583 active_addr = ioread32(&fi->active_img); 584 set_fw_info_part(&info, &fi->img0); 585 if (ioread16(&si->img_running) == SWITCHTEC_IMG0_RUNNING) 586 info.active |= SWITCHTEC_IOCTL_PART_RUNNING; 587 break; 588 case SWITCHTEC_IOCTL_PART_IMG1: 589 active_addr = ioread32(&fi->active_img); 590 set_fw_info_part(&info, &fi->img1); 591 if (ioread16(&si->img_running) == SWITCHTEC_IMG1_RUNNING) 592 info.active |= SWITCHTEC_IOCTL_PART_RUNNING; 593 break; 594 case SWITCHTEC_IOCTL_PART_NVLOG: 595 set_fw_info_part(&info, &fi->nvlog); 596 break; 597 case SWITCHTEC_IOCTL_PART_VENDOR0: 598 set_fw_info_part(&info, &fi->vendor[0]); 599 break; 600 case SWITCHTEC_IOCTL_PART_VENDOR1: 601 set_fw_info_part(&info, &fi->vendor[1]); 602 break; 603 case SWITCHTEC_IOCTL_PART_VENDOR2: 604 set_fw_info_part(&info, &fi->vendor[2]); 605 break; 606 case SWITCHTEC_IOCTL_PART_VENDOR3: 607 set_fw_info_part(&info, &fi->vendor[3]); 608 break; 609 case SWITCHTEC_IOCTL_PART_VENDOR4: 610 set_fw_info_part(&info, &fi->vendor[4]); 611 break; 612 case SWITCHTEC_IOCTL_PART_VENDOR5: 613 set_fw_info_part(&info, &fi->vendor[5]); 614 break; 615 case SWITCHTEC_IOCTL_PART_VENDOR6: 616 set_fw_info_part(&info, &fi->vendor[6]); 617 break; 618 case SWITCHTEC_IOCTL_PART_VENDOR7: 619 set_fw_info_part(&info, &fi->vendor[7]); 620 break; 621 default: 622 return -EINVAL; 623 } 624 625 if (info.address == active_addr) 626 info.active |= SWITCHTEC_IOCTL_PART_ACTIVE; 627 628 if (copy_to_user(uinfo, &info, sizeof(info))) 629 return -EFAULT; 630 631 return 0; 632 } 633 634 static int ioctl_event_summary(struct switchtec_dev *stdev, 635 struct switchtec_user *stuser, 636 struct switchtec_ioctl_event_summary __user *usum) 637 { 638 struct switchtec_ioctl_event_summary s = {0}; 639 int i; 640 u32 reg; 641 642 s.global = ioread32(&stdev->mmio_sw_event->global_summary); 643 s.part_bitmap = ioread32(&stdev->mmio_sw_event->part_event_bitmap); 644 s.local_part = ioread32(&stdev->mmio_part_cfg->part_event_summary); 645 646 for (i = 0; i < stdev->partition_count; i++) { 647 reg = ioread32(&stdev->mmio_part_cfg_all[i].part_event_summary); 648 s.part[i] = reg; 649 } 650 651 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) { 652 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id); 653 if (reg != MICROSEMI_VENDOR_ID) 654 break; 655 656 reg = ioread32(&stdev->mmio_pff_csr[i].pff_event_summary); 657 s.pff[i] = reg; 658 } 659 660 if (copy_to_user(usum, &s, sizeof(s))) 661 return -EFAULT; 662 663 stuser->event_cnt = atomic_read(&stdev->event_cnt); 664 665 return 0; 666 } 667 668 static u32 __iomem *global_ev_reg(struct switchtec_dev *stdev, 669 size_t offset, int index) 670 { 671 return (void __iomem *)stdev->mmio_sw_event + offset; 672 } 673 674 static u32 __iomem *part_ev_reg(struct switchtec_dev *stdev, 675 size_t offset, int index) 676 { 677 return (void __iomem *)&stdev->mmio_part_cfg_all[index] + offset; 678 } 679 680 static u32 __iomem *pff_ev_reg(struct switchtec_dev *stdev, 681 size_t offset, int index) 682 { 683 return (void __iomem *)&stdev->mmio_pff_csr[index] + offset; 684 } 685 686 #define EV_GLB(i, r)[i] = {offsetof(struct sw_event_regs, r), global_ev_reg} 687 #define EV_PAR(i, r)[i] = {offsetof(struct part_cfg_regs, r), part_ev_reg} 688 #define EV_PFF(i, r)[i] = {offsetof(struct pff_csr_regs, r), pff_ev_reg} 689 690 static const struct event_reg { 691 size_t offset; 692 u32 __iomem *(*map_reg)(struct switchtec_dev *stdev, 693 size_t offset, int index); 694 } event_regs[] = { 695 EV_GLB(SWITCHTEC_IOCTL_EVENT_STACK_ERROR, stack_error_event_hdr), 696 EV_GLB(SWITCHTEC_IOCTL_EVENT_PPU_ERROR, ppu_error_event_hdr), 697 EV_GLB(SWITCHTEC_IOCTL_EVENT_ISP_ERROR, isp_error_event_hdr), 698 EV_GLB(SWITCHTEC_IOCTL_EVENT_SYS_RESET, sys_reset_event_hdr), 699 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_EXC, fw_exception_hdr), 700 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NMI, fw_nmi_hdr), 701 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL, fw_non_fatal_hdr), 702 EV_GLB(SWITCHTEC_IOCTL_EVENT_FW_FATAL, fw_fatal_hdr), 703 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP, twi_mrpc_comp_hdr), 704 EV_GLB(SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC, 705 twi_mrpc_comp_async_hdr), 706 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP, cli_mrpc_comp_hdr), 707 EV_GLB(SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC, 708 cli_mrpc_comp_async_hdr), 709 EV_GLB(SWITCHTEC_IOCTL_EVENT_GPIO_INT, gpio_interrupt_hdr), 710 EV_PAR(SWITCHTEC_IOCTL_EVENT_PART_RESET, part_reset_hdr), 711 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP, mrpc_comp_hdr), 712 EV_PAR(SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC, mrpc_comp_async_hdr), 713 EV_PAR(SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP, dyn_binding_hdr), 714 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_P2P, aer_in_p2p_hdr), 715 EV_PFF(SWITCHTEC_IOCTL_EVENT_AER_IN_VEP, aer_in_vep_hdr), 716 EV_PFF(SWITCHTEC_IOCTL_EVENT_DPC, dpc_hdr), 717 EV_PFF(SWITCHTEC_IOCTL_EVENT_CTS, cts_hdr), 718 EV_PFF(SWITCHTEC_IOCTL_EVENT_HOTPLUG, hotplug_hdr), 719 EV_PFF(SWITCHTEC_IOCTL_EVENT_IER, ier_hdr), 720 EV_PFF(SWITCHTEC_IOCTL_EVENT_THRESH, threshold_hdr), 721 EV_PFF(SWITCHTEC_IOCTL_EVENT_POWER_MGMT, power_mgmt_hdr), 722 EV_PFF(SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING, tlp_throttling_hdr), 723 EV_PFF(SWITCHTEC_IOCTL_EVENT_FORCE_SPEED, force_speed_hdr), 724 EV_PFF(SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT, credit_timeout_hdr), 725 EV_PFF(SWITCHTEC_IOCTL_EVENT_LINK_STATE, link_state_hdr), 726 }; 727 728 static u32 __iomem *event_hdr_addr(struct switchtec_dev *stdev, 729 int event_id, int index) 730 { 731 size_t off; 732 733 if (event_id < 0 || event_id >= SWITCHTEC_IOCTL_MAX_EVENTS) 734 return ERR_PTR(-EINVAL); 735 736 off = event_regs[event_id].offset; 737 738 if (event_regs[event_id].map_reg == part_ev_reg) { 739 if (index == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX) 740 index = stdev->partition; 741 else if (index < 0 || index >= stdev->partition_count) 742 return ERR_PTR(-EINVAL); 743 } else if (event_regs[event_id].map_reg == pff_ev_reg) { 744 if (index < 0 || index >= stdev->pff_csr_count) 745 return ERR_PTR(-EINVAL); 746 } 747 748 return event_regs[event_id].map_reg(stdev, off, index); 749 } 750 751 static int event_ctl(struct switchtec_dev *stdev, 752 struct switchtec_ioctl_event_ctl *ctl) 753 { 754 int i; 755 u32 __iomem *reg; 756 u32 hdr; 757 758 reg = event_hdr_addr(stdev, ctl->event_id, ctl->index); 759 if (IS_ERR(reg)) 760 return PTR_ERR(reg); 761 762 hdr = ioread32(reg); 763 for (i = 0; i < ARRAY_SIZE(ctl->data); i++) 764 ctl->data[i] = ioread32(®[i + 1]); 765 766 ctl->occurred = hdr & SWITCHTEC_EVENT_OCCURRED; 767 ctl->count = (hdr >> 5) & 0xFF; 768 769 if (!(ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR)) 770 hdr &= ~SWITCHTEC_EVENT_CLEAR; 771 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL) 772 hdr |= SWITCHTEC_EVENT_EN_IRQ; 773 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL) 774 hdr &= ~SWITCHTEC_EVENT_EN_IRQ; 775 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG) 776 hdr |= SWITCHTEC_EVENT_EN_LOG; 777 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG) 778 hdr &= ~SWITCHTEC_EVENT_EN_LOG; 779 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI) 780 hdr |= SWITCHTEC_EVENT_EN_CLI; 781 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI) 782 hdr &= ~SWITCHTEC_EVENT_EN_CLI; 783 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL) 784 hdr |= SWITCHTEC_EVENT_FATAL; 785 if (ctl->flags & SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL) 786 hdr &= ~SWITCHTEC_EVENT_FATAL; 787 788 if (ctl->flags) 789 iowrite32(hdr, reg); 790 791 ctl->flags = 0; 792 if (hdr & SWITCHTEC_EVENT_EN_IRQ) 793 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL; 794 if (hdr & SWITCHTEC_EVENT_EN_LOG) 795 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG; 796 if (hdr & SWITCHTEC_EVENT_EN_CLI) 797 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI; 798 if (hdr & SWITCHTEC_EVENT_FATAL) 799 ctl->flags |= SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL; 800 801 return 0; 802 } 803 804 static int ioctl_event_ctl(struct switchtec_dev *stdev, 805 struct switchtec_ioctl_event_ctl __user *uctl) 806 { 807 int ret; 808 int nr_idxs; 809 struct switchtec_ioctl_event_ctl ctl; 810 811 if (copy_from_user(&ctl, uctl, sizeof(ctl))) 812 return -EFAULT; 813 814 if (ctl.event_id >= SWITCHTEC_IOCTL_MAX_EVENTS) 815 return -EINVAL; 816 817 if (ctl.flags & SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED) 818 return -EINVAL; 819 820 if (ctl.index == SWITCHTEC_IOCTL_EVENT_IDX_ALL) { 821 if (event_regs[ctl.event_id].map_reg == global_ev_reg) 822 nr_idxs = 1; 823 else if (event_regs[ctl.event_id].map_reg == part_ev_reg) 824 nr_idxs = stdev->partition_count; 825 else if (event_regs[ctl.event_id].map_reg == pff_ev_reg) 826 nr_idxs = stdev->pff_csr_count; 827 else 828 return -EINVAL; 829 830 for (ctl.index = 0; ctl.index < nr_idxs; ctl.index++) { 831 ret = event_ctl(stdev, &ctl); 832 if (ret < 0) 833 return ret; 834 } 835 } else { 836 ret = event_ctl(stdev, &ctl); 837 if (ret < 0) 838 return ret; 839 } 840 841 if (copy_to_user(uctl, &ctl, sizeof(ctl))) 842 return -EFAULT; 843 844 return 0; 845 } 846 847 static int ioctl_pff_to_port(struct switchtec_dev *stdev, 848 struct switchtec_ioctl_pff_port *up) 849 { 850 int i, part; 851 u32 reg; 852 struct part_cfg_regs *pcfg; 853 struct switchtec_ioctl_pff_port p; 854 855 if (copy_from_user(&p, up, sizeof(p))) 856 return -EFAULT; 857 858 p.port = -1; 859 for (part = 0; part < stdev->partition_count; part++) { 860 pcfg = &stdev->mmio_part_cfg_all[part]; 861 p.partition = part; 862 863 reg = ioread32(&pcfg->usp_pff_inst_id); 864 if (reg == p.pff) { 865 p.port = 0; 866 break; 867 } 868 869 reg = ioread32(&pcfg->vep_pff_inst_id); 870 if (reg == p.pff) { 871 p.port = SWITCHTEC_IOCTL_PFF_VEP; 872 break; 873 } 874 875 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) { 876 reg = ioread32(&pcfg->dsp_pff_inst_id[i]); 877 if (reg != p.pff) 878 continue; 879 880 p.port = i + 1; 881 break; 882 } 883 884 if (p.port != -1) 885 break; 886 } 887 888 if (copy_to_user(up, &p, sizeof(p))) 889 return -EFAULT; 890 891 return 0; 892 } 893 894 static int ioctl_port_to_pff(struct switchtec_dev *stdev, 895 struct switchtec_ioctl_pff_port *up) 896 { 897 struct switchtec_ioctl_pff_port p; 898 struct part_cfg_regs *pcfg; 899 900 if (copy_from_user(&p, up, sizeof(p))) 901 return -EFAULT; 902 903 if (p.partition == SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX) 904 pcfg = stdev->mmio_part_cfg; 905 else if (p.partition < stdev->partition_count) 906 pcfg = &stdev->mmio_part_cfg_all[p.partition]; 907 else 908 return -EINVAL; 909 910 switch (p.port) { 911 case 0: 912 p.pff = ioread32(&pcfg->usp_pff_inst_id); 913 break; 914 case SWITCHTEC_IOCTL_PFF_VEP: 915 p.pff = ioread32(&pcfg->vep_pff_inst_id); 916 break; 917 default: 918 if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) 919 return -EINVAL; 920 p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]); 921 break; 922 } 923 924 if (copy_to_user(up, &p, sizeof(p))) 925 return -EFAULT; 926 927 return 0; 928 } 929 930 static long switchtec_dev_ioctl(struct file *filp, unsigned int cmd, 931 unsigned long arg) 932 { 933 struct switchtec_user *stuser = filp->private_data; 934 struct switchtec_dev *stdev = stuser->stdev; 935 int rc; 936 void __user *argp = (void __user *)arg; 937 938 rc = lock_mutex_and_test_alive(stdev); 939 if (rc) 940 return rc; 941 942 switch (cmd) { 943 case SWITCHTEC_IOCTL_FLASH_INFO: 944 rc = ioctl_flash_info(stdev, argp); 945 break; 946 case SWITCHTEC_IOCTL_FLASH_PART_INFO: 947 rc = ioctl_flash_part_info(stdev, argp); 948 break; 949 case SWITCHTEC_IOCTL_EVENT_SUMMARY: 950 rc = ioctl_event_summary(stdev, stuser, argp); 951 break; 952 case SWITCHTEC_IOCTL_EVENT_CTL: 953 rc = ioctl_event_ctl(stdev, argp); 954 break; 955 case SWITCHTEC_IOCTL_PFF_TO_PORT: 956 rc = ioctl_pff_to_port(stdev, argp); 957 break; 958 case SWITCHTEC_IOCTL_PORT_TO_PFF: 959 rc = ioctl_port_to_pff(stdev, argp); 960 break; 961 default: 962 rc = -ENOTTY; 963 break; 964 } 965 966 mutex_unlock(&stdev->mrpc_mutex); 967 return rc; 968 } 969 970 static const struct file_operations switchtec_fops = { 971 .owner = THIS_MODULE, 972 .open = switchtec_dev_open, 973 .release = switchtec_dev_release, 974 .write = switchtec_dev_write, 975 .read = switchtec_dev_read, 976 .poll = switchtec_dev_poll, 977 .unlocked_ioctl = switchtec_dev_ioctl, 978 .compat_ioctl = switchtec_dev_ioctl, 979 }; 980 981 static void link_event_work(struct work_struct *work) 982 { 983 struct switchtec_dev *stdev; 984 985 stdev = container_of(work, struct switchtec_dev, link_event_work); 986 987 if (stdev->link_notifier) 988 stdev->link_notifier(stdev); 989 } 990 991 static void check_link_state_events(struct switchtec_dev *stdev) 992 { 993 int idx; 994 u32 reg; 995 int count; 996 int occurred = 0; 997 998 for (idx = 0; idx < stdev->pff_csr_count; idx++) { 999 reg = ioread32(&stdev->mmio_pff_csr[idx].link_state_hdr); 1000 dev_dbg(&stdev->dev, "link_state: %d->%08x\n", idx, reg); 1001 count = (reg >> 5) & 0xFF; 1002 1003 if (count != stdev->link_event_count[idx]) { 1004 occurred = 1; 1005 stdev->link_event_count[idx] = count; 1006 } 1007 } 1008 1009 if (occurred) 1010 schedule_work(&stdev->link_event_work); 1011 } 1012 1013 static void enable_link_state_events(struct switchtec_dev *stdev) 1014 { 1015 int idx; 1016 1017 for (idx = 0; idx < stdev->pff_csr_count; idx++) { 1018 iowrite32(SWITCHTEC_EVENT_CLEAR | 1019 SWITCHTEC_EVENT_EN_IRQ, 1020 &stdev->mmio_pff_csr[idx].link_state_hdr); 1021 } 1022 } 1023 1024 static void stdev_release(struct device *dev) 1025 { 1026 struct switchtec_dev *stdev = to_stdev(dev); 1027 1028 kfree(stdev); 1029 } 1030 1031 static void stdev_kill(struct switchtec_dev *stdev) 1032 { 1033 struct switchtec_user *stuser, *tmpuser; 1034 1035 pci_clear_master(stdev->pdev); 1036 1037 cancel_delayed_work_sync(&stdev->mrpc_timeout); 1038 1039 /* Mark the hardware as unavailable and complete all completions */ 1040 mutex_lock(&stdev->mrpc_mutex); 1041 stdev->alive = false; 1042 1043 /* Wake up and kill any users waiting on an MRPC request */ 1044 list_for_each_entry_safe(stuser, tmpuser, &stdev->mrpc_queue, list) { 1045 complete_all(&stuser->comp); 1046 list_del_init(&stuser->list); 1047 stuser_put(stuser); 1048 } 1049 1050 mutex_unlock(&stdev->mrpc_mutex); 1051 1052 /* Wake up any users waiting on event_wq */ 1053 wake_up_interruptible(&stdev->event_wq); 1054 } 1055 1056 static struct switchtec_dev *stdev_create(struct pci_dev *pdev) 1057 { 1058 struct switchtec_dev *stdev; 1059 int minor; 1060 struct device *dev; 1061 struct cdev *cdev; 1062 int rc; 1063 1064 stdev = kzalloc_node(sizeof(*stdev), GFP_KERNEL, 1065 dev_to_node(&pdev->dev)); 1066 if (!stdev) 1067 return ERR_PTR(-ENOMEM); 1068 1069 stdev->alive = true; 1070 stdev->pdev = pdev; 1071 INIT_LIST_HEAD(&stdev->mrpc_queue); 1072 mutex_init(&stdev->mrpc_mutex); 1073 stdev->mrpc_busy = 0; 1074 INIT_WORK(&stdev->mrpc_work, mrpc_event_work); 1075 INIT_DELAYED_WORK(&stdev->mrpc_timeout, mrpc_timeout_work); 1076 INIT_WORK(&stdev->link_event_work, link_event_work); 1077 init_waitqueue_head(&stdev->event_wq); 1078 atomic_set(&stdev->event_cnt, 0); 1079 1080 dev = &stdev->dev; 1081 device_initialize(dev); 1082 dev->class = switchtec_class; 1083 dev->parent = &pdev->dev; 1084 dev->groups = switchtec_device_groups; 1085 dev->release = stdev_release; 1086 1087 minor = ida_simple_get(&switchtec_minor_ida, 0, 0, 1088 GFP_KERNEL); 1089 if (minor < 0) { 1090 rc = minor; 1091 goto err_put; 1092 } 1093 1094 dev->devt = MKDEV(MAJOR(switchtec_devt), minor); 1095 dev_set_name(dev, "switchtec%d", minor); 1096 1097 cdev = &stdev->cdev; 1098 cdev_init(cdev, &switchtec_fops); 1099 cdev->owner = THIS_MODULE; 1100 1101 return stdev; 1102 1103 err_put: 1104 put_device(&stdev->dev); 1105 return ERR_PTR(rc); 1106 } 1107 1108 static int mask_event(struct switchtec_dev *stdev, int eid, int idx) 1109 { 1110 size_t off = event_regs[eid].offset; 1111 u32 __iomem *hdr_reg; 1112 u32 hdr; 1113 1114 hdr_reg = event_regs[eid].map_reg(stdev, off, idx); 1115 hdr = ioread32(hdr_reg); 1116 1117 if (!(hdr & SWITCHTEC_EVENT_OCCURRED && hdr & SWITCHTEC_EVENT_EN_IRQ)) 1118 return 0; 1119 1120 if (eid == SWITCHTEC_IOCTL_EVENT_LINK_STATE) 1121 return 0; 1122 1123 dev_dbg(&stdev->dev, "%s: %d %d %x\n", __func__, eid, idx, hdr); 1124 hdr &= ~(SWITCHTEC_EVENT_EN_IRQ | SWITCHTEC_EVENT_OCCURRED); 1125 iowrite32(hdr, hdr_reg); 1126 1127 return 1; 1128 } 1129 1130 static int mask_all_events(struct switchtec_dev *stdev, int eid) 1131 { 1132 int idx; 1133 int count = 0; 1134 1135 if (event_regs[eid].map_reg == part_ev_reg) { 1136 for (idx = 0; idx < stdev->partition_count; idx++) 1137 count += mask_event(stdev, eid, idx); 1138 } else if (event_regs[eid].map_reg == pff_ev_reg) { 1139 for (idx = 0; idx < stdev->pff_csr_count; idx++) { 1140 if (!stdev->pff_local[idx]) 1141 continue; 1142 1143 count += mask_event(stdev, eid, idx); 1144 } 1145 } else { 1146 count += mask_event(stdev, eid, 0); 1147 } 1148 1149 return count; 1150 } 1151 1152 static irqreturn_t switchtec_event_isr(int irq, void *dev) 1153 { 1154 struct switchtec_dev *stdev = dev; 1155 u32 reg; 1156 irqreturn_t ret = IRQ_NONE; 1157 int eid, event_count = 0; 1158 1159 reg = ioread32(&stdev->mmio_part_cfg->mrpc_comp_hdr); 1160 if (reg & SWITCHTEC_EVENT_OCCURRED) { 1161 dev_dbg(&stdev->dev, "%s: mrpc comp\n", __func__); 1162 ret = IRQ_HANDLED; 1163 schedule_work(&stdev->mrpc_work); 1164 iowrite32(reg, &stdev->mmio_part_cfg->mrpc_comp_hdr); 1165 } 1166 1167 check_link_state_events(stdev); 1168 1169 for (eid = 0; eid < SWITCHTEC_IOCTL_MAX_EVENTS; eid++) 1170 event_count += mask_all_events(stdev, eid); 1171 1172 if (event_count) { 1173 atomic_inc(&stdev->event_cnt); 1174 wake_up_interruptible(&stdev->event_wq); 1175 dev_dbg(&stdev->dev, "%s: %d events\n", __func__, 1176 event_count); 1177 return IRQ_HANDLED; 1178 } 1179 1180 return ret; 1181 } 1182 1183 static int switchtec_init_isr(struct switchtec_dev *stdev) 1184 { 1185 int nvecs; 1186 int event_irq; 1187 1188 nvecs = pci_alloc_irq_vectors(stdev->pdev, 1, 4, 1189 PCI_IRQ_MSIX | PCI_IRQ_MSI); 1190 if (nvecs < 0) 1191 return nvecs; 1192 1193 event_irq = ioread32(&stdev->mmio_part_cfg->vep_vector_number); 1194 if (event_irq < 0 || event_irq >= nvecs) 1195 return -EFAULT; 1196 1197 event_irq = pci_irq_vector(stdev->pdev, event_irq); 1198 if (event_irq < 0) 1199 return event_irq; 1200 1201 return devm_request_irq(&stdev->pdev->dev, event_irq, 1202 switchtec_event_isr, 0, 1203 KBUILD_MODNAME, stdev); 1204 } 1205 1206 static void init_pff(struct switchtec_dev *stdev) 1207 { 1208 int i; 1209 u32 reg; 1210 struct part_cfg_regs *pcfg = stdev->mmio_part_cfg; 1211 1212 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) { 1213 reg = ioread16(&stdev->mmio_pff_csr[i].vendor_id); 1214 if (reg != MICROSEMI_VENDOR_ID) 1215 break; 1216 } 1217 1218 stdev->pff_csr_count = i; 1219 1220 reg = ioread32(&pcfg->usp_pff_inst_id); 1221 if (reg < SWITCHTEC_MAX_PFF_CSR) 1222 stdev->pff_local[reg] = 1; 1223 1224 reg = ioread32(&pcfg->vep_pff_inst_id); 1225 if (reg < SWITCHTEC_MAX_PFF_CSR) 1226 stdev->pff_local[reg] = 1; 1227 1228 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) { 1229 reg = ioread32(&pcfg->dsp_pff_inst_id[i]); 1230 if (reg < SWITCHTEC_MAX_PFF_CSR) 1231 stdev->pff_local[reg] = 1; 1232 } 1233 } 1234 1235 static int switchtec_init_pci(struct switchtec_dev *stdev, 1236 struct pci_dev *pdev) 1237 { 1238 int rc; 1239 1240 rc = pcim_enable_device(pdev); 1241 if (rc) 1242 return rc; 1243 1244 rc = pcim_iomap_regions(pdev, 0x1, KBUILD_MODNAME); 1245 if (rc) 1246 return rc; 1247 1248 pci_set_master(pdev); 1249 1250 stdev->mmio = pcim_iomap_table(pdev)[0]; 1251 stdev->mmio_mrpc = stdev->mmio + SWITCHTEC_GAS_MRPC_OFFSET; 1252 stdev->mmio_sw_event = stdev->mmio + SWITCHTEC_GAS_SW_EVENT_OFFSET; 1253 stdev->mmio_sys_info = stdev->mmio + SWITCHTEC_GAS_SYS_INFO_OFFSET; 1254 stdev->mmio_flash_info = stdev->mmio + SWITCHTEC_GAS_FLASH_INFO_OFFSET; 1255 stdev->mmio_ntb = stdev->mmio + SWITCHTEC_GAS_NTB_OFFSET; 1256 stdev->partition = ioread8(&stdev->mmio_sys_info->partition_id); 1257 stdev->partition_count = ioread8(&stdev->mmio_ntb->partition_count); 1258 stdev->mmio_part_cfg_all = stdev->mmio + SWITCHTEC_GAS_PART_CFG_OFFSET; 1259 stdev->mmio_part_cfg = &stdev->mmio_part_cfg_all[stdev->partition]; 1260 stdev->mmio_pff_csr = stdev->mmio + SWITCHTEC_GAS_PFF_CSR_OFFSET; 1261 1262 if (stdev->partition_count < 1) 1263 stdev->partition_count = 1; 1264 1265 init_pff(stdev); 1266 1267 pci_set_drvdata(pdev, stdev); 1268 1269 return 0; 1270 } 1271 1272 static int switchtec_pci_probe(struct pci_dev *pdev, 1273 const struct pci_device_id *id) 1274 { 1275 struct switchtec_dev *stdev; 1276 int rc; 1277 1278 if (pdev->class == MICROSEMI_NTB_CLASSCODE) 1279 request_module_nowait("ntb_hw_switchtec"); 1280 1281 stdev = stdev_create(pdev); 1282 if (IS_ERR(stdev)) 1283 return PTR_ERR(stdev); 1284 1285 rc = switchtec_init_pci(stdev, pdev); 1286 if (rc) 1287 goto err_put; 1288 1289 rc = switchtec_init_isr(stdev); 1290 if (rc) { 1291 dev_err(&stdev->dev, "failed to init isr.\n"); 1292 goto err_put; 1293 } 1294 1295 iowrite32(SWITCHTEC_EVENT_CLEAR | 1296 SWITCHTEC_EVENT_EN_IRQ, 1297 &stdev->mmio_part_cfg->mrpc_comp_hdr); 1298 enable_link_state_events(stdev); 1299 1300 rc = cdev_device_add(&stdev->cdev, &stdev->dev); 1301 if (rc) 1302 goto err_devadd; 1303 1304 dev_info(&stdev->dev, "Management device registered.\n"); 1305 1306 return 0; 1307 1308 err_devadd: 1309 stdev_kill(stdev); 1310 err_put: 1311 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt)); 1312 put_device(&stdev->dev); 1313 return rc; 1314 } 1315 1316 static void switchtec_pci_remove(struct pci_dev *pdev) 1317 { 1318 struct switchtec_dev *stdev = pci_get_drvdata(pdev); 1319 1320 pci_set_drvdata(pdev, NULL); 1321 1322 cdev_device_del(&stdev->cdev, &stdev->dev); 1323 ida_simple_remove(&switchtec_minor_ida, MINOR(stdev->dev.devt)); 1324 dev_info(&stdev->dev, "unregistered.\n"); 1325 1326 stdev_kill(stdev); 1327 put_device(&stdev->dev); 1328 } 1329 1330 #define SWITCHTEC_PCI_DEVICE(device_id) \ 1331 { \ 1332 .vendor = MICROSEMI_VENDOR_ID, \ 1333 .device = device_id, \ 1334 .subvendor = PCI_ANY_ID, \ 1335 .subdevice = PCI_ANY_ID, \ 1336 .class = MICROSEMI_MGMT_CLASSCODE, \ 1337 .class_mask = 0xFFFFFFFF, \ 1338 }, \ 1339 { \ 1340 .vendor = MICROSEMI_VENDOR_ID, \ 1341 .device = device_id, \ 1342 .subvendor = PCI_ANY_ID, \ 1343 .subdevice = PCI_ANY_ID, \ 1344 .class = MICROSEMI_NTB_CLASSCODE, \ 1345 .class_mask = 0xFFFFFFFF, \ 1346 } 1347 1348 static const struct pci_device_id switchtec_pci_tbl[] = { 1349 SWITCHTEC_PCI_DEVICE(0x8531), //PFX 24xG3 1350 SWITCHTEC_PCI_DEVICE(0x8532), //PFX 32xG3 1351 SWITCHTEC_PCI_DEVICE(0x8533), //PFX 48xG3 1352 SWITCHTEC_PCI_DEVICE(0x8534), //PFX 64xG3 1353 SWITCHTEC_PCI_DEVICE(0x8535), //PFX 80xG3 1354 SWITCHTEC_PCI_DEVICE(0x8536), //PFX 96xG3 1355 SWITCHTEC_PCI_DEVICE(0x8543), //PSX 48xG3 1356 SWITCHTEC_PCI_DEVICE(0x8544), //PSX 64xG3 1357 SWITCHTEC_PCI_DEVICE(0x8545), //PSX 80xG3 1358 SWITCHTEC_PCI_DEVICE(0x8546), //PSX 96xG3 1359 SWITCHTEC_PCI_DEVICE(0x8551), //PAX 24XG3 1360 SWITCHTEC_PCI_DEVICE(0x8552), //PAX 32XG3 1361 SWITCHTEC_PCI_DEVICE(0x8553), //PAX 48XG3 1362 SWITCHTEC_PCI_DEVICE(0x8554), //PAX 64XG3 1363 SWITCHTEC_PCI_DEVICE(0x8555), //PAX 80XG3 1364 SWITCHTEC_PCI_DEVICE(0x8556), //PAX 96XG3 1365 SWITCHTEC_PCI_DEVICE(0x8561), //PFXL 24XG3 1366 SWITCHTEC_PCI_DEVICE(0x8562), //PFXL 32XG3 1367 SWITCHTEC_PCI_DEVICE(0x8563), //PFXL 48XG3 1368 SWITCHTEC_PCI_DEVICE(0x8564), //PFXL 64XG3 1369 SWITCHTEC_PCI_DEVICE(0x8565), //PFXL 80XG3 1370 SWITCHTEC_PCI_DEVICE(0x8566), //PFXL 96XG3 1371 SWITCHTEC_PCI_DEVICE(0x8571), //PFXI 24XG3 1372 SWITCHTEC_PCI_DEVICE(0x8572), //PFXI 32XG3 1373 SWITCHTEC_PCI_DEVICE(0x8573), //PFXI 48XG3 1374 SWITCHTEC_PCI_DEVICE(0x8574), //PFXI 64XG3 1375 SWITCHTEC_PCI_DEVICE(0x8575), //PFXI 80XG3 1376 SWITCHTEC_PCI_DEVICE(0x8576), //PFXI 96XG3 1377 {0} 1378 }; 1379 MODULE_DEVICE_TABLE(pci, switchtec_pci_tbl); 1380 1381 static struct pci_driver switchtec_pci_driver = { 1382 .name = KBUILD_MODNAME, 1383 .id_table = switchtec_pci_tbl, 1384 .probe = switchtec_pci_probe, 1385 .remove = switchtec_pci_remove, 1386 }; 1387 1388 static int __init switchtec_init(void) 1389 { 1390 int rc; 1391 1392 rc = alloc_chrdev_region(&switchtec_devt, 0, max_devices, 1393 "switchtec"); 1394 if (rc) 1395 return rc; 1396 1397 switchtec_class = class_create(THIS_MODULE, "switchtec"); 1398 if (IS_ERR(switchtec_class)) { 1399 rc = PTR_ERR(switchtec_class); 1400 goto err_create_class; 1401 } 1402 1403 rc = pci_register_driver(&switchtec_pci_driver); 1404 if (rc) 1405 goto err_pci_register; 1406 1407 pr_info(KBUILD_MODNAME ": loaded.\n"); 1408 1409 return 0; 1410 1411 err_pci_register: 1412 class_destroy(switchtec_class); 1413 1414 err_create_class: 1415 unregister_chrdev_region(switchtec_devt, max_devices); 1416 1417 return rc; 1418 } 1419 module_init(switchtec_init); 1420 1421 static void __exit switchtec_exit(void) 1422 { 1423 pci_unregister_driver(&switchtec_pci_driver); 1424 class_destroy(switchtec_class); 1425 unregister_chrdev_region(switchtec_devt, max_devices); 1426 ida_destroy(&switchtec_minor_ida); 1427 1428 pr_info(KBUILD_MODNAME ": unloaded.\n"); 1429 } 1430 module_exit(switchtec_exit); 1431