xref: /openbmc/linux/drivers/pci/proc.c (revision f47a3ca2)
1 /*
2  *	Procfs interface for the PCI bus.
3  *
4  *	Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
5  */
6 
7 #include <linux/init.h>
8 #include <linux/pci.h>
9 #include <linux/slab.h>
10 #include <linux/module.h>
11 #include <linux/proc_fs.h>
12 #include <linux/seq_file.h>
13 #include <linux/capability.h>
14 #include <asm/uaccess.h>
15 #include <asm/byteorder.h>
16 #include "pci.h"
17 
18 static int proc_initialized;	/* = 0 */
19 
20 static loff_t
21 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
22 {
23 	loff_t new = -1;
24 	struct inode *inode = file_inode(file);
25 
26 	mutex_lock(&inode->i_mutex);
27 	switch (whence) {
28 	case 0:
29 		new = off;
30 		break;
31 	case 1:
32 		new = file->f_pos + off;
33 		break;
34 	case 2:
35 		new = inode->i_size + off;
36 		break;
37 	}
38 	if (new < 0 || new > inode->i_size)
39 		new = -EINVAL;
40 	else
41 		file->f_pos = new;
42 	mutex_unlock(&inode->i_mutex);
43 	return new;
44 }
45 
46 static ssize_t
47 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
48 {
49 	struct pci_dev *dev = PDE_DATA(file_inode(file));
50 	unsigned int pos = *ppos;
51 	unsigned int cnt, size;
52 
53 	/*
54 	 * Normal users can read only the standardized portion of the
55 	 * configuration space as several chips lock up when trying to read
56 	 * undefined locations (think of Intel PIIX4 as a typical example).
57 	 */
58 
59 	if (capable(CAP_SYS_ADMIN))
60 		size = dev->cfg_size;
61 	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
62 		size = 128;
63 	else
64 		size = 64;
65 
66 	if (pos >= size)
67 		return 0;
68 	if (nbytes >= size)
69 		nbytes = size;
70 	if (pos + nbytes > size)
71 		nbytes = size - pos;
72 	cnt = nbytes;
73 
74 	if (!access_ok(VERIFY_WRITE, buf, cnt))
75 		return -EINVAL;
76 
77 	pci_config_pm_runtime_get(dev);
78 
79 	if ((pos & 1) && cnt) {
80 		unsigned char val;
81 		pci_user_read_config_byte(dev, pos, &val);
82 		__put_user(val, buf);
83 		buf++;
84 		pos++;
85 		cnt--;
86 	}
87 
88 	if ((pos & 3) && cnt > 2) {
89 		unsigned short val;
90 		pci_user_read_config_word(dev, pos, &val);
91 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
92 		buf += 2;
93 		pos += 2;
94 		cnt -= 2;
95 	}
96 
97 	while (cnt >= 4) {
98 		unsigned int val;
99 		pci_user_read_config_dword(dev, pos, &val);
100 		__put_user(cpu_to_le32(val), (__le32 __user *) buf);
101 		buf += 4;
102 		pos += 4;
103 		cnt -= 4;
104 	}
105 
106 	if (cnt >= 2) {
107 		unsigned short val;
108 		pci_user_read_config_word(dev, pos, &val);
109 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
110 		buf += 2;
111 		pos += 2;
112 		cnt -= 2;
113 	}
114 
115 	if (cnt) {
116 		unsigned char val;
117 		pci_user_read_config_byte(dev, pos, &val);
118 		__put_user(val, buf);
119 		buf++;
120 		pos++;
121 		cnt--;
122 	}
123 
124 	pci_config_pm_runtime_put(dev);
125 
126 	*ppos = pos;
127 	return nbytes;
128 }
129 
130 static ssize_t
131 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
132 {
133 	struct inode *ino = file_inode(file);
134 	struct pci_dev *dev = PDE_DATA(ino);
135 	int pos = *ppos;
136 	int size = dev->cfg_size;
137 	int cnt;
138 
139 	if (pos >= size)
140 		return 0;
141 	if (nbytes >= size)
142 		nbytes = size;
143 	if (pos + nbytes > size)
144 		nbytes = size - pos;
145 	cnt = nbytes;
146 
147 	if (!access_ok(VERIFY_READ, buf, cnt))
148 		return -EINVAL;
149 
150 	pci_config_pm_runtime_get(dev);
151 
152 	if ((pos & 1) && cnt) {
153 		unsigned char val;
154 		__get_user(val, buf);
155 		pci_user_write_config_byte(dev, pos, val);
156 		buf++;
157 		pos++;
158 		cnt--;
159 	}
160 
161 	if ((pos & 3) && cnt > 2) {
162 		__le16 val;
163 		__get_user(val, (__le16 __user *) buf);
164 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
165 		buf += 2;
166 		pos += 2;
167 		cnt -= 2;
168 	}
169 
170 	while (cnt >= 4) {
171 		__le32 val;
172 		__get_user(val, (__le32 __user *) buf);
173 		pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
174 		buf += 4;
175 		pos += 4;
176 		cnt -= 4;
177 	}
178 
179 	if (cnt >= 2) {
180 		__le16 val;
181 		__get_user(val, (__le16 __user *) buf);
182 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
183 		buf += 2;
184 		pos += 2;
185 		cnt -= 2;
186 	}
187 
188 	if (cnt) {
189 		unsigned char val;
190 		__get_user(val, buf);
191 		pci_user_write_config_byte(dev, pos, val);
192 		buf++;
193 		pos++;
194 		cnt--;
195 	}
196 
197 	pci_config_pm_runtime_put(dev);
198 
199 	*ppos = pos;
200 	i_size_write(ino, dev->cfg_size);
201 	return nbytes;
202 }
203 
204 struct pci_filp_private {
205 	enum pci_mmap_state mmap_state;
206 	int write_combine;
207 };
208 
209 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
210 			       unsigned long arg)
211 {
212 	struct pci_dev *dev = PDE_DATA(file_inode(file));
213 #ifdef HAVE_PCI_MMAP
214 	struct pci_filp_private *fpriv = file->private_data;
215 #endif /* HAVE_PCI_MMAP */
216 	int ret = 0;
217 
218 	switch (cmd) {
219 	case PCIIOC_CONTROLLER:
220 		ret = pci_domain_nr(dev->bus);
221 		break;
222 
223 #ifdef HAVE_PCI_MMAP
224 	case PCIIOC_MMAP_IS_IO:
225 		fpriv->mmap_state = pci_mmap_io;
226 		break;
227 
228 	case PCIIOC_MMAP_IS_MEM:
229 		fpriv->mmap_state = pci_mmap_mem;
230 		break;
231 
232 	case PCIIOC_WRITE_COMBINE:
233 		if (arg)
234 			fpriv->write_combine = 1;
235 		else
236 			fpriv->write_combine = 0;
237 		break;
238 
239 #endif /* HAVE_PCI_MMAP */
240 
241 	default:
242 		ret = -EINVAL;
243 		break;
244 	};
245 
246 	return ret;
247 }
248 
249 #ifdef HAVE_PCI_MMAP
250 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
251 {
252 	struct pci_dev *dev = PDE_DATA(file_inode(file));
253 	struct pci_filp_private *fpriv = file->private_data;
254 	int i, ret;
255 
256 	if (!capable(CAP_SYS_RAWIO))
257 		return -EPERM;
258 
259 	/* Make sure the caller is mapping a real resource for this device */
260 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
261 		if (pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
262 			break;
263 	}
264 
265 	if (i >= PCI_ROM_RESOURCE)
266 		return -ENODEV;
267 
268 	ret = pci_mmap_page_range(dev, vma,
269 				  fpriv->mmap_state,
270 				  fpriv->write_combine);
271 	if (ret < 0)
272 		return ret;
273 
274 	return 0;
275 }
276 
277 static int proc_bus_pci_open(struct inode *inode, struct file *file)
278 {
279 	struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
280 
281 	if (!fpriv)
282 		return -ENOMEM;
283 
284 	fpriv->mmap_state = pci_mmap_io;
285 	fpriv->write_combine = 0;
286 
287 	file->private_data = fpriv;
288 
289 	return 0;
290 }
291 
292 static int proc_bus_pci_release(struct inode *inode, struct file *file)
293 {
294 	kfree(file->private_data);
295 	file->private_data = NULL;
296 
297 	return 0;
298 }
299 #endif /* HAVE_PCI_MMAP */
300 
301 static const struct file_operations proc_bus_pci_operations = {
302 	.owner		= THIS_MODULE,
303 	.llseek		= proc_bus_pci_lseek,
304 	.read		= proc_bus_pci_read,
305 	.write		= proc_bus_pci_write,
306 	.unlocked_ioctl	= proc_bus_pci_ioctl,
307 	.compat_ioctl	= proc_bus_pci_ioctl,
308 #ifdef HAVE_PCI_MMAP
309 	.open		= proc_bus_pci_open,
310 	.release	= proc_bus_pci_release,
311 	.mmap		= proc_bus_pci_mmap,
312 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
313 	.get_unmapped_area = get_pci_unmapped_area,
314 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
315 #endif /* HAVE_PCI_MMAP */
316 };
317 
318 /* iterator */
319 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
320 {
321 	struct pci_dev *dev = NULL;
322 	loff_t n = *pos;
323 
324 	for_each_pci_dev(dev) {
325 		if (!n--)
326 			break;
327 	}
328 	return dev;
329 }
330 
331 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
332 {
333 	struct pci_dev *dev = v;
334 
335 	(*pos)++;
336 	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
337 	return dev;
338 }
339 
340 static void pci_seq_stop(struct seq_file *m, void *v)
341 {
342 	if (v) {
343 		struct pci_dev *dev = v;
344 		pci_dev_put(dev);
345 	}
346 }
347 
348 static int show_device(struct seq_file *m, void *v)
349 {
350 	const struct pci_dev *dev = v;
351 	const struct pci_driver *drv;
352 	int i;
353 
354 	if (dev == NULL)
355 		return 0;
356 
357 	drv = pci_dev_driver(dev);
358 	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
359 			dev->bus->number,
360 			dev->devfn,
361 			dev->vendor,
362 			dev->device,
363 			dev->irq);
364 
365 	/* only print standard and ROM resources to preserve compatibility */
366 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
367 		resource_size_t start, end;
368 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
369 		seq_printf(m, "\t%16llx",
370 			(unsigned long long)(start |
371 			(dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
372 	}
373 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
374 		resource_size_t start, end;
375 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
376 		seq_printf(m, "\t%16llx",
377 			dev->resource[i].start < dev->resource[i].end ?
378 			(unsigned long long)(end - start) + 1 : 0);
379 	}
380 	seq_putc(m, '\t');
381 	if (drv)
382 		seq_printf(m, "%s", drv->name);
383 	seq_putc(m, '\n');
384 	return 0;
385 }
386 
387 static const struct seq_operations proc_bus_pci_devices_op = {
388 	.start	= pci_seq_start,
389 	.next	= pci_seq_next,
390 	.stop	= pci_seq_stop,
391 	.show	= show_device
392 };
393 
394 static struct proc_dir_entry *proc_bus_pci_dir;
395 
396 int pci_proc_attach_device(struct pci_dev *dev)
397 {
398 	struct pci_bus *bus = dev->bus;
399 	struct proc_dir_entry *e;
400 	char name[16];
401 
402 	if (!proc_initialized)
403 		return -EACCES;
404 
405 	if (!bus->procdir) {
406 		if (pci_proc_domain(bus)) {
407 			sprintf(name, "%04x:%02x", pci_domain_nr(bus),
408 					bus->number);
409 		} else {
410 			sprintf(name, "%02x", bus->number);
411 		}
412 		bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
413 		if (!bus->procdir)
414 			return -ENOMEM;
415 	}
416 
417 	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
418 	e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
419 			     &proc_bus_pci_operations, dev);
420 	if (!e)
421 		return -ENOMEM;
422 	proc_set_size(e, dev->cfg_size);
423 	dev->procent = e;
424 
425 	return 0;
426 }
427 
428 int pci_proc_detach_device(struct pci_dev *dev)
429 {
430 	proc_remove(dev->procent);
431 	dev->procent = NULL;
432 	return 0;
433 }
434 
435 int pci_proc_detach_bus(struct pci_bus* bus)
436 {
437 	proc_remove(bus->procdir);
438 	return 0;
439 }
440 
441 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
442 {
443 	return seq_open(file, &proc_bus_pci_devices_op);
444 }
445 static const struct file_operations proc_bus_pci_dev_operations = {
446 	.owner		= THIS_MODULE,
447 	.open		= proc_bus_pci_dev_open,
448 	.read		= seq_read,
449 	.llseek		= seq_lseek,
450 	.release	= seq_release,
451 };
452 
453 static int __init pci_proc_init(void)
454 {
455 	struct pci_dev *dev = NULL;
456 	proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
457 	proc_create("devices", 0, proc_bus_pci_dir,
458 		    &proc_bus_pci_dev_operations);
459 	proc_initialized = 1;
460 	for_each_pci_dev(dev)
461 		pci_proc_attach_device(dev);
462 
463 	return 0;
464 }
465 
466 device_initcall(pci_proc_init);
467 
468