1 /* 2 * Procfs interface for the PCI bus. 3 * 4 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz> 5 */ 6 7 #include <linux/init.h> 8 #include <linux/pci.h> 9 #include <linux/slab.h> 10 #include <linux/module.h> 11 #include <linux/proc_fs.h> 12 #include <linux/seq_file.h> 13 #include <linux/capability.h> 14 #include <asm/uaccess.h> 15 #include <asm/byteorder.h> 16 #include "pci.h" 17 18 static int proc_initialized; /* = 0 */ 19 20 static loff_t 21 proc_bus_pci_lseek(struct file *file, loff_t off, int whence) 22 { 23 loff_t new = -1; 24 struct inode *inode = file->f_path.dentry->d_inode; 25 26 mutex_lock(&inode->i_mutex); 27 switch (whence) { 28 case 0: 29 new = off; 30 break; 31 case 1: 32 new = file->f_pos + off; 33 break; 34 case 2: 35 new = inode->i_size + off; 36 break; 37 } 38 if (new < 0 || new > inode->i_size) 39 new = -EINVAL; 40 else 41 file->f_pos = new; 42 mutex_unlock(&inode->i_mutex); 43 return new; 44 } 45 46 static ssize_t 47 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos) 48 { 49 const struct inode *ino = file->f_path.dentry->d_inode; 50 const struct proc_dir_entry *dp = PDE(ino); 51 struct pci_dev *dev = dp->data; 52 unsigned int pos = *ppos; 53 unsigned int cnt, size; 54 55 /* 56 * Normal users can read only the standardized portion of the 57 * configuration space as several chips lock up when trying to read 58 * undefined locations (think of Intel PIIX4 as a typical example). 59 */ 60 61 if (capable(CAP_SYS_ADMIN)) 62 size = dp->size; 63 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 64 size = 128; 65 else 66 size = 64; 67 68 if (pos >= size) 69 return 0; 70 if (nbytes >= size) 71 nbytes = size; 72 if (pos + nbytes > size) 73 nbytes = size - pos; 74 cnt = nbytes; 75 76 if (!access_ok(VERIFY_WRITE, buf, cnt)) 77 return -EINVAL; 78 79 pci_config_pm_runtime_get(dev); 80 81 if ((pos & 1) && cnt) { 82 unsigned char val; 83 pci_user_read_config_byte(dev, pos, &val); 84 __put_user(val, buf); 85 buf++; 86 pos++; 87 cnt--; 88 } 89 90 if ((pos & 3) && cnt > 2) { 91 unsigned short val; 92 pci_user_read_config_word(dev, pos, &val); 93 __put_user(cpu_to_le16(val), (__le16 __user *) buf); 94 buf += 2; 95 pos += 2; 96 cnt -= 2; 97 } 98 99 while (cnt >= 4) { 100 unsigned int val; 101 pci_user_read_config_dword(dev, pos, &val); 102 __put_user(cpu_to_le32(val), (__le32 __user *) buf); 103 buf += 4; 104 pos += 4; 105 cnt -= 4; 106 } 107 108 if (cnt >= 2) { 109 unsigned short val; 110 pci_user_read_config_word(dev, pos, &val); 111 __put_user(cpu_to_le16(val), (__le16 __user *) buf); 112 buf += 2; 113 pos += 2; 114 cnt -= 2; 115 } 116 117 if (cnt) { 118 unsigned char val; 119 pci_user_read_config_byte(dev, pos, &val); 120 __put_user(val, buf); 121 buf++; 122 pos++; 123 cnt--; 124 } 125 126 pci_config_pm_runtime_put(dev); 127 128 *ppos = pos; 129 return nbytes; 130 } 131 132 static ssize_t 133 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) 134 { 135 struct inode *ino = file->f_path.dentry->d_inode; 136 const struct proc_dir_entry *dp = PDE(ino); 137 struct pci_dev *dev = dp->data; 138 int pos = *ppos; 139 int size = dp->size; 140 int cnt; 141 142 if (pos >= size) 143 return 0; 144 if (nbytes >= size) 145 nbytes = size; 146 if (pos + nbytes > size) 147 nbytes = size - pos; 148 cnt = nbytes; 149 150 if (!access_ok(VERIFY_READ, buf, cnt)) 151 return -EINVAL; 152 153 pci_config_pm_runtime_get(dev); 154 155 if ((pos & 1) && cnt) { 156 unsigned char val; 157 __get_user(val, buf); 158 pci_user_write_config_byte(dev, pos, val); 159 buf++; 160 pos++; 161 cnt--; 162 } 163 164 if ((pos & 3) && cnt > 2) { 165 __le16 val; 166 __get_user(val, (__le16 __user *) buf); 167 pci_user_write_config_word(dev, pos, le16_to_cpu(val)); 168 buf += 2; 169 pos += 2; 170 cnt -= 2; 171 } 172 173 while (cnt >= 4) { 174 __le32 val; 175 __get_user(val, (__le32 __user *) buf); 176 pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); 177 buf += 4; 178 pos += 4; 179 cnt -= 4; 180 } 181 182 if (cnt >= 2) { 183 __le16 val; 184 __get_user(val, (__le16 __user *) buf); 185 pci_user_write_config_word(dev, pos, le16_to_cpu(val)); 186 buf += 2; 187 pos += 2; 188 cnt -= 2; 189 } 190 191 if (cnt) { 192 unsigned char val; 193 __get_user(val, buf); 194 pci_user_write_config_byte(dev, pos, val); 195 buf++; 196 pos++; 197 cnt--; 198 } 199 200 pci_config_pm_runtime_put(dev); 201 202 *ppos = pos; 203 i_size_write(ino, dp->size); 204 return nbytes; 205 } 206 207 struct pci_filp_private { 208 enum pci_mmap_state mmap_state; 209 int write_combine; 210 }; 211 212 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, 213 unsigned long arg) 214 { 215 const struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode); 216 struct pci_dev *dev = dp->data; 217 #ifdef HAVE_PCI_MMAP 218 struct pci_filp_private *fpriv = file->private_data; 219 #endif /* HAVE_PCI_MMAP */ 220 int ret = 0; 221 222 switch (cmd) { 223 case PCIIOC_CONTROLLER: 224 ret = pci_domain_nr(dev->bus); 225 break; 226 227 #ifdef HAVE_PCI_MMAP 228 case PCIIOC_MMAP_IS_IO: 229 fpriv->mmap_state = pci_mmap_io; 230 break; 231 232 case PCIIOC_MMAP_IS_MEM: 233 fpriv->mmap_state = pci_mmap_mem; 234 break; 235 236 case PCIIOC_WRITE_COMBINE: 237 if (arg) 238 fpriv->write_combine = 1; 239 else 240 fpriv->write_combine = 0; 241 break; 242 243 #endif /* HAVE_PCI_MMAP */ 244 245 default: 246 ret = -EINVAL; 247 break; 248 }; 249 250 return ret; 251 } 252 253 #ifdef HAVE_PCI_MMAP 254 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) 255 { 256 struct inode *inode = file->f_path.dentry->d_inode; 257 const struct proc_dir_entry *dp = PDE(inode); 258 struct pci_dev *dev = dp->data; 259 struct pci_filp_private *fpriv = file->private_data; 260 int i, ret; 261 262 if (!capable(CAP_SYS_RAWIO)) 263 return -EPERM; 264 265 /* Make sure the caller is mapping a real resource for this device */ 266 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 267 if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) 268 break; 269 } 270 271 if (i >= PCI_ROM_RESOURCE) 272 return -ENODEV; 273 274 ret = pci_mmap_page_range(dev, vma, 275 fpriv->mmap_state, 276 fpriv->write_combine); 277 if (ret < 0) 278 return ret; 279 280 return 0; 281 } 282 283 static int proc_bus_pci_open(struct inode *inode, struct file *file) 284 { 285 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL); 286 287 if (!fpriv) 288 return -ENOMEM; 289 290 fpriv->mmap_state = pci_mmap_io; 291 fpriv->write_combine = 0; 292 293 file->private_data = fpriv; 294 295 return 0; 296 } 297 298 static int proc_bus_pci_release(struct inode *inode, struct file *file) 299 { 300 kfree(file->private_data); 301 file->private_data = NULL; 302 303 return 0; 304 } 305 #endif /* HAVE_PCI_MMAP */ 306 307 static const struct file_operations proc_bus_pci_operations = { 308 .owner = THIS_MODULE, 309 .llseek = proc_bus_pci_lseek, 310 .read = proc_bus_pci_read, 311 .write = proc_bus_pci_write, 312 .unlocked_ioctl = proc_bus_pci_ioctl, 313 .compat_ioctl = proc_bus_pci_ioctl, 314 #ifdef HAVE_PCI_MMAP 315 .open = proc_bus_pci_open, 316 .release = proc_bus_pci_release, 317 .mmap = proc_bus_pci_mmap, 318 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA 319 .get_unmapped_area = get_pci_unmapped_area, 320 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */ 321 #endif /* HAVE_PCI_MMAP */ 322 }; 323 324 /* iterator */ 325 static void *pci_seq_start(struct seq_file *m, loff_t *pos) 326 { 327 struct pci_dev *dev = NULL; 328 loff_t n = *pos; 329 330 for_each_pci_dev(dev) { 331 if (!n--) 332 break; 333 } 334 return dev; 335 } 336 337 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) 338 { 339 struct pci_dev *dev = v; 340 341 (*pos)++; 342 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); 343 return dev; 344 } 345 346 static void pci_seq_stop(struct seq_file *m, void *v) 347 { 348 if (v) { 349 struct pci_dev *dev = v; 350 pci_dev_put(dev); 351 } 352 } 353 354 static int show_device(struct seq_file *m, void *v) 355 { 356 const struct pci_dev *dev = v; 357 const struct pci_driver *drv; 358 int i; 359 360 if (dev == NULL) 361 return 0; 362 363 drv = pci_dev_driver(dev); 364 seq_printf(m, "%02x%02x\t%04x%04x\t%x", 365 dev->bus->number, 366 dev->devfn, 367 dev->vendor, 368 dev->device, 369 dev->irq); 370 371 /* only print standard and ROM resources to preserve compatibility */ 372 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 373 resource_size_t start, end; 374 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); 375 seq_printf(m, "\t%16llx", 376 (unsigned long long)(start | 377 (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); 378 } 379 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 380 resource_size_t start, end; 381 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); 382 seq_printf(m, "\t%16llx", 383 dev->resource[i].start < dev->resource[i].end ? 384 (unsigned long long)(end - start) + 1 : 0); 385 } 386 seq_putc(m, '\t'); 387 if (drv) 388 seq_printf(m, "%s", drv->name); 389 seq_putc(m, '\n'); 390 return 0; 391 } 392 393 static const struct seq_operations proc_bus_pci_devices_op = { 394 .start = pci_seq_start, 395 .next = pci_seq_next, 396 .stop = pci_seq_stop, 397 .show = show_device 398 }; 399 400 static struct proc_dir_entry *proc_bus_pci_dir; 401 402 int pci_proc_attach_device(struct pci_dev *dev) 403 { 404 struct pci_bus *bus = dev->bus; 405 struct proc_dir_entry *e; 406 char name[16]; 407 408 if (!proc_initialized) 409 return -EACCES; 410 411 if (!bus->procdir) { 412 if (pci_proc_domain(bus)) { 413 sprintf(name, "%04x:%02x", pci_domain_nr(bus), 414 bus->number); 415 } else { 416 sprintf(name, "%02x", bus->number); 417 } 418 bus->procdir = proc_mkdir(name, proc_bus_pci_dir); 419 if (!bus->procdir) 420 return -ENOMEM; 421 } 422 423 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); 424 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir, 425 &proc_bus_pci_operations, dev); 426 if (!e) 427 return -ENOMEM; 428 e->size = dev->cfg_size; 429 dev->procent = e; 430 431 return 0; 432 } 433 434 int pci_proc_detach_device(struct pci_dev *dev) 435 { 436 struct proc_dir_entry *e; 437 438 if ((e = dev->procent)) { 439 remove_proc_entry(e->name, dev->bus->procdir); 440 dev->procent = NULL; 441 } 442 return 0; 443 } 444 445 int pci_proc_detach_bus(struct pci_bus* bus) 446 { 447 struct proc_dir_entry *de = bus->procdir; 448 if (de) 449 remove_proc_entry(de->name, proc_bus_pci_dir); 450 return 0; 451 } 452 453 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file) 454 { 455 return seq_open(file, &proc_bus_pci_devices_op); 456 } 457 static const struct file_operations proc_bus_pci_dev_operations = { 458 .owner = THIS_MODULE, 459 .open = proc_bus_pci_dev_open, 460 .read = seq_read, 461 .llseek = seq_lseek, 462 .release = seq_release, 463 }; 464 465 static int __init pci_proc_init(void) 466 { 467 struct pci_dev *dev = NULL; 468 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL); 469 proc_create("devices", 0, proc_bus_pci_dir, 470 &proc_bus_pci_dev_operations); 471 proc_initialized = 1; 472 for_each_pci_dev(dev) 473 pci_proc_attach_device(dev); 474 475 return 0; 476 } 477 478 device_initcall(pci_proc_init); 479 480