xref: /openbmc/linux/drivers/pci/pcie/portdrv.h (revision ecd25094)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Purpose:	PCI Express Port Bus Driver's Internal Data Structures
4  *
5  * Copyright (C) 2004 Intel
6  * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7  */
8 
9 #ifndef _PORTDRV_H_
10 #define _PORTDRV_H_
11 
12 #include <linux/compiler.h>
13 
14 /* Service Type */
15 #define PCIE_PORT_SERVICE_PME_SHIFT	0	/* Power Management Event */
16 #define PCIE_PORT_SERVICE_PME		(1 << PCIE_PORT_SERVICE_PME_SHIFT)
17 #define PCIE_PORT_SERVICE_AER_SHIFT	1	/* Advanced Error Reporting */
18 #define PCIE_PORT_SERVICE_AER		(1 << PCIE_PORT_SERVICE_AER_SHIFT)
19 #define PCIE_PORT_SERVICE_HP_SHIFT	2	/* Native Hotplug */
20 #define PCIE_PORT_SERVICE_HP		(1 << PCIE_PORT_SERVICE_HP_SHIFT)
21 #define PCIE_PORT_SERVICE_DPC_SHIFT	3	/* Downstream Port Containment */
22 #define PCIE_PORT_SERVICE_DPC		(1 << PCIE_PORT_SERVICE_DPC_SHIFT)
23 #define PCIE_PORT_SERVICE_BWNOTIF_SHIFT	4	/* Bandwidth notification */
24 #define PCIE_PORT_SERVICE_BWNOTIF	(1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT)
25 
26 #define PCIE_PORT_DEVICE_MAXSERVICES   5
27 
28 #ifdef CONFIG_PCIEAER
29 int pcie_aer_init(void);
30 #else
31 static inline int pcie_aer_init(void) { return 0; }
32 #endif
33 
34 #ifdef CONFIG_HOTPLUG_PCI_PCIE
35 int pcie_hp_init(void);
36 #else
37 static inline int pcie_hp_init(void) { return 0; }
38 #endif
39 
40 #ifdef CONFIG_PCIE_PME
41 int pcie_pme_init(void);
42 #else
43 static inline int pcie_pme_init(void) { return 0; }
44 #endif
45 
46 #ifdef CONFIG_PCIE_DPC
47 int pcie_dpc_init(void);
48 #else
49 static inline int pcie_dpc_init(void) { return 0; }
50 #endif
51 
52 #ifdef CONFIG_PCIE_BW
53 int pcie_bandwidth_notification_init(void);
54 #else
55 static inline int pcie_bandwidth_notification_init(void) { return 0; }
56 #endif
57 
58 /* Port Type */
59 #define PCIE_ANY_PORT			(~0)
60 
61 struct pcie_device {
62 	int		irq;	    /* Service IRQ/MSI/MSI-X Vector */
63 	struct pci_dev *port;	    /* Root/Upstream/Downstream Port */
64 	u32		service;    /* Port service this device represents */
65 	void		*priv_data; /* Service Private Data */
66 	struct device	device;     /* Generic Device Interface */
67 };
68 #define to_pcie_device(d) container_of(d, struct pcie_device, device)
69 
70 static inline void set_service_data(struct pcie_device *dev, void *data)
71 {
72 	dev->priv_data = data;
73 }
74 
75 static inline void *get_service_data(struct pcie_device *dev)
76 {
77 	return dev->priv_data;
78 }
79 
80 struct pcie_port_service_driver {
81 	const char *name;
82 	int (*probe)(struct pcie_device *dev);
83 	void (*remove)(struct pcie_device *dev);
84 	int (*suspend)(struct pcie_device *dev);
85 	int (*resume_noirq)(struct pcie_device *dev);
86 	int (*resume)(struct pcie_device *dev);
87 	int (*runtime_suspend)(struct pcie_device *dev);
88 	int (*runtime_resume)(struct pcie_device *dev);
89 
90 	/* Device driver may resume normal operations */
91 	void (*error_resume)(struct pci_dev *dev);
92 
93 	/* Link Reset Capability - AER service driver specific */
94 	pci_ers_result_t (*reset_link)(struct pci_dev *dev);
95 
96 	int port_type;  /* Type of the port this driver can handle */
97 	u32 service;    /* Port service this device represents */
98 
99 	struct device_driver driver;
100 };
101 #define to_service_driver(d) \
102 	container_of(d, struct pcie_port_service_driver, driver)
103 
104 int pcie_port_service_register(struct pcie_port_service_driver *new);
105 void pcie_port_service_unregister(struct pcie_port_service_driver *new);
106 
107 /*
108  * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
109  * be one of the first 32 MSI-X entries.  Per PCI r3.0, sec 6.8.3.1, MSI
110  * supports a maximum of 32 vectors per function.
111  */
112 #define PCIE_PORT_MAX_MSI_ENTRIES	32
113 
114 #define get_descriptor_id(type, service) (((type - 4) << 8) | service)
115 
116 extern struct bus_type pcie_port_bus_type;
117 int pcie_port_device_register(struct pci_dev *dev);
118 #ifdef CONFIG_PM
119 int pcie_port_device_suspend(struct device *dev);
120 int pcie_port_device_resume_noirq(struct device *dev);
121 int pcie_port_device_resume(struct device *dev);
122 int pcie_port_device_runtime_suspend(struct device *dev);
123 int pcie_port_device_runtime_resume(struct device *dev);
124 #endif
125 void pcie_port_device_remove(struct pci_dev *dev);
126 int __must_check pcie_port_bus_register(void);
127 void pcie_port_bus_unregister(void);
128 
129 struct pci_dev;
130 
131 #ifdef CONFIG_PCIE_PME
132 extern bool pcie_pme_msi_disabled;
133 
134 static inline void pcie_pme_disable_msi(void)
135 {
136 	pcie_pme_msi_disabled = true;
137 }
138 
139 static inline bool pcie_pme_no_msi(void)
140 {
141 	return pcie_pme_msi_disabled;
142 }
143 
144 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
145 #else /* !CONFIG_PCIE_PME */
146 static inline void pcie_pme_disable_msi(void) {}
147 static inline bool pcie_pme_no_msi(void) { return false; }
148 static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
149 #endif /* !CONFIG_PCIE_PME */
150 
151 #ifdef CONFIG_ACPI_APEI
152 int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
153 #else
154 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
155 {
156 	if (pci_dev->__aer_firmware_first_valid)
157 		return pci_dev->__aer_firmware_first;
158 	return 0;
159 }
160 #endif
161 
162 struct pcie_port_service_driver *pcie_port_find_service(struct pci_dev *dev,
163 							u32 service);
164 struct device *pcie_port_find_device(struct pci_dev *dev, u32 service);
165 #endif /* _PORTDRV_H_ */
166