1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Purpose: PCI Express Port Bus Driver's Internal Data Structures 4 * 5 * Copyright (C) 2004 Intel 6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) 7 */ 8 9 #ifndef _PORTDRV_H_ 10 #define _PORTDRV_H_ 11 12 #include <linux/compiler.h> 13 14 /* Service Type */ 15 #define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */ 16 #define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT) 17 #define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */ 18 #define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT) 19 #define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */ 20 #define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT) 21 #define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */ 22 #define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT) 23 #define PCIE_PORT_SERVICE_BWNOTIF_SHIFT 4 /* Bandwidth notification */ 24 #define PCIE_PORT_SERVICE_BWNOTIF (1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT) 25 26 #define PCIE_PORT_DEVICE_MAXSERVICES 5 27 28 extern bool pcie_ports_dpc_native; 29 30 #ifdef CONFIG_PCIEAER 31 int pcie_aer_init(void); 32 #else 33 static inline int pcie_aer_init(void) { return 0; } 34 #endif 35 36 #ifdef CONFIG_HOTPLUG_PCI_PCIE 37 int pcie_hp_init(void); 38 #else 39 static inline int pcie_hp_init(void) { return 0; } 40 #endif 41 42 #ifdef CONFIG_PCIE_PME 43 int pcie_pme_init(void); 44 #else 45 static inline int pcie_pme_init(void) { return 0; } 46 #endif 47 48 #ifdef CONFIG_PCIE_DPC 49 int pcie_dpc_init(void); 50 #else 51 static inline int pcie_dpc_init(void) { return 0; } 52 #endif 53 54 #ifdef CONFIG_PCIE_BW 55 int pcie_bandwidth_notification_init(void); 56 #else 57 static inline int pcie_bandwidth_notification_init(void) { return 0; } 58 #endif 59 60 /* Port Type */ 61 #define PCIE_ANY_PORT (~0) 62 63 struct pcie_device { 64 int irq; /* Service IRQ/MSI/MSI-X Vector */ 65 struct pci_dev *port; /* Root/Upstream/Downstream Port */ 66 u32 service; /* Port service this device represents */ 67 void *priv_data; /* Service Private Data */ 68 struct device device; /* Generic Device Interface */ 69 }; 70 #define to_pcie_device(d) container_of(d, struct pcie_device, device) 71 72 static inline void set_service_data(struct pcie_device *dev, void *data) 73 { 74 dev->priv_data = data; 75 } 76 77 static inline void *get_service_data(struct pcie_device *dev) 78 { 79 return dev->priv_data; 80 } 81 82 struct pcie_port_service_driver { 83 const char *name; 84 int (*probe)(struct pcie_device *dev); 85 void (*remove)(struct pcie_device *dev); 86 int (*suspend)(struct pcie_device *dev); 87 int (*resume_noirq)(struct pcie_device *dev); 88 int (*resume)(struct pcie_device *dev); 89 int (*runtime_suspend)(struct pcie_device *dev); 90 int (*runtime_resume)(struct pcie_device *dev); 91 92 /* Device driver may resume normal operations */ 93 void (*error_resume)(struct pci_dev *dev); 94 95 int port_type; /* Type of the port this driver can handle */ 96 u32 service; /* Port service this device represents */ 97 98 struct device_driver driver; 99 }; 100 #define to_service_driver(d) \ 101 container_of(d, struct pcie_port_service_driver, driver) 102 103 int pcie_port_service_register(struct pcie_port_service_driver *new); 104 void pcie_port_service_unregister(struct pcie_port_service_driver *new); 105 106 /* 107 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must 108 * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI 109 * supports a maximum of 32 vectors per function. 110 */ 111 #define PCIE_PORT_MAX_MSI_ENTRIES 32 112 113 #define get_descriptor_id(type, service) (((type - 4) << 8) | service) 114 115 extern struct bus_type pcie_port_bus_type; 116 int pcie_port_device_register(struct pci_dev *dev); 117 #ifdef CONFIG_PM 118 int pcie_port_device_suspend(struct device *dev); 119 int pcie_port_device_resume_noirq(struct device *dev); 120 int pcie_port_device_resume(struct device *dev); 121 int pcie_port_device_runtime_suspend(struct device *dev); 122 int pcie_port_device_runtime_resume(struct device *dev); 123 #endif 124 void pcie_port_device_remove(struct pci_dev *dev); 125 int __must_check pcie_port_bus_register(void); 126 void pcie_port_bus_unregister(void); 127 128 struct pci_dev; 129 130 #ifdef CONFIG_PCIE_PME 131 extern bool pcie_pme_msi_disabled; 132 133 static inline void pcie_pme_disable_msi(void) 134 { 135 pcie_pme_msi_disabled = true; 136 } 137 138 static inline bool pcie_pme_no_msi(void) 139 { 140 return pcie_pme_msi_disabled; 141 } 142 143 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable); 144 #else /* !CONFIG_PCIE_PME */ 145 static inline void pcie_pme_disable_msi(void) {} 146 static inline bool pcie_pme_no_msi(void) { return false; } 147 static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} 148 #endif /* !CONFIG_PCIE_PME */ 149 150 #ifdef CONFIG_ACPI_APEI 151 int pcie_aer_get_firmware_first(struct pci_dev *pci_dev); 152 #else 153 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev) 154 { 155 if (pci_dev->__aer_firmware_first_valid) 156 return pci_dev->__aer_firmware_first; 157 return 0; 158 } 159 #endif 160 161 struct device *pcie_port_find_device(struct pci_dev *dev, u32 service); 162 #endif /* _PORTDRV_H_ */ 163