1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Purpose: PCI Express Port Bus Driver's Internal Data Structures 4 * 5 * Copyright (C) 2004 Intel 6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) 7 */ 8 9 #ifndef _PORTDRV_H_ 10 #define _PORTDRV_H_ 11 12 #include <linux/compiler.h> 13 14 /* Service Type */ 15 #define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */ 16 #define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT) 17 #define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */ 18 #define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT) 19 #define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */ 20 #define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT) 21 #define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */ 22 #define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT) 23 #define PCIE_PORT_SERVICE_BWNOTIF_SHIFT 4 /* Bandwidth notification */ 24 #define PCIE_PORT_SERVICE_BWNOTIF (1 << PCIE_PORT_SERVICE_BWNOTIF_SHIFT) 25 26 #define PCIE_PORT_DEVICE_MAXSERVICES 5 27 28 #ifdef CONFIG_PCIEAER 29 int pcie_aer_init(void); 30 #else 31 static inline int pcie_aer_init(void) { return 0; } 32 #endif 33 34 #ifdef CONFIG_HOTPLUG_PCI_PCIE 35 int pcie_hp_init(void); 36 #else 37 static inline int pcie_hp_init(void) { return 0; } 38 #endif 39 40 #ifdef CONFIG_PCIE_PME 41 int pcie_pme_init(void); 42 #else 43 static inline int pcie_pme_init(void) { return 0; } 44 #endif 45 46 #ifdef CONFIG_PCIE_DPC 47 int pcie_dpc_init(void); 48 #else 49 static inline int pcie_dpc_init(void) { return 0; } 50 #endif 51 52 int pcie_bandwidth_notification_init(void); 53 54 /* Port Type */ 55 #define PCIE_ANY_PORT (~0) 56 57 struct pcie_device { 58 int irq; /* Service IRQ/MSI/MSI-X Vector */ 59 struct pci_dev *port; /* Root/Upstream/Downstream Port */ 60 u32 service; /* Port service this device represents */ 61 void *priv_data; /* Service Private Data */ 62 struct device device; /* Generic Device Interface */ 63 }; 64 #define to_pcie_device(d) container_of(d, struct pcie_device, device) 65 66 static inline void set_service_data(struct pcie_device *dev, void *data) 67 { 68 dev->priv_data = data; 69 } 70 71 static inline void *get_service_data(struct pcie_device *dev) 72 { 73 return dev->priv_data; 74 } 75 76 struct pcie_port_service_driver { 77 const char *name; 78 int (*probe)(struct pcie_device *dev); 79 void (*remove)(struct pcie_device *dev); 80 int (*suspend)(struct pcie_device *dev); 81 int (*resume_noirq)(struct pcie_device *dev); 82 int (*resume)(struct pcie_device *dev); 83 int (*runtime_suspend)(struct pcie_device *dev); 84 int (*runtime_resume)(struct pcie_device *dev); 85 86 /* Device driver may resume normal operations */ 87 void (*error_resume)(struct pci_dev *dev); 88 89 /* Link Reset Capability - AER service driver specific */ 90 pci_ers_result_t (*reset_link)(struct pci_dev *dev); 91 92 int port_type; /* Type of the port this driver can handle */ 93 u32 service; /* Port service this device represents */ 94 95 struct device_driver driver; 96 }; 97 #define to_service_driver(d) \ 98 container_of(d, struct pcie_port_service_driver, driver) 99 100 int pcie_port_service_register(struct pcie_port_service_driver *new); 101 void pcie_port_service_unregister(struct pcie_port_service_driver *new); 102 103 /* 104 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must 105 * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI 106 * supports a maximum of 32 vectors per function. 107 */ 108 #define PCIE_PORT_MAX_MSI_ENTRIES 32 109 110 #define get_descriptor_id(type, service) (((type - 4) << 8) | service) 111 112 extern struct bus_type pcie_port_bus_type; 113 int pcie_port_device_register(struct pci_dev *dev); 114 #ifdef CONFIG_PM 115 int pcie_port_device_suspend(struct device *dev); 116 int pcie_port_device_resume_noirq(struct device *dev); 117 int pcie_port_device_resume(struct device *dev); 118 int pcie_port_device_runtime_suspend(struct device *dev); 119 int pcie_port_device_runtime_resume(struct device *dev); 120 #endif 121 void pcie_port_device_remove(struct pci_dev *dev); 122 int __must_check pcie_port_bus_register(void); 123 void pcie_port_bus_unregister(void); 124 125 struct pci_dev; 126 127 #ifdef CONFIG_PCIE_PME 128 extern bool pcie_pme_msi_disabled; 129 130 static inline void pcie_pme_disable_msi(void) 131 { 132 pcie_pme_msi_disabled = true; 133 } 134 135 static inline bool pcie_pme_no_msi(void) 136 { 137 return pcie_pme_msi_disabled; 138 } 139 140 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable); 141 #else /* !CONFIG_PCIE_PME */ 142 static inline void pcie_pme_disable_msi(void) {} 143 static inline bool pcie_pme_no_msi(void) { return false; } 144 static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} 145 #endif /* !CONFIG_PCIE_PME */ 146 147 #ifdef CONFIG_ACPI_APEI 148 int pcie_aer_get_firmware_first(struct pci_dev *pci_dev); 149 #else 150 static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev) 151 { 152 if (pci_dev->__aer_firmware_first_valid) 153 return pci_dev->__aer_firmware_first; 154 return 0; 155 } 156 #endif 157 158 struct pcie_port_service_driver *pcie_port_find_service(struct pci_dev *dev, 159 u32 service); 160 struct device *pcie_port_find_device(struct pci_dev *dev, u32 service); 161 #endif /* _PORTDRV_H_ */ 162