1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Purpose: PCI Express Port Bus Driver 4 * 5 * Copyright (C) 2004 Intel 6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) 7 */ 8 9 #include <linux/dmi.h> 10 #include <linux/init.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/kernel.h> 14 #include <linux/errno.h> 15 #include <linux/pm.h> 16 #include <linux/pm_runtime.h> 17 #include <linux/string.h> 18 #include <linux/slab.h> 19 #include <linux/aer.h> 20 21 #include "../pci.h" 22 #include "portdrv.h" 23 24 /* 25 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must 26 * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI 27 * supports a maximum of 32 vectors per function. 28 */ 29 #define PCIE_PORT_MAX_MSI_ENTRIES 32 30 31 #define get_descriptor_id(type, service) (((type - 4) << 8) | service) 32 33 struct portdrv_service_data { 34 struct pcie_port_service_driver *drv; 35 struct device *dev; 36 u32 service; 37 }; 38 39 /** 40 * release_pcie_device - free PCI Express port service device structure 41 * @dev: Port service device to release 42 * 43 * Invoked automatically when device is being removed in response to 44 * device_unregister(dev). Release all resources being claimed. 45 */ 46 static void release_pcie_device(struct device *dev) 47 { 48 kfree(to_pcie_device(dev)); 49 } 50 51 /* 52 * Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if 53 * services are enabled in "mask". Return the number of MSI/MSI-X vectors 54 * required to accommodate the largest Message Number. 55 */ 56 static int pcie_message_numbers(struct pci_dev *dev, int mask, 57 u32 *pme, u32 *aer, u32 *dpc) 58 { 59 u32 nvec = 0, pos; 60 u16 reg16; 61 62 /* 63 * The Interrupt Message Number indicates which vector is used, i.e., 64 * the MSI-X table entry or the MSI offset between the base Message 65 * Data and the generated interrupt message. See PCIe r3.1, sec 66 * 7.8.2, 7.10.10, 7.31.2. 67 */ 68 69 if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP | 70 PCIE_PORT_SERVICE_BWNOTIF)) { 71 pcie_capability_read_word(dev, PCI_EXP_FLAGS, ®16); 72 *pme = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; 73 nvec = *pme + 1; 74 } 75 76 #ifdef CONFIG_PCIEAER 77 if (mask & PCIE_PORT_SERVICE_AER) { 78 u32 reg32; 79 80 pos = dev->aer_cap; 81 if (pos) { 82 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, 83 ®32); 84 *aer = (reg32 & PCI_ERR_ROOT_AER_IRQ) >> 27; 85 nvec = max(nvec, *aer + 1); 86 } 87 } 88 #endif 89 90 if (mask & PCIE_PORT_SERVICE_DPC) { 91 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC); 92 if (pos) { 93 pci_read_config_word(dev, pos + PCI_EXP_DPC_CAP, 94 ®16); 95 *dpc = reg16 & PCI_EXP_DPC_IRQ; 96 nvec = max(nvec, *dpc + 1); 97 } 98 } 99 100 return nvec; 101 } 102 103 /** 104 * pcie_port_enable_irq_vec - try to set up MSI-X or MSI as interrupt mode 105 * for given port 106 * @dev: PCI Express port to handle 107 * @irqs: Array of interrupt vectors to populate 108 * @mask: Bitmask of port capabilities returned by get_port_device_capability() 109 * 110 * Return value: 0 on success, error code on failure 111 */ 112 static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask) 113 { 114 int nr_entries, nvec, pcie_irq; 115 u32 pme = 0, aer = 0, dpc = 0; 116 117 /* Allocate the maximum possible number of MSI/MSI-X vectors */ 118 nr_entries = pci_alloc_irq_vectors(dev, 1, PCIE_PORT_MAX_MSI_ENTRIES, 119 PCI_IRQ_MSIX | PCI_IRQ_MSI); 120 if (nr_entries < 0) 121 return nr_entries; 122 123 /* See how many and which Interrupt Message Numbers we actually use */ 124 nvec = pcie_message_numbers(dev, mask, &pme, &aer, &dpc); 125 if (nvec > nr_entries) { 126 pci_free_irq_vectors(dev); 127 return -EIO; 128 } 129 130 /* 131 * If we allocated more than we need, free them and reallocate fewer. 132 * 133 * Reallocating may change the specific vectors we get, so 134 * pci_irq_vector() must be done *after* the reallocation. 135 * 136 * If we're using MSI, hardware is *allowed* to change the Interrupt 137 * Message Numbers when we free and reallocate the vectors, but we 138 * assume it won't because we allocate enough vectors for the 139 * biggest Message Number we found. 140 */ 141 if (nvec != nr_entries) { 142 pci_free_irq_vectors(dev); 143 144 nr_entries = pci_alloc_irq_vectors(dev, nvec, nvec, 145 PCI_IRQ_MSIX | PCI_IRQ_MSI); 146 if (nr_entries < 0) 147 return nr_entries; 148 } 149 150 /* PME, hotplug and bandwidth notification share an MSI/MSI-X vector */ 151 if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP | 152 PCIE_PORT_SERVICE_BWNOTIF)) { 153 pcie_irq = pci_irq_vector(dev, pme); 154 irqs[PCIE_PORT_SERVICE_PME_SHIFT] = pcie_irq; 155 irqs[PCIE_PORT_SERVICE_HP_SHIFT] = pcie_irq; 156 irqs[PCIE_PORT_SERVICE_BWNOTIF_SHIFT] = pcie_irq; 157 } 158 159 if (mask & PCIE_PORT_SERVICE_AER) 160 irqs[PCIE_PORT_SERVICE_AER_SHIFT] = pci_irq_vector(dev, aer); 161 162 if (mask & PCIE_PORT_SERVICE_DPC) 163 irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc); 164 165 return 0; 166 } 167 168 /** 169 * pcie_init_service_irqs - initialize irqs for PCI Express port services 170 * @dev: PCI Express port to handle 171 * @irqs: Array of irqs to populate 172 * @mask: Bitmask of port capabilities returned by get_port_device_capability() 173 * 174 * Return value: Interrupt mode associated with the port 175 */ 176 static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask) 177 { 178 int ret, i; 179 180 for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) 181 irqs[i] = -1; 182 183 /* 184 * If we support PME but can't use MSI/MSI-X for it, we have to 185 * fall back to INTx or other interrupts, e.g., a system shared 186 * interrupt. 187 */ 188 if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) 189 goto legacy_irq; 190 191 /* Try to use MSI-X or MSI if supported */ 192 if (pcie_port_enable_irq_vec(dev, irqs, mask) == 0) 193 return 0; 194 195 legacy_irq: 196 /* fall back to legacy IRQ */ 197 ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_LEGACY); 198 if (ret < 0) 199 return -ENODEV; 200 201 for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) 202 irqs[i] = pci_irq_vector(dev, 0); 203 204 return 0; 205 } 206 207 /** 208 * get_port_device_capability - discover capabilities of a PCI Express port 209 * @dev: PCI Express port to examine 210 * 211 * The capabilities are read from the port's PCI Express configuration registers 212 * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and 213 * 7.9 - 7.11. 214 * 215 * Return value: Bitmask of discovered port capabilities 216 */ 217 static int get_port_device_capability(struct pci_dev *dev) 218 { 219 struct pci_host_bridge *host = pci_find_host_bridge(dev->bus); 220 int services = 0; 221 222 if (dev->is_hotplug_bridge && 223 (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || 224 pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) && 225 (pcie_ports_native || host->native_pcie_hotplug)) { 226 services |= PCIE_PORT_SERVICE_HP; 227 228 /* 229 * Disable hot-plug interrupts in case they have been enabled 230 * by the BIOS and the hot-plug service driver is not loaded. 231 */ 232 pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, 233 PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); 234 } 235 236 #ifdef CONFIG_PCIEAER 237 if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || 238 pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && 239 dev->aer_cap && pci_aer_available() && 240 (pcie_ports_native || host->native_aer)) 241 services |= PCIE_PORT_SERVICE_AER; 242 #endif 243 244 /* Root Ports and Root Complex Event Collectors may generate PMEs */ 245 if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || 246 pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && 247 (pcie_ports_native || host->native_pme)) { 248 services |= PCIE_PORT_SERVICE_PME; 249 250 /* 251 * Disable PME interrupt on this port in case it's been enabled 252 * by the BIOS (the PME service driver will enable it when 253 * necessary). 254 */ 255 pcie_pme_interrupt_enable(dev, false); 256 } 257 258 /* 259 * With dpc-native, allow Linux to use DPC even if it doesn't have 260 * permission to use AER. 261 */ 262 if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC) && 263 pci_aer_available() && 264 (pcie_ports_dpc_native || (services & PCIE_PORT_SERVICE_AER))) 265 services |= PCIE_PORT_SERVICE_DPC; 266 267 if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || 268 pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) { 269 u32 linkcap; 270 271 pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap); 272 if (linkcap & PCI_EXP_LNKCAP_LBNC) 273 services |= PCIE_PORT_SERVICE_BWNOTIF; 274 } 275 276 return services; 277 } 278 279 /** 280 * pcie_device_init - allocate and initialize PCI Express port service device 281 * @pdev: PCI Express port to associate the service device with 282 * @service: Type of service to associate with the service device 283 * @irq: Interrupt vector to associate with the service device 284 */ 285 static int pcie_device_init(struct pci_dev *pdev, int service, int irq) 286 { 287 int retval; 288 struct pcie_device *pcie; 289 struct device *device; 290 291 pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); 292 if (!pcie) 293 return -ENOMEM; 294 pcie->port = pdev; 295 pcie->irq = irq; 296 pcie->service = service; 297 298 /* Initialize generic device interface */ 299 device = &pcie->device; 300 device->bus = &pcie_port_bus_type; 301 device->release = release_pcie_device; /* callback to free pcie dev */ 302 dev_set_name(device, "%s:pcie%03x", 303 pci_name(pdev), 304 get_descriptor_id(pci_pcie_type(pdev), service)); 305 device->parent = &pdev->dev; 306 device_enable_async_suspend(device); 307 308 retval = device_register(device); 309 if (retval) { 310 put_device(device); 311 return retval; 312 } 313 314 pm_runtime_no_callbacks(device); 315 316 return 0; 317 } 318 319 /** 320 * pcie_port_device_register - register PCI Express port 321 * @dev: PCI Express port to register 322 * 323 * Allocate the port extension structure and register services associated with 324 * the port. 325 */ 326 static int pcie_port_device_register(struct pci_dev *dev) 327 { 328 int status, capabilities, i, nr_service; 329 int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; 330 331 /* Enable PCI Express port device */ 332 status = pci_enable_device(dev); 333 if (status) 334 return status; 335 336 /* Get and check PCI Express port services */ 337 capabilities = get_port_device_capability(dev); 338 if (!capabilities) 339 return 0; 340 341 pci_set_master(dev); 342 /* 343 * Initialize service irqs. Don't use service devices that 344 * require interrupts if there is no way to generate them. 345 * However, some drivers may have a polling mode (e.g. pciehp_poll_mode) 346 * that can be used in the absence of irqs. Allow them to determine 347 * if that is to be used. 348 */ 349 status = pcie_init_service_irqs(dev, irqs, capabilities); 350 if (status) { 351 capabilities &= PCIE_PORT_SERVICE_HP; 352 if (!capabilities) 353 goto error_disable; 354 } 355 356 /* Allocate child services if any */ 357 status = -ENODEV; 358 nr_service = 0; 359 for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { 360 int service = 1 << i; 361 if (!(capabilities & service)) 362 continue; 363 if (!pcie_device_init(dev, service, irqs[i])) 364 nr_service++; 365 } 366 if (!nr_service) 367 goto error_cleanup_irqs; 368 369 return 0; 370 371 error_cleanup_irqs: 372 pci_free_irq_vectors(dev); 373 error_disable: 374 pci_disable_device(dev); 375 return status; 376 } 377 378 typedef int (*pcie_callback_t)(struct pcie_device *); 379 380 static int pcie_port_device_iter(struct device *dev, void *data) 381 { 382 struct pcie_port_service_driver *service_driver; 383 size_t offset = *(size_t *)data; 384 pcie_callback_t cb; 385 386 if ((dev->bus == &pcie_port_bus_type) && dev->driver) { 387 service_driver = to_service_driver(dev->driver); 388 cb = *(pcie_callback_t *)((void *)service_driver + offset); 389 if (cb) 390 return cb(to_pcie_device(dev)); 391 } 392 return 0; 393 } 394 395 #ifdef CONFIG_PM 396 /** 397 * pcie_port_device_suspend - suspend port services associated with a PCIe port 398 * @dev: PCI Express port to handle 399 */ 400 static int pcie_port_device_suspend(struct device *dev) 401 { 402 size_t off = offsetof(struct pcie_port_service_driver, suspend); 403 return device_for_each_child(dev, &off, pcie_port_device_iter); 404 } 405 406 static int pcie_port_device_resume_noirq(struct device *dev) 407 { 408 size_t off = offsetof(struct pcie_port_service_driver, resume_noirq); 409 return device_for_each_child(dev, &off, pcie_port_device_iter); 410 } 411 412 /** 413 * pcie_port_device_resume - resume port services associated with a PCIe port 414 * @dev: PCI Express port to handle 415 */ 416 static int pcie_port_device_resume(struct device *dev) 417 { 418 size_t off = offsetof(struct pcie_port_service_driver, resume); 419 return device_for_each_child(dev, &off, pcie_port_device_iter); 420 } 421 422 /** 423 * pcie_port_device_runtime_suspend - runtime suspend port services 424 * @dev: PCI Express port to handle 425 */ 426 static int pcie_port_device_runtime_suspend(struct device *dev) 427 { 428 size_t off = offsetof(struct pcie_port_service_driver, runtime_suspend); 429 return device_for_each_child(dev, &off, pcie_port_device_iter); 430 } 431 432 /** 433 * pcie_port_device_runtime_resume - runtime resume port services 434 * @dev: PCI Express port to handle 435 */ 436 static int pcie_port_device_runtime_resume(struct device *dev) 437 { 438 size_t off = offsetof(struct pcie_port_service_driver, runtime_resume); 439 return device_for_each_child(dev, &off, pcie_port_device_iter); 440 } 441 #endif /* PM */ 442 443 static int remove_iter(struct device *dev, void *data) 444 { 445 if (dev->bus == &pcie_port_bus_type) 446 device_unregister(dev); 447 return 0; 448 } 449 450 static int find_service_iter(struct device *device, void *data) 451 { 452 struct pcie_port_service_driver *service_driver; 453 struct portdrv_service_data *pdrvs; 454 u32 service; 455 456 pdrvs = (struct portdrv_service_data *) data; 457 service = pdrvs->service; 458 459 if (device->bus == &pcie_port_bus_type && device->driver) { 460 service_driver = to_service_driver(device->driver); 461 if (service_driver->service == service) { 462 pdrvs->drv = service_driver; 463 pdrvs->dev = device; 464 return 1; 465 } 466 } 467 468 return 0; 469 } 470 471 /** 472 * pcie_port_find_device - find the struct device 473 * @dev: PCI Express port the service is associated with 474 * @service: For the service to find 475 * 476 * Find the struct device associated with given service on a pci_dev 477 */ 478 struct device *pcie_port_find_device(struct pci_dev *dev, 479 u32 service) 480 { 481 struct device *device; 482 struct portdrv_service_data pdrvs; 483 484 pdrvs.dev = NULL; 485 pdrvs.service = service; 486 device_for_each_child(&dev->dev, &pdrvs, find_service_iter); 487 488 device = pdrvs.dev; 489 return device; 490 } 491 EXPORT_SYMBOL_GPL(pcie_port_find_device); 492 493 /** 494 * pcie_port_device_remove - unregister PCI Express port service devices 495 * @dev: PCI Express port the service devices to unregister are associated with 496 * 497 * Remove PCI Express port service devices associated with given port and 498 * disable MSI-X or MSI for the port. 499 */ 500 static void pcie_port_device_remove(struct pci_dev *dev) 501 { 502 device_for_each_child(&dev->dev, NULL, remove_iter); 503 pci_free_irq_vectors(dev); 504 } 505 506 /** 507 * pcie_port_probe_service - probe driver for given PCI Express port service 508 * @dev: PCI Express port service device to probe against 509 * 510 * If PCI Express port service driver is registered with 511 * pcie_port_service_register(), this function will be called by the driver core 512 * whenever match is found between the driver and a port service device. 513 */ 514 static int pcie_port_probe_service(struct device *dev) 515 { 516 struct pcie_device *pciedev; 517 struct pcie_port_service_driver *driver; 518 int status; 519 520 if (!dev || !dev->driver) 521 return -ENODEV; 522 523 driver = to_service_driver(dev->driver); 524 if (!driver || !driver->probe) 525 return -ENODEV; 526 527 pciedev = to_pcie_device(dev); 528 status = driver->probe(pciedev); 529 if (status) 530 return status; 531 532 get_device(dev); 533 return 0; 534 } 535 536 /** 537 * pcie_port_remove_service - detach driver from given PCI Express port service 538 * @dev: PCI Express port service device to handle 539 * 540 * If PCI Express port service driver is registered with 541 * pcie_port_service_register(), this function will be called by the driver core 542 * when device_unregister() is called for the port service device associated 543 * with the driver. 544 */ 545 static int pcie_port_remove_service(struct device *dev) 546 { 547 struct pcie_device *pciedev; 548 struct pcie_port_service_driver *driver; 549 550 if (!dev || !dev->driver) 551 return 0; 552 553 pciedev = to_pcie_device(dev); 554 driver = to_service_driver(dev->driver); 555 if (driver && driver->remove) { 556 driver->remove(pciedev); 557 put_device(dev); 558 } 559 return 0; 560 } 561 562 /** 563 * pcie_port_shutdown_service - shut down given PCI Express port service 564 * @dev: PCI Express port service device to handle 565 * 566 * If PCI Express port service driver is registered with 567 * pcie_port_service_register(), this function will be called by the driver core 568 * when device_shutdown() is called for the port service device associated 569 * with the driver. 570 */ 571 static void pcie_port_shutdown_service(struct device *dev) {} 572 573 /** 574 * pcie_port_service_register - register PCI Express port service driver 575 * @new: PCI Express port service driver to register 576 */ 577 int pcie_port_service_register(struct pcie_port_service_driver *new) 578 { 579 if (pcie_ports_disabled) 580 return -ENODEV; 581 582 new->driver.name = new->name; 583 new->driver.bus = &pcie_port_bus_type; 584 new->driver.probe = pcie_port_probe_service; 585 new->driver.remove = pcie_port_remove_service; 586 new->driver.shutdown = pcie_port_shutdown_service; 587 588 return driver_register(&new->driver); 589 } 590 591 /** 592 * pcie_port_service_unregister - unregister PCI Express port service driver 593 * @drv: PCI Express port service driver to unregister 594 */ 595 void pcie_port_service_unregister(struct pcie_port_service_driver *drv) 596 { 597 driver_unregister(&drv->driver); 598 } 599 600 /* If this switch is set, PCIe port native services should not be enabled. */ 601 bool pcie_ports_disabled; 602 603 /* 604 * If the user specified "pcie_ports=native", use the PCIe services regardless 605 * of whether the platform has given us permission. On ACPI systems, this 606 * means we ignore _OSC. 607 */ 608 bool pcie_ports_native; 609 610 /* 611 * If the user specified "pcie_ports=dpc-native", use the Linux DPC PCIe 612 * service even if the platform hasn't given us permission. 613 */ 614 bool pcie_ports_dpc_native; 615 616 static int __init pcie_port_setup(char *str) 617 { 618 if (!strncmp(str, "compat", 6)) 619 pcie_ports_disabled = true; 620 else if (!strncmp(str, "native", 6)) 621 pcie_ports_native = true; 622 else if (!strncmp(str, "dpc-native", 10)) 623 pcie_ports_dpc_native = true; 624 625 return 1; 626 } 627 __setup("pcie_ports=", pcie_port_setup); 628 629 /* global data */ 630 631 #ifdef CONFIG_PM 632 static int pcie_port_runtime_suspend(struct device *dev) 633 { 634 if (!to_pci_dev(dev)->bridge_d3) 635 return -EBUSY; 636 637 return pcie_port_device_runtime_suspend(dev); 638 } 639 640 static int pcie_port_runtime_idle(struct device *dev) 641 { 642 /* 643 * Assume the PCI core has set bridge_d3 whenever it thinks the port 644 * should be good to go to D3. Everything else, including moving 645 * the port to D3, is handled by the PCI core. 646 */ 647 return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY; 648 } 649 650 static const struct dev_pm_ops pcie_portdrv_pm_ops = { 651 .suspend = pcie_port_device_suspend, 652 .resume_noirq = pcie_port_device_resume_noirq, 653 .resume = pcie_port_device_resume, 654 .freeze = pcie_port_device_suspend, 655 .thaw = pcie_port_device_resume, 656 .poweroff = pcie_port_device_suspend, 657 .restore_noirq = pcie_port_device_resume_noirq, 658 .restore = pcie_port_device_resume, 659 .runtime_suspend = pcie_port_runtime_suspend, 660 .runtime_resume = pcie_port_device_runtime_resume, 661 .runtime_idle = pcie_port_runtime_idle, 662 }; 663 664 #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops) 665 666 #else /* !PM */ 667 668 #define PCIE_PORTDRV_PM_OPS NULL 669 #endif /* !PM */ 670 671 /* 672 * pcie_portdrv_probe - Probe PCI-Express port devices 673 * @dev: PCI-Express port device being probed 674 * 675 * If detected invokes the pcie_port_device_register() method for 676 * this port device. 677 * 678 */ 679 static int pcie_portdrv_probe(struct pci_dev *dev, 680 const struct pci_device_id *id) 681 { 682 int type = pci_pcie_type(dev); 683 int status; 684 685 if (!pci_is_pcie(dev) || 686 ((type != PCI_EXP_TYPE_ROOT_PORT) && 687 (type != PCI_EXP_TYPE_UPSTREAM) && 688 (type != PCI_EXP_TYPE_DOWNSTREAM) && 689 (type != PCI_EXP_TYPE_RC_EC))) 690 return -ENODEV; 691 692 if (type == PCI_EXP_TYPE_RC_EC) 693 pcie_link_rcec(dev); 694 695 status = pcie_port_device_register(dev); 696 if (status) 697 return status; 698 699 pci_save_state(dev); 700 701 dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE | 702 DPM_FLAG_SMART_SUSPEND); 703 704 if (pci_bridge_d3_possible(dev)) { 705 /* 706 * Keep the port resumed 100ms to make sure things like 707 * config space accesses from userspace (lspci) will not 708 * cause the port to repeatedly suspend and resume. 709 */ 710 pm_runtime_set_autosuspend_delay(&dev->dev, 100); 711 pm_runtime_use_autosuspend(&dev->dev); 712 pm_runtime_mark_last_busy(&dev->dev); 713 pm_runtime_put_autosuspend(&dev->dev); 714 pm_runtime_allow(&dev->dev); 715 } 716 717 return 0; 718 } 719 720 static void pcie_portdrv_remove(struct pci_dev *dev) 721 { 722 if (pci_bridge_d3_possible(dev)) { 723 pm_runtime_forbid(&dev->dev); 724 pm_runtime_get_noresume(&dev->dev); 725 pm_runtime_dont_use_autosuspend(&dev->dev); 726 } 727 728 pcie_port_device_remove(dev); 729 730 pci_disable_device(dev); 731 } 732 733 static void pcie_portdrv_shutdown(struct pci_dev *dev) 734 { 735 if (pci_bridge_d3_possible(dev)) { 736 pm_runtime_forbid(&dev->dev); 737 pm_runtime_get_noresume(&dev->dev); 738 pm_runtime_dont_use_autosuspend(&dev->dev); 739 } 740 741 pcie_port_device_remove(dev); 742 } 743 744 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev, 745 pci_channel_state_t error) 746 { 747 if (error == pci_channel_io_frozen) 748 return PCI_ERS_RESULT_NEED_RESET; 749 return PCI_ERS_RESULT_CAN_RECOVER; 750 } 751 752 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev) 753 { 754 size_t off = offsetof(struct pcie_port_service_driver, slot_reset); 755 device_for_each_child(&dev->dev, &off, pcie_port_device_iter); 756 757 pci_restore_state(dev); 758 pci_save_state(dev); 759 return PCI_ERS_RESULT_RECOVERED; 760 } 761 762 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev) 763 { 764 return PCI_ERS_RESULT_RECOVERED; 765 } 766 767 /* 768 * LINUX Device Driver Model 769 */ 770 static const struct pci_device_id port_pci_ids[] = { 771 /* handle any PCI-Express port */ 772 { PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_NORMAL, ~0) }, 773 /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ 774 { PCI_DEVICE_CLASS(PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE, ~0) }, 775 /* handle any Root Complex Event Collector */ 776 { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, 777 { }, 778 }; 779 780 static const struct pci_error_handlers pcie_portdrv_err_handler = { 781 .error_detected = pcie_portdrv_error_detected, 782 .slot_reset = pcie_portdrv_slot_reset, 783 .mmio_enabled = pcie_portdrv_mmio_enabled, 784 }; 785 786 static struct pci_driver pcie_portdriver = { 787 .name = "pcieport", 788 .id_table = &port_pci_ids[0], 789 790 .probe = pcie_portdrv_probe, 791 .remove = pcie_portdrv_remove, 792 .shutdown = pcie_portdrv_shutdown, 793 794 .err_handler = &pcie_portdrv_err_handler, 795 796 .driver_managed_dma = true, 797 798 .driver.pm = PCIE_PORTDRV_PM_OPS, 799 }; 800 801 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d) 802 { 803 pr_notice("%s detected: will not use MSI for PCIe PME signaling\n", 804 d->ident); 805 pcie_pme_disable_msi(); 806 return 0; 807 } 808 809 static const struct dmi_system_id pcie_portdrv_dmi_table[] __initconst = { 810 /* 811 * Boxes that should not use MSI for PCIe PME signaling. 812 */ 813 { 814 .callback = dmi_pcie_pme_disable_msi, 815 .ident = "MSI Wind U-100", 816 .matches = { 817 DMI_MATCH(DMI_SYS_VENDOR, 818 "MICRO-STAR INTERNATIONAL CO., LTD"), 819 DMI_MATCH(DMI_PRODUCT_NAME, "U-100"), 820 }, 821 }, 822 {} 823 }; 824 825 static void __init pcie_init_services(void) 826 { 827 pcie_aer_init(); 828 pcie_pme_init(); 829 pcie_dpc_init(); 830 pcie_hp_init(); 831 } 832 833 static int __init pcie_portdrv_init(void) 834 { 835 if (pcie_ports_disabled) 836 return -EACCES; 837 838 pcie_init_services(); 839 dmi_check_system(pcie_portdrv_dmi_table); 840 841 return pci_register_driver(&pcie_portdriver); 842 } 843 device_initcall(pcie_portdrv_init); 844