1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #define PCI_CFG_SPACE_SIZE 256 5 #define PCI_CFG_SPACE_EXP_SIZE 4096 6 7 extern const unsigned char pcie_link_speed[]; 8 9 bool pcie_cap_has_lnkctl(const struct pci_dev *dev); 10 11 /* Functions internal to the PCI core code */ 12 13 int pci_create_sysfs_dev_files(struct pci_dev *pdev); 14 void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 15 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 16 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 17 { return; } 18 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 19 { return; } 20 #else 21 void pci_create_firmware_label_files(struct pci_dev *pdev); 22 void pci_remove_firmware_label_files(struct pci_dev *pdev); 23 #endif 24 void pci_cleanup_rom(struct pci_dev *dev); 25 #ifdef HAVE_PCI_MMAP 26 enum pci_mmap_api { 27 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 28 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 29 }; 30 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, 31 enum pci_mmap_api mmap_api); 32 #endif 33 int pci_probe_reset_function(struct pci_dev *dev); 34 35 /** 36 * struct pci_platform_pm_ops - Firmware PM callbacks 37 * 38 * @is_manageable: returns 'true' if given device is power manageable by the 39 * platform firmware 40 * 41 * @set_state: invokes the platform firmware to set the device's power state 42 * 43 * @choose_state: returns PCI power state of given device preferred by the 44 * platform; to be used during system-wide transitions from a 45 * sleeping state to the working state and vice versa 46 * 47 * @sleep_wake: enables/disables the system wake up capability of given device 48 * 49 * @run_wake: enables/disables the platform to generate run-time wake-up events 50 * for given device (the device's wake-up capability has to be 51 * enabled by @sleep_wake for this feature to work) 52 * 53 * If given platform is generally capable of power managing PCI devices, all of 54 * these callbacks are mandatory. 55 */ 56 struct pci_platform_pm_ops { 57 bool (*is_manageable)(struct pci_dev *dev); 58 int (*set_state)(struct pci_dev *dev, pci_power_t state); 59 pci_power_t (*choose_state)(struct pci_dev *dev); 60 int (*sleep_wake)(struct pci_dev *dev, bool enable); 61 int (*run_wake)(struct pci_dev *dev, bool enable); 62 }; 63 64 int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 65 void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 66 void pci_power_up(struct pci_dev *dev); 67 void pci_disable_enabled_device(struct pci_dev *dev); 68 int pci_finish_runtime_suspend(struct pci_dev *dev); 69 int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 70 void pci_config_pm_runtime_get(struct pci_dev *dev); 71 void pci_config_pm_runtime_put(struct pci_dev *dev); 72 void pci_pm_init(struct pci_dev *dev); 73 void pci_allocate_cap_save_buffers(struct pci_dev *dev); 74 void pci_free_cap_save_buffers(struct pci_dev *dev); 75 76 static inline void pci_wakeup_event(struct pci_dev *dev) 77 { 78 /* Wait 100 ms before the system can be put into a sleep state. */ 79 pm_wakeup_event(&dev->dev, 100); 80 } 81 82 static inline bool pci_has_subordinate(struct pci_dev *pci_dev) 83 { 84 return !!(pci_dev->subordinate); 85 } 86 87 struct pci_vpd_ops { 88 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 89 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 90 void (*release)(struct pci_dev *dev); 91 }; 92 93 struct pci_vpd { 94 unsigned int len; 95 const struct pci_vpd_ops *ops; 96 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 97 }; 98 99 int pci_vpd_pci22_init(struct pci_dev *dev); 100 static inline void pci_vpd_release(struct pci_dev *dev) 101 { 102 if (dev->vpd) 103 dev->vpd->ops->release(dev); 104 } 105 106 /* PCI /proc functions */ 107 #ifdef CONFIG_PROC_FS 108 int pci_proc_attach_device(struct pci_dev *dev); 109 int pci_proc_detach_device(struct pci_dev *dev); 110 int pci_proc_detach_bus(struct pci_bus *bus); 111 #else 112 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 113 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 114 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 115 #endif 116 117 /* Functions for PCI Hotplug drivers to use */ 118 int pci_hp_add_bridge(struct pci_dev *dev); 119 120 #ifdef HAVE_PCI_LEGACY 121 void pci_create_legacy_files(struct pci_bus *bus); 122 void pci_remove_legacy_files(struct pci_bus *bus); 123 #else 124 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 125 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 126 #endif 127 128 /* Lock for read/write access to pci device and bus lists */ 129 extern struct rw_semaphore pci_bus_sem; 130 131 extern raw_spinlock_t pci_lock; 132 133 extern unsigned int pci_pm_d3_delay; 134 135 #ifdef CONFIG_PCI_MSI 136 void pci_no_msi(void); 137 void pci_msi_init_pci_dev(struct pci_dev *dev); 138 #else 139 static inline void pci_no_msi(void) { } 140 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 141 #endif 142 143 void pci_realloc_get_opt(char *); 144 145 static inline int pci_no_d1d2(struct pci_dev *dev) 146 { 147 unsigned int parent_dstates = 0; 148 149 if (dev->bus->self) 150 parent_dstates = dev->bus->self->no_d1d2; 151 return (dev->no_d1d2 || parent_dstates); 152 153 } 154 extern const struct attribute_group *pci_dev_groups[]; 155 extern const struct attribute_group *pcibus_groups[]; 156 extern struct device_type pci_dev_type; 157 extern const struct attribute_group *pci_bus_groups[]; 158 159 160 /** 161 * pci_match_one_device - Tell if a PCI device structure has a matching 162 * PCI device id structure 163 * @id: single PCI device id structure to match 164 * @dev: the PCI device structure to match against 165 * 166 * Returns the matching pci_device_id structure or %NULL if there is no match. 167 */ 168 static inline const struct pci_device_id * 169 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 170 { 171 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 172 (id->device == PCI_ANY_ID || id->device == dev->device) && 173 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 174 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 175 !((id->class ^ dev->class) & id->class_mask)) 176 return id; 177 return NULL; 178 } 179 180 /* PCI slot sysfs helper code */ 181 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 182 183 extern struct kset *pci_slots_kset; 184 185 struct pci_slot_attribute { 186 struct attribute attr; 187 ssize_t (*show)(struct pci_slot *, char *); 188 ssize_t (*store)(struct pci_slot *, const char *, size_t); 189 }; 190 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 191 192 enum pci_bar_type { 193 pci_bar_unknown, /* Standard PCI BAR probe */ 194 pci_bar_io, /* An io port BAR */ 195 pci_bar_mem32, /* A 32-bit memory BAR */ 196 pci_bar_mem64, /* A 64-bit memory BAR */ 197 }; 198 199 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 200 int crs_timeout); 201 int pci_setup_device(struct pci_dev *dev); 202 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 203 struct resource *res, unsigned int reg); 204 int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type); 205 void pci_configure_ari(struct pci_dev *dev); 206 void __pci_bus_size_bridges(struct pci_bus *bus, 207 struct list_head *realloc_head); 208 void __pci_bus_assign_resources(const struct pci_bus *bus, 209 struct list_head *realloc_head, 210 struct list_head *fail_head); 211 bool pci_bus_clip_resource(struct pci_dev *dev, int idx); 212 213 /** 214 * pci_ari_enabled - query ARI forwarding status 215 * @bus: the PCI bus 216 * 217 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 218 */ 219 static inline int pci_ari_enabled(struct pci_bus *bus) 220 { 221 return bus->self && bus->self->ari_enabled; 222 } 223 224 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 225 void pci_disable_bridge_window(struct pci_dev *dev); 226 227 /* Single Root I/O Virtualization */ 228 struct pci_sriov { 229 int pos; /* capability position */ 230 int nres; /* number of resources */ 231 u32 cap; /* SR-IOV Capabilities */ 232 u16 ctrl; /* SR-IOV Control */ 233 u16 total_VFs; /* total VFs associated with the PF */ 234 u16 initial_VFs; /* initial VFs associated with the PF */ 235 u16 num_VFs; /* number of VFs available */ 236 u16 offset; /* first VF Routing ID offset */ 237 u16 stride; /* following VF stride */ 238 u32 pgsz; /* page size for BAR alignment */ 239 u8 link; /* Function Dependency Link */ 240 u16 driver_max_VFs; /* max num VFs driver supports */ 241 struct pci_dev *dev; /* lowest numbered PF */ 242 struct pci_dev *self; /* this PF */ 243 struct mutex lock; /* lock for VF bus */ 244 }; 245 246 #ifdef CONFIG_PCI_ATS 247 void pci_restore_ats_state(struct pci_dev *dev); 248 #else 249 static inline void pci_restore_ats_state(struct pci_dev *dev) 250 { 251 } 252 #endif /* CONFIG_PCI_ATS */ 253 254 #ifdef CONFIG_PCI_IOV 255 int pci_iov_init(struct pci_dev *dev); 256 void pci_iov_release(struct pci_dev *dev); 257 int pci_iov_resource_bar(struct pci_dev *dev, int resno); 258 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno); 259 void pci_restore_iov_state(struct pci_dev *dev); 260 int pci_iov_bus_range(struct pci_bus *bus); 261 262 #else 263 static inline int pci_iov_init(struct pci_dev *dev) 264 { 265 return -ENODEV; 266 } 267 static inline void pci_iov_release(struct pci_dev *dev) 268 269 { 270 } 271 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno) 272 { 273 return 0; 274 } 275 static inline void pci_restore_iov_state(struct pci_dev *dev) 276 { 277 } 278 static inline int pci_iov_bus_range(struct pci_bus *bus) 279 { 280 return 0; 281 } 282 283 #endif /* CONFIG_PCI_IOV */ 284 285 unsigned long pci_cardbus_resource_alignment(struct resource *); 286 287 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 288 struct resource *res) 289 { 290 #ifdef CONFIG_PCI_IOV 291 int resno = res - dev->resource; 292 293 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 294 return pci_sriov_resource_alignment(dev, resno); 295 #endif 296 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 297 return pci_cardbus_resource_alignment(res); 298 return resource_alignment(res); 299 } 300 301 void pci_enable_acs(struct pci_dev *dev); 302 303 struct pci_dev_reset_methods { 304 u16 vendor; 305 u16 device; 306 int (*reset)(struct pci_dev *dev, int probe); 307 }; 308 309 #ifdef CONFIG_PCI_QUIRKS 310 int pci_dev_specific_reset(struct pci_dev *dev, int probe); 311 #else 312 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 313 { 314 return -ENOTTY; 315 } 316 #endif 317 318 #endif /* DRIVERS_PCI_H */ 319