1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #include <linux/workqueue.h> 5 6 #define PCI_CFG_SPACE_SIZE 256 7 #define PCI_CFG_SPACE_EXP_SIZE 4096 8 9 /* Functions internal to the PCI core code */ 10 11 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 12 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 13 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 14 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 15 { return; } 16 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 17 { return; } 18 #else 19 extern void pci_create_firmware_label_files(struct pci_dev *pdev); 20 extern void pci_remove_firmware_label_files(struct pci_dev *pdev); 21 #endif 22 extern void pci_cleanup_rom(struct pci_dev *dev); 23 #ifdef HAVE_PCI_MMAP 24 enum pci_mmap_api { 25 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 26 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 27 }; 28 extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 29 struct vm_area_struct *vmai, 30 enum pci_mmap_api mmap_api); 31 #endif 32 int pci_probe_reset_function(struct pci_dev *dev); 33 34 /** 35 * struct pci_platform_pm_ops - Firmware PM callbacks 36 * 37 * @is_manageable: returns 'true' if given device is power manageable by the 38 * platform firmware 39 * 40 * @set_state: invokes the platform firmware to set the device's power state 41 * 42 * @choose_state: returns PCI power state of given device preferred by the 43 * platform; to be used during system-wide transitions from a 44 * sleeping state to the working state and vice versa 45 * 46 * @can_wakeup: returns 'true' if given device is capable of waking up the 47 * system from a sleeping state 48 * 49 * @sleep_wake: enables/disables the system wake up capability of given device 50 * 51 * @run_wake: enables/disables the platform to generate run-time wake-up events 52 * for given device (the device's wake-up capability has to be 53 * enabled by @sleep_wake for this feature to work) 54 * 55 * If given platform is generally capable of power managing PCI devices, all of 56 * these callbacks are mandatory. 57 */ 58 struct pci_platform_pm_ops { 59 bool (*is_manageable)(struct pci_dev *dev); 60 int (*set_state)(struct pci_dev *dev, pci_power_t state); 61 pci_power_t (*choose_state)(struct pci_dev *dev); 62 bool (*can_wakeup)(struct pci_dev *dev); 63 int (*sleep_wake)(struct pci_dev *dev, bool enable); 64 int (*run_wake)(struct pci_dev *dev, bool enable); 65 }; 66 67 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 68 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 69 extern void pci_power_up(struct pci_dev *dev); 70 extern void pci_disable_enabled_device(struct pci_dev *dev); 71 extern int pci_finish_runtime_suspend(struct pci_dev *dev); 72 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 73 extern void pci_wakeup_bus(struct pci_bus *bus); 74 extern void pci_config_pm_runtime_get(struct pci_dev *dev); 75 extern void pci_config_pm_runtime_put(struct pci_dev *dev); 76 extern void pci_pm_init(struct pci_dev *dev); 77 extern void platform_pci_wakeup_init(struct pci_dev *dev); 78 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 79 void pci_free_cap_save_buffers(struct pci_dev *dev); 80 81 static inline void pci_wakeup_event(struct pci_dev *dev) 82 { 83 /* Wait 100 ms before the system can be put into a sleep state. */ 84 pm_wakeup_event(&dev->dev, 100); 85 } 86 87 static inline bool pci_is_bridge(struct pci_dev *pci_dev) 88 { 89 return !!(pci_dev->subordinate); 90 } 91 92 struct pci_vpd_ops { 93 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 94 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 95 void (*release)(struct pci_dev *dev); 96 }; 97 98 struct pci_vpd { 99 unsigned int len; 100 const struct pci_vpd_ops *ops; 101 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 102 }; 103 104 extern int pci_vpd_pci22_init(struct pci_dev *dev); 105 static inline void pci_vpd_release(struct pci_dev *dev) 106 { 107 if (dev->vpd) 108 dev->vpd->ops->release(dev); 109 } 110 111 /* PCI /proc functions */ 112 #ifdef CONFIG_PROC_FS 113 extern int pci_proc_attach_device(struct pci_dev *dev); 114 extern int pci_proc_detach_device(struct pci_dev *dev); 115 extern int pci_proc_detach_bus(struct pci_bus *bus); 116 #else 117 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 118 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 119 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 120 #endif 121 122 /* Functions for PCI Hotplug drivers to use */ 123 int pci_hp_add_bridge(struct pci_dev *dev); 124 125 #ifdef HAVE_PCI_LEGACY 126 extern void pci_create_legacy_files(struct pci_bus *bus); 127 extern void pci_remove_legacy_files(struct pci_bus *bus); 128 #else 129 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 130 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 131 #endif 132 133 /* Lock for read/write access to pci device and bus lists */ 134 extern struct rw_semaphore pci_bus_sem; 135 136 extern raw_spinlock_t pci_lock; 137 138 extern unsigned int pci_pm_d3_delay; 139 140 #ifdef CONFIG_PCI_MSI 141 void pci_no_msi(void); 142 extern void pci_msi_init_pci_dev(struct pci_dev *dev); 143 #else 144 static inline void pci_no_msi(void) { } 145 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 146 #endif 147 148 void pci_realloc_get_opt(char *); 149 150 static inline int pci_no_d1d2(struct pci_dev *dev) 151 { 152 unsigned int parent_dstates = 0; 153 154 if (dev->bus->self) 155 parent_dstates = dev->bus->self->no_d1d2; 156 return (dev->no_d1d2 || parent_dstates); 157 158 } 159 extern struct device_attribute pci_dev_attrs[]; 160 extern struct device_attribute pcibus_dev_attrs[]; 161 extern struct device_type pci_dev_type; 162 extern struct bus_attribute pci_bus_attrs[]; 163 164 165 /** 166 * pci_match_one_device - Tell if a PCI device structure has a matching 167 * PCI device id structure 168 * @id: single PCI device id structure to match 169 * @dev: the PCI device structure to match against 170 * 171 * Returns the matching pci_device_id structure or %NULL if there is no match. 172 */ 173 static inline const struct pci_device_id * 174 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 175 { 176 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 177 (id->device == PCI_ANY_ID || id->device == dev->device) && 178 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 179 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 180 !((id->class ^ dev->class) & id->class_mask)) 181 return id; 182 return NULL; 183 } 184 185 /* PCI slot sysfs helper code */ 186 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 187 188 extern struct kset *pci_slots_kset; 189 190 struct pci_slot_attribute { 191 struct attribute attr; 192 ssize_t (*show)(struct pci_slot *, char *); 193 ssize_t (*store)(struct pci_slot *, const char *, size_t); 194 }; 195 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 196 197 enum pci_bar_type { 198 pci_bar_unknown, /* Standard PCI BAR probe */ 199 pci_bar_io, /* An io port BAR */ 200 pci_bar_mem32, /* A 32-bit memory BAR */ 201 pci_bar_mem64, /* A 64-bit memory BAR */ 202 }; 203 204 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 205 int crs_timeout); 206 extern int pci_setup_device(struct pci_dev *dev); 207 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 208 struct resource *res, unsigned int reg); 209 extern int pci_resource_bar(struct pci_dev *dev, int resno, 210 enum pci_bar_type *type); 211 extern int pci_bus_add_child(struct pci_bus *bus); 212 extern void pci_enable_ari(struct pci_dev *dev); 213 /** 214 * pci_ari_enabled - query ARI forwarding status 215 * @bus: the PCI bus 216 * 217 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 218 */ 219 static inline int pci_ari_enabled(struct pci_bus *bus) 220 { 221 return bus->self && bus->self->ari_enabled; 222 } 223 224 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 225 extern void pci_disable_bridge_window(struct pci_dev *dev); 226 227 /* Single Root I/O Virtualization */ 228 struct pci_sriov { 229 int pos; /* capability position */ 230 int nres; /* number of resources */ 231 u32 cap; /* SR-IOV Capabilities */ 232 u16 ctrl; /* SR-IOV Control */ 233 u16 total_VFs; /* total VFs associated with the PF */ 234 u16 initial_VFs; /* initial VFs associated with the PF */ 235 u16 num_VFs; /* number of VFs available */ 236 u16 offset; /* first VF Routing ID offset */ 237 u16 stride; /* following VF stride */ 238 u32 pgsz; /* page size for BAR alignment */ 239 u8 link; /* Function Dependency Link */ 240 u16 driver_max_VFs; /* max num VFs driver supports */ 241 struct pci_dev *dev; /* lowest numbered PF */ 242 struct pci_dev *self; /* this PF */ 243 struct mutex lock; /* lock for VF bus */ 244 struct work_struct mtask; /* VF Migration task */ 245 u8 __iomem *mstate; /* VF Migration State Array */ 246 }; 247 248 #ifdef CONFIG_PCI_ATS 249 extern void pci_restore_ats_state(struct pci_dev *dev); 250 #else 251 static inline void pci_restore_ats_state(struct pci_dev *dev) 252 { 253 } 254 #endif /* CONFIG_PCI_ATS */ 255 256 #ifdef CONFIG_PCI_IOV 257 extern int pci_iov_init(struct pci_dev *dev); 258 extern void pci_iov_release(struct pci_dev *dev); 259 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 260 enum pci_bar_type *type); 261 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, 262 int resno); 263 extern void pci_restore_iov_state(struct pci_dev *dev); 264 extern int pci_iov_bus_range(struct pci_bus *bus); 265 266 #else 267 static inline int pci_iov_init(struct pci_dev *dev) 268 { 269 return -ENODEV; 270 } 271 static inline void pci_iov_release(struct pci_dev *dev) 272 273 { 274 } 275 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 276 enum pci_bar_type *type) 277 { 278 return 0; 279 } 280 static inline void pci_restore_iov_state(struct pci_dev *dev) 281 { 282 } 283 static inline int pci_iov_bus_range(struct pci_bus *bus) 284 { 285 return 0; 286 } 287 288 #endif /* CONFIG_PCI_IOV */ 289 290 extern unsigned long pci_cardbus_resource_alignment(struct resource *); 291 292 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 293 struct resource *res) 294 { 295 #ifdef CONFIG_PCI_IOV 296 int resno = res - dev->resource; 297 298 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 299 return pci_sriov_resource_alignment(dev, resno); 300 #endif 301 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 302 return pci_cardbus_resource_alignment(res); 303 return resource_alignment(res); 304 } 305 306 extern void pci_enable_acs(struct pci_dev *dev); 307 308 struct pci_dev_reset_methods { 309 u16 vendor; 310 u16 device; 311 int (*reset)(struct pci_dev *dev, int probe); 312 }; 313 314 #ifdef CONFIG_PCI_QUIRKS 315 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe); 316 #else 317 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 318 { 319 return -ENOTTY; 320 } 321 #endif 322 323 #endif /* DRIVERS_PCI_H */ 324