1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #include <linux/workqueue.h> 5 6 #define PCI_CFG_SPACE_SIZE 256 7 #define PCI_CFG_SPACE_EXP_SIZE 4096 8 9 /* Functions internal to the PCI core code */ 10 11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env); 12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 14 extern void pci_cleanup_rom(struct pci_dev *dev); 15 #ifdef HAVE_PCI_MMAP 16 extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 17 struct vm_area_struct *vma); 18 #endif 19 20 /** 21 * struct pci_platform_pm_ops - Firmware PM callbacks 22 * 23 * @is_manageable: returns 'true' if given device is power manageable by the 24 * platform firmware 25 * 26 * @set_state: invokes the platform firmware to set the device's power state 27 * 28 * @choose_state: returns PCI power state of given device preferred by the 29 * platform; to be used during system-wide transitions from a 30 * sleeping state to the working state and vice versa 31 * 32 * @can_wakeup: returns 'true' if given device is capable of waking up the 33 * system from a sleeping state 34 * 35 * @sleep_wake: enables/disables the system wake up capability of given device 36 * 37 * If given platform is generally capable of power managing PCI devices, all of 38 * these callbacks are mandatory. 39 */ 40 struct pci_platform_pm_ops { 41 bool (*is_manageable)(struct pci_dev *dev); 42 int (*set_state)(struct pci_dev *dev, pci_power_t state); 43 pci_power_t (*choose_state)(struct pci_dev *dev); 44 bool (*can_wakeup)(struct pci_dev *dev); 45 int (*sleep_wake)(struct pci_dev *dev, bool enable); 46 }; 47 48 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 49 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 50 extern void pci_disable_enabled_device(struct pci_dev *dev); 51 extern void pci_pm_init(struct pci_dev *dev); 52 extern void platform_pci_wakeup_init(struct pci_dev *dev); 53 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 54 55 static inline bool pci_is_bridge(struct pci_dev *pci_dev) 56 { 57 return !!(pci_dev->subordinate); 58 } 59 60 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 61 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 62 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); 63 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); 64 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); 65 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); 66 67 struct pci_vpd_ops { 68 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 69 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 70 void (*release)(struct pci_dev *dev); 71 }; 72 73 struct pci_vpd { 74 unsigned int len; 75 const struct pci_vpd_ops *ops; 76 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 77 }; 78 79 extern int pci_vpd_pci22_init(struct pci_dev *dev); 80 static inline void pci_vpd_release(struct pci_dev *dev) 81 { 82 if (dev->vpd) 83 dev->vpd->ops->release(dev); 84 } 85 86 /* PCI /proc functions */ 87 #ifdef CONFIG_PROC_FS 88 extern int pci_proc_attach_device(struct pci_dev *dev); 89 extern int pci_proc_detach_device(struct pci_dev *dev); 90 extern int pci_proc_detach_bus(struct pci_bus *bus); 91 #else 92 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 93 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 94 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 95 #endif 96 97 /* Functions for PCI Hotplug drivers to use */ 98 extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 99 100 #ifdef HAVE_PCI_LEGACY 101 extern void pci_create_legacy_files(struct pci_bus *bus); 102 extern void pci_remove_legacy_files(struct pci_bus *bus); 103 #else 104 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 105 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 106 #endif 107 108 /* Lock for read/write access to pci device and bus lists */ 109 extern struct rw_semaphore pci_bus_sem; 110 111 extern unsigned int pci_pm_d3_delay; 112 113 #ifdef CONFIG_PCI_MSI 114 void pci_no_msi(void); 115 extern void pci_msi_init_pci_dev(struct pci_dev *dev); 116 #else 117 static inline void pci_no_msi(void) { } 118 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 119 #endif 120 121 #ifdef CONFIG_PCIEAER 122 void pci_no_aer(void); 123 #else 124 static inline void pci_no_aer(void) { } 125 #endif 126 127 static inline int pci_no_d1d2(struct pci_dev *dev) 128 { 129 unsigned int parent_dstates = 0; 130 131 if (dev->bus->self) 132 parent_dstates = dev->bus->self->no_d1d2; 133 return (dev->no_d1d2 || parent_dstates); 134 135 } 136 extern int pcie_mch_quirk; 137 extern struct device_attribute pci_dev_attrs[]; 138 extern struct device_attribute dev_attr_cpuaffinity; 139 extern struct device_attribute dev_attr_cpulistaffinity; 140 #ifdef CONFIG_HOTPLUG 141 extern struct bus_attribute pci_bus_attrs[]; 142 #else 143 #define pci_bus_attrs NULL 144 #endif 145 146 147 /** 148 * pci_match_one_device - Tell if a PCI device structure has a matching 149 * PCI device id structure 150 * @id: single PCI device id structure to match 151 * @dev: the PCI device structure to match against 152 * 153 * Returns the matching pci_device_id structure or %NULL if there is no match. 154 */ 155 static inline const struct pci_device_id * 156 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 157 { 158 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 159 (id->device == PCI_ANY_ID || id->device == dev->device) && 160 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 161 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 162 !((id->class ^ dev->class) & id->class_mask)) 163 return id; 164 return NULL; 165 } 166 167 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); 168 169 /* PCI slot sysfs helper code */ 170 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 171 172 extern struct kset *pci_slots_kset; 173 174 struct pci_slot_attribute { 175 struct attribute attr; 176 ssize_t (*show)(struct pci_slot *, char *); 177 ssize_t (*store)(struct pci_slot *, const char *, size_t); 178 }; 179 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 180 181 enum pci_bar_type { 182 pci_bar_unknown, /* Standard PCI BAR probe */ 183 pci_bar_io, /* An io port BAR */ 184 pci_bar_mem32, /* A 32-bit memory BAR */ 185 pci_bar_mem64, /* A 64-bit memory BAR */ 186 }; 187 188 extern int pci_setup_device(struct pci_dev *dev); 189 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 190 struct resource *res, unsigned int reg); 191 extern int pci_resource_bar(struct pci_dev *dev, int resno, 192 enum pci_bar_type *type); 193 extern int pci_bus_add_child(struct pci_bus *bus); 194 extern void pci_enable_ari(struct pci_dev *dev); 195 /** 196 * pci_ari_enabled - query ARI forwarding status 197 * @bus: the PCI bus 198 * 199 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 200 */ 201 static inline int pci_ari_enabled(struct pci_bus *bus) 202 { 203 return bus->self && bus->self->ari_enabled; 204 } 205 206 #ifdef CONFIG_PCI_QUIRKS 207 extern int pci_is_reassigndev(struct pci_dev *dev); 208 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev); 209 extern void pci_disable_bridge_window(struct pci_dev *dev); 210 #endif 211 212 /* Single Root I/O Virtualization */ 213 struct pci_sriov { 214 int pos; /* capability position */ 215 int nres; /* number of resources */ 216 u32 cap; /* SR-IOV Capabilities */ 217 u16 ctrl; /* SR-IOV Control */ 218 u16 total; /* total VFs associated with the PF */ 219 u16 initial; /* initial VFs associated with the PF */ 220 u16 nr_virtfn; /* number of VFs available */ 221 u16 offset; /* first VF Routing ID offset */ 222 u16 stride; /* following VF stride */ 223 u32 pgsz; /* page size for BAR alignment */ 224 u8 link; /* Function Dependency Link */ 225 struct pci_dev *dev; /* lowest numbered PF */ 226 struct pci_dev *self; /* this PF */ 227 struct mutex lock; /* lock for VF bus */ 228 struct work_struct mtask; /* VF Migration task */ 229 u8 __iomem *mstate; /* VF Migration State Array */ 230 }; 231 232 #ifdef CONFIG_PCI_IOV 233 extern int pci_iov_init(struct pci_dev *dev); 234 extern void pci_iov_release(struct pci_dev *dev); 235 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 236 enum pci_bar_type *type); 237 extern void pci_restore_iov_state(struct pci_dev *dev); 238 extern int pci_iov_bus_range(struct pci_bus *bus); 239 #else 240 static inline int pci_iov_init(struct pci_dev *dev) 241 { 242 return -ENODEV; 243 } 244 static inline void pci_iov_release(struct pci_dev *dev) 245 246 { 247 } 248 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 249 enum pci_bar_type *type) 250 { 251 return 0; 252 } 253 static inline void pci_restore_iov_state(struct pci_dev *dev) 254 { 255 } 256 static inline int pci_iov_bus_range(struct pci_bus *bus) 257 { 258 return 0; 259 } 260 #endif /* CONFIG_PCI_IOV */ 261 262 #endif /* DRIVERS_PCI_H */ 263