xref: /openbmc/linux/drivers/pci/pci.h (revision 9d749629)
1 #ifndef DRIVERS_PCI_H
2 #define DRIVERS_PCI_H
3 
4 #include <linux/workqueue.h>
5 
6 #define PCI_CFG_SPACE_SIZE	256
7 #define PCI_CFG_SPACE_EXP_SIZE	4096
8 
9 /* Functions internal to the PCI core code */
10 
11 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
12 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
13 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
14 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
15 { return; }
16 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
17 { return; }
18 #else
19 extern void pci_create_firmware_label_files(struct pci_dev *pdev);
20 extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
21 #endif
22 extern void pci_cleanup_rom(struct pci_dev *dev);
23 #ifdef HAVE_PCI_MMAP
24 enum pci_mmap_api {
25 	PCI_MMAP_SYSFS,	/* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
26 	PCI_MMAP_PROCFS	/* mmap on /proc/bus/pci/<BDF> */
27 };
28 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
29 			 struct vm_area_struct *vmai,
30 			 enum pci_mmap_api mmap_api);
31 #endif
32 int pci_probe_reset_function(struct pci_dev *dev);
33 
34 /**
35  * struct pci_platform_pm_ops - Firmware PM callbacks
36  *
37  * @is_manageable: returns 'true' if given device is power manageable by the
38  *                 platform firmware
39  *
40  * @set_state: invokes the platform firmware to set the device's power state
41  *
42  * @choose_state: returns PCI power state of given device preferred by the
43  *                platform; to be used during system-wide transitions from a
44  *                sleeping state to the working state and vice versa
45  *
46  * @sleep_wake: enables/disables the system wake up capability of given device
47  *
48  * @run_wake: enables/disables the platform to generate run-time wake-up events
49  *		for given device (the device's wake-up capability has to be
50  *		enabled by @sleep_wake for this feature to work)
51  *
52  * If given platform is generally capable of power managing PCI devices, all of
53  * these callbacks are mandatory.
54  */
55 struct pci_platform_pm_ops {
56 	bool (*is_manageable)(struct pci_dev *dev);
57 	int (*set_state)(struct pci_dev *dev, pci_power_t state);
58 	pci_power_t (*choose_state)(struct pci_dev *dev);
59 	int (*sleep_wake)(struct pci_dev *dev, bool enable);
60 	int (*run_wake)(struct pci_dev *dev, bool enable);
61 };
62 
63 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
64 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
65 extern void pci_power_up(struct pci_dev *dev);
66 extern void pci_disable_enabled_device(struct pci_dev *dev);
67 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
68 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
69 extern void pci_wakeup_bus(struct pci_bus *bus);
70 extern void pci_config_pm_runtime_get(struct pci_dev *dev);
71 extern void pci_config_pm_runtime_put(struct pci_dev *dev);
72 extern void pci_pm_init(struct pci_dev *dev);
73 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
74 void pci_free_cap_save_buffers(struct pci_dev *dev);
75 
76 static inline void pci_wakeup_event(struct pci_dev *dev)
77 {
78 	/* Wait 100 ms before the system can be put into a sleep state. */
79 	pm_wakeup_event(&dev->dev, 100);
80 }
81 
82 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
83 {
84 	return !!(pci_dev->subordinate);
85 }
86 
87 struct pci_vpd_ops {
88 	ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
89 	ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
90 	void (*release)(struct pci_dev *dev);
91 };
92 
93 struct pci_vpd {
94 	unsigned int len;
95 	const struct pci_vpd_ops *ops;
96 	struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
97 };
98 
99 extern int pci_vpd_pci22_init(struct pci_dev *dev);
100 static inline void pci_vpd_release(struct pci_dev *dev)
101 {
102 	if (dev->vpd)
103 		dev->vpd->ops->release(dev);
104 }
105 
106 /* PCI /proc functions */
107 #ifdef CONFIG_PROC_FS
108 extern int pci_proc_attach_device(struct pci_dev *dev);
109 extern int pci_proc_detach_device(struct pci_dev *dev);
110 extern int pci_proc_detach_bus(struct pci_bus *bus);
111 #else
112 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
113 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
114 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
115 #endif
116 
117 /* Functions for PCI Hotplug drivers to use */
118 int pci_hp_add_bridge(struct pci_dev *dev);
119 
120 #ifdef HAVE_PCI_LEGACY
121 extern void pci_create_legacy_files(struct pci_bus *bus);
122 extern void pci_remove_legacy_files(struct pci_bus *bus);
123 #else
124 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
125 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
126 #endif
127 
128 /* Lock for read/write access to pci device and bus lists */
129 extern struct rw_semaphore pci_bus_sem;
130 
131 extern raw_spinlock_t pci_lock;
132 
133 extern unsigned int pci_pm_d3_delay;
134 
135 #ifdef CONFIG_PCI_MSI
136 void pci_no_msi(void);
137 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
138 #else
139 static inline void pci_no_msi(void) { }
140 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
141 #endif
142 
143 void pci_realloc_get_opt(char *);
144 
145 static inline int pci_no_d1d2(struct pci_dev *dev)
146 {
147 	unsigned int parent_dstates = 0;
148 
149 	if (dev->bus->self)
150 		parent_dstates = dev->bus->self->no_d1d2;
151 	return (dev->no_d1d2 || parent_dstates);
152 
153 }
154 extern struct device_attribute pci_dev_attrs[];
155 extern struct device_attribute pcibus_dev_attrs[];
156 extern struct device_type pci_dev_type;
157 extern struct bus_attribute pci_bus_attrs[];
158 
159 
160 /**
161  * pci_match_one_device - Tell if a PCI device structure has a matching
162  *                        PCI device id structure
163  * @id: single PCI device id structure to match
164  * @dev: the PCI device structure to match against
165  *
166  * Returns the matching pci_device_id structure or %NULL if there is no match.
167  */
168 static inline const struct pci_device_id *
169 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
170 {
171 	if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
172 	    (id->device == PCI_ANY_ID || id->device == dev->device) &&
173 	    (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
174 	    (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
175 	    !((id->class ^ dev->class) & id->class_mask))
176 		return id;
177 	return NULL;
178 }
179 
180 /* PCI slot sysfs helper code */
181 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
182 
183 extern struct kset *pci_slots_kset;
184 
185 struct pci_slot_attribute {
186 	struct attribute attr;
187 	ssize_t (*show)(struct pci_slot *, char *);
188 	ssize_t (*store)(struct pci_slot *, const char *, size_t);
189 };
190 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
191 
192 enum pci_bar_type {
193 	pci_bar_unknown,	/* Standard PCI BAR probe */
194 	pci_bar_io,		/* An io port BAR */
195 	pci_bar_mem32,		/* A 32-bit memory BAR */
196 	pci_bar_mem64,		/* A 64-bit memory BAR */
197 };
198 
199 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
200 				int crs_timeout);
201 extern int pci_setup_device(struct pci_dev *dev);
202 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
203 				struct resource *res, unsigned int reg);
204 extern int pci_resource_bar(struct pci_dev *dev, int resno,
205 			    enum pci_bar_type *type);
206 extern int pci_bus_add_child(struct pci_bus *bus);
207 extern void pci_enable_ari(struct pci_dev *dev);
208 /**
209  * pci_ari_enabled - query ARI forwarding status
210  * @bus: the PCI bus
211  *
212  * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
213  */
214 static inline int pci_ari_enabled(struct pci_bus *bus)
215 {
216 	return bus->self && bus->self->ari_enabled;
217 }
218 
219 void pci_reassigndev_resource_alignment(struct pci_dev *dev);
220 extern void pci_disable_bridge_window(struct pci_dev *dev);
221 
222 /* Single Root I/O Virtualization */
223 struct pci_sriov {
224 	int pos;		/* capability position */
225 	int nres;		/* number of resources */
226 	u32 cap;		/* SR-IOV Capabilities */
227 	u16 ctrl;		/* SR-IOV Control */
228 	u16 total_VFs;		/* total VFs associated with the PF */
229 	u16 initial_VFs;	/* initial VFs associated with the PF */
230 	u16 num_VFs;		/* number of VFs available */
231 	u16 offset;		/* first VF Routing ID offset */
232 	u16 stride;		/* following VF stride */
233 	u32 pgsz;		/* page size for BAR alignment */
234 	u8 link;		/* Function Dependency Link */
235 	u16 driver_max_VFs;	/* max num VFs driver supports */
236 	struct pci_dev *dev;	/* lowest numbered PF */
237 	struct pci_dev *self;	/* this PF */
238 	struct mutex lock;	/* lock for VF bus */
239 	struct work_struct mtask; /* VF Migration task */
240 	u8 __iomem *mstate;	/* VF Migration State Array */
241 };
242 
243 #ifdef CONFIG_PCI_ATS
244 extern void pci_restore_ats_state(struct pci_dev *dev);
245 #else
246 static inline void pci_restore_ats_state(struct pci_dev *dev)
247 {
248 }
249 #endif /* CONFIG_PCI_ATS */
250 
251 #ifdef CONFIG_PCI_IOV
252 extern int pci_iov_init(struct pci_dev *dev);
253 extern void pci_iov_release(struct pci_dev *dev);
254 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
255 				enum pci_bar_type *type);
256 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
257 						    int resno);
258 extern void pci_restore_iov_state(struct pci_dev *dev);
259 extern int pci_iov_bus_range(struct pci_bus *bus);
260 
261 #else
262 static inline int pci_iov_init(struct pci_dev *dev)
263 {
264 	return -ENODEV;
265 }
266 static inline void pci_iov_release(struct pci_dev *dev)
267 
268 {
269 }
270 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
271 				       enum pci_bar_type *type)
272 {
273 	return 0;
274 }
275 static inline void pci_restore_iov_state(struct pci_dev *dev)
276 {
277 }
278 static inline int pci_iov_bus_range(struct pci_bus *bus)
279 {
280 	return 0;
281 }
282 
283 #endif /* CONFIG_PCI_IOV */
284 
285 extern unsigned long pci_cardbus_resource_alignment(struct resource *);
286 
287 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
288 					 struct resource *res)
289 {
290 #ifdef CONFIG_PCI_IOV
291 	int resno = res - dev->resource;
292 
293 	if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
294 		return pci_sriov_resource_alignment(dev, resno);
295 #endif
296 	if (dev->class >> 8  == PCI_CLASS_BRIDGE_CARDBUS)
297 		return pci_cardbus_resource_alignment(res);
298 	return resource_alignment(res);
299 }
300 
301 extern void pci_enable_acs(struct pci_dev *dev);
302 
303 struct pci_dev_reset_methods {
304 	u16 vendor;
305 	u16 device;
306 	int (*reset)(struct pci_dev *dev, int probe);
307 };
308 
309 #ifdef CONFIG_PCI_QUIRKS
310 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
311 #else
312 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
313 {
314 	return -ENOTTY;
315 }
316 #endif
317 
318 #endif /* DRIVERS_PCI_H */
319