1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef DRIVERS_PCI_H 3 #define DRIVERS_PCI_H 4 5 #include <linux/pci.h> 6 7 #define PCI_FIND_CAP_TTL 48 8 9 #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ 10 11 extern const unsigned char pcie_link_speed[]; 12 extern bool pci_early_dump; 13 14 bool pcie_cap_has_lnkctl(const struct pci_dev *dev); 15 bool pcie_cap_has_rtctl(const struct pci_dev *dev); 16 17 /* Functions internal to the PCI core code */ 18 19 int pci_create_sysfs_dev_files(struct pci_dev *pdev); 20 void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 21 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 22 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 23 { return; } 24 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 25 { return; } 26 #else 27 void pci_create_firmware_label_files(struct pci_dev *pdev); 28 void pci_remove_firmware_label_files(struct pci_dev *pdev); 29 #endif 30 void pci_cleanup_rom(struct pci_dev *dev); 31 32 enum pci_mmap_api { 33 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 34 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 35 }; 36 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, 37 enum pci_mmap_api mmap_api); 38 39 int pci_probe_reset_function(struct pci_dev *dev); 40 int pci_bridge_secondary_bus_reset(struct pci_dev *dev); 41 int pci_bus_error_reset(struct pci_dev *dev); 42 43 #define PCI_PM_D2_DELAY 200 44 #define PCI_PM_D3_WAIT 10 45 #define PCI_PM_D3COLD_WAIT 100 46 #define PCI_PM_BUS_WAIT 50 47 48 /** 49 * struct pci_platform_pm_ops - Firmware PM callbacks 50 * 51 * @bridge_d3: Does the bridge allow entering into D3 52 * 53 * @is_manageable: returns 'true' if given device is power manageable by the 54 * platform firmware 55 * 56 * @set_state: invokes the platform firmware to set the device's power state 57 * 58 * @get_state: queries the platform firmware for a device's current power state 59 * 60 * @refresh_state: asks the platform to refresh the device's power state data 61 * 62 * @choose_state: returns PCI power state of given device preferred by the 63 * platform; to be used during system-wide transitions from a 64 * sleeping state to the working state and vice versa 65 * 66 * @set_wakeup: enables/disables wakeup capability for the device 67 * 68 * @need_resume: returns 'true' if the given device (which is currently 69 * suspended) needs to be resumed to be configured for system 70 * wakeup. 71 * 72 * If given platform is generally capable of power managing PCI devices, all of 73 * these callbacks are mandatory. 74 */ 75 struct pci_platform_pm_ops { 76 bool (*bridge_d3)(struct pci_dev *dev); 77 bool (*is_manageable)(struct pci_dev *dev); 78 int (*set_state)(struct pci_dev *dev, pci_power_t state); 79 pci_power_t (*get_state)(struct pci_dev *dev); 80 void (*refresh_state)(struct pci_dev *dev); 81 pci_power_t (*choose_state)(struct pci_dev *dev); 82 int (*set_wakeup)(struct pci_dev *dev, bool enable); 83 bool (*need_resume)(struct pci_dev *dev); 84 }; 85 86 int pci_set_platform_pm(const struct pci_platform_pm_ops *ops); 87 void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 88 void pci_refresh_power_state(struct pci_dev *dev); 89 int pci_power_up(struct pci_dev *dev); 90 void pci_disable_enabled_device(struct pci_dev *dev); 91 int pci_finish_runtime_suspend(struct pci_dev *dev); 92 void pcie_clear_root_pme_status(struct pci_dev *dev); 93 bool pci_check_pme_status(struct pci_dev *dev); 94 void pci_pme_wakeup_bus(struct pci_bus *bus); 95 int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 96 void pci_pme_restore(struct pci_dev *dev); 97 bool pci_dev_need_resume(struct pci_dev *dev); 98 void pci_dev_adjust_pme(struct pci_dev *dev); 99 void pci_dev_complete_resume(struct pci_dev *pci_dev); 100 void pci_config_pm_runtime_get(struct pci_dev *dev); 101 void pci_config_pm_runtime_put(struct pci_dev *dev); 102 void pci_pm_init(struct pci_dev *dev); 103 void pci_ea_init(struct pci_dev *dev); 104 void pci_allocate_cap_save_buffers(struct pci_dev *dev); 105 void pci_free_cap_save_buffers(struct pci_dev *dev); 106 bool pci_bridge_d3_possible(struct pci_dev *dev); 107 void pci_bridge_d3_update(struct pci_dev *dev); 108 void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev); 109 110 static inline void pci_wakeup_event(struct pci_dev *dev) 111 { 112 /* Wait 100 ms before the system can be put into a sleep state. */ 113 pm_wakeup_event(&dev->dev, 100); 114 } 115 116 static inline bool pci_has_subordinate(struct pci_dev *pci_dev) 117 { 118 return !!(pci_dev->subordinate); 119 } 120 121 static inline bool pci_power_manageable(struct pci_dev *pci_dev) 122 { 123 /* 124 * Currently we allow normal PCI devices and PCI bridges transition 125 * into D3 if their bridge_d3 is set. 126 */ 127 return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3; 128 } 129 130 static inline bool pcie_downstream_port(const struct pci_dev *dev) 131 { 132 int type = pci_pcie_type(dev); 133 134 return type == PCI_EXP_TYPE_ROOT_PORT || 135 type == PCI_EXP_TYPE_DOWNSTREAM || 136 type == PCI_EXP_TYPE_PCIE_BRIDGE; 137 } 138 139 int pci_vpd_init(struct pci_dev *dev); 140 void pci_vpd_release(struct pci_dev *dev); 141 void pcie_vpd_create_sysfs_dev_files(struct pci_dev *dev); 142 void pcie_vpd_remove_sysfs_dev_files(struct pci_dev *dev); 143 144 /* PCI Virtual Channel */ 145 int pci_save_vc_state(struct pci_dev *dev); 146 void pci_restore_vc_state(struct pci_dev *dev); 147 void pci_allocate_vc_save_buffers(struct pci_dev *dev); 148 149 /* PCI /proc functions */ 150 #ifdef CONFIG_PROC_FS 151 int pci_proc_attach_device(struct pci_dev *dev); 152 int pci_proc_detach_device(struct pci_dev *dev); 153 int pci_proc_detach_bus(struct pci_bus *bus); 154 #else 155 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 156 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 157 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 158 #endif 159 160 /* Functions for PCI Hotplug drivers to use */ 161 int pci_hp_add_bridge(struct pci_dev *dev); 162 163 #ifdef HAVE_PCI_LEGACY 164 void pci_create_legacy_files(struct pci_bus *bus); 165 void pci_remove_legacy_files(struct pci_bus *bus); 166 #else 167 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 168 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 169 #endif 170 171 /* Lock for read/write access to pci device and bus lists */ 172 extern struct rw_semaphore pci_bus_sem; 173 extern struct mutex pci_slot_mutex; 174 175 extern raw_spinlock_t pci_lock; 176 177 extern unsigned int pci_pm_d3_delay; 178 179 #ifdef CONFIG_PCI_MSI 180 void pci_no_msi(void); 181 #else 182 static inline void pci_no_msi(void) { } 183 #endif 184 185 static inline void pci_msi_set_enable(struct pci_dev *dev, int enable) 186 { 187 u16 control; 188 189 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); 190 control &= ~PCI_MSI_FLAGS_ENABLE; 191 if (enable) 192 control |= PCI_MSI_FLAGS_ENABLE; 193 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); 194 } 195 196 static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set) 197 { 198 u16 ctrl; 199 200 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl); 201 ctrl &= ~clear; 202 ctrl |= set; 203 pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl); 204 } 205 206 void pci_realloc_get_opt(char *); 207 208 static inline int pci_no_d1d2(struct pci_dev *dev) 209 { 210 unsigned int parent_dstates = 0; 211 212 if (dev->bus->self) 213 parent_dstates = dev->bus->self->no_d1d2; 214 return (dev->no_d1d2 || parent_dstates); 215 216 } 217 extern const struct attribute_group *pci_dev_groups[]; 218 extern const struct attribute_group *pcibus_groups[]; 219 extern const struct device_type pci_dev_type; 220 extern const struct attribute_group *pci_bus_groups[]; 221 222 extern unsigned long pci_hotplug_io_size; 223 extern unsigned long pci_hotplug_mmio_size; 224 extern unsigned long pci_hotplug_mmio_pref_size; 225 extern unsigned long pci_hotplug_bus_size; 226 227 /** 228 * pci_match_one_device - Tell if a PCI device structure has a matching 229 * PCI device id structure 230 * @id: single PCI device id structure to match 231 * @dev: the PCI device structure to match against 232 * 233 * Returns the matching pci_device_id structure or %NULL if there is no match. 234 */ 235 static inline const struct pci_device_id * 236 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 237 { 238 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 239 (id->device == PCI_ANY_ID || id->device == dev->device) && 240 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 241 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 242 !((id->class ^ dev->class) & id->class_mask)) 243 return id; 244 return NULL; 245 } 246 247 /* PCI slot sysfs helper code */ 248 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 249 250 extern struct kset *pci_slots_kset; 251 252 struct pci_slot_attribute { 253 struct attribute attr; 254 ssize_t (*show)(struct pci_slot *, char *); 255 ssize_t (*store)(struct pci_slot *, const char *, size_t); 256 }; 257 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 258 259 enum pci_bar_type { 260 pci_bar_unknown, /* Standard PCI BAR probe */ 261 pci_bar_io, /* An I/O port BAR */ 262 pci_bar_mem32, /* A 32-bit memory BAR */ 263 pci_bar_mem64, /* A 64-bit memory BAR */ 264 }; 265 266 struct device *pci_get_host_bridge_device(struct pci_dev *dev); 267 void pci_put_host_bridge_device(struct device *dev); 268 269 int pci_configure_extended_tags(struct pci_dev *dev, void *ign); 270 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 271 int crs_timeout); 272 bool pci_bus_generic_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 273 int crs_timeout); 274 int pci_idt_bus_quirk(struct pci_bus *bus, int devfn, u32 *pl, int crs_timeout); 275 276 int pci_setup_device(struct pci_dev *dev); 277 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 278 struct resource *res, unsigned int reg); 279 void pci_configure_ari(struct pci_dev *dev); 280 void __pci_bus_size_bridges(struct pci_bus *bus, 281 struct list_head *realloc_head); 282 void __pci_bus_assign_resources(const struct pci_bus *bus, 283 struct list_head *realloc_head, 284 struct list_head *fail_head); 285 bool pci_bus_clip_resource(struct pci_dev *dev, int idx); 286 287 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 288 void pci_disable_bridge_window(struct pci_dev *dev); 289 struct pci_bus *pci_bus_get(struct pci_bus *bus); 290 void pci_bus_put(struct pci_bus *bus); 291 292 /* PCIe link information */ 293 #define PCIE_SPEED2STR(speed) \ 294 ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ 295 (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ 296 (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ 297 (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ 298 "Unknown speed") 299 300 /* PCIe speed to Mb/s reduced by encoding overhead */ 301 #define PCIE_SPEED2MBS_ENC(speed) \ 302 ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ 303 (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ 304 (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ 305 (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \ 306 0) 307 308 enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev); 309 enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); 310 u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed, 311 enum pcie_link_width *width); 312 void __pcie_print_link_status(struct pci_dev *dev, bool verbose); 313 void pcie_report_downtraining(struct pci_dev *dev); 314 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); 315 316 /* Single Root I/O Virtualization */ 317 struct pci_sriov { 318 int pos; /* Capability position */ 319 int nres; /* Number of resources */ 320 u32 cap; /* SR-IOV Capabilities */ 321 u16 ctrl; /* SR-IOV Control */ 322 u16 total_VFs; /* Total VFs associated with the PF */ 323 u16 initial_VFs; /* Initial VFs associated with the PF */ 324 u16 num_VFs; /* Number of VFs available */ 325 u16 offset; /* First VF Routing ID offset */ 326 u16 stride; /* Following VF stride */ 327 u16 vf_device; /* VF device ID */ 328 u32 pgsz; /* Page size for BAR alignment */ 329 u8 link; /* Function Dependency Link */ 330 u8 max_VF_buses; /* Max buses consumed by VFs */ 331 u16 driver_max_VFs; /* Max num VFs driver supports */ 332 struct pci_dev *dev; /* Lowest numbered PF */ 333 struct pci_dev *self; /* This PF */ 334 u32 class; /* VF device */ 335 u8 hdr_type; /* VF header type */ 336 u16 subsystem_vendor; /* VF subsystem vendor */ 337 u16 subsystem_device; /* VF subsystem device */ 338 resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */ 339 bool drivers_autoprobe; /* Auto probing of VFs by driver */ 340 }; 341 342 /** 343 * pci_dev_set_io_state - Set the new error state if possible. 344 * 345 * @dev - pci device to set new error_state 346 * @new - the state we want dev to be in 347 * 348 * Must be called with device_lock held. 349 * 350 * Returns true if state has been changed to the requested state. 351 */ 352 static inline bool pci_dev_set_io_state(struct pci_dev *dev, 353 pci_channel_state_t new) 354 { 355 bool changed = false; 356 357 device_lock_assert(&dev->dev); 358 switch (new) { 359 case pci_channel_io_perm_failure: 360 switch (dev->error_state) { 361 case pci_channel_io_frozen: 362 case pci_channel_io_normal: 363 case pci_channel_io_perm_failure: 364 changed = true; 365 break; 366 } 367 break; 368 case pci_channel_io_frozen: 369 switch (dev->error_state) { 370 case pci_channel_io_frozen: 371 case pci_channel_io_normal: 372 changed = true; 373 break; 374 } 375 break; 376 case pci_channel_io_normal: 377 switch (dev->error_state) { 378 case pci_channel_io_frozen: 379 case pci_channel_io_normal: 380 changed = true; 381 break; 382 } 383 break; 384 } 385 if (changed) 386 dev->error_state = new; 387 return changed; 388 } 389 390 static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused) 391 { 392 device_lock(&dev->dev); 393 pci_dev_set_io_state(dev, pci_channel_io_perm_failure); 394 device_unlock(&dev->dev); 395 396 return 0; 397 } 398 399 static inline bool pci_dev_is_disconnected(const struct pci_dev *dev) 400 { 401 return dev->error_state == pci_channel_io_perm_failure; 402 } 403 404 /* pci_dev priv_flags */ 405 #define PCI_DEV_ADDED 0 406 407 static inline void pci_dev_assign_added(struct pci_dev *dev, bool added) 408 { 409 assign_bit(PCI_DEV_ADDED, &dev->priv_flags, added); 410 } 411 412 static inline bool pci_dev_is_added(const struct pci_dev *dev) 413 { 414 return test_bit(PCI_DEV_ADDED, &dev->priv_flags); 415 } 416 417 #ifdef CONFIG_PCIEAER 418 #include <linux/aer.h> 419 420 #define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */ 421 422 struct aer_err_info { 423 struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES]; 424 int error_dev_num; 425 426 unsigned int id:16; 427 428 unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */ 429 unsigned int __pad1:5; 430 unsigned int multi_error_valid:1; 431 432 unsigned int first_error:5; 433 unsigned int __pad2:2; 434 unsigned int tlp_header_valid:1; 435 436 unsigned int status; /* COR/UNCOR Error Status */ 437 unsigned int mask; /* COR/UNCOR Error Mask */ 438 struct aer_header_log_regs tlp; /* TLP Header */ 439 }; 440 441 int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info); 442 void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); 443 #endif /* CONFIG_PCIEAER */ 444 445 #ifdef CONFIG_PCIE_DPC 446 void pci_save_dpc_state(struct pci_dev *dev); 447 void pci_restore_dpc_state(struct pci_dev *dev); 448 #else 449 static inline void pci_save_dpc_state(struct pci_dev *dev) {} 450 static inline void pci_restore_dpc_state(struct pci_dev *dev) {} 451 #endif 452 453 #ifdef CONFIG_PCI_ATS 454 /* Address Translation Service */ 455 void pci_ats_init(struct pci_dev *dev); 456 void pci_restore_ats_state(struct pci_dev *dev); 457 #else 458 static inline void pci_ats_init(struct pci_dev *d) { } 459 static inline void pci_restore_ats_state(struct pci_dev *dev) { } 460 #endif /* CONFIG_PCI_ATS */ 461 462 #ifdef CONFIG_PCI_PRI 463 void pci_pri_init(struct pci_dev *dev); 464 void pci_restore_pri_state(struct pci_dev *pdev); 465 #else 466 static inline void pci_pri_init(struct pci_dev *dev) { } 467 static inline void pci_restore_pri_state(struct pci_dev *pdev) { } 468 #endif 469 470 #ifdef CONFIG_PCI_PASID 471 void pci_pasid_init(struct pci_dev *dev); 472 void pci_restore_pasid_state(struct pci_dev *pdev); 473 #else 474 static inline void pci_pasid_init(struct pci_dev *dev) { } 475 static inline void pci_restore_pasid_state(struct pci_dev *pdev) { } 476 #endif 477 478 #ifdef CONFIG_PCI_IOV 479 int pci_iov_init(struct pci_dev *dev); 480 void pci_iov_release(struct pci_dev *dev); 481 void pci_iov_remove(struct pci_dev *dev); 482 void pci_iov_update_resource(struct pci_dev *dev, int resno); 483 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno); 484 void pci_restore_iov_state(struct pci_dev *dev); 485 int pci_iov_bus_range(struct pci_bus *bus); 486 extern const struct attribute_group sriov_dev_attr_group; 487 #else 488 static inline int pci_iov_init(struct pci_dev *dev) 489 { 490 return -ENODEV; 491 } 492 static inline void pci_iov_release(struct pci_dev *dev) 493 494 { 495 } 496 static inline void pci_iov_remove(struct pci_dev *dev) 497 { 498 } 499 static inline void pci_restore_iov_state(struct pci_dev *dev) 500 { 501 } 502 static inline int pci_iov_bus_range(struct pci_bus *bus) 503 { 504 return 0; 505 } 506 507 #endif /* CONFIG_PCI_IOV */ 508 509 unsigned long pci_cardbus_resource_alignment(struct resource *); 510 511 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 512 struct resource *res) 513 { 514 #ifdef CONFIG_PCI_IOV 515 int resno = res - dev->resource; 516 517 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 518 return pci_sriov_resource_alignment(dev, resno); 519 #endif 520 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 521 return pci_cardbus_resource_alignment(res); 522 return resource_alignment(res); 523 } 524 525 void pci_enable_acs(struct pci_dev *dev); 526 #ifdef CONFIG_PCI_QUIRKS 527 int pci_dev_specific_acs_enabled(struct pci_dev *dev, u16 acs_flags); 528 int pci_dev_specific_enable_acs(struct pci_dev *dev); 529 int pci_dev_specific_disable_acs_redir(struct pci_dev *dev); 530 #else 531 static inline int pci_dev_specific_acs_enabled(struct pci_dev *dev, 532 u16 acs_flags) 533 { 534 return -ENOTTY; 535 } 536 static inline int pci_dev_specific_enable_acs(struct pci_dev *dev) 537 { 538 return -ENOTTY; 539 } 540 static inline int pci_dev_specific_disable_acs_redir(struct pci_dev *dev) 541 { 542 return -ENOTTY; 543 } 544 #endif 545 546 /* PCI error reporting and recovery */ 547 void pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state, 548 u32 service); 549 550 bool pcie_wait_for_link(struct pci_dev *pdev, bool active); 551 #ifdef CONFIG_PCIEASPM 552 void pcie_aspm_init_link_state(struct pci_dev *pdev); 553 void pcie_aspm_exit_link_state(struct pci_dev *pdev); 554 void pcie_aspm_pm_state_change(struct pci_dev *pdev); 555 void pcie_aspm_powersave_config_link(struct pci_dev *pdev); 556 #else 557 static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { } 558 static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { } 559 static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) { } 560 static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { } 561 #endif 562 563 #ifdef CONFIG_PCIE_ECRC 564 void pcie_set_ecrc_checking(struct pci_dev *dev); 565 void pcie_ecrc_get_policy(char *str); 566 #else 567 static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { } 568 static inline void pcie_ecrc_get_policy(char *str) { } 569 #endif 570 571 #ifdef CONFIG_PCIE_PTM 572 void pci_ptm_init(struct pci_dev *dev); 573 int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); 574 #else 575 static inline void pci_ptm_init(struct pci_dev *dev) { } 576 static inline int pci_enable_ptm(struct pci_dev *dev, u8 *granularity) 577 { return -EINVAL; } 578 #endif 579 580 struct pci_dev_reset_methods { 581 u16 vendor; 582 u16 device; 583 int (*reset)(struct pci_dev *dev, int probe); 584 }; 585 586 #ifdef CONFIG_PCI_QUIRKS 587 int pci_dev_specific_reset(struct pci_dev *dev, int probe); 588 #else 589 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 590 { 591 return -ENOTTY; 592 } 593 #endif 594 595 #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64) 596 int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, 597 struct resource *res); 598 #endif 599 600 u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar); 601 int pci_rebar_get_current_size(struct pci_dev *pdev, int bar); 602 int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size); 603 static inline u64 pci_rebar_size_to_bytes(int size) 604 { 605 return 1ULL << (size + 20); 606 } 607 608 struct device_node; 609 610 #ifdef CONFIG_OF 611 int of_pci_parse_bus_range(struct device_node *node, struct resource *res); 612 int of_get_pci_domain_nr(struct device_node *node); 613 int of_pci_get_max_link_speed(struct device_node *node); 614 void pci_set_of_node(struct pci_dev *dev); 615 void pci_release_of_node(struct pci_dev *dev); 616 void pci_set_bus_of_node(struct pci_bus *bus); 617 void pci_release_bus_of_node(struct pci_bus *bus); 618 619 #else 620 static inline int 621 of_pci_parse_bus_range(struct device_node *node, struct resource *res) 622 { 623 return -EINVAL; 624 } 625 626 static inline int 627 of_get_pci_domain_nr(struct device_node *node) 628 { 629 return -1; 630 } 631 632 static inline int 633 of_pci_get_max_link_speed(struct device_node *node) 634 { 635 return -EINVAL; 636 } 637 638 static inline void pci_set_of_node(struct pci_dev *dev) { } 639 static inline void pci_release_of_node(struct pci_dev *dev) { } 640 static inline void pci_set_bus_of_node(struct pci_bus *bus) { } 641 static inline void pci_release_bus_of_node(struct pci_bus *bus) { } 642 #endif /* CONFIG_OF */ 643 644 #ifdef CONFIG_PCIEAER 645 void pci_no_aer(void); 646 void pci_aer_init(struct pci_dev *dev); 647 void pci_aer_exit(struct pci_dev *dev); 648 extern const struct attribute_group aer_stats_attr_group; 649 void pci_aer_clear_fatal_status(struct pci_dev *dev); 650 void pci_aer_clear_device_status(struct pci_dev *dev); 651 #else 652 static inline void pci_no_aer(void) { } 653 static inline void pci_aer_init(struct pci_dev *d) { } 654 static inline void pci_aer_exit(struct pci_dev *d) { } 655 static inline void pci_aer_clear_fatal_status(struct pci_dev *dev) { } 656 static inline void pci_aer_clear_device_status(struct pci_dev *dev) { } 657 #endif 658 659 #ifdef CONFIG_ACPI 660 int pci_acpi_program_hp_params(struct pci_dev *dev); 661 #else 662 static inline int pci_acpi_program_hp_params(struct pci_dev *dev) 663 { 664 return -ENODEV; 665 } 666 #endif 667 668 #ifdef CONFIG_PCIEASPM 669 extern const struct attribute_group aspm_ctrl_attr_group; 670 #endif 671 672 #endif /* DRIVERS_PCI_H */ 673