1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #include <linux/workqueue.h> 5 6 #define PCI_CFG_SPACE_SIZE 256 7 #define PCI_CFG_SPACE_EXP_SIZE 4096 8 9 /* Functions internal to the PCI core code */ 10 11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env); 12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 14 #ifndef CONFIG_DMI 15 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 16 { return; } 17 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 18 { return; } 19 #else 20 extern void pci_create_firmware_label_files(struct pci_dev *pdev); 21 extern void pci_remove_firmware_label_files(struct pci_dev *pdev); 22 #endif 23 extern void pci_cleanup_rom(struct pci_dev *dev); 24 #ifdef HAVE_PCI_MMAP 25 enum pci_mmap_api { 26 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 27 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 28 }; 29 extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 30 struct vm_area_struct *vmai, 31 enum pci_mmap_api mmap_api); 32 #endif 33 int pci_probe_reset_function(struct pci_dev *dev); 34 35 /** 36 * struct pci_platform_pm_ops - Firmware PM callbacks 37 * 38 * @is_manageable: returns 'true' if given device is power manageable by the 39 * platform firmware 40 * 41 * @set_state: invokes the platform firmware to set the device's power state 42 * 43 * @choose_state: returns PCI power state of given device preferred by the 44 * platform; to be used during system-wide transitions from a 45 * sleeping state to the working state and vice versa 46 * 47 * @can_wakeup: returns 'true' if given device is capable of waking up the 48 * system from a sleeping state 49 * 50 * @sleep_wake: enables/disables the system wake up capability of given device 51 * 52 * @run_wake: enables/disables the platform to generate run-time wake-up events 53 * for given device (the device's wake-up capability has to be 54 * enabled by @sleep_wake for this feature to work) 55 * 56 * If given platform is generally capable of power managing PCI devices, all of 57 * these callbacks are mandatory. 58 */ 59 struct pci_platform_pm_ops { 60 bool (*is_manageable)(struct pci_dev *dev); 61 int (*set_state)(struct pci_dev *dev, pci_power_t state); 62 pci_power_t (*choose_state)(struct pci_dev *dev); 63 bool (*can_wakeup)(struct pci_dev *dev); 64 int (*sleep_wake)(struct pci_dev *dev, bool enable); 65 int (*run_wake)(struct pci_dev *dev, bool enable); 66 }; 67 68 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 69 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 70 extern void pci_disable_enabled_device(struct pci_dev *dev); 71 extern int pci_finish_runtime_suspend(struct pci_dev *dev); 72 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 73 extern void pci_pm_init(struct pci_dev *dev); 74 extern void platform_pci_wakeup_init(struct pci_dev *dev); 75 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 76 77 static inline void pci_wakeup_event(struct pci_dev *dev) 78 { 79 /* Wait 100 ms before the system can be put into a sleep state. */ 80 pm_wakeup_event(&dev->dev, 100); 81 } 82 83 static inline bool pci_is_bridge(struct pci_dev *pci_dev) 84 { 85 return !!(pci_dev->subordinate); 86 } 87 88 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 89 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 90 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); 91 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); 92 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); 93 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); 94 95 struct pci_vpd_ops { 96 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 97 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 98 void (*release)(struct pci_dev *dev); 99 }; 100 101 struct pci_vpd { 102 unsigned int len; 103 const struct pci_vpd_ops *ops; 104 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 105 }; 106 107 extern int pci_vpd_pci22_init(struct pci_dev *dev); 108 static inline void pci_vpd_release(struct pci_dev *dev) 109 { 110 if (dev->vpd) 111 dev->vpd->ops->release(dev); 112 } 113 114 /* PCI /proc functions */ 115 #ifdef CONFIG_PROC_FS 116 extern int pci_proc_attach_device(struct pci_dev *dev); 117 extern int pci_proc_detach_device(struct pci_dev *dev); 118 extern int pci_proc_detach_bus(struct pci_bus *bus); 119 #else 120 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 121 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 122 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 123 #endif 124 125 /* Functions for PCI Hotplug drivers to use */ 126 extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 127 128 #ifdef HAVE_PCI_LEGACY 129 extern void pci_create_legacy_files(struct pci_bus *bus); 130 extern void pci_remove_legacy_files(struct pci_bus *bus); 131 #else 132 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 133 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 134 #endif 135 136 /* Lock for read/write access to pci device and bus lists */ 137 extern struct rw_semaphore pci_bus_sem; 138 139 extern unsigned int pci_pm_d3_delay; 140 141 #ifdef CONFIG_PCI_MSI 142 void pci_no_msi(void); 143 extern void pci_msi_init_pci_dev(struct pci_dev *dev); 144 #else 145 static inline void pci_no_msi(void) { } 146 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 147 #endif 148 149 static inline int pci_no_d1d2(struct pci_dev *dev) 150 { 151 unsigned int parent_dstates = 0; 152 153 if (dev->bus->self) 154 parent_dstates = dev->bus->self->no_d1d2; 155 return (dev->no_d1d2 || parent_dstates); 156 157 } 158 extern struct device_attribute pci_dev_attrs[]; 159 extern struct device_attribute dev_attr_cpuaffinity; 160 extern struct device_attribute dev_attr_cpulistaffinity; 161 #ifdef CONFIG_HOTPLUG 162 extern struct bus_attribute pci_bus_attrs[]; 163 #else 164 #define pci_bus_attrs NULL 165 #endif 166 167 168 /** 169 * pci_match_one_device - Tell if a PCI device structure has a matching 170 * PCI device id structure 171 * @id: single PCI device id structure to match 172 * @dev: the PCI device structure to match against 173 * 174 * Returns the matching pci_device_id structure or %NULL if there is no match. 175 */ 176 static inline const struct pci_device_id * 177 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 178 { 179 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 180 (id->device == PCI_ANY_ID || id->device == dev->device) && 181 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 182 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 183 !((id->class ^ dev->class) & id->class_mask)) 184 return id; 185 return NULL; 186 } 187 188 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); 189 190 /* PCI slot sysfs helper code */ 191 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 192 193 extern struct kset *pci_slots_kset; 194 195 struct pci_slot_attribute { 196 struct attribute attr; 197 ssize_t (*show)(struct pci_slot *, char *); 198 ssize_t (*store)(struct pci_slot *, const char *, size_t); 199 }; 200 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 201 202 enum pci_bar_type { 203 pci_bar_unknown, /* Standard PCI BAR probe */ 204 pci_bar_io, /* An io port BAR */ 205 pci_bar_mem32, /* A 32-bit memory BAR */ 206 pci_bar_mem64, /* A 64-bit memory BAR */ 207 }; 208 209 extern int pci_setup_device(struct pci_dev *dev); 210 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 211 struct resource *res, unsigned int reg); 212 extern int pci_resource_bar(struct pci_dev *dev, int resno, 213 enum pci_bar_type *type); 214 extern int pci_bus_add_child(struct pci_bus *bus); 215 extern void pci_enable_ari(struct pci_dev *dev); 216 /** 217 * pci_ari_enabled - query ARI forwarding status 218 * @bus: the PCI bus 219 * 220 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 221 */ 222 static inline int pci_ari_enabled(struct pci_bus *bus) 223 { 224 return bus->self && bus->self->ari_enabled; 225 } 226 227 #ifdef CONFIG_PCI_QUIRKS 228 extern int pci_is_reassigndev(struct pci_dev *dev); 229 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev); 230 extern void pci_disable_bridge_window(struct pci_dev *dev); 231 #endif 232 233 /* Single Root I/O Virtualization */ 234 struct pci_sriov { 235 int pos; /* capability position */ 236 int nres; /* number of resources */ 237 u32 cap; /* SR-IOV Capabilities */ 238 u16 ctrl; /* SR-IOV Control */ 239 u16 total; /* total VFs associated with the PF */ 240 u16 initial; /* initial VFs associated with the PF */ 241 u16 nr_virtfn; /* number of VFs available */ 242 u16 offset; /* first VF Routing ID offset */ 243 u16 stride; /* following VF stride */ 244 u32 pgsz; /* page size for BAR alignment */ 245 u8 link; /* Function Dependency Link */ 246 struct pci_dev *dev; /* lowest numbered PF */ 247 struct pci_dev *self; /* this PF */ 248 struct mutex lock; /* lock for VF bus */ 249 struct work_struct mtask; /* VF Migration task */ 250 u8 __iomem *mstate; /* VF Migration State Array */ 251 }; 252 253 /* Address Translation Service */ 254 struct pci_ats { 255 int pos; /* capability position */ 256 int stu; /* Smallest Translation Unit */ 257 int qdep; /* Invalidate Queue Depth */ 258 int ref_cnt; /* Physical Function reference count */ 259 unsigned int is_enabled:1; /* Enable bit is set */ 260 }; 261 262 #ifdef CONFIG_PCI_IOV 263 extern int pci_iov_init(struct pci_dev *dev); 264 extern void pci_iov_release(struct pci_dev *dev); 265 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 266 enum pci_bar_type *type); 267 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, 268 int resno); 269 extern void pci_restore_iov_state(struct pci_dev *dev); 270 extern int pci_iov_bus_range(struct pci_bus *bus); 271 272 extern int pci_enable_ats(struct pci_dev *dev, int ps); 273 extern void pci_disable_ats(struct pci_dev *dev); 274 extern int pci_ats_queue_depth(struct pci_dev *dev); 275 /** 276 * pci_ats_enabled - query the ATS status 277 * @dev: the PCI device 278 * 279 * Returns 1 if ATS capability is enabled, or 0 if not. 280 */ 281 static inline int pci_ats_enabled(struct pci_dev *dev) 282 { 283 return dev->ats && dev->ats->is_enabled; 284 } 285 #else 286 static inline int pci_iov_init(struct pci_dev *dev) 287 { 288 return -ENODEV; 289 } 290 static inline void pci_iov_release(struct pci_dev *dev) 291 292 { 293 } 294 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 295 enum pci_bar_type *type) 296 { 297 return 0; 298 } 299 static inline void pci_restore_iov_state(struct pci_dev *dev) 300 { 301 } 302 static inline int pci_iov_bus_range(struct pci_bus *bus) 303 { 304 return 0; 305 } 306 307 static inline int pci_enable_ats(struct pci_dev *dev, int ps) 308 { 309 return -ENODEV; 310 } 311 static inline void pci_disable_ats(struct pci_dev *dev) 312 { 313 } 314 static inline int pci_ats_queue_depth(struct pci_dev *dev) 315 { 316 return -ENODEV; 317 } 318 static inline int pci_ats_enabled(struct pci_dev *dev) 319 { 320 return 0; 321 } 322 #endif /* CONFIG_PCI_IOV */ 323 324 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 325 struct resource *res) 326 { 327 #ifdef CONFIG_PCI_IOV 328 int resno = res - dev->resource; 329 330 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 331 return pci_sriov_resource_alignment(dev, resno); 332 #endif 333 return resource_alignment(res); 334 } 335 336 extern void pci_enable_acs(struct pci_dev *dev); 337 338 struct pci_dev_reset_methods { 339 u16 vendor; 340 u16 device; 341 int (*reset)(struct pci_dev *dev, int probe); 342 }; 343 344 #ifdef CONFIG_PCI_QUIRKS 345 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe); 346 #else 347 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 348 { 349 return -ENOTTY; 350 } 351 #endif 352 353 #endif /* DRIVERS_PCI_H */ 354