1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #define PCI_CFG_SPACE_SIZE 256 5 #define PCI_CFG_SPACE_EXP_SIZE 4096 6 7 extern const unsigned char pcie_link_speed[]; 8 9 /* Functions internal to the PCI core code */ 10 11 int pci_create_sysfs_dev_files(struct pci_dev *pdev); 12 void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 13 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 14 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 15 { return; } 16 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 17 { return; } 18 #else 19 void pci_create_firmware_label_files(struct pci_dev *pdev); 20 void pci_remove_firmware_label_files(struct pci_dev *pdev); 21 #endif 22 void pci_cleanup_rom(struct pci_dev *dev); 23 #ifdef HAVE_PCI_MMAP 24 enum pci_mmap_api { 25 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 26 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 27 }; 28 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, 29 enum pci_mmap_api mmap_api); 30 #endif 31 int pci_probe_reset_function(struct pci_dev *dev); 32 33 /** 34 * struct pci_platform_pm_ops - Firmware PM callbacks 35 * 36 * @is_manageable: returns 'true' if given device is power manageable by the 37 * platform firmware 38 * 39 * @set_state: invokes the platform firmware to set the device's power state 40 * 41 * @choose_state: returns PCI power state of given device preferred by the 42 * platform; to be used during system-wide transitions from a 43 * sleeping state to the working state and vice versa 44 * 45 * @sleep_wake: enables/disables the system wake up capability of given device 46 * 47 * @run_wake: enables/disables the platform to generate run-time wake-up events 48 * for given device (the device's wake-up capability has to be 49 * enabled by @sleep_wake for this feature to work) 50 * 51 * If given platform is generally capable of power managing PCI devices, all of 52 * these callbacks are mandatory. 53 */ 54 struct pci_platform_pm_ops { 55 bool (*is_manageable)(struct pci_dev *dev); 56 int (*set_state)(struct pci_dev *dev, pci_power_t state); 57 pci_power_t (*choose_state)(struct pci_dev *dev); 58 int (*sleep_wake)(struct pci_dev *dev, bool enable); 59 int (*run_wake)(struct pci_dev *dev, bool enable); 60 }; 61 62 int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 63 void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 64 void pci_power_up(struct pci_dev *dev); 65 void pci_disable_enabled_device(struct pci_dev *dev); 66 int pci_finish_runtime_suspend(struct pci_dev *dev); 67 int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 68 void pci_config_pm_runtime_get(struct pci_dev *dev); 69 void pci_config_pm_runtime_put(struct pci_dev *dev); 70 void pci_pm_init(struct pci_dev *dev); 71 void pci_allocate_cap_save_buffers(struct pci_dev *dev); 72 void pci_free_cap_save_buffers(struct pci_dev *dev); 73 74 static inline void pci_wakeup_event(struct pci_dev *dev) 75 { 76 /* Wait 100 ms before the system can be put into a sleep state. */ 77 pm_wakeup_event(&dev->dev, 100); 78 } 79 80 static inline bool pci_has_subordinate(struct pci_dev *pci_dev) 81 { 82 return !!(pci_dev->subordinate); 83 } 84 85 struct pci_vpd_ops { 86 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 87 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 88 void (*release)(struct pci_dev *dev); 89 }; 90 91 struct pci_vpd { 92 unsigned int len; 93 const struct pci_vpd_ops *ops; 94 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 95 }; 96 97 int pci_vpd_pci22_init(struct pci_dev *dev); 98 static inline void pci_vpd_release(struct pci_dev *dev) 99 { 100 if (dev->vpd) 101 dev->vpd->ops->release(dev); 102 } 103 104 /* PCI /proc functions */ 105 #ifdef CONFIG_PROC_FS 106 int pci_proc_attach_device(struct pci_dev *dev); 107 int pci_proc_detach_device(struct pci_dev *dev); 108 int pci_proc_detach_bus(struct pci_bus *bus); 109 #else 110 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 111 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 112 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 113 #endif 114 115 /* Functions for PCI Hotplug drivers to use */ 116 int pci_hp_add_bridge(struct pci_dev *dev); 117 118 #ifdef HAVE_PCI_LEGACY 119 void pci_create_legacy_files(struct pci_bus *bus); 120 void pci_remove_legacy_files(struct pci_bus *bus); 121 #else 122 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 123 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 124 #endif 125 126 /* Lock for read/write access to pci device and bus lists */ 127 extern struct rw_semaphore pci_bus_sem; 128 129 extern raw_spinlock_t pci_lock; 130 131 extern unsigned int pci_pm_d3_delay; 132 133 #ifdef CONFIG_PCI_MSI 134 void pci_no_msi(void); 135 void pci_msi_init_pci_dev(struct pci_dev *dev); 136 #else 137 static inline void pci_no_msi(void) { } 138 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 139 #endif 140 141 void pci_realloc_get_opt(char *); 142 143 static inline int pci_no_d1d2(struct pci_dev *dev) 144 { 145 unsigned int parent_dstates = 0; 146 147 if (dev->bus->self) 148 parent_dstates = dev->bus->self->no_d1d2; 149 return (dev->no_d1d2 || parent_dstates); 150 151 } 152 extern const struct attribute_group *pci_dev_groups[]; 153 extern const struct attribute_group *pcibus_groups[]; 154 extern struct device_type pci_dev_type; 155 extern const struct attribute_group *pci_bus_groups[]; 156 157 158 /** 159 * pci_match_one_device - Tell if a PCI device structure has a matching 160 * PCI device id structure 161 * @id: single PCI device id structure to match 162 * @dev: the PCI device structure to match against 163 * 164 * Returns the matching pci_device_id structure or %NULL if there is no match. 165 */ 166 static inline const struct pci_device_id * 167 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 168 { 169 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 170 (id->device == PCI_ANY_ID || id->device == dev->device) && 171 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 172 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 173 !((id->class ^ dev->class) & id->class_mask)) 174 return id; 175 return NULL; 176 } 177 178 /* PCI slot sysfs helper code */ 179 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 180 181 extern struct kset *pci_slots_kset; 182 183 struct pci_slot_attribute { 184 struct attribute attr; 185 ssize_t (*show)(struct pci_slot *, char *); 186 ssize_t (*store)(struct pci_slot *, const char *, size_t); 187 }; 188 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 189 190 enum pci_bar_type { 191 pci_bar_unknown, /* Standard PCI BAR probe */ 192 pci_bar_io, /* An io port BAR */ 193 pci_bar_mem32, /* A 32-bit memory BAR */ 194 pci_bar_mem64, /* A 64-bit memory BAR */ 195 }; 196 197 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 198 int crs_timeout); 199 int pci_setup_device(struct pci_dev *dev); 200 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 201 struct resource *res, unsigned int reg); 202 int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type); 203 void pci_configure_ari(struct pci_dev *dev); 204 void __pci_bus_size_bridges(struct pci_bus *bus, 205 struct list_head *realloc_head); 206 void __pci_bus_assign_resources(const struct pci_bus *bus, 207 struct list_head *realloc_head, 208 struct list_head *fail_head); 209 210 /** 211 * pci_ari_enabled - query ARI forwarding status 212 * @bus: the PCI bus 213 * 214 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 215 */ 216 static inline int pci_ari_enabled(struct pci_bus *bus) 217 { 218 return bus->self && bus->self->ari_enabled; 219 } 220 221 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 222 void pci_disable_bridge_window(struct pci_dev *dev); 223 224 /* Single Root I/O Virtualization */ 225 struct pci_sriov { 226 int pos; /* capability position */ 227 int nres; /* number of resources */ 228 u32 cap; /* SR-IOV Capabilities */ 229 u16 ctrl; /* SR-IOV Control */ 230 u16 total_VFs; /* total VFs associated with the PF */ 231 u16 initial_VFs; /* initial VFs associated with the PF */ 232 u16 num_VFs; /* number of VFs available */ 233 u16 offset; /* first VF Routing ID offset */ 234 u16 stride; /* following VF stride */ 235 u32 pgsz; /* page size for BAR alignment */ 236 u8 link; /* Function Dependency Link */ 237 u16 driver_max_VFs; /* max num VFs driver supports */ 238 struct pci_dev *dev; /* lowest numbered PF */ 239 struct pci_dev *self; /* this PF */ 240 struct mutex lock; /* lock for VF bus */ 241 }; 242 243 #ifdef CONFIG_PCI_ATS 244 void pci_restore_ats_state(struct pci_dev *dev); 245 #else 246 static inline void pci_restore_ats_state(struct pci_dev *dev) 247 { 248 } 249 #endif /* CONFIG_PCI_ATS */ 250 251 #ifdef CONFIG_PCI_IOV 252 int pci_iov_init(struct pci_dev *dev); 253 void pci_iov_release(struct pci_dev *dev); 254 int pci_iov_resource_bar(struct pci_dev *dev, int resno, 255 enum pci_bar_type *type); 256 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno); 257 void pci_restore_iov_state(struct pci_dev *dev); 258 int pci_iov_bus_range(struct pci_bus *bus); 259 260 #else 261 static inline int pci_iov_init(struct pci_dev *dev) 262 { 263 return -ENODEV; 264 } 265 static inline void pci_iov_release(struct pci_dev *dev) 266 267 { 268 } 269 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 270 enum pci_bar_type *type) 271 { 272 return 0; 273 } 274 static inline void pci_restore_iov_state(struct pci_dev *dev) 275 { 276 } 277 static inline int pci_iov_bus_range(struct pci_bus *bus) 278 { 279 return 0; 280 } 281 282 #endif /* CONFIG_PCI_IOV */ 283 284 unsigned long pci_cardbus_resource_alignment(struct resource *); 285 286 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 287 struct resource *res) 288 { 289 #ifdef CONFIG_PCI_IOV 290 int resno = res - dev->resource; 291 292 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 293 return pci_sriov_resource_alignment(dev, resno); 294 #endif 295 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 296 return pci_cardbus_resource_alignment(res); 297 return resource_alignment(res); 298 } 299 300 void pci_enable_acs(struct pci_dev *dev); 301 302 struct pci_dev_reset_methods { 303 u16 vendor; 304 u16 device; 305 int (*reset)(struct pci_dev *dev, int probe); 306 }; 307 308 #ifdef CONFIG_PCI_QUIRKS 309 int pci_dev_specific_reset(struct pci_dev *dev, int probe); 310 #else 311 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 312 { 313 return -ENOTTY; 314 } 315 #endif 316 317 #endif /* DRIVERS_PCI_H */ 318