1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #define PCI_CFG_SPACE_SIZE 256 5 #define PCI_CFG_SPACE_EXP_SIZE 4096 6 7 /* Functions internal to the PCI core code */ 8 9 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env); 10 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 11 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 12 extern void pci_cleanup_rom(struct pci_dev *dev); 13 #ifdef HAVE_PCI_MMAP 14 extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 15 struct vm_area_struct *vma); 16 #endif 17 18 /** 19 * Firmware PM callbacks 20 * 21 * @is_manageable - returns 'true' if given device is power manageable by the 22 * platform firmware 23 * 24 * @set_state - invokes the platform firmware to set the device's power state 25 * 26 * @choose_state - returns PCI power state of given device preferred by the 27 * platform; to be used during system-wide transitions from a 28 * sleeping state to the working state and vice versa 29 * 30 * @can_wakeup - returns 'true' if given device is capable of waking up the 31 * system from a sleeping state 32 * 33 * @sleep_wake - enables/disables the system wake up capability of given device 34 * 35 * If given platform is generally capable of power managing PCI devices, all of 36 * these callbacks are mandatory. 37 */ 38 struct pci_platform_pm_ops { 39 bool (*is_manageable)(struct pci_dev *dev); 40 int (*set_state)(struct pci_dev *dev, pci_power_t state); 41 pci_power_t (*choose_state)(struct pci_dev *dev); 42 bool (*can_wakeup)(struct pci_dev *dev); 43 int (*sleep_wake)(struct pci_dev *dev, bool enable); 44 }; 45 46 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 47 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 48 extern void pci_disable_enabled_device(struct pci_dev *dev); 49 extern void pci_pm_init(struct pci_dev *dev); 50 extern void platform_pci_wakeup_init(struct pci_dev *dev); 51 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 52 53 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val); 54 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val); 55 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val); 56 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val); 57 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val); 58 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); 59 60 struct pci_vpd_ops { 61 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 62 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 63 void (*release)(struct pci_dev *dev); 64 }; 65 66 struct pci_vpd { 67 unsigned int len; 68 const struct pci_vpd_ops *ops; 69 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 70 }; 71 72 extern int pci_vpd_pci22_init(struct pci_dev *dev); 73 static inline void pci_vpd_release(struct pci_dev *dev) 74 { 75 if (dev->vpd) 76 dev->vpd->ops->release(dev); 77 } 78 79 /* PCI /proc functions */ 80 #ifdef CONFIG_PROC_FS 81 extern int pci_proc_attach_device(struct pci_dev *dev); 82 extern int pci_proc_detach_device(struct pci_dev *dev); 83 extern int pci_proc_detach_bus(struct pci_bus *bus); 84 #else 85 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 86 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 87 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 88 #endif 89 90 /* Functions for PCI Hotplug drivers to use */ 91 extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 92 93 #ifdef HAVE_PCI_LEGACY 94 extern void pci_create_legacy_files(struct pci_bus *bus); 95 extern void pci_remove_legacy_files(struct pci_bus *bus); 96 #else 97 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 98 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 99 #endif 100 101 /* Lock for read/write access to pci device and bus lists */ 102 extern struct rw_semaphore pci_bus_sem; 103 104 extern unsigned int pci_pm_d3_delay; 105 106 #ifdef CONFIG_PCI_MSI 107 void pci_no_msi(void); 108 extern void pci_msi_init_pci_dev(struct pci_dev *dev); 109 #else 110 static inline void pci_no_msi(void) { } 111 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 112 #endif 113 114 #ifdef CONFIG_PCIEAER 115 void pci_no_aer(void); 116 #else 117 static inline void pci_no_aer(void) { } 118 #endif 119 120 static inline int pci_no_d1d2(struct pci_dev *dev) 121 { 122 unsigned int parent_dstates = 0; 123 124 if (dev->bus->self) 125 parent_dstates = dev->bus->self->no_d1d2; 126 return (dev->no_d1d2 || parent_dstates); 127 128 } 129 extern int pcie_mch_quirk; 130 extern struct device_attribute pci_dev_attrs[]; 131 extern struct device_attribute dev_attr_cpuaffinity; 132 extern struct device_attribute dev_attr_cpulistaffinity; 133 134 /** 135 * pci_match_one_device - Tell if a PCI device structure has a matching 136 * PCI device id structure 137 * @id: single PCI device id structure to match 138 * @dev: the PCI device structure to match against 139 * 140 * Returns the matching pci_device_id structure or %NULL if there is no match. 141 */ 142 static inline const struct pci_device_id * 143 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 144 { 145 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 146 (id->device == PCI_ANY_ID || id->device == dev->device) && 147 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 148 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 149 !((id->class ^ dev->class) & id->class_mask)) 150 return id; 151 return NULL; 152 } 153 154 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); 155 156 /* PCI slot sysfs helper code */ 157 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 158 159 extern struct kset *pci_slots_kset; 160 161 struct pci_slot_attribute { 162 struct attribute attr; 163 ssize_t (*show)(struct pci_slot *, char *); 164 ssize_t (*store)(struct pci_slot *, const char *, size_t); 165 }; 166 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 167 168 enum pci_bar_type { 169 pci_bar_unknown, /* Standard PCI BAR probe */ 170 pci_bar_io, /* An io port BAR */ 171 pci_bar_mem32, /* A 32-bit memory BAR */ 172 pci_bar_mem64, /* A 64-bit memory BAR */ 173 }; 174 175 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 176 struct resource *res, unsigned int reg); 177 extern int pci_resource_bar(struct pci_dev *dev, int resno, 178 enum pci_bar_type *type); 179 extern int pci_bus_add_child(struct pci_bus *bus); 180 extern void pci_enable_ari(struct pci_dev *dev); 181 /** 182 * pci_ari_enabled - query ARI forwarding status 183 * @bus: the PCI bus 184 * 185 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 186 */ 187 static inline int pci_ari_enabled(struct pci_bus *bus) 188 { 189 return bus->self && bus->self->ari_enabled; 190 } 191 192 #endif /* DRIVERS_PCI_H */ 193