1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #include <linux/workqueue.h> 5 6 #define PCI_CFG_SPACE_SIZE 256 7 #define PCI_CFG_SPACE_EXP_SIZE 4096 8 9 /* Functions internal to the PCI core code */ 10 11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env); 12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 14 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 15 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 16 { return; } 17 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 18 { return; } 19 #else 20 extern void pci_create_firmware_label_files(struct pci_dev *pdev); 21 extern void pci_remove_firmware_label_files(struct pci_dev *pdev); 22 #endif 23 extern void pci_cleanup_rom(struct pci_dev *dev); 24 #ifdef HAVE_PCI_MMAP 25 enum pci_mmap_api { 26 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 27 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 28 }; 29 extern int pci_mmap_fits(struct pci_dev *pdev, int resno, 30 struct vm_area_struct *vmai, 31 enum pci_mmap_api mmap_api); 32 #endif 33 int pci_probe_reset_function(struct pci_dev *dev); 34 35 /** 36 * struct pci_platform_pm_ops - Firmware PM callbacks 37 * 38 * @is_manageable: returns 'true' if given device is power manageable by the 39 * platform firmware 40 * 41 * @set_state: invokes the platform firmware to set the device's power state 42 * 43 * @choose_state: returns PCI power state of given device preferred by the 44 * platform; to be used during system-wide transitions from a 45 * sleeping state to the working state and vice versa 46 * 47 * @can_wakeup: returns 'true' if given device is capable of waking up the 48 * system from a sleeping state 49 * 50 * @sleep_wake: enables/disables the system wake up capability of given device 51 * 52 * @run_wake: enables/disables the platform to generate run-time wake-up events 53 * for given device (the device's wake-up capability has to be 54 * enabled by @sleep_wake for this feature to work) 55 * 56 * If given platform is generally capable of power managing PCI devices, all of 57 * these callbacks are mandatory. 58 */ 59 struct pci_platform_pm_ops { 60 bool (*is_manageable)(struct pci_dev *dev); 61 int (*set_state)(struct pci_dev *dev, pci_power_t state); 62 pci_power_t (*choose_state)(struct pci_dev *dev); 63 bool (*can_wakeup)(struct pci_dev *dev); 64 int (*sleep_wake)(struct pci_dev *dev, bool enable); 65 int (*run_wake)(struct pci_dev *dev, bool enable); 66 }; 67 68 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops); 69 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 70 extern void pci_power_up(struct pci_dev *dev); 71 extern void pci_disable_enabled_device(struct pci_dev *dev); 72 extern int pci_finish_runtime_suspend(struct pci_dev *dev); 73 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 74 extern void pci_wakeup_bus(struct pci_bus *bus); 75 extern void pci_config_pm_runtime_get(struct pci_dev *dev); 76 extern void pci_config_pm_runtime_put(struct pci_dev *dev); 77 extern void pci_pm_init(struct pci_dev *dev); 78 extern void platform_pci_wakeup_init(struct pci_dev *dev); 79 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); 80 void pci_free_cap_save_buffers(struct pci_dev *dev); 81 82 static inline void pci_wakeup_event(struct pci_dev *dev) 83 { 84 /* Wait 100 ms before the system can be put into a sleep state. */ 85 pm_wakeup_event(&dev->dev, 100); 86 } 87 88 static inline bool pci_is_bridge(struct pci_dev *pci_dev) 89 { 90 return !!(pci_dev->subordinate); 91 } 92 93 struct pci_vpd_ops { 94 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 95 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 96 void (*release)(struct pci_dev *dev); 97 }; 98 99 struct pci_vpd { 100 unsigned int len; 101 const struct pci_vpd_ops *ops; 102 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 103 }; 104 105 extern int pci_vpd_pci22_init(struct pci_dev *dev); 106 static inline void pci_vpd_release(struct pci_dev *dev) 107 { 108 if (dev->vpd) 109 dev->vpd->ops->release(dev); 110 } 111 112 /* PCI /proc functions */ 113 #ifdef CONFIG_PROC_FS 114 extern int pci_proc_attach_device(struct pci_dev *dev); 115 extern int pci_proc_detach_device(struct pci_dev *dev); 116 extern int pci_proc_detach_bus(struct pci_bus *bus); 117 #else 118 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 119 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 120 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 121 #endif 122 123 /* Functions for PCI Hotplug drivers to use */ 124 int pci_hp_add_bridge(struct pci_dev *dev); 125 126 #ifdef HAVE_PCI_LEGACY 127 extern void pci_create_legacy_files(struct pci_bus *bus); 128 extern void pci_remove_legacy_files(struct pci_bus *bus); 129 #else 130 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 131 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 132 #endif 133 134 /* Lock for read/write access to pci device and bus lists */ 135 extern struct rw_semaphore pci_bus_sem; 136 137 extern raw_spinlock_t pci_lock; 138 139 extern unsigned int pci_pm_d3_delay; 140 141 #ifdef CONFIG_PCI_MSI 142 void pci_no_msi(void); 143 extern void pci_msi_init_pci_dev(struct pci_dev *dev); 144 #else 145 static inline void pci_no_msi(void) { } 146 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { } 147 #endif 148 149 void pci_realloc_get_opt(char *); 150 151 static inline int pci_no_d1d2(struct pci_dev *dev) 152 { 153 unsigned int parent_dstates = 0; 154 155 if (dev->bus->self) 156 parent_dstates = dev->bus->self->no_d1d2; 157 return (dev->no_d1d2 || parent_dstates); 158 159 } 160 extern struct device_attribute pci_dev_attrs[]; 161 extern struct device_attribute pcibus_dev_attrs[]; 162 #ifdef CONFIG_HOTPLUG 163 extern struct bus_attribute pci_bus_attrs[]; 164 #else 165 #define pci_bus_attrs NULL 166 #endif 167 168 169 /** 170 * pci_match_one_device - Tell if a PCI device structure has a matching 171 * PCI device id structure 172 * @id: single PCI device id structure to match 173 * @dev: the PCI device structure to match against 174 * 175 * Returns the matching pci_device_id structure or %NULL if there is no match. 176 */ 177 static inline const struct pci_device_id * 178 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 179 { 180 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 181 (id->device == PCI_ANY_ID || id->device == dev->device) && 182 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 183 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 184 !((id->class ^ dev->class) & id->class_mask)) 185 return id; 186 return NULL; 187 } 188 189 /* PCI slot sysfs helper code */ 190 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 191 192 extern struct kset *pci_slots_kset; 193 194 struct pci_slot_attribute { 195 struct attribute attr; 196 ssize_t (*show)(struct pci_slot *, char *); 197 ssize_t (*store)(struct pci_slot *, const char *, size_t); 198 }; 199 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 200 201 enum pci_bar_type { 202 pci_bar_unknown, /* Standard PCI BAR probe */ 203 pci_bar_io, /* An io port BAR */ 204 pci_bar_mem32, /* A 32-bit memory BAR */ 205 pci_bar_mem64, /* A 64-bit memory BAR */ 206 }; 207 208 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 209 int crs_timeout); 210 extern int pci_setup_device(struct pci_dev *dev); 211 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 212 struct resource *res, unsigned int reg); 213 extern int pci_resource_bar(struct pci_dev *dev, int resno, 214 enum pci_bar_type *type); 215 extern int pci_bus_add_child(struct pci_bus *bus); 216 extern void pci_enable_ari(struct pci_dev *dev); 217 /** 218 * pci_ari_enabled - query ARI forwarding status 219 * @bus: the PCI bus 220 * 221 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled; 222 */ 223 static inline int pci_ari_enabled(struct pci_bus *bus) 224 { 225 return bus->self && bus->self->ari_enabled; 226 } 227 228 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 229 extern void pci_disable_bridge_window(struct pci_dev *dev); 230 231 /* Single Root I/O Virtualization */ 232 struct pci_sriov { 233 int pos; /* capability position */ 234 int nres; /* number of resources */ 235 u32 cap; /* SR-IOV Capabilities */ 236 u16 ctrl; /* SR-IOV Control */ 237 u16 total; /* total VFs associated with the PF */ 238 u16 initial; /* initial VFs associated with the PF */ 239 u16 nr_virtfn; /* number of VFs available */ 240 u16 offset; /* first VF Routing ID offset */ 241 u16 stride; /* following VF stride */ 242 u32 pgsz; /* page size for BAR alignment */ 243 u8 link; /* Function Dependency Link */ 244 struct pci_dev *dev; /* lowest numbered PF */ 245 struct pci_dev *self; /* this PF */ 246 struct mutex lock; /* lock for VF bus */ 247 struct work_struct mtask; /* VF Migration task */ 248 u8 __iomem *mstate; /* VF Migration State Array */ 249 }; 250 251 #ifdef CONFIG_PCI_ATS 252 extern void pci_restore_ats_state(struct pci_dev *dev); 253 #else 254 static inline void pci_restore_ats_state(struct pci_dev *dev) 255 { 256 } 257 #endif /* CONFIG_PCI_ATS */ 258 259 #ifdef CONFIG_PCI_IOV 260 extern int pci_iov_init(struct pci_dev *dev); 261 extern void pci_iov_release(struct pci_dev *dev); 262 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno, 263 enum pci_bar_type *type); 264 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, 265 int resno); 266 extern void pci_restore_iov_state(struct pci_dev *dev); 267 extern int pci_iov_bus_range(struct pci_bus *bus); 268 269 #else 270 static inline int pci_iov_init(struct pci_dev *dev) 271 { 272 return -ENODEV; 273 } 274 static inline void pci_iov_release(struct pci_dev *dev) 275 276 { 277 } 278 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno, 279 enum pci_bar_type *type) 280 { 281 return 0; 282 } 283 static inline void pci_restore_iov_state(struct pci_dev *dev) 284 { 285 } 286 static inline int pci_iov_bus_range(struct pci_bus *bus) 287 { 288 return 0; 289 } 290 291 #endif /* CONFIG_PCI_IOV */ 292 293 extern unsigned long pci_cardbus_resource_alignment(struct resource *); 294 295 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 296 struct resource *res) 297 { 298 #ifdef CONFIG_PCI_IOV 299 int resno = res - dev->resource; 300 301 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 302 return pci_sriov_resource_alignment(dev, resno); 303 #endif 304 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 305 return pci_cardbus_resource_alignment(res); 306 return resource_alignment(res); 307 } 308 309 extern void pci_enable_acs(struct pci_dev *dev); 310 311 struct pci_dev_reset_methods { 312 u16 vendor; 313 u16 device; 314 int (*reset)(struct pci_dev *dev, int probe); 315 }; 316 317 #ifdef CONFIG_PCI_QUIRKS 318 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe); 319 #else 320 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 321 { 322 return -ENOTTY; 323 } 324 #endif 325 326 #endif /* DRIVERS_PCI_H */ 327