xref: /openbmc/linux/drivers/pci/pci-sysfs.c (revision eb627e17)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4  * (C) Copyright 2002-2004 IBM Corp.
5  * (C) Copyright 2003 Matthew Wilcox
6  * (C) Copyright 2003 Hewlett-Packard
7  * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8  * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9  *
10  * File attributes for PCI devices
11  *
12  * Modeled after usb's driverfs.c
13  */
14 
15 
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/pci.h>
19 #include <linux/stat.h>
20 #include <linux/export.h>
21 #include <linux/topology.h>
22 #include <linux/mm.h>
23 #include <linux/fs.h>
24 #include <linux/capability.h>
25 #include <linux/security.h>
26 #include <linux/slab.h>
27 #include <linux/vgaarb.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/of.h>
30 #include "pci.h"
31 
32 static int sysfs_initialized;	/* = 0 */
33 
34 /* show configuration fields */
35 #define pci_config_attr(field, format_string)				\
36 static ssize_t								\
37 field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
38 {									\
39 	struct pci_dev *pdev;						\
40 									\
41 	pdev = to_pci_dev(dev);						\
42 	return sprintf(buf, format_string, pdev->field);		\
43 }									\
44 static DEVICE_ATTR_RO(field)
45 
46 pci_config_attr(vendor, "0x%04x\n");
47 pci_config_attr(device, "0x%04x\n");
48 pci_config_attr(subsystem_vendor, "0x%04x\n");
49 pci_config_attr(subsystem_device, "0x%04x\n");
50 pci_config_attr(revision, "0x%02x\n");
51 pci_config_attr(class, "0x%06x\n");
52 pci_config_attr(irq, "%u\n");
53 
54 static ssize_t broken_parity_status_show(struct device *dev,
55 					 struct device_attribute *attr,
56 					 char *buf)
57 {
58 	struct pci_dev *pdev = to_pci_dev(dev);
59 	return sprintf(buf, "%u\n", pdev->broken_parity_status);
60 }
61 
62 static ssize_t broken_parity_status_store(struct device *dev,
63 					  struct device_attribute *attr,
64 					  const char *buf, size_t count)
65 {
66 	struct pci_dev *pdev = to_pci_dev(dev);
67 	unsigned long val;
68 
69 	if (kstrtoul(buf, 0, &val) < 0)
70 		return -EINVAL;
71 
72 	pdev->broken_parity_status = !!val;
73 
74 	return count;
75 }
76 static DEVICE_ATTR_RW(broken_parity_status);
77 
78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 				      struct device_attribute *attr, char *buf)
80 {
81 	const struct cpumask *mask;
82 
83 #ifdef CONFIG_NUMA
84 	mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 					  cpumask_of_node(dev_to_node(dev));
86 #else
87 	mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88 #endif
89 	return cpumap_print_to_pagebuf(list, buf, mask);
90 }
91 
92 static ssize_t local_cpus_show(struct device *dev,
93 			       struct device_attribute *attr, char *buf)
94 {
95 	return pci_dev_show_local_cpu(dev, false, attr, buf);
96 }
97 static DEVICE_ATTR_RO(local_cpus);
98 
99 static ssize_t local_cpulist_show(struct device *dev,
100 				  struct device_attribute *attr, char *buf)
101 {
102 	return pci_dev_show_local_cpu(dev, true, attr, buf);
103 }
104 static DEVICE_ATTR_RO(local_cpulist);
105 
106 /*
107  * PCI Bus Class Devices
108  */
109 static ssize_t cpuaffinity_show(struct device *dev,
110 				struct device_attribute *attr, char *buf)
111 {
112 	const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113 
114 	return cpumap_print_to_pagebuf(false, buf, cpumask);
115 }
116 static DEVICE_ATTR_RO(cpuaffinity);
117 
118 static ssize_t cpulistaffinity_show(struct device *dev,
119 				    struct device_attribute *attr, char *buf)
120 {
121 	const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122 
123 	return cpumap_print_to_pagebuf(true, buf, cpumask);
124 }
125 static DEVICE_ATTR_RO(cpulistaffinity);
126 
127 /* show resources */
128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 			     char *buf)
130 {
131 	struct pci_dev *pci_dev = to_pci_dev(dev);
132 	char *str = buf;
133 	int i;
134 	int max;
135 	resource_size_t start, end;
136 
137 	if (pci_dev->subordinate)
138 		max = DEVICE_COUNT_RESOURCE;
139 	else
140 		max = PCI_BRIDGE_RESOURCES;
141 
142 	for (i = 0; i < max; i++) {
143 		struct resource *res =  &pci_dev->resource[i];
144 		pci_resource_to_user(pci_dev, i, res, &start, &end);
145 		str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 			       (unsigned long long)start,
147 			       (unsigned long long)end,
148 			       (unsigned long long)res->flags);
149 	}
150 	return (str - buf);
151 }
152 static DEVICE_ATTR_RO(resource);
153 
154 static ssize_t max_link_speed_show(struct device *dev,
155 				   struct device_attribute *attr, char *buf)
156 {
157 	struct pci_dev *pdev = to_pci_dev(dev);
158 
159 	return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160 }
161 static DEVICE_ATTR_RO(max_link_speed);
162 
163 static ssize_t max_link_width_show(struct device *dev,
164 				   struct device_attribute *attr, char *buf)
165 {
166 	struct pci_dev *pdev = to_pci_dev(dev);
167 
168 	return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169 }
170 static DEVICE_ATTR_RO(max_link_width);
171 
172 static ssize_t current_link_speed_show(struct device *dev,
173 				       struct device_attribute *attr, char *buf)
174 {
175 	struct pci_dev *pci_dev = to_pci_dev(dev);
176 	u16 linkstat;
177 	int err;
178 	const char *speed;
179 
180 	err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 	if (err)
182 		return -EINVAL;
183 
184 	switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 	case PCI_EXP_LNKSTA_CLS_16_0GB:
186 		speed = "16 GT/s";
187 		break;
188 	case PCI_EXP_LNKSTA_CLS_8_0GB:
189 		speed = "8 GT/s";
190 		break;
191 	case PCI_EXP_LNKSTA_CLS_5_0GB:
192 		speed = "5 GT/s";
193 		break;
194 	case PCI_EXP_LNKSTA_CLS_2_5GB:
195 		speed = "2.5 GT/s";
196 		break;
197 	default:
198 		speed = "Unknown speed";
199 	}
200 
201 	return sprintf(buf, "%s\n", speed);
202 }
203 static DEVICE_ATTR_RO(current_link_speed);
204 
205 static ssize_t current_link_width_show(struct device *dev,
206 				       struct device_attribute *attr, char *buf)
207 {
208 	struct pci_dev *pci_dev = to_pci_dev(dev);
209 	u16 linkstat;
210 	int err;
211 
212 	err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
213 	if (err)
214 		return -EINVAL;
215 
216 	return sprintf(buf, "%u\n",
217 		(linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
218 }
219 static DEVICE_ATTR_RO(current_link_width);
220 
221 static ssize_t secondary_bus_number_show(struct device *dev,
222 					 struct device_attribute *attr,
223 					 char *buf)
224 {
225 	struct pci_dev *pci_dev = to_pci_dev(dev);
226 	u8 sec_bus;
227 	int err;
228 
229 	err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
230 	if (err)
231 		return -EINVAL;
232 
233 	return sprintf(buf, "%u\n", sec_bus);
234 }
235 static DEVICE_ATTR_RO(secondary_bus_number);
236 
237 static ssize_t subordinate_bus_number_show(struct device *dev,
238 					   struct device_attribute *attr,
239 					   char *buf)
240 {
241 	struct pci_dev *pci_dev = to_pci_dev(dev);
242 	u8 sub_bus;
243 	int err;
244 
245 	err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
246 	if (err)
247 		return -EINVAL;
248 
249 	return sprintf(buf, "%u\n", sub_bus);
250 }
251 static DEVICE_ATTR_RO(subordinate_bus_number);
252 
253 static ssize_t ari_enabled_show(struct device *dev,
254 				struct device_attribute *attr,
255 				char *buf)
256 {
257 	struct pci_dev *pci_dev = to_pci_dev(dev);
258 
259 	return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
260 }
261 static DEVICE_ATTR_RO(ari_enabled);
262 
263 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
264 			     char *buf)
265 {
266 	struct pci_dev *pci_dev = to_pci_dev(dev);
267 
268 	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
269 		       pci_dev->vendor, pci_dev->device,
270 		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
271 		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
272 		       (u8)(pci_dev->class));
273 }
274 static DEVICE_ATTR_RO(modalias);
275 
276 static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
277 			     const char *buf, size_t count)
278 {
279 	struct pci_dev *pdev = to_pci_dev(dev);
280 	unsigned long val;
281 	ssize_t result = kstrtoul(buf, 0, &val);
282 
283 	if (result < 0)
284 		return result;
285 
286 	/* this can crash the machine when done on the "wrong" device */
287 	if (!capable(CAP_SYS_ADMIN))
288 		return -EPERM;
289 
290 	device_lock(dev);
291 	if (dev->driver)
292 		result = -EBUSY;
293 	else if (val)
294 		result = pci_enable_device(pdev);
295 	else if (pci_is_enabled(pdev))
296 		pci_disable_device(pdev);
297 	else
298 		result = -EIO;
299 	device_unlock(dev);
300 
301 	return result < 0 ? result : count;
302 }
303 
304 static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
305 			    char *buf)
306 {
307 	struct pci_dev *pdev;
308 
309 	pdev = to_pci_dev(dev);
310 	return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
311 }
312 static DEVICE_ATTR_RW(enable);
313 
314 #ifdef CONFIG_NUMA
315 static ssize_t numa_node_store(struct device *dev,
316 			       struct device_attribute *attr, const char *buf,
317 			       size_t count)
318 {
319 	struct pci_dev *pdev = to_pci_dev(dev);
320 	int node, ret;
321 
322 	if (!capable(CAP_SYS_ADMIN))
323 		return -EPERM;
324 
325 	ret = kstrtoint(buf, 0, &node);
326 	if (ret)
327 		return ret;
328 
329 	if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
330 		return -EINVAL;
331 
332 	if (node != NUMA_NO_NODE && !node_online(node))
333 		return -EINVAL;
334 
335 	add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
336 	pci_alert(pdev, FW_BUG "Overriding NUMA node to %d.  Contact your vendor for updates.",
337 		  node);
338 
339 	dev->numa_node = node;
340 	return count;
341 }
342 
343 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
344 			      char *buf)
345 {
346 	return sprintf(buf, "%d\n", dev->numa_node);
347 }
348 static DEVICE_ATTR_RW(numa_node);
349 #endif
350 
351 static ssize_t dma_mask_bits_show(struct device *dev,
352 				  struct device_attribute *attr, char *buf)
353 {
354 	struct pci_dev *pdev = to_pci_dev(dev);
355 
356 	return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
357 }
358 static DEVICE_ATTR_RO(dma_mask_bits);
359 
360 static ssize_t consistent_dma_mask_bits_show(struct device *dev,
361 					     struct device_attribute *attr,
362 					     char *buf)
363 {
364 	return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
365 }
366 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
367 
368 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
369 			    char *buf)
370 {
371 	struct pci_dev *pdev = to_pci_dev(dev);
372 	struct pci_bus *subordinate = pdev->subordinate;
373 
374 	return sprintf(buf, "%u\n", subordinate ?
375 		       !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
376 			   : !pdev->no_msi);
377 }
378 
379 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
380 			     const char *buf, size_t count)
381 {
382 	struct pci_dev *pdev = to_pci_dev(dev);
383 	struct pci_bus *subordinate = pdev->subordinate;
384 	unsigned long val;
385 
386 	if (kstrtoul(buf, 0, &val) < 0)
387 		return -EINVAL;
388 
389 	if (!capable(CAP_SYS_ADMIN))
390 		return -EPERM;
391 
392 	/*
393 	 * "no_msi" and "bus_flags" only affect what happens when a driver
394 	 * requests MSI or MSI-X.  They don't affect any drivers that have
395 	 * already requested MSI or MSI-X.
396 	 */
397 	if (!subordinate) {
398 		pdev->no_msi = !val;
399 		pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
400 			 val ? "allowed" : "disallowed");
401 		return count;
402 	}
403 
404 	if (val)
405 		subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
406 	else
407 		subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
408 
409 	dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
410 		 val ? "allowed" : "disallowed");
411 	return count;
412 }
413 static DEVICE_ATTR_RW(msi_bus);
414 
415 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
416 {
417 	unsigned long val;
418 	struct pci_bus *b = NULL;
419 
420 	if (kstrtoul(buf, 0, &val) < 0)
421 		return -EINVAL;
422 
423 	if (val) {
424 		pci_lock_rescan_remove();
425 		while ((b = pci_find_next_bus(b)) != NULL)
426 			pci_rescan_bus(b);
427 		pci_unlock_rescan_remove();
428 	}
429 	return count;
430 }
431 static BUS_ATTR_WO(rescan);
432 
433 static struct attribute *pci_bus_attrs[] = {
434 	&bus_attr_rescan.attr,
435 	NULL,
436 };
437 
438 static const struct attribute_group pci_bus_group = {
439 	.attrs = pci_bus_attrs,
440 };
441 
442 const struct attribute_group *pci_bus_groups[] = {
443 	&pci_bus_group,
444 	NULL,
445 };
446 
447 static ssize_t dev_rescan_store(struct device *dev,
448 				struct device_attribute *attr, const char *buf,
449 				size_t count)
450 {
451 	unsigned long val;
452 	struct pci_dev *pdev = to_pci_dev(dev);
453 
454 	if (kstrtoul(buf, 0, &val) < 0)
455 		return -EINVAL;
456 
457 	if (val) {
458 		pci_lock_rescan_remove();
459 		pci_rescan_bus(pdev->bus);
460 		pci_unlock_rescan_remove();
461 	}
462 	return count;
463 }
464 static struct device_attribute dev_rescan_attr = __ATTR(rescan,
465 							(S_IWUSR|S_IWGRP),
466 							NULL, dev_rescan_store);
467 
468 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
469 			    const char *buf, size_t count)
470 {
471 	unsigned long val;
472 
473 	if (kstrtoul(buf, 0, &val) < 0)
474 		return -EINVAL;
475 
476 	if (val && device_remove_file_self(dev, attr))
477 		pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
478 	return count;
479 }
480 static struct device_attribute dev_remove_attr = __ATTR(remove,
481 							(S_IWUSR|S_IWGRP),
482 							NULL, remove_store);
483 
484 static ssize_t dev_bus_rescan_store(struct device *dev,
485 				    struct device_attribute *attr,
486 				    const char *buf, size_t count)
487 {
488 	unsigned long val;
489 	struct pci_bus *bus = to_pci_bus(dev);
490 
491 	if (kstrtoul(buf, 0, &val) < 0)
492 		return -EINVAL;
493 
494 	if (val) {
495 		pci_lock_rescan_remove();
496 		if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 			pci_rescan_bus_bridge_resize(bus->self);
498 		else
499 			pci_rescan_bus(bus);
500 		pci_unlock_rescan_remove();
501 	}
502 	return count;
503 }
504 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
505 
506 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507 static ssize_t d3cold_allowed_store(struct device *dev,
508 				    struct device_attribute *attr,
509 				    const char *buf, size_t count)
510 {
511 	struct pci_dev *pdev = to_pci_dev(dev);
512 	unsigned long val;
513 
514 	if (kstrtoul(buf, 0, &val) < 0)
515 		return -EINVAL;
516 
517 	pdev->d3cold_allowed = !!val;
518 	if (pdev->d3cold_allowed)
519 		pci_d3cold_enable(pdev);
520 	else
521 		pci_d3cold_disable(pdev);
522 
523 	pm_runtime_resume(dev);
524 
525 	return count;
526 }
527 
528 static ssize_t d3cold_allowed_show(struct device *dev,
529 				   struct device_attribute *attr, char *buf)
530 {
531 	struct pci_dev *pdev = to_pci_dev(dev);
532 	return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533 }
534 static DEVICE_ATTR_RW(d3cold_allowed);
535 #endif
536 
537 #ifdef CONFIG_OF
538 static ssize_t devspec_show(struct device *dev,
539 			    struct device_attribute *attr, char *buf)
540 {
541 	struct pci_dev *pdev = to_pci_dev(dev);
542 	struct device_node *np = pci_device_to_OF_node(pdev);
543 
544 	if (np == NULL)
545 		return 0;
546 	return sprintf(buf, "%pOF", np);
547 }
548 static DEVICE_ATTR_RO(devspec);
549 #endif
550 
551 #ifdef CONFIG_PCI_IOV
552 static ssize_t sriov_totalvfs_show(struct device *dev,
553 				   struct device_attribute *attr,
554 				   char *buf)
555 {
556 	struct pci_dev *pdev = to_pci_dev(dev);
557 
558 	return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
559 }
560 
561 
562 static ssize_t sriov_numvfs_show(struct device *dev,
563 				 struct device_attribute *attr,
564 				 char *buf)
565 {
566 	struct pci_dev *pdev = to_pci_dev(dev);
567 
568 	return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
569 }
570 
571 /*
572  * num_vfs > 0; number of VFs to enable
573  * num_vfs = 0; disable all VFs
574  *
575  * Note: SRIOV spec doesn't allow partial VF
576  *       disable, so it's all or none.
577  */
578 static ssize_t sriov_numvfs_store(struct device *dev,
579 				  struct device_attribute *attr,
580 				  const char *buf, size_t count)
581 {
582 	struct pci_dev *pdev = to_pci_dev(dev);
583 	int ret;
584 	u16 num_vfs;
585 
586 	ret = kstrtou16(buf, 0, &num_vfs);
587 	if (ret < 0)
588 		return ret;
589 
590 	if (num_vfs > pci_sriov_get_totalvfs(pdev))
591 		return -ERANGE;
592 
593 	device_lock(&pdev->dev);
594 
595 	if (num_vfs == pdev->sriov->num_VFs)
596 		goto exit;
597 
598 	/* is PF driver loaded w/callback */
599 	if (!pdev->driver || !pdev->driver->sriov_configure) {
600 		pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
601 		ret = -ENOENT;
602 		goto exit;
603 	}
604 
605 	if (num_vfs == 0) {
606 		/* disable VFs */
607 		ret = pdev->driver->sriov_configure(pdev, 0);
608 		goto exit;
609 	}
610 
611 	/* enable VFs */
612 	if (pdev->sriov->num_VFs) {
613 		pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
614 			 pdev->sriov->num_VFs, num_vfs);
615 		ret = -EBUSY;
616 		goto exit;
617 	}
618 
619 	ret = pdev->driver->sriov_configure(pdev, num_vfs);
620 	if (ret < 0)
621 		goto exit;
622 
623 	if (ret != num_vfs)
624 		pci_warn(pdev, "%d VFs requested; only %d enabled\n",
625 			 num_vfs, ret);
626 
627 exit:
628 	device_unlock(&pdev->dev);
629 
630 	if (ret < 0)
631 		return ret;
632 
633 	return count;
634 }
635 
636 static ssize_t sriov_offset_show(struct device *dev,
637 				 struct device_attribute *attr,
638 				 char *buf)
639 {
640 	struct pci_dev *pdev = to_pci_dev(dev);
641 
642 	return sprintf(buf, "%u\n", pdev->sriov->offset);
643 }
644 
645 static ssize_t sriov_stride_show(struct device *dev,
646 				 struct device_attribute *attr,
647 				 char *buf)
648 {
649 	struct pci_dev *pdev = to_pci_dev(dev);
650 
651 	return sprintf(buf, "%u\n", pdev->sriov->stride);
652 }
653 
654 static ssize_t sriov_vf_device_show(struct device *dev,
655 				    struct device_attribute *attr,
656 				    char *buf)
657 {
658 	struct pci_dev *pdev = to_pci_dev(dev);
659 
660 	return sprintf(buf, "%x\n", pdev->sriov->vf_device);
661 }
662 
663 static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
664 					    struct device_attribute *attr,
665 					    char *buf)
666 {
667 	struct pci_dev *pdev = to_pci_dev(dev);
668 
669 	return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
670 }
671 
672 static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
673 					     struct device_attribute *attr,
674 					     const char *buf, size_t count)
675 {
676 	struct pci_dev *pdev = to_pci_dev(dev);
677 	bool drivers_autoprobe;
678 
679 	if (kstrtobool(buf, &drivers_autoprobe) < 0)
680 		return -EINVAL;
681 
682 	pdev->sriov->drivers_autoprobe = drivers_autoprobe;
683 
684 	return count;
685 }
686 
687 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
688 static struct device_attribute sriov_numvfs_attr =
689 		__ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
690 		       sriov_numvfs_show, sriov_numvfs_store);
691 static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
692 static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
693 static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
694 static struct device_attribute sriov_drivers_autoprobe_attr =
695 		__ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
696 		       sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
697 #endif /* CONFIG_PCI_IOV */
698 
699 static ssize_t driver_override_store(struct device *dev,
700 				     struct device_attribute *attr,
701 				     const char *buf, size_t count)
702 {
703 	struct pci_dev *pdev = to_pci_dev(dev);
704 	char *driver_override, *old, *cp;
705 
706 	/* We need to keep extra room for a newline */
707 	if (count >= (PAGE_SIZE - 1))
708 		return -EINVAL;
709 
710 	driver_override = kstrndup(buf, count, GFP_KERNEL);
711 	if (!driver_override)
712 		return -ENOMEM;
713 
714 	cp = strchr(driver_override, '\n');
715 	if (cp)
716 		*cp = '\0';
717 
718 	device_lock(dev);
719 	old = pdev->driver_override;
720 	if (strlen(driver_override)) {
721 		pdev->driver_override = driver_override;
722 	} else {
723 		kfree(driver_override);
724 		pdev->driver_override = NULL;
725 	}
726 	device_unlock(dev);
727 
728 	kfree(old);
729 
730 	return count;
731 }
732 
733 static ssize_t driver_override_show(struct device *dev,
734 				    struct device_attribute *attr, char *buf)
735 {
736 	struct pci_dev *pdev = to_pci_dev(dev);
737 	ssize_t len;
738 
739 	device_lock(dev);
740 	len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
741 	device_unlock(dev);
742 	return len;
743 }
744 static DEVICE_ATTR_RW(driver_override);
745 
746 static struct attribute *pci_dev_attrs[] = {
747 	&dev_attr_resource.attr,
748 	&dev_attr_vendor.attr,
749 	&dev_attr_device.attr,
750 	&dev_attr_subsystem_vendor.attr,
751 	&dev_attr_subsystem_device.attr,
752 	&dev_attr_revision.attr,
753 	&dev_attr_class.attr,
754 	&dev_attr_irq.attr,
755 	&dev_attr_local_cpus.attr,
756 	&dev_attr_local_cpulist.attr,
757 	&dev_attr_modalias.attr,
758 #ifdef CONFIG_NUMA
759 	&dev_attr_numa_node.attr,
760 #endif
761 	&dev_attr_dma_mask_bits.attr,
762 	&dev_attr_consistent_dma_mask_bits.attr,
763 	&dev_attr_enable.attr,
764 	&dev_attr_broken_parity_status.attr,
765 	&dev_attr_msi_bus.attr,
766 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
767 	&dev_attr_d3cold_allowed.attr,
768 #endif
769 #ifdef CONFIG_OF
770 	&dev_attr_devspec.attr,
771 #endif
772 	&dev_attr_driver_override.attr,
773 	&dev_attr_ari_enabled.attr,
774 	NULL,
775 };
776 
777 static struct attribute *pci_bridge_attrs[] = {
778 	&dev_attr_subordinate_bus_number.attr,
779 	&dev_attr_secondary_bus_number.attr,
780 	NULL,
781 };
782 
783 static struct attribute *pcie_dev_attrs[] = {
784 	&dev_attr_current_link_speed.attr,
785 	&dev_attr_current_link_width.attr,
786 	&dev_attr_max_link_width.attr,
787 	&dev_attr_max_link_speed.attr,
788 	NULL,
789 };
790 
791 static struct attribute *pcibus_attrs[] = {
792 	&dev_attr_rescan.attr,
793 	&dev_attr_cpuaffinity.attr,
794 	&dev_attr_cpulistaffinity.attr,
795 	NULL,
796 };
797 
798 static const struct attribute_group pcibus_group = {
799 	.attrs = pcibus_attrs,
800 };
801 
802 const struct attribute_group *pcibus_groups[] = {
803 	&pcibus_group,
804 	NULL,
805 };
806 
807 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
808 			     char *buf)
809 {
810 	struct pci_dev *pdev = to_pci_dev(dev);
811 	struct pci_dev *vga_dev = vga_default_device();
812 
813 	if (vga_dev)
814 		return sprintf(buf, "%u\n", (pdev == vga_dev));
815 
816 	return sprintf(buf, "%u\n",
817 		!!(pdev->resource[PCI_ROM_RESOURCE].flags &
818 		   IORESOURCE_ROM_SHADOW));
819 }
820 static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
821 
822 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
823 			       struct bin_attribute *bin_attr, char *buf,
824 			       loff_t off, size_t count)
825 {
826 	struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
827 	unsigned int size = 64;
828 	loff_t init_off = off;
829 	u8 *data = (u8 *) buf;
830 
831 	/* Several chips lock up trying to read undefined config space */
832 	if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
833 		size = dev->cfg_size;
834 	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
835 		size = 128;
836 
837 	if (off > size)
838 		return 0;
839 	if (off + count > size) {
840 		size -= off;
841 		count = size;
842 	} else {
843 		size = count;
844 	}
845 
846 	pci_config_pm_runtime_get(dev);
847 
848 	if ((off & 1) && size) {
849 		u8 val;
850 		pci_user_read_config_byte(dev, off, &val);
851 		data[off - init_off] = val;
852 		off++;
853 		size--;
854 	}
855 
856 	if ((off & 3) && size > 2) {
857 		u16 val;
858 		pci_user_read_config_word(dev, off, &val);
859 		data[off - init_off] = val & 0xff;
860 		data[off - init_off + 1] = (val >> 8) & 0xff;
861 		off += 2;
862 		size -= 2;
863 	}
864 
865 	while (size > 3) {
866 		u32 val;
867 		pci_user_read_config_dword(dev, off, &val);
868 		data[off - init_off] = val & 0xff;
869 		data[off - init_off + 1] = (val >> 8) & 0xff;
870 		data[off - init_off + 2] = (val >> 16) & 0xff;
871 		data[off - init_off + 3] = (val >> 24) & 0xff;
872 		off += 4;
873 		size -= 4;
874 	}
875 
876 	if (size >= 2) {
877 		u16 val;
878 		pci_user_read_config_word(dev, off, &val);
879 		data[off - init_off] = val & 0xff;
880 		data[off - init_off + 1] = (val >> 8) & 0xff;
881 		off += 2;
882 		size -= 2;
883 	}
884 
885 	if (size > 0) {
886 		u8 val;
887 		pci_user_read_config_byte(dev, off, &val);
888 		data[off - init_off] = val;
889 		off++;
890 		--size;
891 	}
892 
893 	pci_config_pm_runtime_put(dev);
894 
895 	return count;
896 }
897 
898 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
899 				struct bin_attribute *bin_attr, char *buf,
900 				loff_t off, size_t count)
901 {
902 	struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
903 	unsigned int size = count;
904 	loff_t init_off = off;
905 	u8 *data = (u8 *) buf;
906 	int ret;
907 
908 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
909 	if (ret)
910 		return ret;
911 
912 	if (off > dev->cfg_size)
913 		return 0;
914 	if (off + count > dev->cfg_size) {
915 		size = dev->cfg_size - off;
916 		count = size;
917 	}
918 
919 	pci_config_pm_runtime_get(dev);
920 
921 	if ((off & 1) && size) {
922 		pci_user_write_config_byte(dev, off, data[off - init_off]);
923 		off++;
924 		size--;
925 	}
926 
927 	if ((off & 3) && size > 2) {
928 		u16 val = data[off - init_off];
929 		val |= (u16) data[off - init_off + 1] << 8;
930 		pci_user_write_config_word(dev, off, val);
931 		off += 2;
932 		size -= 2;
933 	}
934 
935 	while (size > 3) {
936 		u32 val = data[off - init_off];
937 		val |= (u32) data[off - init_off + 1] << 8;
938 		val |= (u32) data[off - init_off + 2] << 16;
939 		val |= (u32) data[off - init_off + 3] << 24;
940 		pci_user_write_config_dword(dev, off, val);
941 		off += 4;
942 		size -= 4;
943 	}
944 
945 	if (size >= 2) {
946 		u16 val = data[off - init_off];
947 		val |= (u16) data[off - init_off + 1] << 8;
948 		pci_user_write_config_word(dev, off, val);
949 		off += 2;
950 		size -= 2;
951 	}
952 
953 	if (size) {
954 		pci_user_write_config_byte(dev, off, data[off - init_off]);
955 		off++;
956 		--size;
957 	}
958 
959 	pci_config_pm_runtime_put(dev);
960 
961 	return count;
962 }
963 
964 #ifdef HAVE_PCI_LEGACY
965 /**
966  * pci_read_legacy_io - read byte(s) from legacy I/O port space
967  * @filp: open sysfs file
968  * @kobj: kobject corresponding to file to read from
969  * @bin_attr: struct bin_attribute for this file
970  * @buf: buffer to store results
971  * @off: offset into legacy I/O port space
972  * @count: number of bytes to read
973  *
974  * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
975  * callback routine (pci_legacy_read).
976  */
977 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
978 				  struct bin_attribute *bin_attr, char *buf,
979 				  loff_t off, size_t count)
980 {
981 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
982 
983 	/* Only support 1, 2 or 4 byte accesses */
984 	if (count != 1 && count != 2 && count != 4)
985 		return -EINVAL;
986 
987 	return pci_legacy_read(bus, off, (u32 *)buf, count);
988 }
989 
990 /**
991  * pci_write_legacy_io - write byte(s) to legacy I/O port space
992  * @filp: open sysfs file
993  * @kobj: kobject corresponding to file to read from
994  * @bin_attr: struct bin_attribute for this file
995  * @buf: buffer containing value to be written
996  * @off: offset into legacy I/O port space
997  * @count: number of bytes to write
998  *
999  * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
1000  * callback routine (pci_legacy_write).
1001  */
1002 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
1003 				   struct bin_attribute *bin_attr, char *buf,
1004 				   loff_t off, size_t count)
1005 {
1006 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1007 
1008 	/* Only support 1, 2 or 4 byte accesses */
1009 	if (count != 1 && count != 2 && count != 4)
1010 		return -EINVAL;
1011 
1012 	return pci_legacy_write(bus, off, *(u32 *)buf, count);
1013 }
1014 
1015 /**
1016  * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
1017  * @filp: open sysfs file
1018  * @kobj: kobject corresponding to device to be mapped
1019  * @attr: struct bin_attribute for this file
1020  * @vma: struct vm_area_struct passed to mmap
1021  *
1022  * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1023  * legacy memory space (first meg of bus space) into application virtual
1024  * memory space.
1025  */
1026 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1027 			       struct bin_attribute *attr,
1028 			       struct vm_area_struct *vma)
1029 {
1030 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1031 
1032 	return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
1033 }
1034 
1035 /**
1036  * pci_mmap_legacy_io - map legacy PCI IO into user memory space
1037  * @filp: open sysfs file
1038  * @kobj: kobject corresponding to device to be mapped
1039  * @attr: struct bin_attribute for this file
1040  * @vma: struct vm_area_struct passed to mmap
1041  *
1042  * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1043  * legacy IO space (first meg of bus space) into application virtual
1044  * memory space. Returns -ENOSYS if the operation isn't supported
1045  */
1046 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1047 			      struct bin_attribute *attr,
1048 			      struct vm_area_struct *vma)
1049 {
1050 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1051 
1052 	return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
1053 }
1054 
1055 /**
1056  * pci_adjust_legacy_attr - adjustment of legacy file attributes
1057  * @b: bus to create files under
1058  * @mmap_type: I/O port or memory
1059  *
1060  * Stub implementation. Can be overridden by arch if necessary.
1061  */
1062 void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1063 				   enum pci_mmap_state mmap_type)
1064 {
1065 }
1066 
1067 /**
1068  * pci_create_legacy_files - create legacy I/O port and memory files
1069  * @b: bus to create files under
1070  *
1071  * Some platforms allow access to legacy I/O port and ISA memory space on
1072  * a per-bus basis.  This routine creates the files and ties them into
1073  * their associated read, write and mmap files from pci-sysfs.c
1074  *
1075  * On error unwind, but don't propagate the error to the caller
1076  * as it is ok to set up the PCI bus without these files.
1077  */
1078 void pci_create_legacy_files(struct pci_bus *b)
1079 {
1080 	int error;
1081 
1082 	b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
1083 			       GFP_ATOMIC);
1084 	if (!b->legacy_io)
1085 		goto kzalloc_err;
1086 
1087 	sysfs_bin_attr_init(b->legacy_io);
1088 	b->legacy_io->attr.name = "legacy_io";
1089 	b->legacy_io->size = 0xffff;
1090 	b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1091 	b->legacy_io->read = pci_read_legacy_io;
1092 	b->legacy_io->write = pci_write_legacy_io;
1093 	b->legacy_io->mmap = pci_mmap_legacy_io;
1094 	pci_adjust_legacy_attr(b, pci_mmap_io);
1095 	error = device_create_bin_file(&b->dev, b->legacy_io);
1096 	if (error)
1097 		goto legacy_io_err;
1098 
1099 	/* Allocated above after the legacy_io struct */
1100 	b->legacy_mem = b->legacy_io + 1;
1101 	sysfs_bin_attr_init(b->legacy_mem);
1102 	b->legacy_mem->attr.name = "legacy_mem";
1103 	b->legacy_mem->size = 1024*1024;
1104 	b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1105 	b->legacy_mem->mmap = pci_mmap_legacy_mem;
1106 	pci_adjust_legacy_attr(b, pci_mmap_mem);
1107 	error = device_create_bin_file(&b->dev, b->legacy_mem);
1108 	if (error)
1109 		goto legacy_mem_err;
1110 
1111 	return;
1112 
1113 legacy_mem_err:
1114 	device_remove_bin_file(&b->dev, b->legacy_io);
1115 legacy_io_err:
1116 	kfree(b->legacy_io);
1117 	b->legacy_io = NULL;
1118 kzalloc_err:
1119 	dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
1120 }
1121 
1122 void pci_remove_legacy_files(struct pci_bus *b)
1123 {
1124 	if (b->legacy_io) {
1125 		device_remove_bin_file(&b->dev, b->legacy_io);
1126 		device_remove_bin_file(&b->dev, b->legacy_mem);
1127 		kfree(b->legacy_io); /* both are allocated here */
1128 	}
1129 }
1130 #endif /* HAVE_PCI_LEGACY */
1131 
1132 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1133 
1134 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1135 		  enum pci_mmap_api mmap_api)
1136 {
1137 	unsigned long nr, start, size;
1138 	resource_size_t pci_start = 0, pci_end;
1139 
1140 	if (pci_resource_len(pdev, resno) == 0)
1141 		return 0;
1142 	nr = vma_pages(vma);
1143 	start = vma->vm_pgoff;
1144 	size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1145 	if (mmap_api == PCI_MMAP_PROCFS) {
1146 		pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1147 				     &pci_start, &pci_end);
1148 		pci_start >>= PAGE_SHIFT;
1149 	}
1150 	if (start >= pci_start && start < pci_start + size &&
1151 			start + nr <= pci_start + size)
1152 		return 1;
1153 	return 0;
1154 }
1155 
1156 /**
1157  * pci_mmap_resource - map a PCI resource into user memory space
1158  * @kobj: kobject for mapping
1159  * @attr: struct bin_attribute for the file being mapped
1160  * @vma: struct vm_area_struct passed into the mmap
1161  * @write_combine: 1 for write_combine mapping
1162  *
1163  * Use the regular PCI mapping routines to map a PCI resource into userspace.
1164  */
1165 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1166 			     struct vm_area_struct *vma, int write_combine)
1167 {
1168 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1169 	int bar = (unsigned long)attr->private;
1170 	enum pci_mmap_state mmap_type;
1171 	struct resource *res = &pdev->resource[bar];
1172 	int ret;
1173 
1174 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1175 	if (ret)
1176 		return ret;
1177 
1178 	if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1179 		return -EINVAL;
1180 
1181 	if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1182 		return -EINVAL;
1183 
1184 	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1185 
1186 	return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1187 }
1188 
1189 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1190 				struct bin_attribute *attr,
1191 				struct vm_area_struct *vma)
1192 {
1193 	return pci_mmap_resource(kobj, attr, vma, 0);
1194 }
1195 
1196 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1197 				struct bin_attribute *attr,
1198 				struct vm_area_struct *vma)
1199 {
1200 	return pci_mmap_resource(kobj, attr, vma, 1);
1201 }
1202 
1203 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1204 			       struct bin_attribute *attr, char *buf,
1205 			       loff_t off, size_t count, bool write)
1206 {
1207 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1208 	int bar = (unsigned long)attr->private;
1209 	unsigned long port = off;
1210 
1211 	port += pci_resource_start(pdev, bar);
1212 
1213 	if (port > pci_resource_end(pdev, bar))
1214 		return 0;
1215 
1216 	if (port + count - 1 > pci_resource_end(pdev, bar))
1217 		return -EINVAL;
1218 
1219 	switch (count) {
1220 	case 1:
1221 		if (write)
1222 			outb(*(u8 *)buf, port);
1223 		else
1224 			*(u8 *)buf = inb(port);
1225 		return 1;
1226 	case 2:
1227 		if (write)
1228 			outw(*(u16 *)buf, port);
1229 		else
1230 			*(u16 *)buf = inw(port);
1231 		return 2;
1232 	case 4:
1233 		if (write)
1234 			outl(*(u32 *)buf, port);
1235 		else
1236 			*(u32 *)buf = inl(port);
1237 		return 4;
1238 	}
1239 	return -EINVAL;
1240 }
1241 
1242 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1243 				    struct bin_attribute *attr, char *buf,
1244 				    loff_t off, size_t count)
1245 {
1246 	return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1247 }
1248 
1249 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1250 				     struct bin_attribute *attr, char *buf,
1251 				     loff_t off, size_t count)
1252 {
1253 	int ret;
1254 
1255 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1256 	if (ret)
1257 		return ret;
1258 
1259 	return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1260 }
1261 
1262 /**
1263  * pci_remove_resource_files - cleanup resource files
1264  * @pdev: dev to cleanup
1265  *
1266  * If we created resource files for @pdev, remove them from sysfs and
1267  * free their resources.
1268  */
1269 static void pci_remove_resource_files(struct pci_dev *pdev)
1270 {
1271 	int i;
1272 
1273 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1274 		struct bin_attribute *res_attr;
1275 
1276 		res_attr = pdev->res_attr[i];
1277 		if (res_attr) {
1278 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1279 			kfree(res_attr);
1280 		}
1281 
1282 		res_attr = pdev->res_attr_wc[i];
1283 		if (res_attr) {
1284 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1285 			kfree(res_attr);
1286 		}
1287 	}
1288 }
1289 
1290 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1291 {
1292 	/* allocate attribute structure, piggyback attribute name */
1293 	int name_len = write_combine ? 13 : 10;
1294 	struct bin_attribute *res_attr;
1295 	char *res_attr_name;
1296 	int retval;
1297 
1298 	res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1299 	if (!res_attr)
1300 		return -ENOMEM;
1301 
1302 	res_attr_name = (char *)(res_attr + 1);
1303 
1304 	sysfs_bin_attr_init(res_attr);
1305 	if (write_combine) {
1306 		pdev->res_attr_wc[num] = res_attr;
1307 		sprintf(res_attr_name, "resource%d_wc", num);
1308 		res_attr->mmap = pci_mmap_resource_wc;
1309 	} else {
1310 		pdev->res_attr[num] = res_attr;
1311 		sprintf(res_attr_name, "resource%d", num);
1312 		if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1313 			res_attr->read = pci_read_resource_io;
1314 			res_attr->write = pci_write_resource_io;
1315 			if (arch_can_pci_mmap_io())
1316 				res_attr->mmap = pci_mmap_resource_uc;
1317 		} else {
1318 			res_attr->mmap = pci_mmap_resource_uc;
1319 		}
1320 	}
1321 	res_attr->attr.name = res_attr_name;
1322 	res_attr->attr.mode = S_IRUSR | S_IWUSR;
1323 	res_attr->size = pci_resource_len(pdev, num);
1324 	res_attr->private = (void *)(unsigned long)num;
1325 	retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1326 	if (retval)
1327 		kfree(res_attr);
1328 
1329 	return retval;
1330 }
1331 
1332 /**
1333  * pci_create_resource_files - create resource files in sysfs for @dev
1334  * @pdev: dev in question
1335  *
1336  * Walk the resources in @pdev creating files for each resource available.
1337  */
1338 static int pci_create_resource_files(struct pci_dev *pdev)
1339 {
1340 	int i;
1341 	int retval;
1342 
1343 	/* Expose the PCI resources from this device as files */
1344 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1345 
1346 		/* skip empty resources */
1347 		if (!pci_resource_len(pdev, i))
1348 			continue;
1349 
1350 		retval = pci_create_attr(pdev, i, 0);
1351 		/* for prefetchable resources, create a WC mappable file */
1352 		if (!retval && arch_can_pci_mmap_wc() &&
1353 		    pdev->resource[i].flags & IORESOURCE_PREFETCH)
1354 			retval = pci_create_attr(pdev, i, 1);
1355 		if (retval) {
1356 			pci_remove_resource_files(pdev);
1357 			return retval;
1358 		}
1359 	}
1360 	return 0;
1361 }
1362 #else /* !HAVE_PCI_MMAP */
1363 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1364 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1365 #endif /* HAVE_PCI_MMAP */
1366 
1367 /**
1368  * pci_write_rom - used to enable access to the PCI ROM display
1369  * @filp: sysfs file
1370  * @kobj: kernel object handle
1371  * @bin_attr: struct bin_attribute for this file
1372  * @buf: user input
1373  * @off: file offset
1374  * @count: number of byte in input
1375  *
1376  * writing anything except 0 enables it
1377  */
1378 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1379 			     struct bin_attribute *bin_attr, char *buf,
1380 			     loff_t off, size_t count)
1381 {
1382 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1383 
1384 	if ((off ==  0) && (*buf == '0') && (count == 2))
1385 		pdev->rom_attr_enabled = 0;
1386 	else
1387 		pdev->rom_attr_enabled = 1;
1388 
1389 	return count;
1390 }
1391 
1392 /**
1393  * pci_read_rom - read a PCI ROM
1394  * @filp: sysfs file
1395  * @kobj: kernel object handle
1396  * @bin_attr: struct bin_attribute for this file
1397  * @buf: where to put the data we read from the ROM
1398  * @off: file offset
1399  * @count: number of bytes to read
1400  *
1401  * Put @count bytes starting at @off into @buf from the ROM in the PCI
1402  * device corresponding to @kobj.
1403  */
1404 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1405 			    struct bin_attribute *bin_attr, char *buf,
1406 			    loff_t off, size_t count)
1407 {
1408 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1409 	void __iomem *rom;
1410 	size_t size;
1411 
1412 	if (!pdev->rom_attr_enabled)
1413 		return -EINVAL;
1414 
1415 	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
1416 	if (!rom || !size)
1417 		return -EIO;
1418 
1419 	if (off >= size)
1420 		count = 0;
1421 	else {
1422 		if (off + count > size)
1423 			count = size - off;
1424 
1425 		memcpy_fromio(buf, rom + off, count);
1426 	}
1427 	pci_unmap_rom(pdev, rom);
1428 
1429 	return count;
1430 }
1431 
1432 static const struct bin_attribute pci_config_attr = {
1433 	.attr =	{
1434 		.name = "config",
1435 		.mode = S_IRUGO | S_IWUSR,
1436 	},
1437 	.size = PCI_CFG_SPACE_SIZE,
1438 	.read = pci_read_config,
1439 	.write = pci_write_config,
1440 };
1441 
1442 static const struct bin_attribute pcie_config_attr = {
1443 	.attr =	{
1444 		.name = "config",
1445 		.mode = S_IRUGO | S_IWUSR,
1446 	},
1447 	.size = PCI_CFG_SPACE_EXP_SIZE,
1448 	.read = pci_read_config,
1449 	.write = pci_write_config,
1450 };
1451 
1452 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1453 			   const char *buf, size_t count)
1454 {
1455 	struct pci_dev *pdev = to_pci_dev(dev);
1456 	unsigned long val;
1457 	ssize_t result = kstrtoul(buf, 0, &val);
1458 
1459 	if (result < 0)
1460 		return result;
1461 
1462 	if (val != 1)
1463 		return -EINVAL;
1464 
1465 	pm_runtime_get_sync(dev);
1466 	result = pci_reset_function(pdev);
1467 	pm_runtime_put(dev);
1468 	if (result < 0)
1469 		return result;
1470 
1471 	return count;
1472 }
1473 
1474 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1475 
1476 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1477 {
1478 	int retval;
1479 
1480 	pcie_vpd_create_sysfs_dev_files(dev);
1481 	pcie_aspm_create_sysfs_dev_files(dev);
1482 
1483 	if (dev->reset_fn) {
1484 		retval = device_create_file(&dev->dev, &reset_attr);
1485 		if (retval)
1486 			goto error;
1487 	}
1488 	return 0;
1489 
1490 error:
1491 	pcie_aspm_remove_sysfs_dev_files(dev);
1492 	pcie_vpd_remove_sysfs_dev_files(dev);
1493 	return retval;
1494 }
1495 
1496 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1497 {
1498 	int retval;
1499 	int rom_size;
1500 	struct bin_attribute *attr;
1501 
1502 	if (!sysfs_initialized)
1503 		return -EACCES;
1504 
1505 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1506 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1507 	else
1508 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1509 	if (retval)
1510 		goto err;
1511 
1512 	retval = pci_create_resource_files(pdev);
1513 	if (retval)
1514 		goto err_config_file;
1515 
1516 	/* If the device has a ROM, try to expose it in sysfs. */
1517 	rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1518 	if (rom_size) {
1519 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1520 		if (!attr) {
1521 			retval = -ENOMEM;
1522 			goto err_resource_files;
1523 		}
1524 		sysfs_bin_attr_init(attr);
1525 		attr->size = rom_size;
1526 		attr->attr.name = "rom";
1527 		attr->attr.mode = S_IRUSR | S_IWUSR;
1528 		attr->read = pci_read_rom;
1529 		attr->write = pci_write_rom;
1530 		retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1531 		if (retval) {
1532 			kfree(attr);
1533 			goto err_resource_files;
1534 		}
1535 		pdev->rom_attr = attr;
1536 	}
1537 
1538 	/* add sysfs entries for various capabilities */
1539 	retval = pci_create_capabilities_sysfs(pdev);
1540 	if (retval)
1541 		goto err_rom_file;
1542 
1543 	pci_create_firmware_label_files(pdev);
1544 
1545 	return 0;
1546 
1547 err_rom_file:
1548 	if (pdev->rom_attr) {
1549 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1550 		kfree(pdev->rom_attr);
1551 		pdev->rom_attr = NULL;
1552 	}
1553 err_resource_files:
1554 	pci_remove_resource_files(pdev);
1555 err_config_file:
1556 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1557 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1558 	else
1559 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1560 err:
1561 	return retval;
1562 }
1563 
1564 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1565 {
1566 	pcie_vpd_remove_sysfs_dev_files(dev);
1567 	pcie_aspm_remove_sysfs_dev_files(dev);
1568 	if (dev->reset_fn) {
1569 		device_remove_file(&dev->dev, &reset_attr);
1570 		dev->reset_fn = 0;
1571 	}
1572 }
1573 
1574 /**
1575  * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1576  * @pdev: device whose entries we should free
1577  *
1578  * Cleanup when @pdev is removed from sysfs.
1579  */
1580 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1581 {
1582 	if (!sysfs_initialized)
1583 		return;
1584 
1585 	pci_remove_capabilities_sysfs(pdev);
1586 
1587 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1588 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1589 	else
1590 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1591 
1592 	pci_remove_resource_files(pdev);
1593 
1594 	if (pdev->rom_attr) {
1595 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1596 		kfree(pdev->rom_attr);
1597 		pdev->rom_attr = NULL;
1598 	}
1599 
1600 	pci_remove_firmware_label_files(pdev);
1601 }
1602 
1603 static int __init pci_sysfs_init(void)
1604 {
1605 	struct pci_dev *pdev = NULL;
1606 	int retval;
1607 
1608 	sysfs_initialized = 1;
1609 	for_each_pci_dev(pdev) {
1610 		retval = pci_create_sysfs_dev_files(pdev);
1611 		if (retval) {
1612 			pci_dev_put(pdev);
1613 			return retval;
1614 		}
1615 	}
1616 
1617 	return 0;
1618 }
1619 late_initcall(pci_sysfs_init);
1620 
1621 static struct attribute *pci_dev_dev_attrs[] = {
1622 	&vga_attr.attr,
1623 	NULL,
1624 };
1625 
1626 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1627 					 struct attribute *a, int n)
1628 {
1629 	struct device *dev = kobj_to_dev(kobj);
1630 	struct pci_dev *pdev = to_pci_dev(dev);
1631 
1632 	if (a == &vga_attr.attr)
1633 		if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1634 			return 0;
1635 
1636 	return a->mode;
1637 }
1638 
1639 static struct attribute *pci_dev_hp_attrs[] = {
1640 	&dev_remove_attr.attr,
1641 	&dev_rescan_attr.attr,
1642 	NULL,
1643 };
1644 
1645 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1646 					    struct attribute *a, int n)
1647 {
1648 	struct device *dev = kobj_to_dev(kobj);
1649 	struct pci_dev *pdev = to_pci_dev(dev);
1650 
1651 	if (pdev->is_virtfn)
1652 		return 0;
1653 
1654 	return a->mode;
1655 }
1656 
1657 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1658 					    struct attribute *a, int n)
1659 {
1660 	struct device *dev = kobj_to_dev(kobj);
1661 	struct pci_dev *pdev = to_pci_dev(dev);
1662 
1663 	if (pci_is_bridge(pdev))
1664 		return a->mode;
1665 
1666 	return 0;
1667 }
1668 
1669 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1670 					  struct attribute *a, int n)
1671 {
1672 	struct device *dev = kobj_to_dev(kobj);
1673 	struct pci_dev *pdev = to_pci_dev(dev);
1674 
1675 	if (pci_is_pcie(pdev))
1676 		return a->mode;
1677 
1678 	return 0;
1679 }
1680 
1681 static const struct attribute_group pci_dev_group = {
1682 	.attrs = pci_dev_attrs,
1683 };
1684 
1685 const struct attribute_group *pci_dev_groups[] = {
1686 	&pci_dev_group,
1687 	NULL,
1688 };
1689 
1690 static const struct attribute_group pci_bridge_group = {
1691 	.attrs = pci_bridge_attrs,
1692 };
1693 
1694 const struct attribute_group *pci_bridge_groups[] = {
1695 	&pci_bridge_group,
1696 	NULL,
1697 };
1698 
1699 static const struct attribute_group pcie_dev_group = {
1700 	.attrs = pcie_dev_attrs,
1701 };
1702 
1703 const struct attribute_group *pcie_dev_groups[] = {
1704 	&pcie_dev_group,
1705 	NULL,
1706 };
1707 
1708 static const struct attribute_group pci_dev_hp_attr_group = {
1709 	.attrs = pci_dev_hp_attrs,
1710 	.is_visible = pci_dev_hp_attrs_are_visible,
1711 };
1712 
1713 #ifdef CONFIG_PCI_IOV
1714 static struct attribute *sriov_dev_attrs[] = {
1715 	&sriov_totalvfs_attr.attr,
1716 	&sriov_numvfs_attr.attr,
1717 	&sriov_offset_attr.attr,
1718 	&sriov_stride_attr.attr,
1719 	&sriov_vf_device_attr.attr,
1720 	&sriov_drivers_autoprobe_attr.attr,
1721 	NULL,
1722 };
1723 
1724 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1725 				       struct attribute *a, int n)
1726 {
1727 	struct device *dev = kobj_to_dev(kobj);
1728 
1729 	if (!dev_is_pf(dev))
1730 		return 0;
1731 
1732 	return a->mode;
1733 }
1734 
1735 static const struct attribute_group sriov_dev_attr_group = {
1736 	.attrs = sriov_dev_attrs,
1737 	.is_visible = sriov_attrs_are_visible,
1738 };
1739 #endif /* CONFIG_PCI_IOV */
1740 
1741 static const struct attribute_group pci_dev_attr_group = {
1742 	.attrs = pci_dev_dev_attrs,
1743 	.is_visible = pci_dev_attrs_are_visible,
1744 };
1745 
1746 static const struct attribute_group pci_bridge_attr_group = {
1747 	.attrs = pci_bridge_attrs,
1748 	.is_visible = pci_bridge_attrs_are_visible,
1749 };
1750 
1751 static const struct attribute_group pcie_dev_attr_group = {
1752 	.attrs = pcie_dev_attrs,
1753 	.is_visible = pcie_dev_attrs_are_visible,
1754 };
1755 
1756 static const struct attribute_group *pci_dev_attr_groups[] = {
1757 	&pci_dev_attr_group,
1758 	&pci_dev_hp_attr_group,
1759 #ifdef CONFIG_PCI_IOV
1760 	&sriov_dev_attr_group,
1761 #endif
1762 	&pci_bridge_attr_group,
1763 	&pcie_dev_attr_group,
1764 #ifdef CONFIG_PCIEAER
1765 	&aer_stats_attr_group,
1766 #endif
1767 	NULL,
1768 };
1769 
1770 const struct device_type pci_dev_type = {
1771 	.groups = pci_dev_attr_groups,
1772 };
1773