1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/pci/pci-sysfs.c 4 * 5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 6 * (C) Copyright 2002-2004 IBM Corp. 7 * (C) Copyright 2003 Matthew Wilcox 8 * (C) Copyright 2003 Hewlett-Packard 9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 11 * 12 * File attributes for PCI devices 13 * 14 * Modeled after usb's driverfs.c 15 * 16 */ 17 18 19 #include <linux/kernel.h> 20 #include <linux/sched.h> 21 #include <linux/pci.h> 22 #include <linux/stat.h> 23 #include <linux/export.h> 24 #include <linux/topology.h> 25 #include <linux/mm.h> 26 #include <linux/fs.h> 27 #include <linux/capability.h> 28 #include <linux/security.h> 29 #include <linux/pci-aspm.h> 30 #include <linux/slab.h> 31 #include <linux/vgaarb.h> 32 #include <linux/pm_runtime.h> 33 #include <linux/of.h> 34 #include "pci.h" 35 36 static int sysfs_initialized; /* = 0 */ 37 38 /* show configuration fields */ 39 #define pci_config_attr(field, format_string) \ 40 static ssize_t \ 41 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 42 { \ 43 struct pci_dev *pdev; \ 44 \ 45 pdev = to_pci_dev(dev); \ 46 return sprintf(buf, format_string, pdev->field); \ 47 } \ 48 static DEVICE_ATTR_RO(field) 49 50 pci_config_attr(vendor, "0x%04x\n"); 51 pci_config_attr(device, "0x%04x\n"); 52 pci_config_attr(subsystem_vendor, "0x%04x\n"); 53 pci_config_attr(subsystem_device, "0x%04x\n"); 54 pci_config_attr(revision, "0x%02x\n"); 55 pci_config_attr(class, "0x%06x\n"); 56 pci_config_attr(irq, "%u\n"); 57 58 static ssize_t broken_parity_status_show(struct device *dev, 59 struct device_attribute *attr, 60 char *buf) 61 { 62 struct pci_dev *pdev = to_pci_dev(dev); 63 return sprintf(buf, "%u\n", pdev->broken_parity_status); 64 } 65 66 static ssize_t broken_parity_status_store(struct device *dev, 67 struct device_attribute *attr, 68 const char *buf, size_t count) 69 { 70 struct pci_dev *pdev = to_pci_dev(dev); 71 unsigned long val; 72 73 if (kstrtoul(buf, 0, &val) < 0) 74 return -EINVAL; 75 76 pdev->broken_parity_status = !!val; 77 78 return count; 79 } 80 static DEVICE_ATTR_RW(broken_parity_status); 81 82 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 83 struct device_attribute *attr, char *buf) 84 { 85 const struct cpumask *mask; 86 87 #ifdef CONFIG_NUMA 88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 89 cpumask_of_node(dev_to_node(dev)); 90 #else 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 92 #endif 93 return cpumap_print_to_pagebuf(list, buf, mask); 94 } 95 96 static ssize_t local_cpus_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 return pci_dev_show_local_cpu(dev, false, attr, buf); 100 } 101 static DEVICE_ATTR_RO(local_cpus); 102 103 static ssize_t local_cpulist_show(struct device *dev, 104 struct device_attribute *attr, char *buf) 105 { 106 return pci_dev_show_local_cpu(dev, true, attr, buf); 107 } 108 static DEVICE_ATTR_RO(local_cpulist); 109 110 /* 111 * PCI Bus Class Devices 112 */ 113 static ssize_t cpuaffinity_show(struct device *dev, 114 struct device_attribute *attr, char *buf) 115 { 116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 117 118 return cpumap_print_to_pagebuf(false, buf, cpumask); 119 } 120 static DEVICE_ATTR_RO(cpuaffinity); 121 122 static ssize_t cpulistaffinity_show(struct device *dev, 123 struct device_attribute *attr, char *buf) 124 { 125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 127 return cpumap_print_to_pagebuf(true, buf, cpumask); 128 } 129 static DEVICE_ATTR_RO(cpulistaffinity); 130 131 /* show resources */ 132 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 133 char *buf) 134 { 135 struct pci_dev *pci_dev = to_pci_dev(dev); 136 char *str = buf; 137 int i; 138 int max; 139 resource_size_t start, end; 140 141 if (pci_dev->subordinate) 142 max = DEVICE_COUNT_RESOURCE; 143 else 144 max = PCI_BRIDGE_RESOURCES; 145 146 for (i = 0; i < max; i++) { 147 struct resource *res = &pci_dev->resource[i]; 148 pci_resource_to_user(pci_dev, i, res, &start, &end); 149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 150 (unsigned long long)start, 151 (unsigned long long)end, 152 (unsigned long long)res->flags); 153 } 154 return (str - buf); 155 } 156 static DEVICE_ATTR_RO(resource); 157 158 static ssize_t max_link_speed_show(struct device *dev, 159 struct device_attribute *attr, char *buf) 160 { 161 struct pci_dev *pci_dev = to_pci_dev(dev); 162 u32 linkcap; 163 int err; 164 const char *speed; 165 166 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 167 if (err) 168 return -EINVAL; 169 170 switch (linkcap & PCI_EXP_LNKCAP_SLS) { 171 case PCI_EXP_LNKCAP_SLS_8_0GB: 172 speed = "8 GT/s"; 173 break; 174 case PCI_EXP_LNKCAP_SLS_5_0GB: 175 speed = "5 GT/s"; 176 break; 177 case PCI_EXP_LNKCAP_SLS_2_5GB: 178 speed = "2.5 GT/s"; 179 break; 180 default: 181 speed = "Unknown speed"; 182 } 183 184 return sprintf(buf, "%s\n", speed); 185 } 186 static DEVICE_ATTR_RO(max_link_speed); 187 188 static ssize_t max_link_width_show(struct device *dev, 189 struct device_attribute *attr, char *buf) 190 { 191 struct pci_dev *pci_dev = to_pci_dev(dev); 192 u32 linkcap; 193 int err; 194 195 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 196 if (err) 197 return -EINVAL; 198 199 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4); 200 } 201 static DEVICE_ATTR_RO(max_link_width); 202 203 static ssize_t current_link_speed_show(struct device *dev, 204 struct device_attribute *attr, char *buf) 205 { 206 struct pci_dev *pci_dev = to_pci_dev(dev); 207 u16 linkstat; 208 int err; 209 const char *speed; 210 211 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 212 if (err) 213 return -EINVAL; 214 215 switch (linkstat & PCI_EXP_LNKSTA_CLS) { 216 case PCI_EXP_LNKSTA_CLS_8_0GB: 217 speed = "8 GT/s"; 218 break; 219 case PCI_EXP_LNKSTA_CLS_5_0GB: 220 speed = "5 GT/s"; 221 break; 222 case PCI_EXP_LNKSTA_CLS_2_5GB: 223 speed = "2.5 GT/s"; 224 break; 225 default: 226 speed = "Unknown speed"; 227 } 228 229 return sprintf(buf, "%s\n", speed); 230 } 231 static DEVICE_ATTR_RO(current_link_speed); 232 233 static ssize_t current_link_width_show(struct device *dev, 234 struct device_attribute *attr, char *buf) 235 { 236 struct pci_dev *pci_dev = to_pci_dev(dev); 237 u16 linkstat; 238 int err; 239 240 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 241 if (err) 242 return -EINVAL; 243 244 return sprintf(buf, "%u\n", 245 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 246 } 247 static DEVICE_ATTR_RO(current_link_width); 248 249 static ssize_t secondary_bus_number_show(struct device *dev, 250 struct device_attribute *attr, 251 char *buf) 252 { 253 struct pci_dev *pci_dev = to_pci_dev(dev); 254 u8 sec_bus; 255 int err; 256 257 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 258 if (err) 259 return -EINVAL; 260 261 return sprintf(buf, "%u\n", sec_bus); 262 } 263 static DEVICE_ATTR_RO(secondary_bus_number); 264 265 static ssize_t subordinate_bus_number_show(struct device *dev, 266 struct device_attribute *attr, 267 char *buf) 268 { 269 struct pci_dev *pci_dev = to_pci_dev(dev); 270 u8 sub_bus; 271 int err; 272 273 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 274 if (err) 275 return -EINVAL; 276 277 return sprintf(buf, "%u\n", sub_bus); 278 } 279 static DEVICE_ATTR_RO(subordinate_bus_number); 280 281 static ssize_t ari_enabled_show(struct device *dev, 282 struct device_attribute *attr, 283 char *buf) 284 { 285 struct pci_dev *pci_dev = to_pci_dev(dev); 286 287 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 288 } 289 static DEVICE_ATTR_RO(ari_enabled); 290 291 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 292 char *buf) 293 { 294 struct pci_dev *pci_dev = to_pci_dev(dev); 295 296 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 297 pci_dev->vendor, pci_dev->device, 298 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 299 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 300 (u8)(pci_dev->class)); 301 } 302 static DEVICE_ATTR_RO(modalias); 303 304 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 305 const char *buf, size_t count) 306 { 307 struct pci_dev *pdev = to_pci_dev(dev); 308 unsigned long val; 309 ssize_t result = kstrtoul(buf, 0, &val); 310 311 if (result < 0) 312 return result; 313 314 /* this can crash the machine when done on the "wrong" device */ 315 if (!capable(CAP_SYS_ADMIN)) 316 return -EPERM; 317 318 if (!val) { 319 if (pci_is_enabled(pdev)) 320 pci_disable_device(pdev); 321 else 322 result = -EIO; 323 } else 324 result = pci_enable_device(pdev); 325 326 return result < 0 ? result : count; 327 } 328 329 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 330 char *buf) 331 { 332 struct pci_dev *pdev; 333 334 pdev = to_pci_dev(dev); 335 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 336 } 337 static DEVICE_ATTR_RW(enable); 338 339 #ifdef CONFIG_NUMA 340 static ssize_t numa_node_store(struct device *dev, 341 struct device_attribute *attr, const char *buf, 342 size_t count) 343 { 344 struct pci_dev *pdev = to_pci_dev(dev); 345 int node, ret; 346 347 if (!capable(CAP_SYS_ADMIN)) 348 return -EPERM; 349 350 ret = kstrtoint(buf, 0, &node); 351 if (ret) 352 return ret; 353 354 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 355 return -EINVAL; 356 357 if (node != NUMA_NO_NODE && !node_online(node)) 358 return -EINVAL; 359 360 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 361 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 362 node); 363 364 dev->numa_node = node; 365 return count; 366 } 367 368 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 369 char *buf) 370 { 371 return sprintf(buf, "%d\n", dev->numa_node); 372 } 373 static DEVICE_ATTR_RW(numa_node); 374 #endif 375 376 static ssize_t dma_mask_bits_show(struct device *dev, 377 struct device_attribute *attr, char *buf) 378 { 379 struct pci_dev *pdev = to_pci_dev(dev); 380 381 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 382 } 383 static DEVICE_ATTR_RO(dma_mask_bits); 384 385 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 386 struct device_attribute *attr, 387 char *buf) 388 { 389 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 390 } 391 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 392 393 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 394 char *buf) 395 { 396 struct pci_dev *pdev = to_pci_dev(dev); 397 struct pci_bus *subordinate = pdev->subordinate; 398 399 return sprintf(buf, "%u\n", subordinate ? 400 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 401 : !pdev->no_msi); 402 } 403 404 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 405 const char *buf, size_t count) 406 { 407 struct pci_dev *pdev = to_pci_dev(dev); 408 struct pci_bus *subordinate = pdev->subordinate; 409 unsigned long val; 410 411 if (kstrtoul(buf, 0, &val) < 0) 412 return -EINVAL; 413 414 if (!capable(CAP_SYS_ADMIN)) 415 return -EPERM; 416 417 /* 418 * "no_msi" and "bus_flags" only affect what happens when a driver 419 * requests MSI or MSI-X. They don't affect any drivers that have 420 * already requested MSI or MSI-X. 421 */ 422 if (!subordinate) { 423 pdev->no_msi = !val; 424 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 425 val ? "allowed" : "disallowed"); 426 return count; 427 } 428 429 if (val) 430 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 431 else 432 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 433 434 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 435 val ? "allowed" : "disallowed"); 436 return count; 437 } 438 static DEVICE_ATTR_RW(msi_bus); 439 440 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 441 size_t count) 442 { 443 unsigned long val; 444 struct pci_bus *b = NULL; 445 446 if (kstrtoul(buf, 0, &val) < 0) 447 return -EINVAL; 448 449 if (val) { 450 pci_lock_rescan_remove(); 451 while ((b = pci_find_next_bus(b)) != NULL) 452 pci_rescan_bus(b); 453 pci_unlock_rescan_remove(); 454 } 455 return count; 456 } 457 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 458 459 static struct attribute *pci_bus_attrs[] = { 460 &bus_attr_rescan.attr, 461 NULL, 462 }; 463 464 static const struct attribute_group pci_bus_group = { 465 .attrs = pci_bus_attrs, 466 }; 467 468 const struct attribute_group *pci_bus_groups[] = { 469 &pci_bus_group, 470 NULL, 471 }; 472 473 static ssize_t dev_rescan_store(struct device *dev, 474 struct device_attribute *attr, const char *buf, 475 size_t count) 476 { 477 unsigned long val; 478 struct pci_dev *pdev = to_pci_dev(dev); 479 480 if (kstrtoul(buf, 0, &val) < 0) 481 return -EINVAL; 482 483 if (val) { 484 pci_lock_rescan_remove(); 485 pci_rescan_bus(pdev->bus); 486 pci_unlock_rescan_remove(); 487 } 488 return count; 489 } 490 static struct device_attribute dev_rescan_attr = __ATTR(rescan, 491 (S_IWUSR|S_IWGRP), 492 NULL, dev_rescan_store); 493 494 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 495 const char *buf, size_t count) 496 { 497 unsigned long val; 498 499 if (kstrtoul(buf, 0, &val) < 0) 500 return -EINVAL; 501 502 if (val && device_remove_file_self(dev, attr)) 503 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 504 return count; 505 } 506 static struct device_attribute dev_remove_attr = __ATTR(remove, 507 (S_IWUSR|S_IWGRP), 508 NULL, remove_store); 509 510 static ssize_t dev_bus_rescan_store(struct device *dev, 511 struct device_attribute *attr, 512 const char *buf, size_t count) 513 { 514 unsigned long val; 515 struct pci_bus *bus = to_pci_bus(dev); 516 517 if (kstrtoul(buf, 0, &val) < 0) 518 return -EINVAL; 519 520 if (val) { 521 pci_lock_rescan_remove(); 522 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 523 pci_rescan_bus_bridge_resize(bus->self); 524 else 525 pci_rescan_bus(bus); 526 pci_unlock_rescan_remove(); 527 } 528 return count; 529 } 530 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 531 532 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 533 static ssize_t d3cold_allowed_store(struct device *dev, 534 struct device_attribute *attr, 535 const char *buf, size_t count) 536 { 537 struct pci_dev *pdev = to_pci_dev(dev); 538 unsigned long val; 539 540 if (kstrtoul(buf, 0, &val) < 0) 541 return -EINVAL; 542 543 pdev->d3cold_allowed = !!val; 544 if (pdev->d3cold_allowed) 545 pci_d3cold_enable(pdev); 546 else 547 pci_d3cold_disable(pdev); 548 549 pm_runtime_resume(dev); 550 551 return count; 552 } 553 554 static ssize_t d3cold_allowed_show(struct device *dev, 555 struct device_attribute *attr, char *buf) 556 { 557 struct pci_dev *pdev = to_pci_dev(dev); 558 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 559 } 560 static DEVICE_ATTR_RW(d3cold_allowed); 561 #endif 562 563 #ifdef CONFIG_OF 564 static ssize_t devspec_show(struct device *dev, 565 struct device_attribute *attr, char *buf) 566 { 567 struct pci_dev *pdev = to_pci_dev(dev); 568 struct device_node *np = pci_device_to_OF_node(pdev); 569 570 if (np == NULL) 571 return 0; 572 return sprintf(buf, "%pOF", np); 573 } 574 static DEVICE_ATTR_RO(devspec); 575 #endif 576 577 #ifdef CONFIG_PCI_IOV 578 static ssize_t sriov_totalvfs_show(struct device *dev, 579 struct device_attribute *attr, 580 char *buf) 581 { 582 struct pci_dev *pdev = to_pci_dev(dev); 583 584 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 585 } 586 587 588 static ssize_t sriov_numvfs_show(struct device *dev, 589 struct device_attribute *attr, 590 char *buf) 591 { 592 struct pci_dev *pdev = to_pci_dev(dev); 593 594 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 595 } 596 597 /* 598 * num_vfs > 0; number of VFs to enable 599 * num_vfs = 0; disable all VFs 600 * 601 * Note: SRIOV spec doesn't allow partial VF 602 * disable, so it's all or none. 603 */ 604 static ssize_t sriov_numvfs_store(struct device *dev, 605 struct device_attribute *attr, 606 const char *buf, size_t count) 607 { 608 struct pci_dev *pdev = to_pci_dev(dev); 609 int ret; 610 u16 num_vfs; 611 612 ret = kstrtou16(buf, 0, &num_vfs); 613 if (ret < 0) 614 return ret; 615 616 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 617 return -ERANGE; 618 619 device_lock(&pdev->dev); 620 621 if (num_vfs == pdev->sriov->num_VFs) 622 goto exit; 623 624 /* is PF driver loaded w/callback */ 625 if (!pdev->driver || !pdev->driver->sriov_configure) { 626 pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n"); 627 ret = -ENOENT; 628 goto exit; 629 } 630 631 if (num_vfs == 0) { 632 /* disable VFs */ 633 ret = pdev->driver->sriov_configure(pdev, 0); 634 goto exit; 635 } 636 637 /* enable VFs */ 638 if (pdev->sriov->num_VFs) { 639 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n", 640 pdev->sriov->num_VFs, num_vfs); 641 ret = -EBUSY; 642 goto exit; 643 } 644 645 ret = pdev->driver->sriov_configure(pdev, num_vfs); 646 if (ret < 0) 647 goto exit; 648 649 if (ret != num_vfs) 650 pci_warn(pdev, "%d VFs requested; only %d enabled\n", 651 num_vfs, ret); 652 653 exit: 654 device_unlock(&pdev->dev); 655 656 if (ret < 0) 657 return ret; 658 659 return count; 660 } 661 662 static ssize_t sriov_offset_show(struct device *dev, 663 struct device_attribute *attr, 664 char *buf) 665 { 666 struct pci_dev *pdev = to_pci_dev(dev); 667 668 return sprintf(buf, "%u\n", pdev->sriov->offset); 669 } 670 671 static ssize_t sriov_stride_show(struct device *dev, 672 struct device_attribute *attr, 673 char *buf) 674 { 675 struct pci_dev *pdev = to_pci_dev(dev); 676 677 return sprintf(buf, "%u\n", pdev->sriov->stride); 678 } 679 680 static ssize_t sriov_vf_device_show(struct device *dev, 681 struct device_attribute *attr, 682 char *buf) 683 { 684 struct pci_dev *pdev = to_pci_dev(dev); 685 686 return sprintf(buf, "%x\n", pdev->sriov->vf_device); 687 } 688 689 static ssize_t sriov_drivers_autoprobe_show(struct device *dev, 690 struct device_attribute *attr, 691 char *buf) 692 { 693 struct pci_dev *pdev = to_pci_dev(dev); 694 695 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); 696 } 697 698 static ssize_t sriov_drivers_autoprobe_store(struct device *dev, 699 struct device_attribute *attr, 700 const char *buf, size_t count) 701 { 702 struct pci_dev *pdev = to_pci_dev(dev); 703 bool drivers_autoprobe; 704 705 if (kstrtobool(buf, &drivers_autoprobe) < 0) 706 return -EINVAL; 707 708 pdev->sriov->drivers_autoprobe = drivers_autoprobe; 709 710 return count; 711 } 712 713 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 714 static struct device_attribute sriov_numvfs_attr = 715 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 716 sriov_numvfs_show, sriov_numvfs_store); 717 static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset); 718 static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride); 719 static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device); 720 static struct device_attribute sriov_drivers_autoprobe_attr = 721 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP), 722 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store); 723 #endif /* CONFIG_PCI_IOV */ 724 725 static ssize_t driver_override_store(struct device *dev, 726 struct device_attribute *attr, 727 const char *buf, size_t count) 728 { 729 struct pci_dev *pdev = to_pci_dev(dev); 730 char *driver_override, *old, *cp; 731 732 /* We need to keep extra room for a newline */ 733 if (count >= (PAGE_SIZE - 1)) 734 return -EINVAL; 735 736 driver_override = kstrndup(buf, count, GFP_KERNEL); 737 if (!driver_override) 738 return -ENOMEM; 739 740 cp = strchr(driver_override, '\n'); 741 if (cp) 742 *cp = '\0'; 743 744 device_lock(dev); 745 old = pdev->driver_override; 746 if (strlen(driver_override)) { 747 pdev->driver_override = driver_override; 748 } else { 749 kfree(driver_override); 750 pdev->driver_override = NULL; 751 } 752 device_unlock(dev); 753 754 kfree(old); 755 756 return count; 757 } 758 759 static ssize_t driver_override_show(struct device *dev, 760 struct device_attribute *attr, char *buf) 761 { 762 struct pci_dev *pdev = to_pci_dev(dev); 763 ssize_t len; 764 765 device_lock(dev); 766 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 767 device_unlock(dev); 768 return len; 769 } 770 static DEVICE_ATTR_RW(driver_override); 771 772 static struct attribute *pci_dev_attrs[] = { 773 &dev_attr_resource.attr, 774 &dev_attr_vendor.attr, 775 &dev_attr_device.attr, 776 &dev_attr_subsystem_vendor.attr, 777 &dev_attr_subsystem_device.attr, 778 &dev_attr_revision.attr, 779 &dev_attr_class.attr, 780 &dev_attr_irq.attr, 781 &dev_attr_local_cpus.attr, 782 &dev_attr_local_cpulist.attr, 783 &dev_attr_modalias.attr, 784 #ifdef CONFIG_NUMA 785 &dev_attr_numa_node.attr, 786 #endif 787 &dev_attr_dma_mask_bits.attr, 788 &dev_attr_consistent_dma_mask_bits.attr, 789 &dev_attr_enable.attr, 790 &dev_attr_broken_parity_status.attr, 791 &dev_attr_msi_bus.attr, 792 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 793 &dev_attr_d3cold_allowed.attr, 794 #endif 795 #ifdef CONFIG_OF 796 &dev_attr_devspec.attr, 797 #endif 798 &dev_attr_driver_override.attr, 799 &dev_attr_ari_enabled.attr, 800 NULL, 801 }; 802 803 static struct attribute *pci_bridge_attrs[] = { 804 &dev_attr_subordinate_bus_number.attr, 805 &dev_attr_secondary_bus_number.attr, 806 NULL, 807 }; 808 809 static struct attribute *pcie_dev_attrs[] = { 810 &dev_attr_current_link_speed.attr, 811 &dev_attr_current_link_width.attr, 812 &dev_attr_max_link_width.attr, 813 &dev_attr_max_link_speed.attr, 814 NULL, 815 }; 816 817 static struct attribute *pcibus_attrs[] = { 818 &dev_attr_rescan.attr, 819 &dev_attr_cpuaffinity.attr, 820 &dev_attr_cpulistaffinity.attr, 821 NULL, 822 }; 823 824 static const struct attribute_group pcibus_group = { 825 .attrs = pcibus_attrs, 826 }; 827 828 const struct attribute_group *pcibus_groups[] = { 829 &pcibus_group, 830 NULL, 831 }; 832 833 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 834 char *buf) 835 { 836 struct pci_dev *pdev = to_pci_dev(dev); 837 struct pci_dev *vga_dev = vga_default_device(); 838 839 if (vga_dev) 840 return sprintf(buf, "%u\n", (pdev == vga_dev)); 841 842 return sprintf(buf, "%u\n", 843 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 844 IORESOURCE_ROM_SHADOW)); 845 } 846 static struct device_attribute vga_attr = __ATTR_RO(boot_vga); 847 848 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 849 struct bin_attribute *bin_attr, char *buf, 850 loff_t off, size_t count) 851 { 852 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 853 unsigned int size = 64; 854 loff_t init_off = off; 855 u8 *data = (u8 *) buf; 856 857 /* Several chips lock up trying to read undefined config space */ 858 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 859 size = dev->cfg_size; 860 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 861 size = 128; 862 863 if (off > size) 864 return 0; 865 if (off + count > size) { 866 size -= off; 867 count = size; 868 } else { 869 size = count; 870 } 871 872 pci_config_pm_runtime_get(dev); 873 874 if ((off & 1) && size) { 875 u8 val; 876 pci_user_read_config_byte(dev, off, &val); 877 data[off - init_off] = val; 878 off++; 879 size--; 880 } 881 882 if ((off & 3) && size > 2) { 883 u16 val; 884 pci_user_read_config_word(dev, off, &val); 885 data[off - init_off] = val & 0xff; 886 data[off - init_off + 1] = (val >> 8) & 0xff; 887 off += 2; 888 size -= 2; 889 } 890 891 while (size > 3) { 892 u32 val; 893 pci_user_read_config_dword(dev, off, &val); 894 data[off - init_off] = val & 0xff; 895 data[off - init_off + 1] = (val >> 8) & 0xff; 896 data[off - init_off + 2] = (val >> 16) & 0xff; 897 data[off - init_off + 3] = (val >> 24) & 0xff; 898 off += 4; 899 size -= 4; 900 } 901 902 if (size >= 2) { 903 u16 val; 904 pci_user_read_config_word(dev, off, &val); 905 data[off - init_off] = val & 0xff; 906 data[off - init_off + 1] = (val >> 8) & 0xff; 907 off += 2; 908 size -= 2; 909 } 910 911 if (size > 0) { 912 u8 val; 913 pci_user_read_config_byte(dev, off, &val); 914 data[off - init_off] = val; 915 off++; 916 --size; 917 } 918 919 pci_config_pm_runtime_put(dev); 920 921 return count; 922 } 923 924 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 925 struct bin_attribute *bin_attr, char *buf, 926 loff_t off, size_t count) 927 { 928 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 929 unsigned int size = count; 930 loff_t init_off = off; 931 u8 *data = (u8 *) buf; 932 933 if (off > dev->cfg_size) 934 return 0; 935 if (off + count > dev->cfg_size) { 936 size = dev->cfg_size - off; 937 count = size; 938 } 939 940 pci_config_pm_runtime_get(dev); 941 942 if ((off & 1) && size) { 943 pci_user_write_config_byte(dev, off, data[off - init_off]); 944 off++; 945 size--; 946 } 947 948 if ((off & 3) && size > 2) { 949 u16 val = data[off - init_off]; 950 val |= (u16) data[off - init_off + 1] << 8; 951 pci_user_write_config_word(dev, off, val); 952 off += 2; 953 size -= 2; 954 } 955 956 while (size > 3) { 957 u32 val = data[off - init_off]; 958 val |= (u32) data[off - init_off + 1] << 8; 959 val |= (u32) data[off - init_off + 2] << 16; 960 val |= (u32) data[off - init_off + 3] << 24; 961 pci_user_write_config_dword(dev, off, val); 962 off += 4; 963 size -= 4; 964 } 965 966 if (size >= 2) { 967 u16 val = data[off - init_off]; 968 val |= (u16) data[off - init_off + 1] << 8; 969 pci_user_write_config_word(dev, off, val); 970 off += 2; 971 size -= 2; 972 } 973 974 if (size) { 975 pci_user_write_config_byte(dev, off, data[off - init_off]); 976 off++; 977 --size; 978 } 979 980 pci_config_pm_runtime_put(dev); 981 982 return count; 983 } 984 985 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj, 986 struct bin_attribute *bin_attr, char *buf, 987 loff_t off, size_t count) 988 { 989 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 990 991 if (bin_attr->size > 0) { 992 if (off > bin_attr->size) 993 count = 0; 994 else if (count > bin_attr->size - off) 995 count = bin_attr->size - off; 996 } 997 998 return pci_read_vpd(dev, off, count, buf); 999 } 1000 1001 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj, 1002 struct bin_attribute *bin_attr, char *buf, 1003 loff_t off, size_t count) 1004 { 1005 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 1006 1007 if (bin_attr->size > 0) { 1008 if (off > bin_attr->size) 1009 count = 0; 1010 else if (count > bin_attr->size - off) 1011 count = bin_attr->size - off; 1012 } 1013 1014 return pci_write_vpd(dev, off, count, buf); 1015 } 1016 1017 #ifdef HAVE_PCI_LEGACY 1018 /** 1019 * pci_read_legacy_io - read byte(s) from legacy I/O port space 1020 * @filp: open sysfs file 1021 * @kobj: kobject corresponding to file to read from 1022 * @bin_attr: struct bin_attribute for this file 1023 * @buf: buffer to store results 1024 * @off: offset into legacy I/O port space 1025 * @count: number of bytes to read 1026 * 1027 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1028 * callback routine (pci_legacy_read). 1029 */ 1030 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 1031 struct bin_attribute *bin_attr, char *buf, 1032 loff_t off, size_t count) 1033 { 1034 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1035 1036 /* Only support 1, 2 or 4 byte accesses */ 1037 if (count != 1 && count != 2 && count != 4) 1038 return -EINVAL; 1039 1040 return pci_legacy_read(bus, off, (u32 *)buf, count); 1041 } 1042 1043 /** 1044 * pci_write_legacy_io - write byte(s) to legacy I/O port space 1045 * @filp: open sysfs file 1046 * @kobj: kobject corresponding to file to read from 1047 * @bin_attr: struct bin_attribute for this file 1048 * @buf: buffer containing value to be written 1049 * @off: offset into legacy I/O port space 1050 * @count: number of bytes to write 1051 * 1052 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1053 * callback routine (pci_legacy_write). 1054 */ 1055 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 1056 struct bin_attribute *bin_attr, char *buf, 1057 loff_t off, size_t count) 1058 { 1059 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1060 1061 /* Only support 1, 2 or 4 byte accesses */ 1062 if (count != 1 && count != 2 && count != 4) 1063 return -EINVAL; 1064 1065 return pci_legacy_write(bus, off, *(u32 *)buf, count); 1066 } 1067 1068 /** 1069 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 1070 * @filp: open sysfs file 1071 * @kobj: kobject corresponding to device to be mapped 1072 * @attr: struct bin_attribute for this file 1073 * @vma: struct vm_area_struct passed to mmap 1074 * 1075 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 1076 * legacy memory space (first meg of bus space) into application virtual 1077 * memory space. 1078 */ 1079 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 1080 struct bin_attribute *attr, 1081 struct vm_area_struct *vma) 1082 { 1083 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1084 1085 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 1086 } 1087 1088 /** 1089 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 1090 * @filp: open sysfs file 1091 * @kobj: kobject corresponding to device to be mapped 1092 * @attr: struct bin_attribute for this file 1093 * @vma: struct vm_area_struct passed to mmap 1094 * 1095 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 1096 * legacy IO space (first meg of bus space) into application virtual 1097 * memory space. Returns -ENOSYS if the operation isn't supported 1098 */ 1099 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 1100 struct bin_attribute *attr, 1101 struct vm_area_struct *vma) 1102 { 1103 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1104 1105 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 1106 } 1107 1108 /** 1109 * pci_adjust_legacy_attr - adjustment of legacy file attributes 1110 * @b: bus to create files under 1111 * @mmap_type: I/O port or memory 1112 * 1113 * Stub implementation. Can be overridden by arch if necessary. 1114 */ 1115 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 1116 enum pci_mmap_state mmap_type) 1117 { 1118 } 1119 1120 /** 1121 * pci_create_legacy_files - create legacy I/O port and memory files 1122 * @b: bus to create files under 1123 * 1124 * Some platforms allow access to legacy I/O port and ISA memory space on 1125 * a per-bus basis. This routine creates the files and ties them into 1126 * their associated read, write and mmap files from pci-sysfs.c 1127 * 1128 * On error unwind, but don't propagate the error to the caller 1129 * as it is ok to set up the PCI bus without these files. 1130 */ 1131 void pci_create_legacy_files(struct pci_bus *b) 1132 { 1133 int error; 1134 1135 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 1136 GFP_ATOMIC); 1137 if (!b->legacy_io) 1138 goto kzalloc_err; 1139 1140 sysfs_bin_attr_init(b->legacy_io); 1141 b->legacy_io->attr.name = "legacy_io"; 1142 b->legacy_io->size = 0xffff; 1143 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 1144 b->legacy_io->read = pci_read_legacy_io; 1145 b->legacy_io->write = pci_write_legacy_io; 1146 b->legacy_io->mmap = pci_mmap_legacy_io; 1147 pci_adjust_legacy_attr(b, pci_mmap_io); 1148 error = device_create_bin_file(&b->dev, b->legacy_io); 1149 if (error) 1150 goto legacy_io_err; 1151 1152 /* Allocated above after the legacy_io struct */ 1153 b->legacy_mem = b->legacy_io + 1; 1154 sysfs_bin_attr_init(b->legacy_mem); 1155 b->legacy_mem->attr.name = "legacy_mem"; 1156 b->legacy_mem->size = 1024*1024; 1157 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 1158 b->legacy_mem->mmap = pci_mmap_legacy_mem; 1159 pci_adjust_legacy_attr(b, pci_mmap_mem); 1160 error = device_create_bin_file(&b->dev, b->legacy_mem); 1161 if (error) 1162 goto legacy_mem_err; 1163 1164 return; 1165 1166 legacy_mem_err: 1167 device_remove_bin_file(&b->dev, b->legacy_io); 1168 legacy_io_err: 1169 kfree(b->legacy_io); 1170 b->legacy_io = NULL; 1171 kzalloc_err: 1172 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n"); 1173 return; 1174 } 1175 1176 void pci_remove_legacy_files(struct pci_bus *b) 1177 { 1178 if (b->legacy_io) { 1179 device_remove_bin_file(&b->dev, b->legacy_io); 1180 device_remove_bin_file(&b->dev, b->legacy_mem); 1181 kfree(b->legacy_io); /* both are allocated here */ 1182 } 1183 } 1184 #endif /* HAVE_PCI_LEGACY */ 1185 1186 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1187 1188 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1189 enum pci_mmap_api mmap_api) 1190 { 1191 unsigned long nr, start, size; 1192 resource_size_t pci_start = 0, pci_end; 1193 1194 if (pci_resource_len(pdev, resno) == 0) 1195 return 0; 1196 nr = vma_pages(vma); 1197 start = vma->vm_pgoff; 1198 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1199 if (mmap_api == PCI_MMAP_PROCFS) { 1200 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1201 &pci_start, &pci_end); 1202 pci_start >>= PAGE_SHIFT; 1203 } 1204 if (start >= pci_start && start < pci_start + size && 1205 start + nr <= pci_start + size) 1206 return 1; 1207 return 0; 1208 } 1209 1210 /** 1211 * pci_mmap_resource - map a PCI resource into user memory space 1212 * @kobj: kobject for mapping 1213 * @attr: struct bin_attribute for the file being mapped 1214 * @vma: struct vm_area_struct passed into the mmap 1215 * @write_combine: 1 for write_combine mapping 1216 * 1217 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1218 */ 1219 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1220 struct vm_area_struct *vma, int write_combine) 1221 { 1222 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1223 int bar = (unsigned long)attr->private; 1224 enum pci_mmap_state mmap_type; 1225 struct resource *res = &pdev->resource[bar]; 1226 1227 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1228 return -EINVAL; 1229 1230 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1231 return -EINVAL; 1232 1233 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1234 1235 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1236 } 1237 1238 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1239 struct bin_attribute *attr, 1240 struct vm_area_struct *vma) 1241 { 1242 return pci_mmap_resource(kobj, attr, vma, 0); 1243 } 1244 1245 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1246 struct bin_attribute *attr, 1247 struct vm_area_struct *vma) 1248 { 1249 return pci_mmap_resource(kobj, attr, vma, 1); 1250 } 1251 1252 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1253 struct bin_attribute *attr, char *buf, 1254 loff_t off, size_t count, bool write) 1255 { 1256 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1257 int bar = (unsigned long)attr->private; 1258 unsigned long port = off; 1259 1260 port += pci_resource_start(pdev, bar); 1261 1262 if (port > pci_resource_end(pdev, bar)) 1263 return 0; 1264 1265 if (port + count - 1 > pci_resource_end(pdev, bar)) 1266 return -EINVAL; 1267 1268 switch (count) { 1269 case 1: 1270 if (write) 1271 outb(*(u8 *)buf, port); 1272 else 1273 *(u8 *)buf = inb(port); 1274 return 1; 1275 case 2: 1276 if (write) 1277 outw(*(u16 *)buf, port); 1278 else 1279 *(u16 *)buf = inw(port); 1280 return 2; 1281 case 4: 1282 if (write) 1283 outl(*(u32 *)buf, port); 1284 else 1285 *(u32 *)buf = inl(port); 1286 return 4; 1287 } 1288 return -EINVAL; 1289 } 1290 1291 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1292 struct bin_attribute *attr, char *buf, 1293 loff_t off, size_t count) 1294 { 1295 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1296 } 1297 1298 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1299 struct bin_attribute *attr, char *buf, 1300 loff_t off, size_t count) 1301 { 1302 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1303 } 1304 1305 /** 1306 * pci_remove_resource_files - cleanup resource files 1307 * @pdev: dev to cleanup 1308 * 1309 * If we created resource files for @pdev, remove them from sysfs and 1310 * free their resources. 1311 */ 1312 static void pci_remove_resource_files(struct pci_dev *pdev) 1313 { 1314 int i; 1315 1316 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1317 struct bin_attribute *res_attr; 1318 1319 res_attr = pdev->res_attr[i]; 1320 if (res_attr) { 1321 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1322 kfree(res_attr); 1323 } 1324 1325 res_attr = pdev->res_attr_wc[i]; 1326 if (res_attr) { 1327 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1328 kfree(res_attr); 1329 } 1330 } 1331 } 1332 1333 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1334 { 1335 /* allocate attribute structure, piggyback attribute name */ 1336 int name_len = write_combine ? 13 : 10; 1337 struct bin_attribute *res_attr; 1338 char *res_attr_name; 1339 int retval; 1340 1341 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1342 if (!res_attr) 1343 return -ENOMEM; 1344 1345 res_attr_name = (char *)(res_attr + 1); 1346 1347 sysfs_bin_attr_init(res_attr); 1348 if (write_combine) { 1349 pdev->res_attr_wc[num] = res_attr; 1350 sprintf(res_attr_name, "resource%d_wc", num); 1351 res_attr->mmap = pci_mmap_resource_wc; 1352 } else { 1353 pdev->res_attr[num] = res_attr; 1354 sprintf(res_attr_name, "resource%d", num); 1355 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1356 res_attr->read = pci_read_resource_io; 1357 res_attr->write = pci_write_resource_io; 1358 if (arch_can_pci_mmap_io()) 1359 res_attr->mmap = pci_mmap_resource_uc; 1360 } else { 1361 res_attr->mmap = pci_mmap_resource_uc; 1362 } 1363 } 1364 res_attr->attr.name = res_attr_name; 1365 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1366 res_attr->size = pci_resource_len(pdev, num); 1367 res_attr->private = (void *)(unsigned long)num; 1368 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1369 if (retval) 1370 kfree(res_attr); 1371 1372 return retval; 1373 } 1374 1375 /** 1376 * pci_create_resource_files - create resource files in sysfs for @dev 1377 * @pdev: dev in question 1378 * 1379 * Walk the resources in @pdev creating files for each resource available. 1380 */ 1381 static int pci_create_resource_files(struct pci_dev *pdev) 1382 { 1383 int i; 1384 int retval; 1385 1386 /* Expose the PCI resources from this device as files */ 1387 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1388 1389 /* skip empty resources */ 1390 if (!pci_resource_len(pdev, i)) 1391 continue; 1392 1393 retval = pci_create_attr(pdev, i, 0); 1394 /* for prefetchable resources, create a WC mappable file */ 1395 if (!retval && arch_can_pci_mmap_wc() && 1396 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1397 retval = pci_create_attr(pdev, i, 1); 1398 if (retval) { 1399 pci_remove_resource_files(pdev); 1400 return retval; 1401 } 1402 } 1403 return 0; 1404 } 1405 #else /* !HAVE_PCI_MMAP */ 1406 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1407 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1408 #endif /* HAVE_PCI_MMAP */ 1409 1410 /** 1411 * pci_write_rom - used to enable access to the PCI ROM display 1412 * @filp: sysfs file 1413 * @kobj: kernel object handle 1414 * @bin_attr: struct bin_attribute for this file 1415 * @buf: user input 1416 * @off: file offset 1417 * @count: number of byte in input 1418 * 1419 * writing anything except 0 enables it 1420 */ 1421 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1422 struct bin_attribute *bin_attr, char *buf, 1423 loff_t off, size_t count) 1424 { 1425 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1426 1427 if ((off == 0) && (*buf == '0') && (count == 2)) 1428 pdev->rom_attr_enabled = 0; 1429 else 1430 pdev->rom_attr_enabled = 1; 1431 1432 return count; 1433 } 1434 1435 /** 1436 * pci_read_rom - read a PCI ROM 1437 * @filp: sysfs file 1438 * @kobj: kernel object handle 1439 * @bin_attr: struct bin_attribute for this file 1440 * @buf: where to put the data we read from the ROM 1441 * @off: file offset 1442 * @count: number of bytes to read 1443 * 1444 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1445 * device corresponding to @kobj. 1446 */ 1447 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1448 struct bin_attribute *bin_attr, char *buf, 1449 loff_t off, size_t count) 1450 { 1451 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1452 void __iomem *rom; 1453 size_t size; 1454 1455 if (!pdev->rom_attr_enabled) 1456 return -EINVAL; 1457 1458 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1459 if (!rom || !size) 1460 return -EIO; 1461 1462 if (off >= size) 1463 count = 0; 1464 else { 1465 if (off + count > size) 1466 count = size - off; 1467 1468 memcpy_fromio(buf, rom + off, count); 1469 } 1470 pci_unmap_rom(pdev, rom); 1471 1472 return count; 1473 } 1474 1475 static const struct bin_attribute pci_config_attr = { 1476 .attr = { 1477 .name = "config", 1478 .mode = S_IRUGO | S_IWUSR, 1479 }, 1480 .size = PCI_CFG_SPACE_SIZE, 1481 .read = pci_read_config, 1482 .write = pci_write_config, 1483 }; 1484 1485 static const struct bin_attribute pcie_config_attr = { 1486 .attr = { 1487 .name = "config", 1488 .mode = S_IRUGO | S_IWUSR, 1489 }, 1490 .size = PCI_CFG_SPACE_EXP_SIZE, 1491 .read = pci_read_config, 1492 .write = pci_write_config, 1493 }; 1494 1495 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1496 const char *buf, size_t count) 1497 { 1498 struct pci_dev *pdev = to_pci_dev(dev); 1499 unsigned long val; 1500 ssize_t result = kstrtoul(buf, 0, &val); 1501 1502 if (result < 0) 1503 return result; 1504 1505 if (val != 1) 1506 return -EINVAL; 1507 1508 result = pci_reset_function(pdev); 1509 if (result < 0) 1510 return result; 1511 1512 return count; 1513 } 1514 1515 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1516 1517 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1518 { 1519 int retval; 1520 struct bin_attribute *attr; 1521 1522 /* If the device has VPD, try to expose it in sysfs. */ 1523 if (dev->vpd) { 1524 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1525 if (!attr) 1526 return -ENOMEM; 1527 1528 sysfs_bin_attr_init(attr); 1529 attr->size = 0; 1530 attr->attr.name = "vpd"; 1531 attr->attr.mode = S_IRUSR | S_IWUSR; 1532 attr->read = read_vpd_attr; 1533 attr->write = write_vpd_attr; 1534 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1535 if (retval) { 1536 kfree(attr); 1537 return retval; 1538 } 1539 dev->vpd->attr = attr; 1540 } 1541 1542 /* Active State Power Management */ 1543 pcie_aspm_create_sysfs_dev_files(dev); 1544 1545 if (!pci_probe_reset_function(dev)) { 1546 retval = device_create_file(&dev->dev, &reset_attr); 1547 if (retval) 1548 goto error; 1549 dev->reset_fn = 1; 1550 } 1551 return 0; 1552 1553 error: 1554 pcie_aspm_remove_sysfs_dev_files(dev); 1555 if (dev->vpd && dev->vpd->attr) { 1556 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1557 kfree(dev->vpd->attr); 1558 } 1559 1560 return retval; 1561 } 1562 1563 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1564 { 1565 int retval; 1566 int rom_size; 1567 struct bin_attribute *attr; 1568 1569 if (!sysfs_initialized) 1570 return -EACCES; 1571 1572 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1573 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1574 else 1575 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1576 if (retval) 1577 goto err; 1578 1579 retval = pci_create_resource_files(pdev); 1580 if (retval) 1581 goto err_config_file; 1582 1583 /* If the device has a ROM, try to expose it in sysfs. */ 1584 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1585 if (rom_size) { 1586 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1587 if (!attr) { 1588 retval = -ENOMEM; 1589 goto err_resource_files; 1590 } 1591 sysfs_bin_attr_init(attr); 1592 attr->size = rom_size; 1593 attr->attr.name = "rom"; 1594 attr->attr.mode = S_IRUSR | S_IWUSR; 1595 attr->read = pci_read_rom; 1596 attr->write = pci_write_rom; 1597 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1598 if (retval) { 1599 kfree(attr); 1600 goto err_resource_files; 1601 } 1602 pdev->rom_attr = attr; 1603 } 1604 1605 /* add sysfs entries for various capabilities */ 1606 retval = pci_create_capabilities_sysfs(pdev); 1607 if (retval) 1608 goto err_rom_file; 1609 1610 pci_create_firmware_label_files(pdev); 1611 1612 return 0; 1613 1614 err_rom_file: 1615 if (pdev->rom_attr) { 1616 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1617 kfree(pdev->rom_attr); 1618 pdev->rom_attr = NULL; 1619 } 1620 err_resource_files: 1621 pci_remove_resource_files(pdev); 1622 err_config_file: 1623 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1624 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1625 else 1626 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1627 err: 1628 return retval; 1629 } 1630 1631 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1632 { 1633 if (dev->vpd && dev->vpd->attr) { 1634 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1635 kfree(dev->vpd->attr); 1636 } 1637 1638 pcie_aspm_remove_sysfs_dev_files(dev); 1639 if (dev->reset_fn) { 1640 device_remove_file(&dev->dev, &reset_attr); 1641 dev->reset_fn = 0; 1642 } 1643 } 1644 1645 /** 1646 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1647 * @pdev: device whose entries we should free 1648 * 1649 * Cleanup when @pdev is removed from sysfs. 1650 */ 1651 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1652 { 1653 if (!sysfs_initialized) 1654 return; 1655 1656 pci_remove_capabilities_sysfs(pdev); 1657 1658 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1659 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1660 else 1661 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1662 1663 pci_remove_resource_files(pdev); 1664 1665 if (pdev->rom_attr) { 1666 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1667 kfree(pdev->rom_attr); 1668 pdev->rom_attr = NULL; 1669 } 1670 1671 pci_remove_firmware_label_files(pdev); 1672 } 1673 1674 static int __init pci_sysfs_init(void) 1675 { 1676 struct pci_dev *pdev = NULL; 1677 int retval; 1678 1679 sysfs_initialized = 1; 1680 for_each_pci_dev(pdev) { 1681 retval = pci_create_sysfs_dev_files(pdev); 1682 if (retval) { 1683 pci_dev_put(pdev); 1684 return retval; 1685 } 1686 } 1687 1688 return 0; 1689 } 1690 late_initcall(pci_sysfs_init); 1691 1692 static struct attribute *pci_dev_dev_attrs[] = { 1693 &vga_attr.attr, 1694 NULL, 1695 }; 1696 1697 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1698 struct attribute *a, int n) 1699 { 1700 struct device *dev = kobj_to_dev(kobj); 1701 struct pci_dev *pdev = to_pci_dev(dev); 1702 1703 if (a == &vga_attr.attr) 1704 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1705 return 0; 1706 1707 return a->mode; 1708 } 1709 1710 static struct attribute *pci_dev_hp_attrs[] = { 1711 &dev_remove_attr.attr, 1712 &dev_rescan_attr.attr, 1713 NULL, 1714 }; 1715 1716 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1717 struct attribute *a, int n) 1718 { 1719 struct device *dev = kobj_to_dev(kobj); 1720 struct pci_dev *pdev = to_pci_dev(dev); 1721 1722 if (pdev->is_virtfn) 1723 return 0; 1724 1725 return a->mode; 1726 } 1727 1728 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1729 struct attribute *a, int n) 1730 { 1731 struct device *dev = kobj_to_dev(kobj); 1732 struct pci_dev *pdev = to_pci_dev(dev); 1733 1734 if (pci_is_bridge(pdev)) 1735 return a->mode; 1736 1737 return 0; 1738 } 1739 1740 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1741 struct attribute *a, int n) 1742 { 1743 struct device *dev = kobj_to_dev(kobj); 1744 struct pci_dev *pdev = to_pci_dev(dev); 1745 1746 if (pci_is_pcie(pdev)) 1747 return a->mode; 1748 1749 return 0; 1750 } 1751 1752 static const struct attribute_group pci_dev_group = { 1753 .attrs = pci_dev_attrs, 1754 }; 1755 1756 const struct attribute_group *pci_dev_groups[] = { 1757 &pci_dev_group, 1758 NULL, 1759 }; 1760 1761 static const struct attribute_group pci_bridge_group = { 1762 .attrs = pci_bridge_attrs, 1763 }; 1764 1765 const struct attribute_group *pci_bridge_groups[] = { 1766 &pci_bridge_group, 1767 NULL, 1768 }; 1769 1770 static const struct attribute_group pcie_dev_group = { 1771 .attrs = pcie_dev_attrs, 1772 }; 1773 1774 const struct attribute_group *pcie_dev_groups[] = { 1775 &pcie_dev_group, 1776 NULL, 1777 }; 1778 1779 static const struct attribute_group pci_dev_hp_attr_group = { 1780 .attrs = pci_dev_hp_attrs, 1781 .is_visible = pci_dev_hp_attrs_are_visible, 1782 }; 1783 1784 #ifdef CONFIG_PCI_IOV 1785 static struct attribute *sriov_dev_attrs[] = { 1786 &sriov_totalvfs_attr.attr, 1787 &sriov_numvfs_attr.attr, 1788 &sriov_offset_attr.attr, 1789 &sriov_stride_attr.attr, 1790 &sriov_vf_device_attr.attr, 1791 &sriov_drivers_autoprobe_attr.attr, 1792 NULL, 1793 }; 1794 1795 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1796 struct attribute *a, int n) 1797 { 1798 struct device *dev = kobj_to_dev(kobj); 1799 1800 if (!dev_is_pf(dev)) 1801 return 0; 1802 1803 return a->mode; 1804 } 1805 1806 static const struct attribute_group sriov_dev_attr_group = { 1807 .attrs = sriov_dev_attrs, 1808 .is_visible = sriov_attrs_are_visible, 1809 }; 1810 #endif /* CONFIG_PCI_IOV */ 1811 1812 static const struct attribute_group pci_dev_attr_group = { 1813 .attrs = pci_dev_dev_attrs, 1814 .is_visible = pci_dev_attrs_are_visible, 1815 }; 1816 1817 static const struct attribute_group pci_bridge_attr_group = { 1818 .attrs = pci_bridge_attrs, 1819 .is_visible = pci_bridge_attrs_are_visible, 1820 }; 1821 1822 static const struct attribute_group pcie_dev_attr_group = { 1823 .attrs = pcie_dev_attrs, 1824 .is_visible = pcie_dev_attrs_are_visible, 1825 }; 1826 1827 static const struct attribute_group *pci_dev_attr_groups[] = { 1828 &pci_dev_attr_group, 1829 &pci_dev_hp_attr_group, 1830 #ifdef CONFIG_PCI_IOV 1831 &sriov_dev_attr_group, 1832 #endif 1833 &pci_bridge_attr_group, 1834 &pcie_dev_attr_group, 1835 NULL, 1836 }; 1837 1838 const struct device_type pci_dev_type = { 1839 .groups = pci_dev_attr_groups, 1840 }; 1841