1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } \ 46 static DEVICE_ATTR_RO(field) 47 48 pci_config_attr(vendor, "0x%04x\n"); 49 pci_config_attr(device, "0x%04x\n"); 50 pci_config_attr(subsystem_vendor, "0x%04x\n"); 51 pci_config_attr(subsystem_device, "0x%04x\n"); 52 pci_config_attr(class, "0x%06x\n"); 53 pci_config_attr(irq, "%u\n"); 54 55 static ssize_t broken_parity_status_show(struct device *dev, 56 struct device_attribute *attr, 57 char *buf) 58 { 59 struct pci_dev *pdev = to_pci_dev(dev); 60 return sprintf (buf, "%u\n", pdev->broken_parity_status); 61 } 62 63 static ssize_t broken_parity_status_store(struct device *dev, 64 struct device_attribute *attr, 65 const char *buf, size_t count) 66 { 67 struct pci_dev *pdev = to_pci_dev(dev); 68 unsigned long val; 69 70 if (kstrtoul(buf, 0, &val) < 0) 71 return -EINVAL; 72 73 pdev->broken_parity_status = !!val; 74 75 return count; 76 } 77 static DEVICE_ATTR_RW(broken_parity_status); 78 79 static ssize_t pci_dev_show_local_cpu(struct device *dev, 80 int type, 81 struct device_attribute *attr, 82 char *buf) 83 { 84 const struct cpumask *mask; 85 int len; 86 87 #ifdef CONFIG_NUMA 88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 89 cpumask_of_node(dev_to_node(dev)); 90 #else 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 92 #endif 93 len = type ? 94 cpumask_scnprintf(buf, PAGE_SIZE-2, mask) : 95 cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 96 97 buf[len++] = '\n'; 98 buf[len] = '\0'; 99 return len; 100 } 101 102 static ssize_t local_cpus_show(struct device *dev, 103 struct device_attribute *attr, char *buf) 104 { 105 return pci_dev_show_local_cpu(dev, 1, attr, buf); 106 } 107 static DEVICE_ATTR_RO(local_cpus); 108 109 static ssize_t local_cpulist_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 return pci_dev_show_local_cpu(dev, 0, attr, buf); 113 } 114 static DEVICE_ATTR_RO(local_cpulist); 115 116 /* 117 * PCI Bus Class Devices 118 */ 119 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 120 int type, 121 struct device_attribute *attr, 122 char *buf) 123 { 124 int ret; 125 const struct cpumask *cpumask; 126 127 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 128 ret = type ? 129 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 130 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 131 buf[ret++] = '\n'; 132 buf[ret] = '\0'; 133 return ret; 134 } 135 136 static ssize_t cpuaffinity_show(struct device *dev, 137 struct device_attribute *attr, char *buf) 138 { 139 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 140 } 141 static DEVICE_ATTR_RO(cpuaffinity); 142 143 static ssize_t cpulistaffinity_show(struct device *dev, 144 struct device_attribute *attr, char *buf) 145 { 146 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 147 } 148 static DEVICE_ATTR_RO(cpulistaffinity); 149 150 /* show resources */ 151 static ssize_t 152 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 153 { 154 struct pci_dev * pci_dev = to_pci_dev(dev); 155 char * str = buf; 156 int i; 157 int max; 158 resource_size_t start, end; 159 160 if (pci_dev->subordinate) 161 max = DEVICE_COUNT_RESOURCE; 162 else 163 max = PCI_BRIDGE_RESOURCES; 164 165 for (i = 0; i < max; i++) { 166 struct resource *res = &pci_dev->resource[i]; 167 pci_resource_to_user(pci_dev, i, res, &start, &end); 168 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 169 (unsigned long long)start, 170 (unsigned long long)end, 171 (unsigned long long)res->flags); 172 } 173 return (str - buf); 174 } 175 static DEVICE_ATTR_RO(resource); 176 177 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 178 { 179 struct pci_dev *pci_dev = to_pci_dev(dev); 180 181 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 182 pci_dev->vendor, pci_dev->device, 183 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 184 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 185 (u8)(pci_dev->class)); 186 } 187 static DEVICE_ATTR_RO(modalias); 188 189 static ssize_t enabled_store(struct device *dev, 190 struct device_attribute *attr, const char *buf, 191 size_t count) 192 { 193 struct pci_dev *pdev = to_pci_dev(dev); 194 unsigned long val; 195 ssize_t result = kstrtoul(buf, 0, &val); 196 197 if (result < 0) 198 return result; 199 200 /* this can crash the machine when done on the "wrong" device */ 201 if (!capable(CAP_SYS_ADMIN)) 202 return -EPERM; 203 204 if (!val) { 205 if (pci_is_enabled(pdev)) 206 pci_disable_device(pdev); 207 else 208 result = -EIO; 209 } else 210 result = pci_enable_device(pdev); 211 212 return result < 0 ? result : count; 213 } 214 215 static ssize_t enabled_show(struct device *dev, 216 struct device_attribute *attr, char *buf) 217 { 218 struct pci_dev *pdev; 219 220 pdev = to_pci_dev (dev); 221 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 222 } 223 static DEVICE_ATTR_RW(enabled); 224 225 #ifdef CONFIG_NUMA 226 static ssize_t 227 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 228 { 229 return sprintf (buf, "%d\n", dev->numa_node); 230 } 231 static DEVICE_ATTR_RO(numa_node); 232 #endif 233 234 static ssize_t 235 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 236 { 237 struct pci_dev *pdev = to_pci_dev(dev); 238 239 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 240 } 241 static DEVICE_ATTR_RO(dma_mask_bits); 242 243 static ssize_t 244 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 245 char *buf) 246 { 247 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 248 } 249 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 250 251 static ssize_t 252 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 253 { 254 struct pci_dev *pdev = to_pci_dev(dev); 255 256 if (!pdev->subordinate) 257 return 0; 258 259 return sprintf (buf, "%u\n", 260 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 261 } 262 263 static ssize_t 264 msi_bus_store(struct device *dev, struct device_attribute *attr, 265 const char *buf, size_t count) 266 { 267 struct pci_dev *pdev = to_pci_dev(dev); 268 unsigned long val; 269 270 if (kstrtoul(buf, 0, &val) < 0) 271 return -EINVAL; 272 273 /* 274 * Bad things may happen if the no_msi flag is changed 275 * while drivers are loaded. 276 */ 277 if (!capable(CAP_SYS_ADMIN)) 278 return -EPERM; 279 280 /* 281 * Maybe devices without subordinate buses shouldn't have this 282 * attribute in the first place? 283 */ 284 if (!pdev->subordinate) 285 return count; 286 287 /* Is the flag going to change, or keep the value it already had? */ 288 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 289 !!val) { 290 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 291 292 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 293 " bad things could happen\n", val ? "" : " not"); 294 } 295 296 return count; 297 } 298 static DEVICE_ATTR_RW(msi_bus); 299 300 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 301 size_t count) 302 { 303 unsigned long val; 304 struct pci_bus *b = NULL; 305 306 if (kstrtoul(buf, 0, &val) < 0) 307 return -EINVAL; 308 309 if (val) { 310 pci_lock_rescan_remove(); 311 while ((b = pci_find_next_bus(b)) != NULL) 312 pci_rescan_bus(b); 313 pci_unlock_rescan_remove(); 314 } 315 return count; 316 } 317 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 318 319 static struct attribute *pci_bus_attrs[] = { 320 &bus_attr_rescan.attr, 321 NULL, 322 }; 323 324 static const struct attribute_group pci_bus_group = { 325 .attrs = pci_bus_attrs, 326 }; 327 328 const struct attribute_group *pci_bus_groups[] = { 329 &pci_bus_group, 330 NULL, 331 }; 332 333 static ssize_t 334 dev_rescan_store(struct device *dev, struct device_attribute *attr, 335 const char *buf, size_t count) 336 { 337 unsigned long val; 338 struct pci_dev *pdev = to_pci_dev(dev); 339 340 if (kstrtoul(buf, 0, &val) < 0) 341 return -EINVAL; 342 343 if (val) { 344 pci_lock_rescan_remove(); 345 pci_rescan_bus(pdev->bus); 346 pci_unlock_rescan_remove(); 347 } 348 return count; 349 } 350 static struct device_attribute dev_rescan_attr = __ATTR(rescan, 351 (S_IWUSR|S_IWGRP), 352 NULL, dev_rescan_store); 353 354 static ssize_t 355 remove_store(struct device *dev, struct device_attribute *attr, 356 const char *buf, size_t count) 357 { 358 unsigned long val; 359 360 if (kstrtoul(buf, 0, &val) < 0) 361 return -EINVAL; 362 363 if (val && device_remove_file_self(dev, attr)) 364 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 365 return count; 366 } 367 static struct device_attribute dev_remove_attr = __ATTR(remove, 368 (S_IWUSR|S_IWGRP), 369 NULL, remove_store); 370 371 static ssize_t 372 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 373 const char *buf, size_t count) 374 { 375 unsigned long val; 376 struct pci_bus *bus = to_pci_bus(dev); 377 378 if (kstrtoul(buf, 0, &val) < 0) 379 return -EINVAL; 380 381 if (val) { 382 pci_lock_rescan_remove(); 383 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 384 pci_rescan_bus_bridge_resize(bus->self); 385 else 386 pci_rescan_bus(bus); 387 pci_unlock_rescan_remove(); 388 } 389 return count; 390 } 391 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 392 393 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 394 static ssize_t d3cold_allowed_store(struct device *dev, 395 struct device_attribute *attr, 396 const char *buf, size_t count) 397 { 398 struct pci_dev *pdev = to_pci_dev(dev); 399 unsigned long val; 400 401 if (kstrtoul(buf, 0, &val) < 0) 402 return -EINVAL; 403 404 pdev->d3cold_allowed = !!val; 405 pm_runtime_resume(dev); 406 407 return count; 408 } 409 410 static ssize_t d3cold_allowed_show(struct device *dev, 411 struct device_attribute *attr, char *buf) 412 { 413 struct pci_dev *pdev = to_pci_dev(dev); 414 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 415 } 416 static DEVICE_ATTR_RW(d3cold_allowed); 417 #endif 418 419 #ifdef CONFIG_PCI_IOV 420 static ssize_t sriov_totalvfs_show(struct device *dev, 421 struct device_attribute *attr, 422 char *buf) 423 { 424 struct pci_dev *pdev = to_pci_dev(dev); 425 426 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 427 } 428 429 430 static ssize_t sriov_numvfs_show(struct device *dev, 431 struct device_attribute *attr, 432 char *buf) 433 { 434 struct pci_dev *pdev = to_pci_dev(dev); 435 436 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 437 } 438 439 /* 440 * num_vfs > 0; number of VFs to enable 441 * num_vfs = 0; disable all VFs 442 * 443 * Note: SRIOV spec doesn't allow partial VF 444 * disable, so it's all or none. 445 */ 446 static ssize_t sriov_numvfs_store(struct device *dev, 447 struct device_attribute *attr, 448 const char *buf, size_t count) 449 { 450 struct pci_dev *pdev = to_pci_dev(dev); 451 int ret; 452 u16 num_vfs; 453 454 ret = kstrtou16(buf, 0, &num_vfs); 455 if (ret < 0) 456 return ret; 457 458 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 459 return -ERANGE; 460 461 if (num_vfs == pdev->sriov->num_VFs) 462 return count; /* no change */ 463 464 /* is PF driver loaded w/callback */ 465 if (!pdev->driver || !pdev->driver->sriov_configure) { 466 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); 467 return -ENOSYS; 468 } 469 470 if (num_vfs == 0) { 471 /* disable VFs */ 472 ret = pdev->driver->sriov_configure(pdev, 0); 473 if (ret < 0) 474 return ret; 475 return count; 476 } 477 478 /* enable VFs */ 479 if (pdev->sriov->num_VFs) { 480 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", 481 pdev->sriov->num_VFs, num_vfs); 482 return -EBUSY; 483 } 484 485 ret = pdev->driver->sriov_configure(pdev, num_vfs); 486 if (ret < 0) 487 return ret; 488 489 if (ret != num_vfs) 490 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", 491 num_vfs, ret); 492 493 return count; 494 } 495 496 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 497 static struct device_attribute sriov_numvfs_attr = 498 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 499 sriov_numvfs_show, sriov_numvfs_store); 500 #endif /* CONFIG_PCI_IOV */ 501 502 static struct attribute *pci_dev_attrs[] = { 503 &dev_attr_resource.attr, 504 &dev_attr_vendor.attr, 505 &dev_attr_device.attr, 506 &dev_attr_subsystem_vendor.attr, 507 &dev_attr_subsystem_device.attr, 508 &dev_attr_class.attr, 509 &dev_attr_irq.attr, 510 &dev_attr_local_cpus.attr, 511 &dev_attr_local_cpulist.attr, 512 &dev_attr_modalias.attr, 513 #ifdef CONFIG_NUMA 514 &dev_attr_numa_node.attr, 515 #endif 516 &dev_attr_dma_mask_bits.attr, 517 &dev_attr_consistent_dma_mask_bits.attr, 518 &dev_attr_enabled.attr, 519 &dev_attr_broken_parity_status.attr, 520 &dev_attr_msi_bus.attr, 521 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 522 &dev_attr_d3cold_allowed.attr, 523 #endif 524 NULL, 525 }; 526 527 static const struct attribute_group pci_dev_group = { 528 .attrs = pci_dev_attrs, 529 }; 530 531 const struct attribute_group *pci_dev_groups[] = { 532 &pci_dev_group, 533 NULL, 534 }; 535 536 static struct attribute *pcibus_attrs[] = { 537 &dev_attr_rescan.attr, 538 &dev_attr_cpuaffinity.attr, 539 &dev_attr_cpulistaffinity.attr, 540 NULL, 541 }; 542 543 static const struct attribute_group pcibus_group = { 544 .attrs = pcibus_attrs, 545 }; 546 547 const struct attribute_group *pcibus_groups[] = { 548 &pcibus_group, 549 NULL, 550 }; 551 552 static ssize_t 553 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 554 { 555 struct pci_dev *pdev = to_pci_dev(dev); 556 struct pci_dev *vga_dev = vga_default_device(); 557 558 if (vga_dev) 559 return sprintf(buf, "%u\n", (pdev == vga_dev)); 560 561 return sprintf(buf, "%u\n", 562 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 563 IORESOURCE_ROM_SHADOW)); 564 } 565 static struct device_attribute vga_attr = __ATTR_RO(boot_vga); 566 567 static ssize_t 568 pci_read_config(struct file *filp, struct kobject *kobj, 569 struct bin_attribute *bin_attr, 570 char *buf, loff_t off, size_t count) 571 { 572 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 573 unsigned int size = 64; 574 loff_t init_off = off; 575 u8 *data = (u8*) buf; 576 577 /* Several chips lock up trying to read undefined config space */ 578 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 579 size = dev->cfg_size; 580 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 581 size = 128; 582 } 583 584 if (off > size) 585 return 0; 586 if (off + count > size) { 587 size -= off; 588 count = size; 589 } else { 590 size = count; 591 } 592 593 pci_config_pm_runtime_get(dev); 594 595 if ((off & 1) && size) { 596 u8 val; 597 pci_user_read_config_byte(dev, off, &val); 598 data[off - init_off] = val; 599 off++; 600 size--; 601 } 602 603 if ((off & 3) && size > 2) { 604 u16 val; 605 pci_user_read_config_word(dev, off, &val); 606 data[off - init_off] = val & 0xff; 607 data[off - init_off + 1] = (val >> 8) & 0xff; 608 off += 2; 609 size -= 2; 610 } 611 612 while (size > 3) { 613 u32 val; 614 pci_user_read_config_dword(dev, off, &val); 615 data[off - init_off] = val & 0xff; 616 data[off - init_off + 1] = (val >> 8) & 0xff; 617 data[off - init_off + 2] = (val >> 16) & 0xff; 618 data[off - init_off + 3] = (val >> 24) & 0xff; 619 off += 4; 620 size -= 4; 621 } 622 623 if (size >= 2) { 624 u16 val; 625 pci_user_read_config_word(dev, off, &val); 626 data[off - init_off] = val & 0xff; 627 data[off - init_off + 1] = (val >> 8) & 0xff; 628 off += 2; 629 size -= 2; 630 } 631 632 if (size > 0) { 633 u8 val; 634 pci_user_read_config_byte(dev, off, &val); 635 data[off - init_off] = val; 636 off++; 637 --size; 638 } 639 640 pci_config_pm_runtime_put(dev); 641 642 return count; 643 } 644 645 static ssize_t 646 pci_write_config(struct file* filp, struct kobject *kobj, 647 struct bin_attribute *bin_attr, 648 char *buf, loff_t off, size_t count) 649 { 650 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 651 unsigned int size = count; 652 loff_t init_off = off; 653 u8 *data = (u8*) buf; 654 655 if (off > dev->cfg_size) 656 return 0; 657 if (off + count > dev->cfg_size) { 658 size = dev->cfg_size - off; 659 count = size; 660 } 661 662 pci_config_pm_runtime_get(dev); 663 664 if ((off & 1) && size) { 665 pci_user_write_config_byte(dev, off, data[off - init_off]); 666 off++; 667 size--; 668 } 669 670 if ((off & 3) && size > 2) { 671 u16 val = data[off - init_off]; 672 val |= (u16) data[off - init_off + 1] << 8; 673 pci_user_write_config_word(dev, off, val); 674 off += 2; 675 size -= 2; 676 } 677 678 while (size > 3) { 679 u32 val = data[off - init_off]; 680 val |= (u32) data[off - init_off + 1] << 8; 681 val |= (u32) data[off - init_off + 2] << 16; 682 val |= (u32) data[off - init_off + 3] << 24; 683 pci_user_write_config_dword(dev, off, val); 684 off += 4; 685 size -= 4; 686 } 687 688 if (size >= 2) { 689 u16 val = data[off - init_off]; 690 val |= (u16) data[off - init_off + 1] << 8; 691 pci_user_write_config_word(dev, off, val); 692 off += 2; 693 size -= 2; 694 } 695 696 if (size) { 697 pci_user_write_config_byte(dev, off, data[off - init_off]); 698 off++; 699 --size; 700 } 701 702 pci_config_pm_runtime_put(dev); 703 704 return count; 705 } 706 707 static ssize_t 708 read_vpd_attr(struct file *filp, struct kobject *kobj, 709 struct bin_attribute *bin_attr, 710 char *buf, loff_t off, size_t count) 711 { 712 struct pci_dev *dev = 713 to_pci_dev(container_of(kobj, struct device, kobj)); 714 715 if (off > bin_attr->size) 716 count = 0; 717 else if (count > bin_attr->size - off) 718 count = bin_attr->size - off; 719 720 return pci_read_vpd(dev, off, count, buf); 721 } 722 723 static ssize_t 724 write_vpd_attr(struct file *filp, struct kobject *kobj, 725 struct bin_attribute *bin_attr, 726 char *buf, loff_t off, size_t count) 727 { 728 struct pci_dev *dev = 729 to_pci_dev(container_of(kobj, struct device, kobj)); 730 731 if (off > bin_attr->size) 732 count = 0; 733 else if (count > bin_attr->size - off) 734 count = bin_attr->size - off; 735 736 return pci_write_vpd(dev, off, count, buf); 737 } 738 739 #ifdef HAVE_PCI_LEGACY 740 /** 741 * pci_read_legacy_io - read byte(s) from legacy I/O port space 742 * @filp: open sysfs file 743 * @kobj: kobject corresponding to file to read from 744 * @bin_attr: struct bin_attribute for this file 745 * @buf: buffer to store results 746 * @off: offset into legacy I/O port space 747 * @count: number of bytes to read 748 * 749 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 750 * callback routine (pci_legacy_read). 751 */ 752 static ssize_t 753 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 754 struct bin_attribute *bin_attr, 755 char *buf, loff_t off, size_t count) 756 { 757 struct pci_bus *bus = to_pci_bus(container_of(kobj, 758 struct device, 759 kobj)); 760 761 /* Only support 1, 2 or 4 byte accesses */ 762 if (count != 1 && count != 2 && count != 4) 763 return -EINVAL; 764 765 return pci_legacy_read(bus, off, (u32 *)buf, count); 766 } 767 768 /** 769 * pci_write_legacy_io - write byte(s) to legacy I/O port space 770 * @filp: open sysfs file 771 * @kobj: kobject corresponding to file to read from 772 * @bin_attr: struct bin_attribute for this file 773 * @buf: buffer containing value to be written 774 * @off: offset into legacy I/O port space 775 * @count: number of bytes to write 776 * 777 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 778 * callback routine (pci_legacy_write). 779 */ 780 static ssize_t 781 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 782 struct bin_attribute *bin_attr, 783 char *buf, loff_t off, size_t count) 784 { 785 struct pci_bus *bus = to_pci_bus(container_of(kobj, 786 struct device, 787 kobj)); 788 /* Only support 1, 2 or 4 byte accesses */ 789 if (count != 1 && count != 2 && count != 4) 790 return -EINVAL; 791 792 return pci_legacy_write(bus, off, *(u32 *)buf, count); 793 } 794 795 /** 796 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 797 * @filp: open sysfs file 798 * @kobj: kobject corresponding to device to be mapped 799 * @attr: struct bin_attribute for this file 800 * @vma: struct vm_area_struct passed to mmap 801 * 802 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 803 * legacy memory space (first meg of bus space) into application virtual 804 * memory space. 805 */ 806 static int 807 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 808 struct bin_attribute *attr, 809 struct vm_area_struct *vma) 810 { 811 struct pci_bus *bus = to_pci_bus(container_of(kobj, 812 struct device, 813 kobj)); 814 815 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 816 } 817 818 /** 819 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 820 * @filp: open sysfs file 821 * @kobj: kobject corresponding to device to be mapped 822 * @attr: struct bin_attribute for this file 823 * @vma: struct vm_area_struct passed to mmap 824 * 825 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 826 * legacy IO space (first meg of bus space) into application virtual 827 * memory space. Returns -ENOSYS if the operation isn't supported 828 */ 829 static int 830 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 831 struct bin_attribute *attr, 832 struct vm_area_struct *vma) 833 { 834 struct pci_bus *bus = to_pci_bus(container_of(kobj, 835 struct device, 836 kobj)); 837 838 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 839 } 840 841 /** 842 * pci_adjust_legacy_attr - adjustment of legacy file attributes 843 * @b: bus to create files under 844 * @mmap_type: I/O port or memory 845 * 846 * Stub implementation. Can be overridden by arch if necessary. 847 */ 848 void __weak 849 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 850 { 851 return; 852 } 853 854 /** 855 * pci_create_legacy_files - create legacy I/O port and memory files 856 * @b: bus to create files under 857 * 858 * Some platforms allow access to legacy I/O port and ISA memory space on 859 * a per-bus basis. This routine creates the files and ties them into 860 * their associated read, write and mmap files from pci-sysfs.c 861 * 862 * On error unwind, but don't propagate the error to the caller 863 * as it is ok to set up the PCI bus without these files. 864 */ 865 void pci_create_legacy_files(struct pci_bus *b) 866 { 867 int error; 868 869 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 870 GFP_ATOMIC); 871 if (!b->legacy_io) 872 goto kzalloc_err; 873 874 sysfs_bin_attr_init(b->legacy_io); 875 b->legacy_io->attr.name = "legacy_io"; 876 b->legacy_io->size = 0xffff; 877 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 878 b->legacy_io->read = pci_read_legacy_io; 879 b->legacy_io->write = pci_write_legacy_io; 880 b->legacy_io->mmap = pci_mmap_legacy_io; 881 pci_adjust_legacy_attr(b, pci_mmap_io); 882 error = device_create_bin_file(&b->dev, b->legacy_io); 883 if (error) 884 goto legacy_io_err; 885 886 /* Allocated above after the legacy_io struct */ 887 b->legacy_mem = b->legacy_io + 1; 888 sysfs_bin_attr_init(b->legacy_mem); 889 b->legacy_mem->attr.name = "legacy_mem"; 890 b->legacy_mem->size = 1024*1024; 891 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 892 b->legacy_mem->mmap = pci_mmap_legacy_mem; 893 pci_adjust_legacy_attr(b, pci_mmap_mem); 894 error = device_create_bin_file(&b->dev, b->legacy_mem); 895 if (error) 896 goto legacy_mem_err; 897 898 return; 899 900 legacy_mem_err: 901 device_remove_bin_file(&b->dev, b->legacy_io); 902 legacy_io_err: 903 kfree(b->legacy_io); 904 b->legacy_io = NULL; 905 kzalloc_err: 906 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 907 "and ISA memory resources to sysfs\n"); 908 return; 909 } 910 911 void pci_remove_legacy_files(struct pci_bus *b) 912 { 913 if (b->legacy_io) { 914 device_remove_bin_file(&b->dev, b->legacy_io); 915 device_remove_bin_file(&b->dev, b->legacy_mem); 916 kfree(b->legacy_io); /* both are allocated here */ 917 } 918 } 919 #endif /* HAVE_PCI_LEGACY */ 920 921 #ifdef HAVE_PCI_MMAP 922 923 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 924 enum pci_mmap_api mmap_api) 925 { 926 unsigned long nr, start, size, pci_start; 927 928 if (pci_resource_len(pdev, resno) == 0) 929 return 0; 930 nr = vma_pages(vma); 931 start = vma->vm_pgoff; 932 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 933 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 934 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 935 if (start >= pci_start && start < pci_start + size && 936 start + nr <= pci_start + size) 937 return 1; 938 return 0; 939 } 940 941 /** 942 * pci_mmap_resource - map a PCI resource into user memory space 943 * @kobj: kobject for mapping 944 * @attr: struct bin_attribute for the file being mapped 945 * @vma: struct vm_area_struct passed into the mmap 946 * @write_combine: 1 for write_combine mapping 947 * 948 * Use the regular PCI mapping routines to map a PCI resource into userspace. 949 */ 950 static int 951 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 952 struct vm_area_struct *vma, int write_combine) 953 { 954 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 955 struct device, kobj)); 956 struct resource *res = attr->private; 957 enum pci_mmap_state mmap_type; 958 resource_size_t start, end; 959 int i; 960 961 for (i = 0; i < PCI_ROM_RESOURCE; i++) 962 if (res == &pdev->resource[i]) 963 break; 964 if (i >= PCI_ROM_RESOURCE) 965 return -ENODEV; 966 967 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 968 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 969 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 970 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 971 pci_name(pdev), i, 972 (u64)pci_resource_start(pdev, i), 973 (u64)pci_resource_len(pdev, i)); 974 return -EINVAL; 975 } 976 977 /* pci_mmap_page_range() expects the same kind of entry as coming 978 * from /proc/bus/pci/ which is a "user visible" value. If this is 979 * different from the resource itself, arch will do necessary fixup. 980 */ 981 pci_resource_to_user(pdev, i, res, &start, &end); 982 vma->vm_pgoff += start >> PAGE_SHIFT; 983 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 984 985 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 986 return -EINVAL; 987 988 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 989 } 990 991 static int 992 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 993 struct bin_attribute *attr, 994 struct vm_area_struct *vma) 995 { 996 return pci_mmap_resource(kobj, attr, vma, 0); 997 } 998 999 static int 1000 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1001 struct bin_attribute *attr, 1002 struct vm_area_struct *vma) 1003 { 1004 return pci_mmap_resource(kobj, attr, vma, 1); 1005 } 1006 1007 static ssize_t 1008 pci_resource_io(struct file *filp, struct kobject *kobj, 1009 struct bin_attribute *attr, char *buf, 1010 loff_t off, size_t count, bool write) 1011 { 1012 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 1013 struct device, kobj)); 1014 struct resource *res = attr->private; 1015 unsigned long port = off; 1016 int i; 1017 1018 for (i = 0; i < PCI_ROM_RESOURCE; i++) 1019 if (res == &pdev->resource[i]) 1020 break; 1021 if (i >= PCI_ROM_RESOURCE) 1022 return -ENODEV; 1023 1024 port += pci_resource_start(pdev, i); 1025 1026 if (port > pci_resource_end(pdev, i)) 1027 return 0; 1028 1029 if (port + count - 1 > pci_resource_end(pdev, i)) 1030 return -EINVAL; 1031 1032 switch (count) { 1033 case 1: 1034 if (write) 1035 outb(*(u8 *)buf, port); 1036 else 1037 *(u8 *)buf = inb(port); 1038 return 1; 1039 case 2: 1040 if (write) 1041 outw(*(u16 *)buf, port); 1042 else 1043 *(u16 *)buf = inw(port); 1044 return 2; 1045 case 4: 1046 if (write) 1047 outl(*(u32 *)buf, port); 1048 else 1049 *(u32 *)buf = inl(port); 1050 return 4; 1051 } 1052 return -EINVAL; 1053 } 1054 1055 static ssize_t 1056 pci_read_resource_io(struct file *filp, struct kobject *kobj, 1057 struct bin_attribute *attr, char *buf, 1058 loff_t off, size_t count) 1059 { 1060 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1061 } 1062 1063 static ssize_t 1064 pci_write_resource_io(struct file *filp, struct kobject *kobj, 1065 struct bin_attribute *attr, char *buf, 1066 loff_t off, size_t count) 1067 { 1068 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1069 } 1070 1071 /** 1072 * pci_remove_resource_files - cleanup resource files 1073 * @pdev: dev to cleanup 1074 * 1075 * If we created resource files for @pdev, remove them from sysfs and 1076 * free their resources. 1077 */ 1078 static void 1079 pci_remove_resource_files(struct pci_dev *pdev) 1080 { 1081 int i; 1082 1083 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1084 struct bin_attribute *res_attr; 1085 1086 res_attr = pdev->res_attr[i]; 1087 if (res_attr) { 1088 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1089 kfree(res_attr); 1090 } 1091 1092 res_attr = pdev->res_attr_wc[i]; 1093 if (res_attr) { 1094 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1095 kfree(res_attr); 1096 } 1097 } 1098 } 1099 1100 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1101 { 1102 /* allocate attribute structure, piggyback attribute name */ 1103 int name_len = write_combine ? 13 : 10; 1104 struct bin_attribute *res_attr; 1105 int retval; 1106 1107 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1108 if (res_attr) { 1109 char *res_attr_name = (char *)(res_attr + 1); 1110 1111 sysfs_bin_attr_init(res_attr); 1112 if (write_combine) { 1113 pdev->res_attr_wc[num] = res_attr; 1114 sprintf(res_attr_name, "resource%d_wc", num); 1115 res_attr->mmap = pci_mmap_resource_wc; 1116 } else { 1117 pdev->res_attr[num] = res_attr; 1118 sprintf(res_attr_name, "resource%d", num); 1119 res_attr->mmap = pci_mmap_resource_uc; 1120 } 1121 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1122 res_attr->read = pci_read_resource_io; 1123 res_attr->write = pci_write_resource_io; 1124 } 1125 res_attr->attr.name = res_attr_name; 1126 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1127 res_attr->size = pci_resource_len(pdev, num); 1128 res_attr->private = &pdev->resource[num]; 1129 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1130 } else 1131 retval = -ENOMEM; 1132 1133 return retval; 1134 } 1135 1136 /** 1137 * pci_create_resource_files - create resource files in sysfs for @dev 1138 * @pdev: dev in question 1139 * 1140 * Walk the resources in @pdev creating files for each resource available. 1141 */ 1142 static int pci_create_resource_files(struct pci_dev *pdev) 1143 { 1144 int i; 1145 int retval; 1146 1147 /* Expose the PCI resources from this device as files */ 1148 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1149 1150 /* skip empty resources */ 1151 if (!pci_resource_len(pdev, i)) 1152 continue; 1153 1154 retval = pci_create_attr(pdev, i, 0); 1155 /* for prefetchable resources, create a WC mappable file */ 1156 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1157 retval = pci_create_attr(pdev, i, 1); 1158 1159 if (retval) { 1160 pci_remove_resource_files(pdev); 1161 return retval; 1162 } 1163 } 1164 return 0; 1165 } 1166 #else /* !HAVE_PCI_MMAP */ 1167 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1168 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1169 #endif /* HAVE_PCI_MMAP */ 1170 1171 /** 1172 * pci_write_rom - used to enable access to the PCI ROM display 1173 * @filp: sysfs file 1174 * @kobj: kernel object handle 1175 * @bin_attr: struct bin_attribute for this file 1176 * @buf: user input 1177 * @off: file offset 1178 * @count: number of byte in input 1179 * 1180 * writing anything except 0 enables it 1181 */ 1182 static ssize_t 1183 pci_write_rom(struct file *filp, struct kobject *kobj, 1184 struct bin_attribute *bin_attr, 1185 char *buf, loff_t off, size_t count) 1186 { 1187 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1188 1189 if ((off == 0) && (*buf == '0') && (count == 2)) 1190 pdev->rom_attr_enabled = 0; 1191 else 1192 pdev->rom_attr_enabled = 1; 1193 1194 return count; 1195 } 1196 1197 /** 1198 * pci_read_rom - read a PCI ROM 1199 * @filp: sysfs file 1200 * @kobj: kernel object handle 1201 * @bin_attr: struct bin_attribute for this file 1202 * @buf: where to put the data we read from the ROM 1203 * @off: file offset 1204 * @count: number of bytes to read 1205 * 1206 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1207 * device corresponding to @kobj. 1208 */ 1209 static ssize_t 1210 pci_read_rom(struct file *filp, struct kobject *kobj, 1211 struct bin_attribute *bin_attr, 1212 char *buf, loff_t off, size_t count) 1213 { 1214 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1215 void __iomem *rom; 1216 size_t size; 1217 1218 if (!pdev->rom_attr_enabled) 1219 return -EINVAL; 1220 1221 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1222 if (!rom || !size) 1223 return -EIO; 1224 1225 if (off >= size) 1226 count = 0; 1227 else { 1228 if (off + count > size) 1229 count = size - off; 1230 1231 memcpy_fromio(buf, rom + off, count); 1232 } 1233 pci_unmap_rom(pdev, rom); 1234 1235 return count; 1236 } 1237 1238 static struct bin_attribute pci_config_attr = { 1239 .attr = { 1240 .name = "config", 1241 .mode = S_IRUGO | S_IWUSR, 1242 }, 1243 .size = PCI_CFG_SPACE_SIZE, 1244 .read = pci_read_config, 1245 .write = pci_write_config, 1246 }; 1247 1248 static struct bin_attribute pcie_config_attr = { 1249 .attr = { 1250 .name = "config", 1251 .mode = S_IRUGO | S_IWUSR, 1252 }, 1253 .size = PCI_CFG_SPACE_EXP_SIZE, 1254 .read = pci_read_config, 1255 .write = pci_write_config, 1256 }; 1257 1258 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1259 { 1260 return 0; 1261 } 1262 1263 static ssize_t reset_store(struct device *dev, 1264 struct device_attribute *attr, const char *buf, 1265 size_t count) 1266 { 1267 struct pci_dev *pdev = to_pci_dev(dev); 1268 unsigned long val; 1269 ssize_t result = kstrtoul(buf, 0, &val); 1270 1271 if (result < 0) 1272 return result; 1273 1274 if (val != 1) 1275 return -EINVAL; 1276 1277 result = pci_reset_function(pdev); 1278 if (result < 0) 1279 return result; 1280 1281 return count; 1282 } 1283 1284 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1285 1286 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1287 { 1288 int retval; 1289 struct bin_attribute *attr; 1290 1291 /* If the device has VPD, try to expose it in sysfs. */ 1292 if (dev->vpd) { 1293 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1294 if (!attr) 1295 return -ENOMEM; 1296 1297 sysfs_bin_attr_init(attr); 1298 attr->size = dev->vpd->len; 1299 attr->attr.name = "vpd"; 1300 attr->attr.mode = S_IRUSR | S_IWUSR; 1301 attr->read = read_vpd_attr; 1302 attr->write = write_vpd_attr; 1303 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1304 if (retval) { 1305 kfree(attr); 1306 return retval; 1307 } 1308 dev->vpd->attr = attr; 1309 } 1310 1311 /* Active State Power Management */ 1312 pcie_aspm_create_sysfs_dev_files(dev); 1313 1314 if (!pci_probe_reset_function(dev)) { 1315 retval = device_create_file(&dev->dev, &reset_attr); 1316 if (retval) 1317 goto error; 1318 dev->reset_fn = 1; 1319 } 1320 return 0; 1321 1322 error: 1323 pcie_aspm_remove_sysfs_dev_files(dev); 1324 if (dev->vpd && dev->vpd->attr) { 1325 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1326 kfree(dev->vpd->attr); 1327 } 1328 1329 return retval; 1330 } 1331 1332 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1333 { 1334 int retval; 1335 int rom_size = 0; 1336 struct bin_attribute *attr; 1337 1338 if (!sysfs_initialized) 1339 return -EACCES; 1340 1341 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1342 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1343 else 1344 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1345 if (retval) 1346 goto err; 1347 1348 retval = pci_create_resource_files(pdev); 1349 if (retval) 1350 goto err_config_file; 1351 1352 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1353 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1354 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1355 rom_size = 0x20000; 1356 1357 /* If the device has a ROM, try to expose it in sysfs. */ 1358 if (rom_size) { 1359 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1360 if (!attr) { 1361 retval = -ENOMEM; 1362 goto err_resource_files; 1363 } 1364 sysfs_bin_attr_init(attr); 1365 attr->size = rom_size; 1366 attr->attr.name = "rom"; 1367 attr->attr.mode = S_IRUSR | S_IWUSR; 1368 attr->read = pci_read_rom; 1369 attr->write = pci_write_rom; 1370 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1371 if (retval) { 1372 kfree(attr); 1373 goto err_resource_files; 1374 } 1375 pdev->rom_attr = attr; 1376 } 1377 1378 /* add platform-specific attributes */ 1379 retval = pcibios_add_platform_entries(pdev); 1380 if (retval) 1381 goto err_rom_file; 1382 1383 /* add sysfs entries for various capabilities */ 1384 retval = pci_create_capabilities_sysfs(pdev); 1385 if (retval) 1386 goto err_rom_file; 1387 1388 pci_create_firmware_label_files(pdev); 1389 1390 return 0; 1391 1392 err_rom_file: 1393 if (rom_size) { 1394 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1395 kfree(pdev->rom_attr); 1396 pdev->rom_attr = NULL; 1397 } 1398 err_resource_files: 1399 pci_remove_resource_files(pdev); 1400 err_config_file: 1401 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1402 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1403 else 1404 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1405 err: 1406 return retval; 1407 } 1408 1409 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1410 { 1411 if (dev->vpd && dev->vpd->attr) { 1412 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1413 kfree(dev->vpd->attr); 1414 } 1415 1416 pcie_aspm_remove_sysfs_dev_files(dev); 1417 if (dev->reset_fn) { 1418 device_remove_file(&dev->dev, &reset_attr); 1419 dev->reset_fn = 0; 1420 } 1421 } 1422 1423 /** 1424 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1425 * @pdev: device whose entries we should free 1426 * 1427 * Cleanup when @pdev is removed from sysfs. 1428 */ 1429 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1430 { 1431 int rom_size = 0; 1432 1433 if (!sysfs_initialized) 1434 return; 1435 1436 pci_remove_capabilities_sysfs(pdev); 1437 1438 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1439 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1440 else 1441 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1442 1443 pci_remove_resource_files(pdev); 1444 1445 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1446 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1447 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1448 rom_size = 0x20000; 1449 1450 if (rom_size && pdev->rom_attr) { 1451 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1452 kfree(pdev->rom_attr); 1453 } 1454 1455 pci_remove_firmware_label_files(pdev); 1456 1457 } 1458 1459 static int __init pci_sysfs_init(void) 1460 { 1461 struct pci_dev *pdev = NULL; 1462 int retval; 1463 1464 sysfs_initialized = 1; 1465 for_each_pci_dev(pdev) { 1466 retval = pci_create_sysfs_dev_files(pdev); 1467 if (retval) { 1468 pci_dev_put(pdev); 1469 return retval; 1470 } 1471 } 1472 1473 return 0; 1474 } 1475 1476 late_initcall(pci_sysfs_init); 1477 1478 static struct attribute *pci_dev_dev_attrs[] = { 1479 &vga_attr.attr, 1480 NULL, 1481 }; 1482 1483 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1484 struct attribute *a, int n) 1485 { 1486 struct device *dev = container_of(kobj, struct device, kobj); 1487 struct pci_dev *pdev = to_pci_dev(dev); 1488 1489 if (a == &vga_attr.attr) 1490 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1491 return 0; 1492 1493 return a->mode; 1494 } 1495 1496 static struct attribute *pci_dev_hp_attrs[] = { 1497 &dev_remove_attr.attr, 1498 &dev_rescan_attr.attr, 1499 NULL, 1500 }; 1501 1502 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1503 struct attribute *a, int n) 1504 { 1505 struct device *dev = container_of(kobj, struct device, kobj); 1506 struct pci_dev *pdev = to_pci_dev(dev); 1507 1508 if (pdev->is_virtfn) 1509 return 0; 1510 1511 return a->mode; 1512 } 1513 1514 static struct attribute_group pci_dev_hp_attr_group = { 1515 .attrs = pci_dev_hp_attrs, 1516 .is_visible = pci_dev_hp_attrs_are_visible, 1517 }; 1518 1519 #ifdef CONFIG_PCI_IOV 1520 static struct attribute *sriov_dev_attrs[] = { 1521 &sriov_totalvfs_attr.attr, 1522 &sriov_numvfs_attr.attr, 1523 NULL, 1524 }; 1525 1526 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1527 struct attribute *a, int n) 1528 { 1529 struct device *dev = container_of(kobj, struct device, kobj); 1530 1531 if (!dev_is_pf(dev)) 1532 return 0; 1533 1534 return a->mode; 1535 } 1536 1537 static struct attribute_group sriov_dev_attr_group = { 1538 .attrs = sriov_dev_attrs, 1539 .is_visible = sriov_attrs_are_visible, 1540 }; 1541 #endif /* CONFIG_PCI_IOV */ 1542 1543 static struct attribute_group pci_dev_attr_group = { 1544 .attrs = pci_dev_dev_attrs, 1545 .is_visible = pci_dev_attrs_are_visible, 1546 }; 1547 1548 static const struct attribute_group *pci_dev_attr_groups[] = { 1549 &pci_dev_attr_group, 1550 &pci_dev_hp_attr_group, 1551 #ifdef CONFIG_PCI_IOV 1552 &sriov_dev_attr_group, 1553 #endif 1554 NULL, 1555 }; 1556 1557 struct device_type pci_dev_type = { 1558 .groups = pci_dev_attr_groups, 1559 }; 1560