1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/pci/pci-sysfs.c 4 * 5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 6 * (C) Copyright 2002-2004 IBM Corp. 7 * (C) Copyright 2003 Matthew Wilcox 8 * (C) Copyright 2003 Hewlett-Packard 9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 11 * 12 * File attributes for PCI devices 13 * 14 * Modeled after usb's driverfs.c 15 * 16 */ 17 18 19 #include <linux/kernel.h> 20 #include <linux/sched.h> 21 #include <linux/pci.h> 22 #include <linux/stat.h> 23 #include <linux/export.h> 24 #include <linux/topology.h> 25 #include <linux/mm.h> 26 #include <linux/fs.h> 27 #include <linux/capability.h> 28 #include <linux/security.h> 29 #include <linux/pci-aspm.h> 30 #include <linux/slab.h> 31 #include <linux/vgaarb.h> 32 #include <linux/pm_runtime.h> 33 #include <linux/of.h> 34 #include "pci.h" 35 36 static int sysfs_initialized; /* = 0 */ 37 38 /* show configuration fields */ 39 #define pci_config_attr(field, format_string) \ 40 static ssize_t \ 41 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 42 { \ 43 struct pci_dev *pdev; \ 44 \ 45 pdev = to_pci_dev(dev); \ 46 return sprintf(buf, format_string, pdev->field); \ 47 } \ 48 static DEVICE_ATTR_RO(field) 49 50 pci_config_attr(vendor, "0x%04x\n"); 51 pci_config_attr(device, "0x%04x\n"); 52 pci_config_attr(subsystem_vendor, "0x%04x\n"); 53 pci_config_attr(subsystem_device, "0x%04x\n"); 54 pci_config_attr(revision, "0x%02x\n"); 55 pci_config_attr(class, "0x%06x\n"); 56 pci_config_attr(irq, "%u\n"); 57 58 static ssize_t broken_parity_status_show(struct device *dev, 59 struct device_attribute *attr, 60 char *buf) 61 { 62 struct pci_dev *pdev = to_pci_dev(dev); 63 return sprintf(buf, "%u\n", pdev->broken_parity_status); 64 } 65 66 static ssize_t broken_parity_status_store(struct device *dev, 67 struct device_attribute *attr, 68 const char *buf, size_t count) 69 { 70 struct pci_dev *pdev = to_pci_dev(dev); 71 unsigned long val; 72 73 if (kstrtoul(buf, 0, &val) < 0) 74 return -EINVAL; 75 76 pdev->broken_parity_status = !!val; 77 78 return count; 79 } 80 static DEVICE_ATTR_RW(broken_parity_status); 81 82 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 83 struct device_attribute *attr, char *buf) 84 { 85 const struct cpumask *mask; 86 87 #ifdef CONFIG_NUMA 88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 89 cpumask_of_node(dev_to_node(dev)); 90 #else 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 92 #endif 93 return cpumap_print_to_pagebuf(list, buf, mask); 94 } 95 96 static ssize_t local_cpus_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 return pci_dev_show_local_cpu(dev, false, attr, buf); 100 } 101 static DEVICE_ATTR_RO(local_cpus); 102 103 static ssize_t local_cpulist_show(struct device *dev, 104 struct device_attribute *attr, char *buf) 105 { 106 return pci_dev_show_local_cpu(dev, true, attr, buf); 107 } 108 static DEVICE_ATTR_RO(local_cpulist); 109 110 /* 111 * PCI Bus Class Devices 112 */ 113 static ssize_t cpuaffinity_show(struct device *dev, 114 struct device_attribute *attr, char *buf) 115 { 116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 117 118 return cpumap_print_to_pagebuf(false, buf, cpumask); 119 } 120 static DEVICE_ATTR_RO(cpuaffinity); 121 122 static ssize_t cpulistaffinity_show(struct device *dev, 123 struct device_attribute *attr, char *buf) 124 { 125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 127 return cpumap_print_to_pagebuf(true, buf, cpumask); 128 } 129 static DEVICE_ATTR_RO(cpulistaffinity); 130 131 /* show resources */ 132 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 133 char *buf) 134 { 135 struct pci_dev *pci_dev = to_pci_dev(dev); 136 char *str = buf; 137 int i; 138 int max; 139 resource_size_t start, end; 140 141 if (pci_dev->subordinate) 142 max = DEVICE_COUNT_RESOURCE; 143 else 144 max = PCI_BRIDGE_RESOURCES; 145 146 for (i = 0; i < max; i++) { 147 struct resource *res = &pci_dev->resource[i]; 148 pci_resource_to_user(pci_dev, i, res, &start, &end); 149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 150 (unsigned long long)start, 151 (unsigned long long)end, 152 (unsigned long long)res->flags); 153 } 154 return (str - buf); 155 } 156 static DEVICE_ATTR_RO(resource); 157 158 static ssize_t max_link_speed_show(struct device *dev, 159 struct device_attribute *attr, char *buf) 160 { 161 struct pci_dev *pci_dev = to_pci_dev(dev); 162 u32 linkcap; 163 int err; 164 const char *speed; 165 166 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 167 if (err) 168 return -EINVAL; 169 170 switch (linkcap & PCI_EXP_LNKCAP_SLS) { 171 case PCI_EXP_LNKCAP_SLS_8_0GB: 172 speed = "8 GT/s"; 173 break; 174 case PCI_EXP_LNKCAP_SLS_5_0GB: 175 speed = "5 GT/s"; 176 break; 177 case PCI_EXP_LNKCAP_SLS_2_5GB: 178 speed = "2.5 GT/s"; 179 break; 180 default: 181 speed = "Unknown speed"; 182 } 183 184 return sprintf(buf, "%s\n", speed); 185 } 186 static DEVICE_ATTR_RO(max_link_speed); 187 188 static ssize_t max_link_width_show(struct device *dev, 189 struct device_attribute *attr, char *buf) 190 { 191 struct pci_dev *pci_dev = to_pci_dev(dev); 192 u32 linkcap; 193 int err; 194 195 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 196 if (err) 197 return -EINVAL; 198 199 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4); 200 } 201 static DEVICE_ATTR_RO(max_link_width); 202 203 static ssize_t current_link_speed_show(struct device *dev, 204 struct device_attribute *attr, char *buf) 205 { 206 struct pci_dev *pci_dev = to_pci_dev(dev); 207 u16 linkstat; 208 int err; 209 const char *speed; 210 211 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 212 if (err) 213 return -EINVAL; 214 215 switch (linkstat & PCI_EXP_LNKSTA_CLS) { 216 case PCI_EXP_LNKSTA_CLS_8_0GB: 217 speed = "8 GT/s"; 218 break; 219 case PCI_EXP_LNKSTA_CLS_5_0GB: 220 speed = "5 GT/s"; 221 break; 222 case PCI_EXP_LNKSTA_CLS_2_5GB: 223 speed = "2.5 GT/s"; 224 break; 225 default: 226 speed = "Unknown speed"; 227 } 228 229 return sprintf(buf, "%s\n", speed); 230 } 231 static DEVICE_ATTR_RO(current_link_speed); 232 233 static ssize_t current_link_width_show(struct device *dev, 234 struct device_attribute *attr, char *buf) 235 { 236 struct pci_dev *pci_dev = to_pci_dev(dev); 237 u16 linkstat; 238 int err; 239 240 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 241 if (err) 242 return -EINVAL; 243 244 return sprintf(buf, "%u\n", 245 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 246 } 247 static DEVICE_ATTR_RO(current_link_width); 248 249 static ssize_t secondary_bus_number_show(struct device *dev, 250 struct device_attribute *attr, 251 char *buf) 252 { 253 struct pci_dev *pci_dev = to_pci_dev(dev); 254 u8 sec_bus; 255 int err; 256 257 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 258 if (err) 259 return -EINVAL; 260 261 return sprintf(buf, "%u\n", sec_bus); 262 } 263 static DEVICE_ATTR_RO(secondary_bus_number); 264 265 static ssize_t subordinate_bus_number_show(struct device *dev, 266 struct device_attribute *attr, 267 char *buf) 268 { 269 struct pci_dev *pci_dev = to_pci_dev(dev); 270 u8 sub_bus; 271 int err; 272 273 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 274 if (err) 275 return -EINVAL; 276 277 return sprintf(buf, "%u\n", sub_bus); 278 } 279 static DEVICE_ATTR_RO(subordinate_bus_number); 280 281 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 282 char *buf) 283 { 284 struct pci_dev *pci_dev = to_pci_dev(dev); 285 286 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 287 pci_dev->vendor, pci_dev->device, 288 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 289 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 290 (u8)(pci_dev->class)); 291 } 292 static DEVICE_ATTR_RO(modalias); 293 294 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 295 const char *buf, size_t count) 296 { 297 struct pci_dev *pdev = to_pci_dev(dev); 298 unsigned long val; 299 ssize_t result = kstrtoul(buf, 0, &val); 300 301 if (result < 0) 302 return result; 303 304 /* this can crash the machine when done on the "wrong" device */ 305 if (!capable(CAP_SYS_ADMIN)) 306 return -EPERM; 307 308 if (!val) { 309 if (pci_is_enabled(pdev)) 310 pci_disable_device(pdev); 311 else 312 result = -EIO; 313 } else 314 result = pci_enable_device(pdev); 315 316 return result < 0 ? result : count; 317 } 318 319 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 320 char *buf) 321 { 322 struct pci_dev *pdev; 323 324 pdev = to_pci_dev(dev); 325 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 326 } 327 static DEVICE_ATTR_RW(enable); 328 329 #ifdef CONFIG_NUMA 330 static ssize_t numa_node_store(struct device *dev, 331 struct device_attribute *attr, const char *buf, 332 size_t count) 333 { 334 struct pci_dev *pdev = to_pci_dev(dev); 335 int node, ret; 336 337 if (!capable(CAP_SYS_ADMIN)) 338 return -EPERM; 339 340 ret = kstrtoint(buf, 0, &node); 341 if (ret) 342 return ret; 343 344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 345 return -EINVAL; 346 347 if (node != NUMA_NO_NODE && !node_online(node)) 348 return -EINVAL; 349 350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 351 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 352 node); 353 354 dev->numa_node = node; 355 return count; 356 } 357 358 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 359 char *buf) 360 { 361 return sprintf(buf, "%d\n", dev->numa_node); 362 } 363 static DEVICE_ATTR_RW(numa_node); 364 #endif 365 366 static ssize_t dma_mask_bits_show(struct device *dev, 367 struct device_attribute *attr, char *buf) 368 { 369 struct pci_dev *pdev = to_pci_dev(dev); 370 371 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 372 } 373 static DEVICE_ATTR_RO(dma_mask_bits); 374 375 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 376 struct device_attribute *attr, 377 char *buf) 378 { 379 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 380 } 381 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 382 383 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 384 char *buf) 385 { 386 struct pci_dev *pdev = to_pci_dev(dev); 387 struct pci_bus *subordinate = pdev->subordinate; 388 389 return sprintf(buf, "%u\n", subordinate ? 390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 391 : !pdev->no_msi); 392 } 393 394 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 395 const char *buf, size_t count) 396 { 397 struct pci_dev *pdev = to_pci_dev(dev); 398 struct pci_bus *subordinate = pdev->subordinate; 399 unsigned long val; 400 401 if (kstrtoul(buf, 0, &val) < 0) 402 return -EINVAL; 403 404 if (!capable(CAP_SYS_ADMIN)) 405 return -EPERM; 406 407 /* 408 * "no_msi" and "bus_flags" only affect what happens when a driver 409 * requests MSI or MSI-X. They don't affect any drivers that have 410 * already requested MSI or MSI-X. 411 */ 412 if (!subordinate) { 413 pdev->no_msi = !val; 414 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n", 415 val ? "allowed" : "disallowed"); 416 return count; 417 } 418 419 if (val) 420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 421 else 422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 423 424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 425 val ? "allowed" : "disallowed"); 426 return count; 427 } 428 static DEVICE_ATTR_RW(msi_bus); 429 430 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 431 size_t count) 432 { 433 unsigned long val; 434 struct pci_bus *b = NULL; 435 436 if (kstrtoul(buf, 0, &val) < 0) 437 return -EINVAL; 438 439 if (val) { 440 pci_lock_rescan_remove(); 441 while ((b = pci_find_next_bus(b)) != NULL) 442 pci_rescan_bus(b); 443 pci_unlock_rescan_remove(); 444 } 445 return count; 446 } 447 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 448 449 static struct attribute *pci_bus_attrs[] = { 450 &bus_attr_rescan.attr, 451 NULL, 452 }; 453 454 static const struct attribute_group pci_bus_group = { 455 .attrs = pci_bus_attrs, 456 }; 457 458 const struct attribute_group *pci_bus_groups[] = { 459 &pci_bus_group, 460 NULL, 461 }; 462 463 static ssize_t dev_rescan_store(struct device *dev, 464 struct device_attribute *attr, const char *buf, 465 size_t count) 466 { 467 unsigned long val; 468 struct pci_dev *pdev = to_pci_dev(dev); 469 470 if (kstrtoul(buf, 0, &val) < 0) 471 return -EINVAL; 472 473 if (val) { 474 pci_lock_rescan_remove(); 475 pci_rescan_bus(pdev->bus); 476 pci_unlock_rescan_remove(); 477 } 478 return count; 479 } 480 static struct device_attribute dev_rescan_attr = __ATTR(rescan, 481 (S_IWUSR|S_IWGRP), 482 NULL, dev_rescan_store); 483 484 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 485 const char *buf, size_t count) 486 { 487 unsigned long val; 488 489 if (kstrtoul(buf, 0, &val) < 0) 490 return -EINVAL; 491 492 if (val && device_remove_file_self(dev, attr)) 493 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 494 return count; 495 } 496 static struct device_attribute dev_remove_attr = __ATTR(remove, 497 (S_IWUSR|S_IWGRP), 498 NULL, remove_store); 499 500 static ssize_t dev_bus_rescan_store(struct device *dev, 501 struct device_attribute *attr, 502 const char *buf, size_t count) 503 { 504 unsigned long val; 505 struct pci_bus *bus = to_pci_bus(dev); 506 507 if (kstrtoul(buf, 0, &val) < 0) 508 return -EINVAL; 509 510 if (val) { 511 pci_lock_rescan_remove(); 512 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 513 pci_rescan_bus_bridge_resize(bus->self); 514 else 515 pci_rescan_bus(bus); 516 pci_unlock_rescan_remove(); 517 } 518 return count; 519 } 520 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 521 522 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 523 static ssize_t d3cold_allowed_store(struct device *dev, 524 struct device_attribute *attr, 525 const char *buf, size_t count) 526 { 527 struct pci_dev *pdev = to_pci_dev(dev); 528 unsigned long val; 529 530 if (kstrtoul(buf, 0, &val) < 0) 531 return -EINVAL; 532 533 pdev->d3cold_allowed = !!val; 534 if (pdev->d3cold_allowed) 535 pci_d3cold_enable(pdev); 536 else 537 pci_d3cold_disable(pdev); 538 539 pm_runtime_resume(dev); 540 541 return count; 542 } 543 544 static ssize_t d3cold_allowed_show(struct device *dev, 545 struct device_attribute *attr, char *buf) 546 { 547 struct pci_dev *pdev = to_pci_dev(dev); 548 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 549 } 550 static DEVICE_ATTR_RW(d3cold_allowed); 551 #endif 552 553 #ifdef CONFIG_OF 554 static ssize_t devspec_show(struct device *dev, 555 struct device_attribute *attr, char *buf) 556 { 557 struct pci_dev *pdev = to_pci_dev(dev); 558 struct device_node *np = pci_device_to_OF_node(pdev); 559 560 if (np == NULL) 561 return 0; 562 return sprintf(buf, "%pOF", np); 563 } 564 static DEVICE_ATTR_RO(devspec); 565 #endif 566 567 #ifdef CONFIG_PCI_IOV 568 static ssize_t sriov_totalvfs_show(struct device *dev, 569 struct device_attribute *attr, 570 char *buf) 571 { 572 struct pci_dev *pdev = to_pci_dev(dev); 573 574 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 575 } 576 577 578 static ssize_t sriov_numvfs_show(struct device *dev, 579 struct device_attribute *attr, 580 char *buf) 581 { 582 struct pci_dev *pdev = to_pci_dev(dev); 583 584 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 585 } 586 587 /* 588 * num_vfs > 0; number of VFs to enable 589 * num_vfs = 0; disable all VFs 590 * 591 * Note: SRIOV spec doesn't allow partial VF 592 * disable, so it's all or none. 593 */ 594 static ssize_t sriov_numvfs_store(struct device *dev, 595 struct device_attribute *attr, 596 const char *buf, size_t count) 597 { 598 struct pci_dev *pdev = to_pci_dev(dev); 599 int ret; 600 u16 num_vfs; 601 602 ret = kstrtou16(buf, 0, &num_vfs); 603 if (ret < 0) 604 return ret; 605 606 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 607 return -ERANGE; 608 609 device_lock(&pdev->dev); 610 611 if (num_vfs == pdev->sriov->num_VFs) 612 goto exit; 613 614 /* is PF driver loaded w/callback */ 615 if (!pdev->driver || !pdev->driver->sriov_configure) { 616 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); 617 ret = -ENOENT; 618 goto exit; 619 } 620 621 if (num_vfs == 0) { 622 /* disable VFs */ 623 ret = pdev->driver->sriov_configure(pdev, 0); 624 goto exit; 625 } 626 627 /* enable VFs */ 628 if (pdev->sriov->num_VFs) { 629 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", 630 pdev->sriov->num_VFs, num_vfs); 631 ret = -EBUSY; 632 goto exit; 633 } 634 635 ret = pdev->driver->sriov_configure(pdev, num_vfs); 636 if (ret < 0) 637 goto exit; 638 639 if (ret != num_vfs) 640 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", 641 num_vfs, ret); 642 643 exit: 644 device_unlock(&pdev->dev); 645 646 if (ret < 0) 647 return ret; 648 649 return count; 650 } 651 652 static ssize_t sriov_drivers_autoprobe_show(struct device *dev, 653 struct device_attribute *attr, 654 char *buf) 655 { 656 struct pci_dev *pdev = to_pci_dev(dev); 657 658 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); 659 } 660 661 static ssize_t sriov_drivers_autoprobe_store(struct device *dev, 662 struct device_attribute *attr, 663 const char *buf, size_t count) 664 { 665 struct pci_dev *pdev = to_pci_dev(dev); 666 bool drivers_autoprobe; 667 668 if (kstrtobool(buf, &drivers_autoprobe) < 0) 669 return -EINVAL; 670 671 pdev->sriov->drivers_autoprobe = drivers_autoprobe; 672 673 return count; 674 } 675 676 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 677 static struct device_attribute sriov_numvfs_attr = 678 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 679 sriov_numvfs_show, sriov_numvfs_store); 680 static struct device_attribute sriov_drivers_autoprobe_attr = 681 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP), 682 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store); 683 #endif /* CONFIG_PCI_IOV */ 684 685 static ssize_t driver_override_store(struct device *dev, 686 struct device_attribute *attr, 687 const char *buf, size_t count) 688 { 689 struct pci_dev *pdev = to_pci_dev(dev); 690 char *driver_override, *old, *cp; 691 692 /* We need to keep extra room for a newline */ 693 if (count >= (PAGE_SIZE - 1)) 694 return -EINVAL; 695 696 driver_override = kstrndup(buf, count, GFP_KERNEL); 697 if (!driver_override) 698 return -ENOMEM; 699 700 cp = strchr(driver_override, '\n'); 701 if (cp) 702 *cp = '\0'; 703 704 device_lock(dev); 705 old = pdev->driver_override; 706 if (strlen(driver_override)) { 707 pdev->driver_override = driver_override; 708 } else { 709 kfree(driver_override); 710 pdev->driver_override = NULL; 711 } 712 device_unlock(dev); 713 714 kfree(old); 715 716 return count; 717 } 718 719 static ssize_t driver_override_show(struct device *dev, 720 struct device_attribute *attr, char *buf) 721 { 722 struct pci_dev *pdev = to_pci_dev(dev); 723 ssize_t len; 724 725 device_lock(dev); 726 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 727 device_unlock(dev); 728 return len; 729 } 730 static DEVICE_ATTR_RW(driver_override); 731 732 static struct attribute *pci_dev_attrs[] = { 733 &dev_attr_resource.attr, 734 &dev_attr_vendor.attr, 735 &dev_attr_device.attr, 736 &dev_attr_subsystem_vendor.attr, 737 &dev_attr_subsystem_device.attr, 738 &dev_attr_revision.attr, 739 &dev_attr_class.attr, 740 &dev_attr_irq.attr, 741 &dev_attr_local_cpus.attr, 742 &dev_attr_local_cpulist.attr, 743 &dev_attr_modalias.attr, 744 #ifdef CONFIG_NUMA 745 &dev_attr_numa_node.attr, 746 #endif 747 &dev_attr_dma_mask_bits.attr, 748 &dev_attr_consistent_dma_mask_bits.attr, 749 &dev_attr_enable.attr, 750 &dev_attr_broken_parity_status.attr, 751 &dev_attr_msi_bus.attr, 752 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 753 &dev_attr_d3cold_allowed.attr, 754 #endif 755 #ifdef CONFIG_OF 756 &dev_attr_devspec.attr, 757 #endif 758 &dev_attr_driver_override.attr, 759 NULL, 760 }; 761 762 static struct attribute *pci_bridge_attrs[] = { 763 &dev_attr_subordinate_bus_number.attr, 764 &dev_attr_secondary_bus_number.attr, 765 NULL, 766 }; 767 768 static struct attribute *pcie_dev_attrs[] = { 769 &dev_attr_current_link_speed.attr, 770 &dev_attr_current_link_width.attr, 771 &dev_attr_max_link_width.attr, 772 &dev_attr_max_link_speed.attr, 773 NULL, 774 }; 775 776 static struct attribute *pcibus_attrs[] = { 777 &dev_attr_rescan.attr, 778 &dev_attr_cpuaffinity.attr, 779 &dev_attr_cpulistaffinity.attr, 780 NULL, 781 }; 782 783 static const struct attribute_group pcibus_group = { 784 .attrs = pcibus_attrs, 785 }; 786 787 const struct attribute_group *pcibus_groups[] = { 788 &pcibus_group, 789 NULL, 790 }; 791 792 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 793 char *buf) 794 { 795 struct pci_dev *pdev = to_pci_dev(dev); 796 struct pci_dev *vga_dev = vga_default_device(); 797 798 if (vga_dev) 799 return sprintf(buf, "%u\n", (pdev == vga_dev)); 800 801 return sprintf(buf, "%u\n", 802 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 803 IORESOURCE_ROM_SHADOW)); 804 } 805 static struct device_attribute vga_attr = __ATTR_RO(boot_vga); 806 807 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 808 struct bin_attribute *bin_attr, char *buf, 809 loff_t off, size_t count) 810 { 811 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 812 unsigned int size = 64; 813 loff_t init_off = off; 814 u8 *data = (u8 *) buf; 815 816 /* Several chips lock up trying to read undefined config space */ 817 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 818 size = dev->cfg_size; 819 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 820 size = 128; 821 822 if (off > size) 823 return 0; 824 if (off + count > size) { 825 size -= off; 826 count = size; 827 } else { 828 size = count; 829 } 830 831 pci_config_pm_runtime_get(dev); 832 833 if ((off & 1) && size) { 834 u8 val; 835 pci_user_read_config_byte(dev, off, &val); 836 data[off - init_off] = val; 837 off++; 838 size--; 839 } 840 841 if ((off & 3) && size > 2) { 842 u16 val; 843 pci_user_read_config_word(dev, off, &val); 844 data[off - init_off] = val & 0xff; 845 data[off - init_off + 1] = (val >> 8) & 0xff; 846 off += 2; 847 size -= 2; 848 } 849 850 while (size > 3) { 851 u32 val; 852 pci_user_read_config_dword(dev, off, &val); 853 data[off - init_off] = val & 0xff; 854 data[off - init_off + 1] = (val >> 8) & 0xff; 855 data[off - init_off + 2] = (val >> 16) & 0xff; 856 data[off - init_off + 3] = (val >> 24) & 0xff; 857 off += 4; 858 size -= 4; 859 } 860 861 if (size >= 2) { 862 u16 val; 863 pci_user_read_config_word(dev, off, &val); 864 data[off - init_off] = val & 0xff; 865 data[off - init_off + 1] = (val >> 8) & 0xff; 866 off += 2; 867 size -= 2; 868 } 869 870 if (size > 0) { 871 u8 val; 872 pci_user_read_config_byte(dev, off, &val); 873 data[off - init_off] = val; 874 off++; 875 --size; 876 } 877 878 pci_config_pm_runtime_put(dev); 879 880 return count; 881 } 882 883 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 884 struct bin_attribute *bin_attr, char *buf, 885 loff_t off, size_t count) 886 { 887 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 888 unsigned int size = count; 889 loff_t init_off = off; 890 u8 *data = (u8 *) buf; 891 892 if (off > dev->cfg_size) 893 return 0; 894 if (off + count > dev->cfg_size) { 895 size = dev->cfg_size - off; 896 count = size; 897 } 898 899 pci_config_pm_runtime_get(dev); 900 901 if ((off & 1) && size) { 902 pci_user_write_config_byte(dev, off, data[off - init_off]); 903 off++; 904 size--; 905 } 906 907 if ((off & 3) && size > 2) { 908 u16 val = data[off - init_off]; 909 val |= (u16) data[off - init_off + 1] << 8; 910 pci_user_write_config_word(dev, off, val); 911 off += 2; 912 size -= 2; 913 } 914 915 while (size > 3) { 916 u32 val = data[off - init_off]; 917 val |= (u32) data[off - init_off + 1] << 8; 918 val |= (u32) data[off - init_off + 2] << 16; 919 val |= (u32) data[off - init_off + 3] << 24; 920 pci_user_write_config_dword(dev, off, val); 921 off += 4; 922 size -= 4; 923 } 924 925 if (size >= 2) { 926 u16 val = data[off - init_off]; 927 val |= (u16) data[off - init_off + 1] << 8; 928 pci_user_write_config_word(dev, off, val); 929 off += 2; 930 size -= 2; 931 } 932 933 if (size) { 934 pci_user_write_config_byte(dev, off, data[off - init_off]); 935 off++; 936 --size; 937 } 938 939 pci_config_pm_runtime_put(dev); 940 941 return count; 942 } 943 944 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj, 945 struct bin_attribute *bin_attr, char *buf, 946 loff_t off, size_t count) 947 { 948 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 949 950 if (bin_attr->size > 0) { 951 if (off > bin_attr->size) 952 count = 0; 953 else if (count > bin_attr->size - off) 954 count = bin_attr->size - off; 955 } 956 957 return pci_read_vpd(dev, off, count, buf); 958 } 959 960 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj, 961 struct bin_attribute *bin_attr, char *buf, 962 loff_t off, size_t count) 963 { 964 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 965 966 if (bin_attr->size > 0) { 967 if (off > bin_attr->size) 968 count = 0; 969 else if (count > bin_attr->size - off) 970 count = bin_attr->size - off; 971 } 972 973 return pci_write_vpd(dev, off, count, buf); 974 } 975 976 #ifdef HAVE_PCI_LEGACY 977 /** 978 * pci_read_legacy_io - read byte(s) from legacy I/O port space 979 * @filp: open sysfs file 980 * @kobj: kobject corresponding to file to read from 981 * @bin_attr: struct bin_attribute for this file 982 * @buf: buffer to store results 983 * @off: offset into legacy I/O port space 984 * @count: number of bytes to read 985 * 986 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 987 * callback routine (pci_legacy_read). 988 */ 989 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 990 struct bin_attribute *bin_attr, char *buf, 991 loff_t off, size_t count) 992 { 993 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 994 995 /* Only support 1, 2 or 4 byte accesses */ 996 if (count != 1 && count != 2 && count != 4) 997 return -EINVAL; 998 999 return pci_legacy_read(bus, off, (u32 *)buf, count); 1000 } 1001 1002 /** 1003 * pci_write_legacy_io - write byte(s) to legacy I/O port space 1004 * @filp: open sysfs file 1005 * @kobj: kobject corresponding to file to read from 1006 * @bin_attr: struct bin_attribute for this file 1007 * @buf: buffer containing value to be written 1008 * @off: offset into legacy I/O port space 1009 * @count: number of bytes to write 1010 * 1011 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1012 * callback routine (pci_legacy_write). 1013 */ 1014 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 1015 struct bin_attribute *bin_attr, char *buf, 1016 loff_t off, size_t count) 1017 { 1018 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1019 1020 /* Only support 1, 2 or 4 byte accesses */ 1021 if (count != 1 && count != 2 && count != 4) 1022 return -EINVAL; 1023 1024 return pci_legacy_write(bus, off, *(u32 *)buf, count); 1025 } 1026 1027 /** 1028 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 1029 * @filp: open sysfs file 1030 * @kobj: kobject corresponding to device to be mapped 1031 * @attr: struct bin_attribute for this file 1032 * @vma: struct vm_area_struct passed to mmap 1033 * 1034 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 1035 * legacy memory space (first meg of bus space) into application virtual 1036 * memory space. 1037 */ 1038 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 1039 struct bin_attribute *attr, 1040 struct vm_area_struct *vma) 1041 { 1042 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1043 1044 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 1045 } 1046 1047 /** 1048 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 1049 * @filp: open sysfs file 1050 * @kobj: kobject corresponding to device to be mapped 1051 * @attr: struct bin_attribute for this file 1052 * @vma: struct vm_area_struct passed to mmap 1053 * 1054 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 1055 * legacy IO space (first meg of bus space) into application virtual 1056 * memory space. Returns -ENOSYS if the operation isn't supported 1057 */ 1058 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 1059 struct bin_attribute *attr, 1060 struct vm_area_struct *vma) 1061 { 1062 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1063 1064 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 1065 } 1066 1067 /** 1068 * pci_adjust_legacy_attr - adjustment of legacy file attributes 1069 * @b: bus to create files under 1070 * @mmap_type: I/O port or memory 1071 * 1072 * Stub implementation. Can be overridden by arch if necessary. 1073 */ 1074 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 1075 enum pci_mmap_state mmap_type) 1076 { 1077 } 1078 1079 /** 1080 * pci_create_legacy_files - create legacy I/O port and memory files 1081 * @b: bus to create files under 1082 * 1083 * Some platforms allow access to legacy I/O port and ISA memory space on 1084 * a per-bus basis. This routine creates the files and ties them into 1085 * their associated read, write and mmap files from pci-sysfs.c 1086 * 1087 * On error unwind, but don't propagate the error to the caller 1088 * as it is ok to set up the PCI bus without these files. 1089 */ 1090 void pci_create_legacy_files(struct pci_bus *b) 1091 { 1092 int error; 1093 1094 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 1095 GFP_ATOMIC); 1096 if (!b->legacy_io) 1097 goto kzalloc_err; 1098 1099 sysfs_bin_attr_init(b->legacy_io); 1100 b->legacy_io->attr.name = "legacy_io"; 1101 b->legacy_io->size = 0xffff; 1102 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 1103 b->legacy_io->read = pci_read_legacy_io; 1104 b->legacy_io->write = pci_write_legacy_io; 1105 b->legacy_io->mmap = pci_mmap_legacy_io; 1106 pci_adjust_legacy_attr(b, pci_mmap_io); 1107 error = device_create_bin_file(&b->dev, b->legacy_io); 1108 if (error) 1109 goto legacy_io_err; 1110 1111 /* Allocated above after the legacy_io struct */ 1112 b->legacy_mem = b->legacy_io + 1; 1113 sysfs_bin_attr_init(b->legacy_mem); 1114 b->legacy_mem->attr.name = "legacy_mem"; 1115 b->legacy_mem->size = 1024*1024; 1116 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 1117 b->legacy_mem->mmap = pci_mmap_legacy_mem; 1118 pci_adjust_legacy_attr(b, pci_mmap_mem); 1119 error = device_create_bin_file(&b->dev, b->legacy_mem); 1120 if (error) 1121 goto legacy_mem_err; 1122 1123 return; 1124 1125 legacy_mem_err: 1126 device_remove_bin_file(&b->dev, b->legacy_io); 1127 legacy_io_err: 1128 kfree(b->legacy_io); 1129 b->legacy_io = NULL; 1130 kzalloc_err: 1131 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n"); 1132 return; 1133 } 1134 1135 void pci_remove_legacy_files(struct pci_bus *b) 1136 { 1137 if (b->legacy_io) { 1138 device_remove_bin_file(&b->dev, b->legacy_io); 1139 device_remove_bin_file(&b->dev, b->legacy_mem); 1140 kfree(b->legacy_io); /* both are allocated here */ 1141 } 1142 } 1143 #endif /* HAVE_PCI_LEGACY */ 1144 1145 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1146 1147 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1148 enum pci_mmap_api mmap_api) 1149 { 1150 unsigned long nr, start, size; 1151 resource_size_t pci_start = 0, pci_end; 1152 1153 if (pci_resource_len(pdev, resno) == 0) 1154 return 0; 1155 nr = vma_pages(vma); 1156 start = vma->vm_pgoff; 1157 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1158 if (mmap_api == PCI_MMAP_PROCFS) { 1159 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1160 &pci_start, &pci_end); 1161 pci_start >>= PAGE_SHIFT; 1162 } 1163 if (start >= pci_start && start < pci_start + size && 1164 start + nr <= pci_start + size) 1165 return 1; 1166 return 0; 1167 } 1168 1169 /** 1170 * pci_mmap_resource - map a PCI resource into user memory space 1171 * @kobj: kobject for mapping 1172 * @attr: struct bin_attribute for the file being mapped 1173 * @vma: struct vm_area_struct passed into the mmap 1174 * @write_combine: 1 for write_combine mapping 1175 * 1176 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1177 */ 1178 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1179 struct vm_area_struct *vma, int write_combine) 1180 { 1181 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1182 int bar = (unsigned long)attr->private; 1183 enum pci_mmap_state mmap_type; 1184 struct resource *res = &pdev->resource[bar]; 1185 1186 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1187 return -EINVAL; 1188 1189 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) { 1190 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 1191 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 1192 pci_name(pdev), bar, 1193 (u64)pci_resource_start(pdev, bar), 1194 (u64)pci_resource_len(pdev, bar)); 1195 return -EINVAL; 1196 } 1197 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1198 1199 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1200 } 1201 1202 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1203 struct bin_attribute *attr, 1204 struct vm_area_struct *vma) 1205 { 1206 return pci_mmap_resource(kobj, attr, vma, 0); 1207 } 1208 1209 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1210 struct bin_attribute *attr, 1211 struct vm_area_struct *vma) 1212 { 1213 return pci_mmap_resource(kobj, attr, vma, 1); 1214 } 1215 1216 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1217 struct bin_attribute *attr, char *buf, 1218 loff_t off, size_t count, bool write) 1219 { 1220 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1221 int bar = (unsigned long)attr->private; 1222 unsigned long port = off; 1223 1224 port += pci_resource_start(pdev, bar); 1225 1226 if (port > pci_resource_end(pdev, bar)) 1227 return 0; 1228 1229 if (port + count - 1 > pci_resource_end(pdev, bar)) 1230 return -EINVAL; 1231 1232 switch (count) { 1233 case 1: 1234 if (write) 1235 outb(*(u8 *)buf, port); 1236 else 1237 *(u8 *)buf = inb(port); 1238 return 1; 1239 case 2: 1240 if (write) 1241 outw(*(u16 *)buf, port); 1242 else 1243 *(u16 *)buf = inw(port); 1244 return 2; 1245 case 4: 1246 if (write) 1247 outl(*(u32 *)buf, port); 1248 else 1249 *(u32 *)buf = inl(port); 1250 return 4; 1251 } 1252 return -EINVAL; 1253 } 1254 1255 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1256 struct bin_attribute *attr, char *buf, 1257 loff_t off, size_t count) 1258 { 1259 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1260 } 1261 1262 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1263 struct bin_attribute *attr, char *buf, 1264 loff_t off, size_t count) 1265 { 1266 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1267 } 1268 1269 /** 1270 * pci_remove_resource_files - cleanup resource files 1271 * @pdev: dev to cleanup 1272 * 1273 * If we created resource files for @pdev, remove them from sysfs and 1274 * free their resources. 1275 */ 1276 static void pci_remove_resource_files(struct pci_dev *pdev) 1277 { 1278 int i; 1279 1280 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1281 struct bin_attribute *res_attr; 1282 1283 res_attr = pdev->res_attr[i]; 1284 if (res_attr) { 1285 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1286 kfree(res_attr); 1287 } 1288 1289 res_attr = pdev->res_attr_wc[i]; 1290 if (res_attr) { 1291 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1292 kfree(res_attr); 1293 } 1294 } 1295 } 1296 1297 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1298 { 1299 /* allocate attribute structure, piggyback attribute name */ 1300 int name_len = write_combine ? 13 : 10; 1301 struct bin_attribute *res_attr; 1302 char *res_attr_name; 1303 int retval; 1304 1305 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1306 if (!res_attr) 1307 return -ENOMEM; 1308 1309 res_attr_name = (char *)(res_attr + 1); 1310 1311 sysfs_bin_attr_init(res_attr); 1312 if (write_combine) { 1313 pdev->res_attr_wc[num] = res_attr; 1314 sprintf(res_attr_name, "resource%d_wc", num); 1315 res_attr->mmap = pci_mmap_resource_wc; 1316 } else { 1317 pdev->res_attr[num] = res_attr; 1318 sprintf(res_attr_name, "resource%d", num); 1319 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1320 res_attr->read = pci_read_resource_io; 1321 res_attr->write = pci_write_resource_io; 1322 if (arch_can_pci_mmap_io()) 1323 res_attr->mmap = pci_mmap_resource_uc; 1324 } else { 1325 res_attr->mmap = pci_mmap_resource_uc; 1326 } 1327 } 1328 res_attr->attr.name = res_attr_name; 1329 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1330 res_attr->size = pci_resource_len(pdev, num); 1331 res_attr->private = (void *)(unsigned long)num; 1332 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1333 if (retval) 1334 kfree(res_attr); 1335 1336 return retval; 1337 } 1338 1339 /** 1340 * pci_create_resource_files - create resource files in sysfs for @dev 1341 * @pdev: dev in question 1342 * 1343 * Walk the resources in @pdev creating files for each resource available. 1344 */ 1345 static int pci_create_resource_files(struct pci_dev *pdev) 1346 { 1347 int i; 1348 int retval; 1349 1350 /* Expose the PCI resources from this device as files */ 1351 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1352 1353 /* skip empty resources */ 1354 if (!pci_resource_len(pdev, i)) 1355 continue; 1356 1357 retval = pci_create_attr(pdev, i, 0); 1358 /* for prefetchable resources, create a WC mappable file */ 1359 if (!retval && arch_can_pci_mmap_wc() && 1360 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1361 retval = pci_create_attr(pdev, i, 1); 1362 if (retval) { 1363 pci_remove_resource_files(pdev); 1364 return retval; 1365 } 1366 } 1367 return 0; 1368 } 1369 #else /* !HAVE_PCI_MMAP */ 1370 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1371 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1372 #endif /* HAVE_PCI_MMAP */ 1373 1374 /** 1375 * pci_write_rom - used to enable access to the PCI ROM display 1376 * @filp: sysfs file 1377 * @kobj: kernel object handle 1378 * @bin_attr: struct bin_attribute for this file 1379 * @buf: user input 1380 * @off: file offset 1381 * @count: number of byte in input 1382 * 1383 * writing anything except 0 enables it 1384 */ 1385 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1386 struct bin_attribute *bin_attr, char *buf, 1387 loff_t off, size_t count) 1388 { 1389 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1390 1391 if ((off == 0) && (*buf == '0') && (count == 2)) 1392 pdev->rom_attr_enabled = 0; 1393 else 1394 pdev->rom_attr_enabled = 1; 1395 1396 return count; 1397 } 1398 1399 /** 1400 * pci_read_rom - read a PCI ROM 1401 * @filp: sysfs file 1402 * @kobj: kernel object handle 1403 * @bin_attr: struct bin_attribute for this file 1404 * @buf: where to put the data we read from the ROM 1405 * @off: file offset 1406 * @count: number of bytes to read 1407 * 1408 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1409 * device corresponding to @kobj. 1410 */ 1411 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1412 struct bin_attribute *bin_attr, char *buf, 1413 loff_t off, size_t count) 1414 { 1415 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1416 void __iomem *rom; 1417 size_t size; 1418 1419 if (!pdev->rom_attr_enabled) 1420 return -EINVAL; 1421 1422 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1423 if (!rom || !size) 1424 return -EIO; 1425 1426 if (off >= size) 1427 count = 0; 1428 else { 1429 if (off + count > size) 1430 count = size - off; 1431 1432 memcpy_fromio(buf, rom + off, count); 1433 } 1434 pci_unmap_rom(pdev, rom); 1435 1436 return count; 1437 } 1438 1439 static const struct bin_attribute pci_config_attr = { 1440 .attr = { 1441 .name = "config", 1442 .mode = S_IRUGO | S_IWUSR, 1443 }, 1444 .size = PCI_CFG_SPACE_SIZE, 1445 .read = pci_read_config, 1446 .write = pci_write_config, 1447 }; 1448 1449 static const struct bin_attribute pcie_config_attr = { 1450 .attr = { 1451 .name = "config", 1452 .mode = S_IRUGO | S_IWUSR, 1453 }, 1454 .size = PCI_CFG_SPACE_EXP_SIZE, 1455 .read = pci_read_config, 1456 .write = pci_write_config, 1457 }; 1458 1459 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1460 const char *buf, size_t count) 1461 { 1462 struct pci_dev *pdev = to_pci_dev(dev); 1463 unsigned long val; 1464 ssize_t result = kstrtoul(buf, 0, &val); 1465 1466 if (result < 0) 1467 return result; 1468 1469 if (val != 1) 1470 return -EINVAL; 1471 1472 result = pci_reset_function(pdev); 1473 if (result < 0) 1474 return result; 1475 1476 return count; 1477 } 1478 1479 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1480 1481 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1482 { 1483 int retval; 1484 struct bin_attribute *attr; 1485 1486 /* If the device has VPD, try to expose it in sysfs. */ 1487 if (dev->vpd) { 1488 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1489 if (!attr) 1490 return -ENOMEM; 1491 1492 sysfs_bin_attr_init(attr); 1493 attr->size = 0; 1494 attr->attr.name = "vpd"; 1495 attr->attr.mode = S_IRUSR | S_IWUSR; 1496 attr->read = read_vpd_attr; 1497 attr->write = write_vpd_attr; 1498 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1499 if (retval) { 1500 kfree(attr); 1501 return retval; 1502 } 1503 dev->vpd->attr = attr; 1504 } 1505 1506 /* Active State Power Management */ 1507 pcie_aspm_create_sysfs_dev_files(dev); 1508 1509 if (!pci_probe_reset_function(dev)) { 1510 retval = device_create_file(&dev->dev, &reset_attr); 1511 if (retval) 1512 goto error; 1513 dev->reset_fn = 1; 1514 } 1515 return 0; 1516 1517 error: 1518 pcie_aspm_remove_sysfs_dev_files(dev); 1519 if (dev->vpd && dev->vpd->attr) { 1520 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1521 kfree(dev->vpd->attr); 1522 } 1523 1524 return retval; 1525 } 1526 1527 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1528 { 1529 int retval; 1530 int rom_size; 1531 struct bin_attribute *attr; 1532 1533 if (!sysfs_initialized) 1534 return -EACCES; 1535 1536 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1537 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1538 else 1539 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1540 if (retval) 1541 goto err; 1542 1543 retval = pci_create_resource_files(pdev); 1544 if (retval) 1545 goto err_config_file; 1546 1547 /* If the device has a ROM, try to expose it in sysfs. */ 1548 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1549 if (rom_size) { 1550 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1551 if (!attr) { 1552 retval = -ENOMEM; 1553 goto err_resource_files; 1554 } 1555 sysfs_bin_attr_init(attr); 1556 attr->size = rom_size; 1557 attr->attr.name = "rom"; 1558 attr->attr.mode = S_IRUSR | S_IWUSR; 1559 attr->read = pci_read_rom; 1560 attr->write = pci_write_rom; 1561 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1562 if (retval) { 1563 kfree(attr); 1564 goto err_resource_files; 1565 } 1566 pdev->rom_attr = attr; 1567 } 1568 1569 /* add sysfs entries for various capabilities */ 1570 retval = pci_create_capabilities_sysfs(pdev); 1571 if (retval) 1572 goto err_rom_file; 1573 1574 pci_create_firmware_label_files(pdev); 1575 1576 return 0; 1577 1578 err_rom_file: 1579 if (pdev->rom_attr) { 1580 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1581 kfree(pdev->rom_attr); 1582 pdev->rom_attr = NULL; 1583 } 1584 err_resource_files: 1585 pci_remove_resource_files(pdev); 1586 err_config_file: 1587 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1588 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1589 else 1590 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1591 err: 1592 return retval; 1593 } 1594 1595 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1596 { 1597 if (dev->vpd && dev->vpd->attr) { 1598 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1599 kfree(dev->vpd->attr); 1600 } 1601 1602 pcie_aspm_remove_sysfs_dev_files(dev); 1603 if (dev->reset_fn) { 1604 device_remove_file(&dev->dev, &reset_attr); 1605 dev->reset_fn = 0; 1606 } 1607 } 1608 1609 /** 1610 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1611 * @pdev: device whose entries we should free 1612 * 1613 * Cleanup when @pdev is removed from sysfs. 1614 */ 1615 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1616 { 1617 if (!sysfs_initialized) 1618 return; 1619 1620 pci_remove_capabilities_sysfs(pdev); 1621 1622 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1623 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1624 else 1625 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1626 1627 pci_remove_resource_files(pdev); 1628 1629 if (pdev->rom_attr) { 1630 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1631 kfree(pdev->rom_attr); 1632 pdev->rom_attr = NULL; 1633 } 1634 1635 pci_remove_firmware_label_files(pdev); 1636 } 1637 1638 static int __init pci_sysfs_init(void) 1639 { 1640 struct pci_dev *pdev = NULL; 1641 int retval; 1642 1643 sysfs_initialized = 1; 1644 for_each_pci_dev(pdev) { 1645 retval = pci_create_sysfs_dev_files(pdev); 1646 if (retval) { 1647 pci_dev_put(pdev); 1648 return retval; 1649 } 1650 } 1651 1652 return 0; 1653 } 1654 late_initcall(pci_sysfs_init); 1655 1656 static struct attribute *pci_dev_dev_attrs[] = { 1657 &vga_attr.attr, 1658 NULL, 1659 }; 1660 1661 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1662 struct attribute *a, int n) 1663 { 1664 struct device *dev = kobj_to_dev(kobj); 1665 struct pci_dev *pdev = to_pci_dev(dev); 1666 1667 if (a == &vga_attr.attr) 1668 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1669 return 0; 1670 1671 return a->mode; 1672 } 1673 1674 static struct attribute *pci_dev_hp_attrs[] = { 1675 &dev_remove_attr.attr, 1676 &dev_rescan_attr.attr, 1677 NULL, 1678 }; 1679 1680 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1681 struct attribute *a, int n) 1682 { 1683 struct device *dev = kobj_to_dev(kobj); 1684 struct pci_dev *pdev = to_pci_dev(dev); 1685 1686 if (pdev->is_virtfn) 1687 return 0; 1688 1689 return a->mode; 1690 } 1691 1692 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1693 struct attribute *a, int n) 1694 { 1695 struct device *dev = kobj_to_dev(kobj); 1696 struct pci_dev *pdev = to_pci_dev(dev); 1697 1698 if (pci_is_bridge(pdev)) 1699 return a->mode; 1700 1701 return 0; 1702 } 1703 1704 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1705 struct attribute *a, int n) 1706 { 1707 struct device *dev = kobj_to_dev(kobj); 1708 struct pci_dev *pdev = to_pci_dev(dev); 1709 1710 if (pci_is_pcie(pdev)) 1711 return a->mode; 1712 1713 return 0; 1714 } 1715 1716 static const struct attribute_group pci_dev_group = { 1717 .attrs = pci_dev_attrs, 1718 }; 1719 1720 const struct attribute_group *pci_dev_groups[] = { 1721 &pci_dev_group, 1722 NULL, 1723 }; 1724 1725 static const struct attribute_group pci_bridge_group = { 1726 .attrs = pci_bridge_attrs, 1727 }; 1728 1729 const struct attribute_group *pci_bridge_groups[] = { 1730 &pci_bridge_group, 1731 NULL, 1732 }; 1733 1734 static const struct attribute_group pcie_dev_group = { 1735 .attrs = pcie_dev_attrs, 1736 }; 1737 1738 const struct attribute_group *pcie_dev_groups[] = { 1739 &pcie_dev_group, 1740 NULL, 1741 }; 1742 1743 static const struct attribute_group pci_dev_hp_attr_group = { 1744 .attrs = pci_dev_hp_attrs, 1745 .is_visible = pci_dev_hp_attrs_are_visible, 1746 }; 1747 1748 #ifdef CONFIG_PCI_IOV 1749 static struct attribute *sriov_dev_attrs[] = { 1750 &sriov_totalvfs_attr.attr, 1751 &sriov_numvfs_attr.attr, 1752 &sriov_drivers_autoprobe_attr.attr, 1753 NULL, 1754 }; 1755 1756 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1757 struct attribute *a, int n) 1758 { 1759 struct device *dev = kobj_to_dev(kobj); 1760 1761 if (!dev_is_pf(dev)) 1762 return 0; 1763 1764 return a->mode; 1765 } 1766 1767 static const struct attribute_group sriov_dev_attr_group = { 1768 .attrs = sriov_dev_attrs, 1769 .is_visible = sriov_attrs_are_visible, 1770 }; 1771 #endif /* CONFIG_PCI_IOV */ 1772 1773 static const struct attribute_group pci_dev_attr_group = { 1774 .attrs = pci_dev_dev_attrs, 1775 .is_visible = pci_dev_attrs_are_visible, 1776 }; 1777 1778 static const struct attribute_group pci_bridge_attr_group = { 1779 .attrs = pci_bridge_attrs, 1780 .is_visible = pci_bridge_attrs_are_visible, 1781 }; 1782 1783 static const struct attribute_group pcie_dev_attr_group = { 1784 .attrs = pcie_dev_attrs, 1785 .is_visible = pcie_dev_attrs_are_visible, 1786 }; 1787 1788 static const struct attribute_group *pci_dev_attr_groups[] = { 1789 &pci_dev_attr_group, 1790 &pci_dev_hp_attr_group, 1791 #ifdef CONFIG_PCI_IOV 1792 &sriov_dev_attr_group, 1793 #endif 1794 &pci_bridge_attr_group, 1795 &pcie_dev_attr_group, 1796 NULL, 1797 }; 1798 1799 struct device_type pci_dev_type = { 1800 .groups = pci_dev_attr_groups, 1801 }; 1802