1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 #include <linux/bitfield.h> 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/msi.h> 30 #include <linux/of.h> 31 #include <linux/aperture.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev(dev); \ 44 return sysfs_emit(buf, format_string, pdev->field); \ 45 } \ 46 static DEVICE_ATTR_RO(field) 47 48 pci_config_attr(vendor, "0x%04x\n"); 49 pci_config_attr(device, "0x%04x\n"); 50 pci_config_attr(subsystem_vendor, "0x%04x\n"); 51 pci_config_attr(subsystem_device, "0x%04x\n"); 52 pci_config_attr(revision, "0x%02x\n"); 53 pci_config_attr(class, "0x%06x\n"); 54 55 static ssize_t irq_show(struct device *dev, 56 struct device_attribute *attr, 57 char *buf) 58 { 59 struct pci_dev *pdev = to_pci_dev(dev); 60 61 #ifdef CONFIG_PCI_MSI 62 /* 63 * For MSI, show the first MSI IRQ; for all other cases including 64 * MSI-X, show the legacy INTx IRQ. 65 */ 66 if (pdev->msi_enabled) 67 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0)); 68 #endif 69 70 return sysfs_emit(buf, "%u\n", pdev->irq); 71 } 72 static DEVICE_ATTR_RO(irq); 73 74 static ssize_t broken_parity_status_show(struct device *dev, 75 struct device_attribute *attr, 76 char *buf) 77 { 78 struct pci_dev *pdev = to_pci_dev(dev); 79 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status); 80 } 81 82 static ssize_t broken_parity_status_store(struct device *dev, 83 struct device_attribute *attr, 84 const char *buf, size_t count) 85 { 86 struct pci_dev *pdev = to_pci_dev(dev); 87 unsigned long val; 88 89 if (kstrtoul(buf, 0, &val) < 0) 90 return -EINVAL; 91 92 pdev->broken_parity_status = !!val; 93 94 return count; 95 } 96 static DEVICE_ATTR_RW(broken_parity_status); 97 98 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 99 struct device_attribute *attr, char *buf) 100 { 101 const struct cpumask *mask; 102 103 #ifdef CONFIG_NUMA 104 if (dev_to_node(dev) == NUMA_NO_NODE) 105 mask = cpu_online_mask; 106 else 107 mask = cpumask_of_node(dev_to_node(dev)); 108 #else 109 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 110 #endif 111 return cpumap_print_to_pagebuf(list, buf, mask); 112 } 113 114 static ssize_t local_cpus_show(struct device *dev, 115 struct device_attribute *attr, char *buf) 116 { 117 return pci_dev_show_local_cpu(dev, false, attr, buf); 118 } 119 static DEVICE_ATTR_RO(local_cpus); 120 121 static ssize_t local_cpulist_show(struct device *dev, 122 struct device_attribute *attr, char *buf) 123 { 124 return pci_dev_show_local_cpu(dev, true, attr, buf); 125 } 126 static DEVICE_ATTR_RO(local_cpulist); 127 128 /* 129 * PCI Bus Class Devices 130 */ 131 static ssize_t cpuaffinity_show(struct device *dev, 132 struct device_attribute *attr, char *buf) 133 { 134 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 135 136 return cpumap_print_to_pagebuf(false, buf, cpumask); 137 } 138 static DEVICE_ATTR_RO(cpuaffinity); 139 140 static ssize_t cpulistaffinity_show(struct device *dev, 141 struct device_attribute *attr, char *buf) 142 { 143 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 144 145 return cpumap_print_to_pagebuf(true, buf, cpumask); 146 } 147 static DEVICE_ATTR_RO(cpulistaffinity); 148 149 static ssize_t power_state_show(struct device *dev, 150 struct device_attribute *attr, char *buf) 151 { 152 struct pci_dev *pdev = to_pci_dev(dev); 153 154 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state)); 155 } 156 static DEVICE_ATTR_RO(power_state); 157 158 /* show resources */ 159 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 160 char *buf) 161 { 162 struct pci_dev *pci_dev = to_pci_dev(dev); 163 int i; 164 int max; 165 resource_size_t start, end; 166 size_t len = 0; 167 168 if (pci_dev->subordinate) 169 max = DEVICE_COUNT_RESOURCE; 170 else 171 max = PCI_BRIDGE_RESOURCES; 172 173 for (i = 0; i < max; i++) { 174 struct resource *res = &pci_dev->resource[i]; 175 pci_resource_to_user(pci_dev, i, res, &start, &end); 176 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n", 177 (unsigned long long)start, 178 (unsigned long long)end, 179 (unsigned long long)res->flags); 180 } 181 return len; 182 } 183 static DEVICE_ATTR_RO(resource); 184 185 static ssize_t max_link_speed_show(struct device *dev, 186 struct device_attribute *attr, char *buf) 187 { 188 struct pci_dev *pdev = to_pci_dev(dev); 189 190 return sysfs_emit(buf, "%s\n", 191 pci_speed_string(pcie_get_speed_cap(pdev))); 192 } 193 static DEVICE_ATTR_RO(max_link_speed); 194 195 static ssize_t max_link_width_show(struct device *dev, 196 struct device_attribute *attr, char *buf) 197 { 198 struct pci_dev *pdev = to_pci_dev(dev); 199 200 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); 201 } 202 static DEVICE_ATTR_RO(max_link_width); 203 204 static ssize_t current_link_speed_show(struct device *dev, 205 struct device_attribute *attr, char *buf) 206 { 207 struct pci_dev *pci_dev = to_pci_dev(dev); 208 u16 linkstat; 209 int err; 210 enum pci_bus_speed speed; 211 212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 213 if (err) 214 return -EINVAL; 215 216 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 217 218 return sysfs_emit(buf, "%s\n", pci_speed_string(speed)); 219 } 220 static DEVICE_ATTR_RO(current_link_speed); 221 222 static ssize_t current_link_width_show(struct device *dev, 223 struct device_attribute *attr, char *buf) 224 { 225 struct pci_dev *pci_dev = to_pci_dev(dev); 226 u16 linkstat; 227 int err; 228 229 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 230 if (err) 231 return -EINVAL; 232 233 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat)); 234 } 235 static DEVICE_ATTR_RO(current_link_width); 236 237 static ssize_t secondary_bus_number_show(struct device *dev, 238 struct device_attribute *attr, 239 char *buf) 240 { 241 struct pci_dev *pci_dev = to_pci_dev(dev); 242 u8 sec_bus; 243 int err; 244 245 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 246 if (err) 247 return -EINVAL; 248 249 return sysfs_emit(buf, "%u\n", sec_bus); 250 } 251 static DEVICE_ATTR_RO(secondary_bus_number); 252 253 static ssize_t subordinate_bus_number_show(struct device *dev, 254 struct device_attribute *attr, 255 char *buf) 256 { 257 struct pci_dev *pci_dev = to_pci_dev(dev); 258 u8 sub_bus; 259 int err; 260 261 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 262 if (err) 263 return -EINVAL; 264 265 return sysfs_emit(buf, "%u\n", sub_bus); 266 } 267 static DEVICE_ATTR_RO(subordinate_bus_number); 268 269 static ssize_t ari_enabled_show(struct device *dev, 270 struct device_attribute *attr, 271 char *buf) 272 { 273 struct pci_dev *pci_dev = to_pci_dev(dev); 274 275 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 276 } 277 static DEVICE_ATTR_RO(ari_enabled); 278 279 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 280 char *buf) 281 { 282 struct pci_dev *pci_dev = to_pci_dev(dev); 283 284 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 285 pci_dev->vendor, pci_dev->device, 286 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 287 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 288 (u8)(pci_dev->class)); 289 } 290 static DEVICE_ATTR_RO(modalias); 291 292 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 293 const char *buf, size_t count) 294 { 295 struct pci_dev *pdev = to_pci_dev(dev); 296 unsigned long val; 297 ssize_t result = 0; 298 299 /* this can crash the machine when done on the "wrong" device */ 300 if (!capable(CAP_SYS_ADMIN)) 301 return -EPERM; 302 303 if (kstrtoul(buf, 0, &val) < 0) 304 return -EINVAL; 305 306 device_lock(dev); 307 if (dev->driver) 308 result = -EBUSY; 309 else if (val) 310 result = pci_enable_device(pdev); 311 else if (pci_is_enabled(pdev)) 312 pci_disable_device(pdev); 313 else 314 result = -EIO; 315 device_unlock(dev); 316 317 return result < 0 ? result : count; 318 } 319 320 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 321 char *buf) 322 { 323 struct pci_dev *pdev; 324 325 pdev = to_pci_dev(dev); 326 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 327 } 328 static DEVICE_ATTR_RW(enable); 329 330 #ifdef CONFIG_NUMA 331 static ssize_t numa_node_store(struct device *dev, 332 struct device_attribute *attr, const char *buf, 333 size_t count) 334 { 335 struct pci_dev *pdev = to_pci_dev(dev); 336 int node; 337 338 if (!capable(CAP_SYS_ADMIN)) 339 return -EPERM; 340 341 if (kstrtoint(buf, 0, &node) < 0) 342 return -EINVAL; 343 344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 345 return -EINVAL; 346 347 if (node != NUMA_NO_NODE && !node_online(node)) 348 return -EINVAL; 349 350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 351 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 352 node); 353 354 dev->numa_node = node; 355 return count; 356 } 357 358 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 359 char *buf) 360 { 361 return sysfs_emit(buf, "%d\n", dev->numa_node); 362 } 363 static DEVICE_ATTR_RW(numa_node); 364 #endif 365 366 static ssize_t dma_mask_bits_show(struct device *dev, 367 struct device_attribute *attr, char *buf) 368 { 369 struct pci_dev *pdev = to_pci_dev(dev); 370 371 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask)); 372 } 373 static DEVICE_ATTR_RO(dma_mask_bits); 374 375 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 376 struct device_attribute *attr, 377 char *buf) 378 { 379 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask)); 380 } 381 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 382 383 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 384 char *buf) 385 { 386 struct pci_dev *pdev = to_pci_dev(dev); 387 struct pci_bus *subordinate = pdev->subordinate; 388 389 return sysfs_emit(buf, "%u\n", subordinate ? 390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 391 : !pdev->no_msi); 392 } 393 394 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 395 const char *buf, size_t count) 396 { 397 struct pci_dev *pdev = to_pci_dev(dev); 398 struct pci_bus *subordinate = pdev->subordinate; 399 unsigned long val; 400 401 if (!capable(CAP_SYS_ADMIN)) 402 return -EPERM; 403 404 if (kstrtoul(buf, 0, &val) < 0) 405 return -EINVAL; 406 407 /* 408 * "no_msi" and "bus_flags" only affect what happens when a driver 409 * requests MSI or MSI-X. They don't affect any drivers that have 410 * already requested MSI or MSI-X. 411 */ 412 if (!subordinate) { 413 pdev->no_msi = !val; 414 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 415 val ? "allowed" : "disallowed"); 416 return count; 417 } 418 419 if (val) 420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 421 else 422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 423 424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 425 val ? "allowed" : "disallowed"); 426 return count; 427 } 428 static DEVICE_ATTR_RW(msi_bus); 429 430 static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count) 431 { 432 unsigned long val; 433 struct pci_bus *b = NULL; 434 435 if (kstrtoul(buf, 0, &val) < 0) 436 return -EINVAL; 437 438 if (val) { 439 pci_lock_rescan_remove(); 440 while ((b = pci_find_next_bus(b)) != NULL) 441 pci_rescan_bus(b); 442 pci_unlock_rescan_remove(); 443 } 444 return count; 445 } 446 static BUS_ATTR_WO(rescan); 447 448 static struct attribute *pci_bus_attrs[] = { 449 &bus_attr_rescan.attr, 450 NULL, 451 }; 452 453 static const struct attribute_group pci_bus_group = { 454 .attrs = pci_bus_attrs, 455 }; 456 457 const struct attribute_group *pci_bus_groups[] = { 458 &pci_bus_group, 459 NULL, 460 }; 461 462 static ssize_t dev_rescan_store(struct device *dev, 463 struct device_attribute *attr, const char *buf, 464 size_t count) 465 { 466 unsigned long val; 467 struct pci_dev *pdev = to_pci_dev(dev); 468 469 if (kstrtoul(buf, 0, &val) < 0) 470 return -EINVAL; 471 472 if (val) { 473 pci_lock_rescan_remove(); 474 pci_rescan_bus(pdev->bus); 475 pci_unlock_rescan_remove(); 476 } 477 return count; 478 } 479 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 480 dev_rescan_store); 481 482 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 483 const char *buf, size_t count) 484 { 485 unsigned long val; 486 487 if (kstrtoul(buf, 0, &val) < 0) 488 return -EINVAL; 489 490 if (val && device_remove_file_self(dev, attr)) 491 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 492 return count; 493 } 494 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 495 remove_store); 496 497 static ssize_t bus_rescan_store(struct device *dev, 498 struct device_attribute *attr, 499 const char *buf, size_t count) 500 { 501 unsigned long val; 502 struct pci_bus *bus = to_pci_bus(dev); 503 504 if (kstrtoul(buf, 0, &val) < 0) 505 return -EINVAL; 506 507 if (val) { 508 pci_lock_rescan_remove(); 509 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 510 pci_rescan_bus_bridge_resize(bus->self); 511 else 512 pci_rescan_bus(bus); 513 pci_unlock_rescan_remove(); 514 } 515 return count; 516 } 517 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 518 bus_rescan_store); 519 520 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 521 static ssize_t d3cold_allowed_store(struct device *dev, 522 struct device_attribute *attr, 523 const char *buf, size_t count) 524 { 525 struct pci_dev *pdev = to_pci_dev(dev); 526 unsigned long val; 527 528 if (kstrtoul(buf, 0, &val) < 0) 529 return -EINVAL; 530 531 pdev->d3cold_allowed = !!val; 532 pci_bridge_d3_update(pdev); 533 534 pm_runtime_resume(dev); 535 536 return count; 537 } 538 539 static ssize_t d3cold_allowed_show(struct device *dev, 540 struct device_attribute *attr, char *buf) 541 { 542 struct pci_dev *pdev = to_pci_dev(dev); 543 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); 544 } 545 static DEVICE_ATTR_RW(d3cold_allowed); 546 #endif 547 548 #ifdef CONFIG_OF 549 static ssize_t devspec_show(struct device *dev, 550 struct device_attribute *attr, char *buf) 551 { 552 struct pci_dev *pdev = to_pci_dev(dev); 553 struct device_node *np = pci_device_to_OF_node(pdev); 554 555 if (np == NULL) 556 return 0; 557 return sysfs_emit(buf, "%pOF\n", np); 558 } 559 static DEVICE_ATTR_RO(devspec); 560 #endif 561 562 static ssize_t driver_override_store(struct device *dev, 563 struct device_attribute *attr, 564 const char *buf, size_t count) 565 { 566 struct pci_dev *pdev = to_pci_dev(dev); 567 int ret; 568 569 ret = driver_set_override(dev, &pdev->driver_override, buf, count); 570 if (ret) 571 return ret; 572 573 return count; 574 } 575 576 static ssize_t driver_override_show(struct device *dev, 577 struct device_attribute *attr, char *buf) 578 { 579 struct pci_dev *pdev = to_pci_dev(dev); 580 ssize_t len; 581 582 device_lock(dev); 583 len = sysfs_emit(buf, "%s\n", pdev->driver_override); 584 device_unlock(dev); 585 return len; 586 } 587 static DEVICE_ATTR_RW(driver_override); 588 589 static struct attribute *pci_dev_attrs[] = { 590 &dev_attr_power_state.attr, 591 &dev_attr_resource.attr, 592 &dev_attr_vendor.attr, 593 &dev_attr_device.attr, 594 &dev_attr_subsystem_vendor.attr, 595 &dev_attr_subsystem_device.attr, 596 &dev_attr_revision.attr, 597 &dev_attr_class.attr, 598 &dev_attr_irq.attr, 599 &dev_attr_local_cpus.attr, 600 &dev_attr_local_cpulist.attr, 601 &dev_attr_modalias.attr, 602 #ifdef CONFIG_NUMA 603 &dev_attr_numa_node.attr, 604 #endif 605 &dev_attr_dma_mask_bits.attr, 606 &dev_attr_consistent_dma_mask_bits.attr, 607 &dev_attr_enable.attr, 608 &dev_attr_broken_parity_status.attr, 609 &dev_attr_msi_bus.attr, 610 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 611 &dev_attr_d3cold_allowed.attr, 612 #endif 613 #ifdef CONFIG_OF 614 &dev_attr_devspec.attr, 615 #endif 616 &dev_attr_driver_override.attr, 617 &dev_attr_ari_enabled.attr, 618 NULL, 619 }; 620 621 static struct attribute *pci_bridge_attrs[] = { 622 &dev_attr_subordinate_bus_number.attr, 623 &dev_attr_secondary_bus_number.attr, 624 NULL, 625 }; 626 627 static struct attribute *pcie_dev_attrs[] = { 628 &dev_attr_current_link_speed.attr, 629 &dev_attr_current_link_width.attr, 630 &dev_attr_max_link_width.attr, 631 &dev_attr_max_link_speed.attr, 632 NULL, 633 }; 634 635 static struct attribute *pcibus_attrs[] = { 636 &dev_attr_bus_rescan.attr, 637 &dev_attr_cpuaffinity.attr, 638 &dev_attr_cpulistaffinity.attr, 639 NULL, 640 }; 641 642 static const struct attribute_group pcibus_group = { 643 .attrs = pcibus_attrs, 644 }; 645 646 const struct attribute_group *pcibus_groups[] = { 647 &pcibus_group, 648 NULL, 649 }; 650 651 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 652 char *buf) 653 { 654 struct pci_dev *pdev = to_pci_dev(dev); 655 struct pci_dev *vga_dev = vga_default_device(); 656 657 if (vga_dev) 658 return sysfs_emit(buf, "%u\n", (pdev == vga_dev)); 659 660 return sysfs_emit(buf, "%u\n", 661 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 662 IORESOURCE_ROM_SHADOW)); 663 } 664 static DEVICE_ATTR_RO(boot_vga); 665 666 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 667 struct bin_attribute *bin_attr, char *buf, 668 loff_t off, size_t count) 669 { 670 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 671 unsigned int size = 64; 672 loff_t init_off = off; 673 u8 *data = (u8 *) buf; 674 675 /* Several chips lock up trying to read undefined config space */ 676 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 677 size = dev->cfg_size; 678 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 679 size = 128; 680 681 if (off > size) 682 return 0; 683 if (off + count > size) { 684 size -= off; 685 count = size; 686 } else { 687 size = count; 688 } 689 690 pci_config_pm_runtime_get(dev); 691 692 if ((off & 1) && size) { 693 u8 val; 694 pci_user_read_config_byte(dev, off, &val); 695 data[off - init_off] = val; 696 off++; 697 size--; 698 } 699 700 if ((off & 3) && size > 2) { 701 u16 val; 702 pci_user_read_config_word(dev, off, &val); 703 data[off - init_off] = val & 0xff; 704 data[off - init_off + 1] = (val >> 8) & 0xff; 705 off += 2; 706 size -= 2; 707 } 708 709 while (size > 3) { 710 u32 val; 711 pci_user_read_config_dword(dev, off, &val); 712 data[off - init_off] = val & 0xff; 713 data[off - init_off + 1] = (val >> 8) & 0xff; 714 data[off - init_off + 2] = (val >> 16) & 0xff; 715 data[off - init_off + 3] = (val >> 24) & 0xff; 716 off += 4; 717 size -= 4; 718 cond_resched(); 719 } 720 721 if (size >= 2) { 722 u16 val; 723 pci_user_read_config_word(dev, off, &val); 724 data[off - init_off] = val & 0xff; 725 data[off - init_off + 1] = (val >> 8) & 0xff; 726 off += 2; 727 size -= 2; 728 } 729 730 if (size > 0) { 731 u8 val; 732 pci_user_read_config_byte(dev, off, &val); 733 data[off - init_off] = val; 734 } 735 736 pci_config_pm_runtime_put(dev); 737 738 return count; 739 } 740 741 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 742 struct bin_attribute *bin_attr, char *buf, 743 loff_t off, size_t count) 744 { 745 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 746 unsigned int size = count; 747 loff_t init_off = off; 748 u8 *data = (u8 *) buf; 749 int ret; 750 751 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 752 if (ret) 753 return ret; 754 755 if (resource_is_exclusive(&dev->driver_exclusive_resource, off, 756 count)) { 757 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx", 758 current->comm, off); 759 add_taint(TAINT_USER, LOCKDEP_STILL_OK); 760 } 761 762 if (off > dev->cfg_size) 763 return 0; 764 if (off + count > dev->cfg_size) { 765 size = dev->cfg_size - off; 766 count = size; 767 } 768 769 pci_config_pm_runtime_get(dev); 770 771 if ((off & 1) && size) { 772 pci_user_write_config_byte(dev, off, data[off - init_off]); 773 off++; 774 size--; 775 } 776 777 if ((off & 3) && size > 2) { 778 u16 val = data[off - init_off]; 779 val |= (u16) data[off - init_off + 1] << 8; 780 pci_user_write_config_word(dev, off, val); 781 off += 2; 782 size -= 2; 783 } 784 785 while (size > 3) { 786 u32 val = data[off - init_off]; 787 val |= (u32) data[off - init_off + 1] << 8; 788 val |= (u32) data[off - init_off + 2] << 16; 789 val |= (u32) data[off - init_off + 3] << 24; 790 pci_user_write_config_dword(dev, off, val); 791 off += 4; 792 size -= 4; 793 } 794 795 if (size >= 2) { 796 u16 val = data[off - init_off]; 797 val |= (u16) data[off - init_off + 1] << 8; 798 pci_user_write_config_word(dev, off, val); 799 off += 2; 800 size -= 2; 801 } 802 803 if (size) 804 pci_user_write_config_byte(dev, off, data[off - init_off]); 805 806 pci_config_pm_runtime_put(dev); 807 808 return count; 809 } 810 static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0); 811 812 static struct bin_attribute *pci_dev_config_attrs[] = { 813 &bin_attr_config, 814 NULL, 815 }; 816 817 static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj, 818 struct bin_attribute *a, int n) 819 { 820 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 821 822 a->size = PCI_CFG_SPACE_SIZE; 823 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 824 a->size = PCI_CFG_SPACE_EXP_SIZE; 825 826 return a->attr.mode; 827 } 828 829 static const struct attribute_group pci_dev_config_attr_group = { 830 .bin_attrs = pci_dev_config_attrs, 831 .is_bin_visible = pci_dev_config_attr_is_visible, 832 }; 833 834 #ifdef HAVE_PCI_LEGACY 835 /** 836 * pci_read_legacy_io - read byte(s) from legacy I/O port space 837 * @filp: open sysfs file 838 * @kobj: kobject corresponding to file to read from 839 * @bin_attr: struct bin_attribute for this file 840 * @buf: buffer to store results 841 * @off: offset into legacy I/O port space 842 * @count: number of bytes to read 843 * 844 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 845 * callback routine (pci_legacy_read). 846 */ 847 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 848 struct bin_attribute *bin_attr, char *buf, 849 loff_t off, size_t count) 850 { 851 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 852 853 /* Only support 1, 2 or 4 byte accesses */ 854 if (count != 1 && count != 2 && count != 4) 855 return -EINVAL; 856 857 return pci_legacy_read(bus, off, (u32 *)buf, count); 858 } 859 860 /** 861 * pci_write_legacy_io - write byte(s) to legacy I/O port space 862 * @filp: open sysfs file 863 * @kobj: kobject corresponding to file to read from 864 * @bin_attr: struct bin_attribute for this file 865 * @buf: buffer containing value to be written 866 * @off: offset into legacy I/O port space 867 * @count: number of bytes to write 868 * 869 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 870 * callback routine (pci_legacy_write). 871 */ 872 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 873 struct bin_attribute *bin_attr, char *buf, 874 loff_t off, size_t count) 875 { 876 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 877 878 /* Only support 1, 2 or 4 byte accesses */ 879 if (count != 1 && count != 2 && count != 4) 880 return -EINVAL; 881 882 return pci_legacy_write(bus, off, *(u32 *)buf, count); 883 } 884 885 /** 886 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 887 * @filp: open sysfs file 888 * @kobj: kobject corresponding to device to be mapped 889 * @attr: struct bin_attribute for this file 890 * @vma: struct vm_area_struct passed to mmap 891 * 892 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 893 * legacy memory space (first meg of bus space) into application virtual 894 * memory space. 895 */ 896 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 897 struct bin_attribute *attr, 898 struct vm_area_struct *vma) 899 { 900 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 901 902 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 903 } 904 905 /** 906 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 907 * @filp: open sysfs file 908 * @kobj: kobject corresponding to device to be mapped 909 * @attr: struct bin_attribute for this file 910 * @vma: struct vm_area_struct passed to mmap 911 * 912 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 913 * legacy IO space (first meg of bus space) into application virtual 914 * memory space. Returns -ENOSYS if the operation isn't supported 915 */ 916 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 917 struct bin_attribute *attr, 918 struct vm_area_struct *vma) 919 { 920 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 921 922 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 923 } 924 925 /** 926 * pci_adjust_legacy_attr - adjustment of legacy file attributes 927 * @b: bus to create files under 928 * @mmap_type: I/O port or memory 929 * 930 * Stub implementation. Can be overridden by arch if necessary. 931 */ 932 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 933 enum pci_mmap_state mmap_type) 934 { 935 } 936 937 /** 938 * pci_create_legacy_files - create legacy I/O port and memory files 939 * @b: bus to create files under 940 * 941 * Some platforms allow access to legacy I/O port and ISA memory space on 942 * a per-bus basis. This routine creates the files and ties them into 943 * their associated read, write and mmap files from pci-sysfs.c 944 * 945 * On error unwind, but don't propagate the error to the caller 946 * as it is ok to set up the PCI bus without these files. 947 */ 948 void pci_create_legacy_files(struct pci_bus *b) 949 { 950 int error; 951 952 if (!sysfs_initialized) 953 return; 954 955 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 956 GFP_ATOMIC); 957 if (!b->legacy_io) 958 goto kzalloc_err; 959 960 sysfs_bin_attr_init(b->legacy_io); 961 b->legacy_io->attr.name = "legacy_io"; 962 b->legacy_io->size = 0xffff; 963 b->legacy_io->attr.mode = 0600; 964 b->legacy_io->read = pci_read_legacy_io; 965 b->legacy_io->write = pci_write_legacy_io; 966 b->legacy_io->mmap = pci_mmap_legacy_io; 967 b->legacy_io->f_mapping = iomem_get_mapping; 968 pci_adjust_legacy_attr(b, pci_mmap_io); 969 error = device_create_bin_file(&b->dev, b->legacy_io); 970 if (error) 971 goto legacy_io_err; 972 973 /* Allocated above after the legacy_io struct */ 974 b->legacy_mem = b->legacy_io + 1; 975 sysfs_bin_attr_init(b->legacy_mem); 976 b->legacy_mem->attr.name = "legacy_mem"; 977 b->legacy_mem->size = 1024*1024; 978 b->legacy_mem->attr.mode = 0600; 979 b->legacy_mem->mmap = pci_mmap_legacy_mem; 980 b->legacy_mem->f_mapping = iomem_get_mapping; 981 pci_adjust_legacy_attr(b, pci_mmap_mem); 982 error = device_create_bin_file(&b->dev, b->legacy_mem); 983 if (error) 984 goto legacy_mem_err; 985 986 return; 987 988 legacy_mem_err: 989 device_remove_bin_file(&b->dev, b->legacy_io); 990 legacy_io_err: 991 kfree(b->legacy_io); 992 b->legacy_io = NULL; 993 kzalloc_err: 994 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 995 } 996 997 void pci_remove_legacy_files(struct pci_bus *b) 998 { 999 if (b->legacy_io) { 1000 device_remove_bin_file(&b->dev, b->legacy_io); 1001 device_remove_bin_file(&b->dev, b->legacy_mem); 1002 kfree(b->legacy_io); /* both are allocated here */ 1003 } 1004 } 1005 #endif /* HAVE_PCI_LEGACY */ 1006 1007 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1008 1009 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1010 enum pci_mmap_api mmap_api) 1011 { 1012 unsigned long nr, start, size; 1013 resource_size_t pci_start = 0, pci_end; 1014 1015 if (pci_resource_len(pdev, resno) == 0) 1016 return 0; 1017 nr = vma_pages(vma); 1018 start = vma->vm_pgoff; 1019 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1020 if (mmap_api == PCI_MMAP_PROCFS) { 1021 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1022 &pci_start, &pci_end); 1023 pci_start >>= PAGE_SHIFT; 1024 } 1025 if (start >= pci_start && start < pci_start + size && 1026 start + nr <= pci_start + size) 1027 return 1; 1028 return 0; 1029 } 1030 1031 /** 1032 * pci_mmap_resource - map a PCI resource into user memory space 1033 * @kobj: kobject for mapping 1034 * @attr: struct bin_attribute for the file being mapped 1035 * @vma: struct vm_area_struct passed into the mmap 1036 * @write_combine: 1 for write_combine mapping 1037 * 1038 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1039 */ 1040 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1041 struct vm_area_struct *vma, int write_combine) 1042 { 1043 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1044 int bar = (unsigned long)attr->private; 1045 enum pci_mmap_state mmap_type; 1046 struct resource *res = &pdev->resource[bar]; 1047 int ret; 1048 1049 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1050 if (ret) 1051 return ret; 1052 1053 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1054 return -EINVAL; 1055 1056 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1057 return -EINVAL; 1058 1059 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1060 1061 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1062 } 1063 1064 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1065 struct bin_attribute *attr, 1066 struct vm_area_struct *vma) 1067 { 1068 return pci_mmap_resource(kobj, attr, vma, 0); 1069 } 1070 1071 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1072 struct bin_attribute *attr, 1073 struct vm_area_struct *vma) 1074 { 1075 return pci_mmap_resource(kobj, attr, vma, 1); 1076 } 1077 1078 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1079 struct bin_attribute *attr, char *buf, 1080 loff_t off, size_t count, bool write) 1081 { 1082 #ifdef CONFIG_HAS_IOPORT 1083 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1084 int bar = (unsigned long)attr->private; 1085 unsigned long port = off; 1086 1087 port += pci_resource_start(pdev, bar); 1088 1089 if (port > pci_resource_end(pdev, bar)) 1090 return 0; 1091 1092 if (port + count - 1 > pci_resource_end(pdev, bar)) 1093 return -EINVAL; 1094 1095 switch (count) { 1096 case 1: 1097 if (write) 1098 outb(*(u8 *)buf, port); 1099 else 1100 *(u8 *)buf = inb(port); 1101 return 1; 1102 case 2: 1103 if (write) 1104 outw(*(u16 *)buf, port); 1105 else 1106 *(u16 *)buf = inw(port); 1107 return 2; 1108 case 4: 1109 if (write) 1110 outl(*(u32 *)buf, port); 1111 else 1112 *(u32 *)buf = inl(port); 1113 return 4; 1114 } 1115 return -EINVAL; 1116 #else 1117 return -ENXIO; 1118 #endif 1119 } 1120 1121 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1122 struct bin_attribute *attr, char *buf, 1123 loff_t off, size_t count) 1124 { 1125 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1126 } 1127 1128 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1129 struct bin_attribute *attr, char *buf, 1130 loff_t off, size_t count) 1131 { 1132 int ret; 1133 1134 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1135 if (ret) 1136 return ret; 1137 1138 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1139 } 1140 1141 /** 1142 * pci_remove_resource_files - cleanup resource files 1143 * @pdev: dev to cleanup 1144 * 1145 * If we created resource files for @pdev, remove them from sysfs and 1146 * free their resources. 1147 */ 1148 static void pci_remove_resource_files(struct pci_dev *pdev) 1149 { 1150 int i; 1151 1152 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1153 struct bin_attribute *res_attr; 1154 1155 res_attr = pdev->res_attr[i]; 1156 if (res_attr) { 1157 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1158 kfree(res_attr); 1159 } 1160 1161 res_attr = pdev->res_attr_wc[i]; 1162 if (res_attr) { 1163 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1164 kfree(res_attr); 1165 } 1166 } 1167 } 1168 1169 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1170 { 1171 /* allocate attribute structure, piggyback attribute name */ 1172 int name_len = write_combine ? 13 : 10; 1173 struct bin_attribute *res_attr; 1174 char *res_attr_name; 1175 int retval; 1176 1177 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1178 if (!res_attr) 1179 return -ENOMEM; 1180 1181 res_attr_name = (char *)(res_attr + 1); 1182 1183 sysfs_bin_attr_init(res_attr); 1184 if (write_combine) { 1185 sprintf(res_attr_name, "resource%d_wc", num); 1186 res_attr->mmap = pci_mmap_resource_wc; 1187 } else { 1188 sprintf(res_attr_name, "resource%d", num); 1189 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1190 res_attr->read = pci_read_resource_io; 1191 res_attr->write = pci_write_resource_io; 1192 if (arch_can_pci_mmap_io()) 1193 res_attr->mmap = pci_mmap_resource_uc; 1194 } else { 1195 res_attr->mmap = pci_mmap_resource_uc; 1196 } 1197 } 1198 if (res_attr->mmap) 1199 res_attr->f_mapping = iomem_get_mapping; 1200 res_attr->attr.name = res_attr_name; 1201 res_attr->attr.mode = 0600; 1202 res_attr->size = pci_resource_len(pdev, num); 1203 res_attr->private = (void *)(unsigned long)num; 1204 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1205 if (retval) { 1206 kfree(res_attr); 1207 return retval; 1208 } 1209 1210 if (write_combine) 1211 pdev->res_attr_wc[num] = res_attr; 1212 else 1213 pdev->res_attr[num] = res_attr; 1214 1215 return 0; 1216 } 1217 1218 /** 1219 * pci_create_resource_files - create resource files in sysfs for @dev 1220 * @pdev: dev in question 1221 * 1222 * Walk the resources in @pdev creating files for each resource available. 1223 */ 1224 static int pci_create_resource_files(struct pci_dev *pdev) 1225 { 1226 int i; 1227 int retval; 1228 1229 /* Expose the PCI resources from this device as files */ 1230 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1231 1232 /* skip empty resources */ 1233 if (!pci_resource_len(pdev, i)) 1234 continue; 1235 1236 retval = pci_create_attr(pdev, i, 0); 1237 /* for prefetchable resources, create a WC mappable file */ 1238 if (!retval && arch_can_pci_mmap_wc() && 1239 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1240 retval = pci_create_attr(pdev, i, 1); 1241 if (retval) { 1242 pci_remove_resource_files(pdev); 1243 return retval; 1244 } 1245 } 1246 return 0; 1247 } 1248 #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ 1249 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1250 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1251 #endif 1252 1253 /** 1254 * pci_write_rom - used to enable access to the PCI ROM display 1255 * @filp: sysfs file 1256 * @kobj: kernel object handle 1257 * @bin_attr: struct bin_attribute for this file 1258 * @buf: user input 1259 * @off: file offset 1260 * @count: number of byte in input 1261 * 1262 * writing anything except 0 enables it 1263 */ 1264 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1265 struct bin_attribute *bin_attr, char *buf, 1266 loff_t off, size_t count) 1267 { 1268 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1269 1270 if ((off == 0) && (*buf == '0') && (count == 2)) 1271 pdev->rom_attr_enabled = 0; 1272 else 1273 pdev->rom_attr_enabled = 1; 1274 1275 return count; 1276 } 1277 1278 /** 1279 * pci_read_rom - read a PCI ROM 1280 * @filp: sysfs file 1281 * @kobj: kernel object handle 1282 * @bin_attr: struct bin_attribute for this file 1283 * @buf: where to put the data we read from the ROM 1284 * @off: file offset 1285 * @count: number of bytes to read 1286 * 1287 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1288 * device corresponding to @kobj. 1289 */ 1290 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1291 struct bin_attribute *bin_attr, char *buf, 1292 loff_t off, size_t count) 1293 { 1294 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1295 void __iomem *rom; 1296 size_t size; 1297 1298 if (!pdev->rom_attr_enabled) 1299 return -EINVAL; 1300 1301 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1302 if (!rom || !size) 1303 return -EIO; 1304 1305 if (off >= size) 1306 count = 0; 1307 else { 1308 if (off + count > size) 1309 count = size - off; 1310 1311 memcpy_fromio(buf, rom + off, count); 1312 } 1313 pci_unmap_rom(pdev, rom); 1314 1315 return count; 1316 } 1317 static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0); 1318 1319 static struct bin_attribute *pci_dev_rom_attrs[] = { 1320 &bin_attr_rom, 1321 NULL, 1322 }; 1323 1324 static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj, 1325 struct bin_attribute *a, int n) 1326 { 1327 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1328 size_t rom_size; 1329 1330 /* If the device has a ROM, try to expose it in sysfs. */ 1331 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1332 if (!rom_size) 1333 return 0; 1334 1335 a->size = rom_size; 1336 1337 return a->attr.mode; 1338 } 1339 1340 static const struct attribute_group pci_dev_rom_attr_group = { 1341 .bin_attrs = pci_dev_rom_attrs, 1342 .is_bin_visible = pci_dev_rom_attr_is_visible, 1343 }; 1344 1345 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1346 const char *buf, size_t count) 1347 { 1348 struct pci_dev *pdev = to_pci_dev(dev); 1349 unsigned long val; 1350 ssize_t result; 1351 1352 if (kstrtoul(buf, 0, &val) < 0) 1353 return -EINVAL; 1354 1355 if (val != 1) 1356 return -EINVAL; 1357 1358 pm_runtime_get_sync(dev); 1359 result = pci_reset_function(pdev); 1360 pm_runtime_put(dev); 1361 if (result < 0) 1362 return result; 1363 1364 return count; 1365 } 1366 static DEVICE_ATTR_WO(reset); 1367 1368 static struct attribute *pci_dev_reset_attrs[] = { 1369 &dev_attr_reset.attr, 1370 NULL, 1371 }; 1372 1373 static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, 1374 struct attribute *a, int n) 1375 { 1376 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1377 1378 if (!pci_reset_supported(pdev)) 1379 return 0; 1380 1381 return a->mode; 1382 } 1383 1384 static const struct attribute_group pci_dev_reset_attr_group = { 1385 .attrs = pci_dev_reset_attrs, 1386 .is_visible = pci_dev_reset_attr_is_visible, 1387 }; 1388 1389 #define pci_dev_resource_resize_attr(n) \ 1390 static ssize_t resource##n##_resize_show(struct device *dev, \ 1391 struct device_attribute *attr, \ 1392 char * buf) \ 1393 { \ 1394 struct pci_dev *pdev = to_pci_dev(dev); \ 1395 ssize_t ret; \ 1396 \ 1397 pci_config_pm_runtime_get(pdev); \ 1398 \ 1399 ret = sysfs_emit(buf, "%016llx\n", \ 1400 (u64)pci_rebar_get_possible_sizes(pdev, n)); \ 1401 \ 1402 pci_config_pm_runtime_put(pdev); \ 1403 \ 1404 return ret; \ 1405 } \ 1406 \ 1407 static ssize_t resource##n##_resize_store(struct device *dev, \ 1408 struct device_attribute *attr,\ 1409 const char *buf, size_t count)\ 1410 { \ 1411 struct pci_dev *pdev = to_pci_dev(dev); \ 1412 unsigned long size, flags; \ 1413 int ret, i; \ 1414 u16 cmd; \ 1415 \ 1416 if (kstrtoul(buf, 0, &size) < 0) \ 1417 return -EINVAL; \ 1418 \ 1419 device_lock(dev); \ 1420 if (dev->driver) { \ 1421 ret = -EBUSY; \ 1422 goto unlock; \ 1423 } \ 1424 \ 1425 pci_config_pm_runtime_get(pdev); \ 1426 \ 1427 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { \ 1428 ret = aperture_remove_conflicting_pci_devices(pdev, \ 1429 "resourceN_resize"); \ 1430 if (ret) \ 1431 goto pm_put; \ 1432 } \ 1433 \ 1434 pci_read_config_word(pdev, PCI_COMMAND, &cmd); \ 1435 pci_write_config_word(pdev, PCI_COMMAND, \ 1436 cmd & ~PCI_COMMAND_MEMORY); \ 1437 \ 1438 flags = pci_resource_flags(pdev, n); \ 1439 \ 1440 pci_remove_resource_files(pdev); \ 1441 \ 1442 for (i = 0; i < PCI_STD_NUM_BARS; i++) { \ 1443 if (pci_resource_len(pdev, i) && \ 1444 pci_resource_flags(pdev, i) == flags) \ 1445 pci_release_resource(pdev, i); \ 1446 } \ 1447 \ 1448 ret = pci_resize_resource(pdev, n, size); \ 1449 \ 1450 pci_assign_unassigned_bus_resources(pdev->bus); \ 1451 \ 1452 if (pci_create_resource_files(pdev)) \ 1453 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");\ 1454 \ 1455 pci_write_config_word(pdev, PCI_COMMAND, cmd); \ 1456 pm_put: \ 1457 pci_config_pm_runtime_put(pdev); \ 1458 unlock: \ 1459 device_unlock(dev); \ 1460 \ 1461 return ret ? ret : count; \ 1462 } \ 1463 static DEVICE_ATTR_RW(resource##n##_resize) 1464 1465 pci_dev_resource_resize_attr(0); 1466 pci_dev_resource_resize_attr(1); 1467 pci_dev_resource_resize_attr(2); 1468 pci_dev_resource_resize_attr(3); 1469 pci_dev_resource_resize_attr(4); 1470 pci_dev_resource_resize_attr(5); 1471 1472 static struct attribute *resource_resize_attrs[] = { 1473 &dev_attr_resource0_resize.attr, 1474 &dev_attr_resource1_resize.attr, 1475 &dev_attr_resource2_resize.attr, 1476 &dev_attr_resource3_resize.attr, 1477 &dev_attr_resource4_resize.attr, 1478 &dev_attr_resource5_resize.attr, 1479 NULL, 1480 }; 1481 1482 static umode_t resource_resize_is_visible(struct kobject *kobj, 1483 struct attribute *a, int n) 1484 { 1485 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1486 1487 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode; 1488 } 1489 1490 static const struct attribute_group pci_dev_resource_resize_group = { 1491 .attrs = resource_resize_attrs, 1492 .is_visible = resource_resize_is_visible, 1493 }; 1494 1495 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1496 { 1497 if (!sysfs_initialized) 1498 return -EACCES; 1499 1500 return pci_create_resource_files(pdev); 1501 } 1502 1503 /** 1504 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1505 * @pdev: device whose entries we should free 1506 * 1507 * Cleanup when @pdev is removed from sysfs. 1508 */ 1509 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1510 { 1511 if (!sysfs_initialized) 1512 return; 1513 1514 pci_remove_resource_files(pdev); 1515 } 1516 1517 static int __init pci_sysfs_init(void) 1518 { 1519 struct pci_dev *pdev = NULL; 1520 struct pci_bus *pbus = NULL; 1521 int retval; 1522 1523 sysfs_initialized = 1; 1524 for_each_pci_dev(pdev) { 1525 retval = pci_create_sysfs_dev_files(pdev); 1526 if (retval) { 1527 pci_dev_put(pdev); 1528 return retval; 1529 } 1530 } 1531 1532 while ((pbus = pci_find_next_bus(pbus))) 1533 pci_create_legacy_files(pbus); 1534 1535 return 0; 1536 } 1537 late_initcall(pci_sysfs_init); 1538 1539 static struct attribute *pci_dev_dev_attrs[] = { 1540 &dev_attr_boot_vga.attr, 1541 NULL, 1542 }; 1543 1544 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1545 struct attribute *a, int n) 1546 { 1547 struct device *dev = kobj_to_dev(kobj); 1548 struct pci_dev *pdev = to_pci_dev(dev); 1549 1550 if (a == &dev_attr_boot_vga.attr) 1551 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1552 return 0; 1553 1554 return a->mode; 1555 } 1556 1557 static struct attribute *pci_dev_hp_attrs[] = { 1558 &dev_attr_remove.attr, 1559 &dev_attr_dev_rescan.attr, 1560 NULL, 1561 }; 1562 1563 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1564 struct attribute *a, int n) 1565 { 1566 struct device *dev = kobj_to_dev(kobj); 1567 struct pci_dev *pdev = to_pci_dev(dev); 1568 1569 if (pdev->is_virtfn) 1570 return 0; 1571 1572 return a->mode; 1573 } 1574 1575 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1576 struct attribute *a, int n) 1577 { 1578 struct device *dev = kobj_to_dev(kobj); 1579 struct pci_dev *pdev = to_pci_dev(dev); 1580 1581 if (pci_is_bridge(pdev)) 1582 return a->mode; 1583 1584 return 0; 1585 } 1586 1587 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1588 struct attribute *a, int n) 1589 { 1590 struct device *dev = kobj_to_dev(kobj); 1591 struct pci_dev *pdev = to_pci_dev(dev); 1592 1593 if (pci_is_pcie(pdev)) 1594 return a->mode; 1595 1596 return 0; 1597 } 1598 1599 static const struct attribute_group pci_dev_group = { 1600 .attrs = pci_dev_attrs, 1601 }; 1602 1603 const struct attribute_group *pci_dev_groups[] = { 1604 &pci_dev_group, 1605 &pci_dev_config_attr_group, 1606 &pci_dev_rom_attr_group, 1607 &pci_dev_reset_attr_group, 1608 &pci_dev_reset_method_attr_group, 1609 &pci_dev_vpd_attr_group, 1610 #ifdef CONFIG_DMI 1611 &pci_dev_smbios_attr_group, 1612 #endif 1613 #ifdef CONFIG_ACPI 1614 &pci_dev_acpi_attr_group, 1615 #endif 1616 &pci_dev_resource_resize_group, 1617 NULL, 1618 }; 1619 1620 static const struct attribute_group pci_dev_hp_attr_group = { 1621 .attrs = pci_dev_hp_attrs, 1622 .is_visible = pci_dev_hp_attrs_are_visible, 1623 }; 1624 1625 static const struct attribute_group pci_dev_attr_group = { 1626 .attrs = pci_dev_dev_attrs, 1627 .is_visible = pci_dev_attrs_are_visible, 1628 }; 1629 1630 static const struct attribute_group pci_bridge_attr_group = { 1631 .attrs = pci_bridge_attrs, 1632 .is_visible = pci_bridge_attrs_are_visible, 1633 }; 1634 1635 static const struct attribute_group pcie_dev_attr_group = { 1636 .attrs = pcie_dev_attrs, 1637 .is_visible = pcie_dev_attrs_are_visible, 1638 }; 1639 1640 static const struct attribute_group *pci_dev_attr_groups[] = { 1641 &pci_dev_attr_group, 1642 &pci_dev_hp_attr_group, 1643 #ifdef CONFIG_PCI_IOV 1644 &sriov_pf_dev_attr_group, 1645 &sriov_vf_dev_attr_group, 1646 #endif 1647 &pci_bridge_attr_group, 1648 &pcie_dev_attr_group, 1649 #ifdef CONFIG_PCIEAER 1650 &aer_stats_attr_group, 1651 #endif 1652 #ifdef CONFIG_PCIEASPM 1653 &aspm_ctrl_attr_group, 1654 #endif 1655 NULL, 1656 }; 1657 1658 const struct device_type pci_dev_type = { 1659 .groups = pci_dev_attr_groups, 1660 }; 1661