xref: /openbmc/linux/drivers/pci/pci-sysfs.c (revision 930beb5a)
1 /*
2  * drivers/pci/pci-sysfs.c
3  *
4  * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5  * (C) Copyright 2002-2004 IBM Corp.
6  * (C) Copyright 2003 Matthew Wilcox
7  * (C) Copyright 2003 Hewlett-Packard
8  * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9  * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10  *
11  * File attributes for PCI devices
12  *
13  * Modeled after usb's driverfs.c
14  *
15  */
16 
17 
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/export.h>
23 #include <linux/topology.h>
24 #include <linux/mm.h>
25 #include <linux/fs.h>
26 #include <linux/capability.h>
27 #include <linux/security.h>
28 #include <linux/pci-aspm.h>
29 #include <linux/slab.h>
30 #include <linux/vgaarb.h>
31 #include <linux/pm_runtime.h>
32 #include "pci.h"
33 
34 static int sysfs_initialized;	/* = 0 */
35 
36 /* show configuration fields */
37 #define pci_config_attr(field, format_string)				\
38 static ssize_t								\
39 field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
40 {									\
41 	struct pci_dev *pdev;						\
42 									\
43 	pdev = to_pci_dev (dev);					\
44 	return sprintf (buf, format_string, pdev->field);		\
45 }									\
46 static DEVICE_ATTR_RO(field)
47 
48 pci_config_attr(vendor, "0x%04x\n");
49 pci_config_attr(device, "0x%04x\n");
50 pci_config_attr(subsystem_vendor, "0x%04x\n");
51 pci_config_attr(subsystem_device, "0x%04x\n");
52 pci_config_attr(class, "0x%06x\n");
53 pci_config_attr(irq, "%u\n");
54 
55 static ssize_t broken_parity_status_show(struct device *dev,
56 					 struct device_attribute *attr,
57 					 char *buf)
58 {
59 	struct pci_dev *pdev = to_pci_dev(dev);
60 	return sprintf (buf, "%u\n", pdev->broken_parity_status);
61 }
62 
63 static ssize_t broken_parity_status_store(struct device *dev,
64 					  struct device_attribute *attr,
65 					  const char *buf, size_t count)
66 {
67 	struct pci_dev *pdev = to_pci_dev(dev);
68 	unsigned long val;
69 
70 	if (kstrtoul(buf, 0, &val) < 0)
71 		return -EINVAL;
72 
73 	pdev->broken_parity_status = !!val;
74 
75 	return count;
76 }
77 static DEVICE_ATTR_RW(broken_parity_status);
78 
79 static ssize_t pci_dev_show_local_cpu(struct device *dev,
80 		int type,
81 		struct device_attribute *attr,
82 		char *buf)
83 {
84 	const struct cpumask *mask;
85 	int len;
86 
87 #ifdef CONFIG_NUMA
88 	mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
89 					  cpumask_of_node(dev_to_node(dev));
90 #else
91 	mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
92 #endif
93 	len = type ?
94 		cpumask_scnprintf(buf, PAGE_SIZE-2, mask) :
95 		cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
96 
97 	buf[len++] = '\n';
98 	buf[len] = '\0';
99 	return len;
100 }
101 
102 static ssize_t local_cpus_show(struct device *dev,
103 			struct device_attribute *attr, char *buf)
104 {
105 	return pci_dev_show_local_cpu(dev, 1, attr, buf);
106 }
107 static DEVICE_ATTR_RO(local_cpus);
108 
109 static ssize_t local_cpulist_show(struct device *dev,
110 			struct device_attribute *attr, char *buf)
111 {
112 	return pci_dev_show_local_cpu(dev, 0, attr, buf);
113 }
114 static DEVICE_ATTR_RO(local_cpulist);
115 
116 /*
117  * PCI Bus Class Devices
118  */
119 static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
120 					int type,
121 					struct device_attribute *attr,
122 					char *buf)
123 {
124 	int ret;
125 	const struct cpumask *cpumask;
126 
127 	cpumask = cpumask_of_pcibus(to_pci_bus(dev));
128 	ret = type ?
129 		cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
130 		cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
131 	buf[ret++] = '\n';
132 	buf[ret] = '\0';
133 	return ret;
134 }
135 
136 static ssize_t cpuaffinity_show(struct device *dev,
137 				struct device_attribute *attr, char *buf)
138 {
139 	return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
140 }
141 static DEVICE_ATTR_RO(cpuaffinity);
142 
143 static ssize_t cpulistaffinity_show(struct device *dev,
144 				    struct device_attribute *attr, char *buf)
145 {
146 	return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
147 }
148 static DEVICE_ATTR_RO(cpulistaffinity);
149 
150 /* show resources */
151 static ssize_t
152 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
153 {
154 	struct pci_dev * pci_dev = to_pci_dev(dev);
155 	char * str = buf;
156 	int i;
157 	int max;
158 	resource_size_t start, end;
159 
160 	if (pci_dev->subordinate)
161 		max = DEVICE_COUNT_RESOURCE;
162 	else
163 		max = PCI_BRIDGE_RESOURCES;
164 
165 	for (i = 0; i < max; i++) {
166 		struct resource *res =  &pci_dev->resource[i];
167 		pci_resource_to_user(pci_dev, i, res, &start, &end);
168 		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
169 			       (unsigned long long)start,
170 			       (unsigned long long)end,
171 			       (unsigned long long)res->flags);
172 	}
173 	return (str - buf);
174 }
175 static DEVICE_ATTR_RO(resource);
176 
177 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
178 {
179 	struct pci_dev *pci_dev = to_pci_dev(dev);
180 
181 	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
182 		       pci_dev->vendor, pci_dev->device,
183 		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
184 		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
185 		       (u8)(pci_dev->class));
186 }
187 static DEVICE_ATTR_RO(modalias);
188 
189 static ssize_t enabled_store(struct device *dev,
190 			     struct device_attribute *attr, const char *buf,
191 			     size_t count)
192 {
193 	struct pci_dev *pdev = to_pci_dev(dev);
194 	unsigned long val;
195 	ssize_t result = kstrtoul(buf, 0, &val);
196 
197 	if (result < 0)
198 		return result;
199 
200 	/* this can crash the machine when done on the "wrong" device */
201 	if (!capable(CAP_SYS_ADMIN))
202 		return -EPERM;
203 
204 	if (!val) {
205 		if (pci_is_enabled(pdev))
206 			pci_disable_device(pdev);
207 		else
208 			result = -EIO;
209 	} else
210 		result = pci_enable_device(pdev);
211 
212 	return result < 0 ? result : count;
213 }
214 
215 static ssize_t enabled_show(struct device *dev,
216 			    struct device_attribute *attr, char *buf)
217 {
218 	struct pci_dev *pdev;
219 
220 	pdev = to_pci_dev (dev);
221 	return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
222 }
223 static DEVICE_ATTR_RW(enabled);
224 
225 #ifdef CONFIG_NUMA
226 static ssize_t
227 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
228 {
229 	return sprintf (buf, "%d\n", dev->numa_node);
230 }
231 static DEVICE_ATTR_RO(numa_node);
232 #endif
233 
234 static ssize_t
235 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
236 {
237 	struct pci_dev *pdev = to_pci_dev(dev);
238 
239 	return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
240 }
241 static DEVICE_ATTR_RO(dma_mask_bits);
242 
243 static ssize_t
244 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
245 				 char *buf)
246 {
247 	return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
248 }
249 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
250 
251 static ssize_t
252 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
253 {
254 	struct pci_dev *pdev = to_pci_dev(dev);
255 
256 	if (!pdev->subordinate)
257 		return 0;
258 
259 	return sprintf (buf, "%u\n",
260 			!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
261 }
262 
263 static ssize_t
264 msi_bus_store(struct device *dev, struct device_attribute *attr,
265 	      const char *buf, size_t count)
266 {
267 	struct pci_dev *pdev = to_pci_dev(dev);
268 	unsigned long val;
269 
270 	if (kstrtoul(buf, 0, &val) < 0)
271 		return -EINVAL;
272 
273 	/*
274 	 * Bad things may happen if the no_msi flag is changed
275 	 * while drivers are loaded.
276 	 */
277 	if (!capable(CAP_SYS_ADMIN))
278 		return -EPERM;
279 
280 	/*
281 	 * Maybe devices without subordinate buses shouldn't have this
282 	 * attribute in the first place?
283 	 */
284 	if (!pdev->subordinate)
285 		return count;
286 
287 	/* Is the flag going to change, or keep the value it already had? */
288 	if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
289 	    !!val) {
290 		pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
291 
292 		dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
293 			 " bad things could happen\n", val ? "" : " not");
294 	}
295 
296 	return count;
297 }
298 static DEVICE_ATTR_RW(msi_bus);
299 
300 static DEFINE_MUTEX(pci_remove_rescan_mutex);
301 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
302 				size_t count)
303 {
304 	unsigned long val;
305 	struct pci_bus *b = NULL;
306 
307 	if (kstrtoul(buf, 0, &val) < 0)
308 		return -EINVAL;
309 
310 	if (val) {
311 		mutex_lock(&pci_remove_rescan_mutex);
312 		while ((b = pci_find_next_bus(b)) != NULL)
313 			pci_rescan_bus(b);
314 		mutex_unlock(&pci_remove_rescan_mutex);
315 	}
316 	return count;
317 }
318 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
319 
320 static struct attribute *pci_bus_attrs[] = {
321 	&bus_attr_rescan.attr,
322 	NULL,
323 };
324 
325 static const struct attribute_group pci_bus_group = {
326 	.attrs = pci_bus_attrs,
327 };
328 
329 const struct attribute_group *pci_bus_groups[] = {
330 	&pci_bus_group,
331 	NULL,
332 };
333 
334 static ssize_t
335 dev_rescan_store(struct device *dev, struct device_attribute *attr,
336 		 const char *buf, size_t count)
337 {
338 	unsigned long val;
339 	struct pci_dev *pdev = to_pci_dev(dev);
340 
341 	if (kstrtoul(buf, 0, &val) < 0)
342 		return -EINVAL;
343 
344 	if (val) {
345 		mutex_lock(&pci_remove_rescan_mutex);
346 		pci_rescan_bus(pdev->bus);
347 		mutex_unlock(&pci_remove_rescan_mutex);
348 	}
349 	return count;
350 }
351 static struct device_attribute dev_rescan_attr = __ATTR(rescan,
352 							(S_IWUSR|S_IWGRP),
353 							NULL, dev_rescan_store);
354 
355 static void remove_callback(struct device *dev)
356 {
357 	struct pci_dev *pdev = to_pci_dev(dev);
358 
359 	mutex_lock(&pci_remove_rescan_mutex);
360 	pci_stop_and_remove_bus_device(pdev);
361 	mutex_unlock(&pci_remove_rescan_mutex);
362 }
363 
364 static ssize_t
365 remove_store(struct device *dev, struct device_attribute *dummy,
366 	     const char *buf, size_t count)
367 {
368 	int ret = 0;
369 	unsigned long val;
370 
371 	if (kstrtoul(buf, 0, &val) < 0)
372 		return -EINVAL;
373 
374 	/* An attribute cannot be unregistered by one of its own methods,
375 	 * so we have to use this roundabout approach.
376 	 */
377 	if (val)
378 		ret = device_schedule_callback(dev, remove_callback);
379 	if (ret)
380 		count = ret;
381 	return count;
382 }
383 static struct device_attribute dev_remove_attr = __ATTR(remove,
384 							(S_IWUSR|S_IWGRP),
385 							NULL, remove_store);
386 
387 static ssize_t
388 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
389 		 const char *buf, size_t count)
390 {
391 	unsigned long val;
392 	struct pci_bus *bus = to_pci_bus(dev);
393 
394 	if (kstrtoul(buf, 0, &val) < 0)
395 		return -EINVAL;
396 
397 	if (val) {
398 		mutex_lock(&pci_remove_rescan_mutex);
399 		if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
400 			pci_rescan_bus_bridge_resize(bus->self);
401 		else
402 			pci_rescan_bus(bus);
403 		mutex_unlock(&pci_remove_rescan_mutex);
404 	}
405 	return count;
406 }
407 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
408 
409 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
410 static ssize_t d3cold_allowed_store(struct device *dev,
411 				    struct device_attribute *attr,
412 				    const char *buf, size_t count)
413 {
414 	struct pci_dev *pdev = to_pci_dev(dev);
415 	unsigned long val;
416 
417 	if (kstrtoul(buf, 0, &val) < 0)
418 		return -EINVAL;
419 
420 	pdev->d3cold_allowed = !!val;
421 	pm_runtime_resume(dev);
422 
423 	return count;
424 }
425 
426 static ssize_t d3cold_allowed_show(struct device *dev,
427 				   struct device_attribute *attr, char *buf)
428 {
429 	struct pci_dev *pdev = to_pci_dev(dev);
430 	return sprintf (buf, "%u\n", pdev->d3cold_allowed);
431 }
432 static DEVICE_ATTR_RW(d3cold_allowed);
433 #endif
434 
435 #ifdef CONFIG_PCI_IOV
436 static ssize_t sriov_totalvfs_show(struct device *dev,
437 				   struct device_attribute *attr,
438 				   char *buf)
439 {
440 	struct pci_dev *pdev = to_pci_dev(dev);
441 
442 	return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
443 }
444 
445 
446 static ssize_t sriov_numvfs_show(struct device *dev,
447 				 struct device_attribute *attr,
448 				 char *buf)
449 {
450 	struct pci_dev *pdev = to_pci_dev(dev);
451 
452 	return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
453 }
454 
455 /*
456  * num_vfs > 0; number of VFs to enable
457  * num_vfs = 0; disable all VFs
458  *
459  * Note: SRIOV spec doesn't allow partial VF
460  *       disable, so it's all or none.
461  */
462 static ssize_t sriov_numvfs_store(struct device *dev,
463 				  struct device_attribute *attr,
464 				  const char *buf, size_t count)
465 {
466 	struct pci_dev *pdev = to_pci_dev(dev);
467 	int ret;
468 	u16 num_vfs;
469 
470 	ret = kstrtou16(buf, 0, &num_vfs);
471 	if (ret < 0)
472 		return ret;
473 
474 	if (num_vfs > pci_sriov_get_totalvfs(pdev))
475 		return -ERANGE;
476 
477 	if (num_vfs == pdev->sriov->num_VFs)
478 		return count;		/* no change */
479 
480 	/* is PF driver loaded w/callback */
481 	if (!pdev->driver || !pdev->driver->sriov_configure) {
482 		dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
483 		return -ENOSYS;
484 	}
485 
486 	if (num_vfs == 0) {
487 		/* disable VFs */
488 		ret = pdev->driver->sriov_configure(pdev, 0);
489 		if (ret < 0)
490 			return ret;
491 		return count;
492 	}
493 
494 	/* enable VFs */
495 	if (pdev->sriov->num_VFs) {
496 		dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
497 			 pdev->sriov->num_VFs, num_vfs);
498 		return -EBUSY;
499 	}
500 
501 	ret = pdev->driver->sriov_configure(pdev, num_vfs);
502 	if (ret < 0)
503 		return ret;
504 
505 	if (ret != num_vfs)
506 		dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
507 			 num_vfs, ret);
508 
509 	return count;
510 }
511 
512 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
513 static struct device_attribute sriov_numvfs_attr =
514 		__ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
515 		       sriov_numvfs_show, sriov_numvfs_store);
516 #endif /* CONFIG_PCI_IOV */
517 
518 static struct attribute *pci_dev_attrs[] = {
519 	&dev_attr_resource.attr,
520 	&dev_attr_vendor.attr,
521 	&dev_attr_device.attr,
522 	&dev_attr_subsystem_vendor.attr,
523 	&dev_attr_subsystem_device.attr,
524 	&dev_attr_class.attr,
525 	&dev_attr_irq.attr,
526 	&dev_attr_local_cpus.attr,
527 	&dev_attr_local_cpulist.attr,
528 	&dev_attr_modalias.attr,
529 #ifdef CONFIG_NUMA
530 	&dev_attr_numa_node.attr,
531 #endif
532 	&dev_attr_dma_mask_bits.attr,
533 	&dev_attr_consistent_dma_mask_bits.attr,
534 	&dev_attr_enabled.attr,
535 	&dev_attr_broken_parity_status.attr,
536 	&dev_attr_msi_bus.attr,
537 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
538 	&dev_attr_d3cold_allowed.attr,
539 #endif
540 	NULL,
541 };
542 
543 static const struct attribute_group pci_dev_group = {
544 	.attrs = pci_dev_attrs,
545 };
546 
547 const struct attribute_group *pci_dev_groups[] = {
548 	&pci_dev_group,
549 	NULL,
550 };
551 
552 static struct attribute *pcibus_attrs[] = {
553 	&dev_attr_rescan.attr,
554 	&dev_attr_cpuaffinity.attr,
555 	&dev_attr_cpulistaffinity.attr,
556 	NULL,
557 };
558 
559 static const struct attribute_group pcibus_group = {
560 	.attrs = pcibus_attrs,
561 };
562 
563 const struct attribute_group *pcibus_groups[] = {
564 	&pcibus_group,
565 	NULL,
566 };
567 
568 static ssize_t
569 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
570 {
571 	struct pci_dev *pdev = to_pci_dev(dev);
572 	struct pci_dev *vga_dev = vga_default_device();
573 
574 	if (vga_dev)
575 		return sprintf(buf, "%u\n", (pdev == vga_dev));
576 
577 	return sprintf(buf, "%u\n",
578 		!!(pdev->resource[PCI_ROM_RESOURCE].flags &
579 		   IORESOURCE_ROM_SHADOW));
580 }
581 static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
582 
583 static ssize_t
584 pci_read_config(struct file *filp, struct kobject *kobj,
585 		struct bin_attribute *bin_attr,
586 		char *buf, loff_t off, size_t count)
587 {
588 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
589 	unsigned int size = 64;
590 	loff_t init_off = off;
591 	u8 *data = (u8*) buf;
592 
593 	/* Several chips lock up trying to read undefined config space */
594 	if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
595 		size = dev->cfg_size;
596 	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
597 		size = 128;
598 	}
599 
600 	if (off > size)
601 		return 0;
602 	if (off + count > size) {
603 		size -= off;
604 		count = size;
605 	} else {
606 		size = count;
607 	}
608 
609 	pci_config_pm_runtime_get(dev);
610 
611 	if ((off & 1) && size) {
612 		u8 val;
613 		pci_user_read_config_byte(dev, off, &val);
614 		data[off - init_off] = val;
615 		off++;
616 		size--;
617 	}
618 
619 	if ((off & 3) && size > 2) {
620 		u16 val;
621 		pci_user_read_config_word(dev, off, &val);
622 		data[off - init_off] = val & 0xff;
623 		data[off - init_off + 1] = (val >> 8) & 0xff;
624 		off += 2;
625 		size -= 2;
626 	}
627 
628 	while (size > 3) {
629 		u32 val;
630 		pci_user_read_config_dword(dev, off, &val);
631 		data[off - init_off] = val & 0xff;
632 		data[off - init_off + 1] = (val >> 8) & 0xff;
633 		data[off - init_off + 2] = (val >> 16) & 0xff;
634 		data[off - init_off + 3] = (val >> 24) & 0xff;
635 		off += 4;
636 		size -= 4;
637 	}
638 
639 	if (size >= 2) {
640 		u16 val;
641 		pci_user_read_config_word(dev, off, &val);
642 		data[off - init_off] = val & 0xff;
643 		data[off - init_off + 1] = (val >> 8) & 0xff;
644 		off += 2;
645 		size -= 2;
646 	}
647 
648 	if (size > 0) {
649 		u8 val;
650 		pci_user_read_config_byte(dev, off, &val);
651 		data[off - init_off] = val;
652 		off++;
653 		--size;
654 	}
655 
656 	pci_config_pm_runtime_put(dev);
657 
658 	return count;
659 }
660 
661 static ssize_t
662 pci_write_config(struct file* filp, struct kobject *kobj,
663 		 struct bin_attribute *bin_attr,
664 		 char *buf, loff_t off, size_t count)
665 {
666 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
667 	unsigned int size = count;
668 	loff_t init_off = off;
669 	u8 *data = (u8*) buf;
670 
671 	if (off > dev->cfg_size)
672 		return 0;
673 	if (off + count > dev->cfg_size) {
674 		size = dev->cfg_size - off;
675 		count = size;
676 	}
677 
678 	pci_config_pm_runtime_get(dev);
679 
680 	if ((off & 1) && size) {
681 		pci_user_write_config_byte(dev, off, data[off - init_off]);
682 		off++;
683 		size--;
684 	}
685 
686 	if ((off & 3) && size > 2) {
687 		u16 val = data[off - init_off];
688 		val |= (u16) data[off - init_off + 1] << 8;
689                 pci_user_write_config_word(dev, off, val);
690                 off += 2;
691                 size -= 2;
692         }
693 
694 	while (size > 3) {
695 		u32 val = data[off - init_off];
696 		val |= (u32) data[off - init_off + 1] << 8;
697 		val |= (u32) data[off - init_off + 2] << 16;
698 		val |= (u32) data[off - init_off + 3] << 24;
699 		pci_user_write_config_dword(dev, off, val);
700 		off += 4;
701 		size -= 4;
702 	}
703 
704 	if (size >= 2) {
705 		u16 val = data[off - init_off];
706 		val |= (u16) data[off - init_off + 1] << 8;
707 		pci_user_write_config_word(dev, off, val);
708 		off += 2;
709 		size -= 2;
710 	}
711 
712 	if (size) {
713 		pci_user_write_config_byte(dev, off, data[off - init_off]);
714 		off++;
715 		--size;
716 	}
717 
718 	pci_config_pm_runtime_put(dev);
719 
720 	return count;
721 }
722 
723 static ssize_t
724 read_vpd_attr(struct file *filp, struct kobject *kobj,
725 	      struct bin_attribute *bin_attr,
726 	      char *buf, loff_t off, size_t count)
727 {
728 	struct pci_dev *dev =
729 		to_pci_dev(container_of(kobj, struct device, kobj));
730 
731 	if (off > bin_attr->size)
732 		count = 0;
733 	else if (count > bin_attr->size - off)
734 		count = bin_attr->size - off;
735 
736 	return pci_read_vpd(dev, off, count, buf);
737 }
738 
739 static ssize_t
740 write_vpd_attr(struct file *filp, struct kobject *kobj,
741 	       struct bin_attribute *bin_attr,
742 	       char *buf, loff_t off, size_t count)
743 {
744 	struct pci_dev *dev =
745 		to_pci_dev(container_of(kobj, struct device, kobj));
746 
747 	if (off > bin_attr->size)
748 		count = 0;
749 	else if (count > bin_attr->size - off)
750 		count = bin_attr->size - off;
751 
752 	return pci_write_vpd(dev, off, count, buf);
753 }
754 
755 #ifdef HAVE_PCI_LEGACY
756 /**
757  * pci_read_legacy_io - read byte(s) from legacy I/O port space
758  * @filp: open sysfs file
759  * @kobj: kobject corresponding to file to read from
760  * @bin_attr: struct bin_attribute for this file
761  * @buf: buffer to store results
762  * @off: offset into legacy I/O port space
763  * @count: number of bytes to read
764  *
765  * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
766  * callback routine (pci_legacy_read).
767  */
768 static ssize_t
769 pci_read_legacy_io(struct file *filp, struct kobject *kobj,
770 		   struct bin_attribute *bin_attr,
771 		   char *buf, loff_t off, size_t count)
772 {
773         struct pci_bus *bus = to_pci_bus(container_of(kobj,
774                                                       struct device,
775 						      kobj));
776 
777         /* Only support 1, 2 or 4 byte accesses */
778         if (count != 1 && count != 2 && count != 4)
779                 return -EINVAL;
780 
781         return pci_legacy_read(bus, off, (u32 *)buf, count);
782 }
783 
784 /**
785  * pci_write_legacy_io - write byte(s) to legacy I/O port space
786  * @filp: open sysfs file
787  * @kobj: kobject corresponding to file to read from
788  * @bin_attr: struct bin_attribute for this file
789  * @buf: buffer containing value to be written
790  * @off: offset into legacy I/O port space
791  * @count: number of bytes to write
792  *
793  * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
794  * callback routine (pci_legacy_write).
795  */
796 static ssize_t
797 pci_write_legacy_io(struct file *filp, struct kobject *kobj,
798 		    struct bin_attribute *bin_attr,
799 		    char *buf, loff_t off, size_t count)
800 {
801         struct pci_bus *bus = to_pci_bus(container_of(kobj,
802 						      struct device,
803 						      kobj));
804         /* Only support 1, 2 or 4 byte accesses */
805         if (count != 1 && count != 2 && count != 4)
806                 return -EINVAL;
807 
808         return pci_legacy_write(bus, off, *(u32 *)buf, count);
809 }
810 
811 /**
812  * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
813  * @filp: open sysfs file
814  * @kobj: kobject corresponding to device to be mapped
815  * @attr: struct bin_attribute for this file
816  * @vma: struct vm_area_struct passed to mmap
817  *
818  * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
819  * legacy memory space (first meg of bus space) into application virtual
820  * memory space.
821  */
822 static int
823 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
824 		    struct bin_attribute *attr,
825                     struct vm_area_struct *vma)
826 {
827         struct pci_bus *bus = to_pci_bus(container_of(kobj,
828                                                       struct device,
829 						      kobj));
830 
831         return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
832 }
833 
834 /**
835  * pci_mmap_legacy_io - map legacy PCI IO into user memory space
836  * @filp: open sysfs file
837  * @kobj: kobject corresponding to device to be mapped
838  * @attr: struct bin_attribute for this file
839  * @vma: struct vm_area_struct passed to mmap
840  *
841  * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
842  * legacy IO space (first meg of bus space) into application virtual
843  * memory space. Returns -ENOSYS if the operation isn't supported
844  */
845 static int
846 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
847 		   struct bin_attribute *attr,
848 		   struct vm_area_struct *vma)
849 {
850         struct pci_bus *bus = to_pci_bus(container_of(kobj,
851                                                       struct device,
852 						      kobj));
853 
854         return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
855 }
856 
857 /**
858  * pci_adjust_legacy_attr - adjustment of legacy file attributes
859  * @b: bus to create files under
860  * @mmap_type: I/O port or memory
861  *
862  * Stub implementation. Can be overridden by arch if necessary.
863  */
864 void __weak
865 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
866 {
867 	return;
868 }
869 
870 /**
871  * pci_create_legacy_files - create legacy I/O port and memory files
872  * @b: bus to create files under
873  *
874  * Some platforms allow access to legacy I/O port and ISA memory space on
875  * a per-bus basis.  This routine creates the files and ties them into
876  * their associated read, write and mmap files from pci-sysfs.c
877  *
878  * On error unwind, but don't propagate the error to the caller
879  * as it is ok to set up the PCI bus without these files.
880  */
881 void pci_create_legacy_files(struct pci_bus *b)
882 {
883 	int error;
884 
885 	b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
886 			       GFP_ATOMIC);
887 	if (!b->legacy_io)
888 		goto kzalloc_err;
889 
890 	sysfs_bin_attr_init(b->legacy_io);
891 	b->legacy_io->attr.name = "legacy_io";
892 	b->legacy_io->size = 0xffff;
893 	b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
894 	b->legacy_io->read = pci_read_legacy_io;
895 	b->legacy_io->write = pci_write_legacy_io;
896 	b->legacy_io->mmap = pci_mmap_legacy_io;
897 	pci_adjust_legacy_attr(b, pci_mmap_io);
898 	error = device_create_bin_file(&b->dev, b->legacy_io);
899 	if (error)
900 		goto legacy_io_err;
901 
902 	/* Allocated above after the legacy_io struct */
903 	b->legacy_mem = b->legacy_io + 1;
904 	sysfs_bin_attr_init(b->legacy_mem);
905 	b->legacy_mem->attr.name = "legacy_mem";
906 	b->legacy_mem->size = 1024*1024;
907 	b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
908 	b->legacy_mem->mmap = pci_mmap_legacy_mem;
909 	pci_adjust_legacy_attr(b, pci_mmap_mem);
910 	error = device_create_bin_file(&b->dev, b->legacy_mem);
911 	if (error)
912 		goto legacy_mem_err;
913 
914 	return;
915 
916 legacy_mem_err:
917 	device_remove_bin_file(&b->dev, b->legacy_io);
918 legacy_io_err:
919 	kfree(b->legacy_io);
920 	b->legacy_io = NULL;
921 kzalloc_err:
922 	printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
923 	       "and ISA memory resources to sysfs\n");
924 	return;
925 }
926 
927 void pci_remove_legacy_files(struct pci_bus *b)
928 {
929 	if (b->legacy_io) {
930 		device_remove_bin_file(&b->dev, b->legacy_io);
931 		device_remove_bin_file(&b->dev, b->legacy_mem);
932 		kfree(b->legacy_io); /* both are allocated here */
933 	}
934 }
935 #endif /* HAVE_PCI_LEGACY */
936 
937 #ifdef HAVE_PCI_MMAP
938 
939 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
940 		  enum pci_mmap_api mmap_api)
941 {
942 	unsigned long nr, start, size, pci_start;
943 
944 	if (pci_resource_len(pdev, resno) == 0)
945 		return 0;
946 	nr = vma_pages(vma);
947 	start = vma->vm_pgoff;
948 	size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
949 	pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
950 			pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
951 	if (start >= pci_start && start < pci_start + size &&
952 			start + nr <= pci_start + size)
953 		return 1;
954 	return 0;
955 }
956 
957 /**
958  * pci_mmap_resource - map a PCI resource into user memory space
959  * @kobj: kobject for mapping
960  * @attr: struct bin_attribute for the file being mapped
961  * @vma: struct vm_area_struct passed into the mmap
962  * @write_combine: 1 for write_combine mapping
963  *
964  * Use the regular PCI mapping routines to map a PCI resource into userspace.
965  */
966 static int
967 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
968 		  struct vm_area_struct *vma, int write_combine)
969 {
970 	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
971 						       struct device, kobj));
972 	struct resource *res = attr->private;
973 	enum pci_mmap_state mmap_type;
974 	resource_size_t start, end;
975 	int i;
976 
977 	for (i = 0; i < PCI_ROM_RESOURCE; i++)
978 		if (res == &pdev->resource[i])
979 			break;
980 	if (i >= PCI_ROM_RESOURCE)
981 		return -ENODEV;
982 
983 	if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
984 		WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
985 			"at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
986 			current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
987 			pci_name(pdev), i,
988 			(u64)pci_resource_start(pdev, i),
989 			(u64)pci_resource_len(pdev, i));
990 		return -EINVAL;
991 	}
992 
993 	/* pci_mmap_page_range() expects the same kind of entry as coming
994 	 * from /proc/bus/pci/ which is a "user visible" value. If this is
995 	 * different from the resource itself, arch will do necessary fixup.
996 	 */
997 	pci_resource_to_user(pdev, i, res, &start, &end);
998 	vma->vm_pgoff += start >> PAGE_SHIFT;
999 	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1000 
1001 	if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
1002 		return -EINVAL;
1003 
1004 	return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
1005 }
1006 
1007 static int
1008 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1009 		     struct bin_attribute *attr,
1010 		     struct vm_area_struct *vma)
1011 {
1012 	return pci_mmap_resource(kobj, attr, vma, 0);
1013 }
1014 
1015 static int
1016 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1017 		     struct bin_attribute *attr,
1018 		     struct vm_area_struct *vma)
1019 {
1020 	return pci_mmap_resource(kobj, attr, vma, 1);
1021 }
1022 
1023 static ssize_t
1024 pci_resource_io(struct file *filp, struct kobject *kobj,
1025 		struct bin_attribute *attr, char *buf,
1026 		loff_t off, size_t count, bool write)
1027 {
1028 	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
1029 						       struct device, kobj));
1030 	struct resource *res = attr->private;
1031 	unsigned long port = off;
1032 	int i;
1033 
1034 	for (i = 0; i < PCI_ROM_RESOURCE; i++)
1035 		if (res == &pdev->resource[i])
1036 			break;
1037 	if (i >= PCI_ROM_RESOURCE)
1038 		return -ENODEV;
1039 
1040 	port += pci_resource_start(pdev, i);
1041 
1042 	if (port > pci_resource_end(pdev, i))
1043 		return 0;
1044 
1045 	if (port + count - 1 > pci_resource_end(pdev, i))
1046 		return -EINVAL;
1047 
1048 	switch (count) {
1049 	case 1:
1050 		if (write)
1051 			outb(*(u8 *)buf, port);
1052 		else
1053 			*(u8 *)buf = inb(port);
1054 		return 1;
1055 	case 2:
1056 		if (write)
1057 			outw(*(u16 *)buf, port);
1058 		else
1059 			*(u16 *)buf = inw(port);
1060 		return 2;
1061 	case 4:
1062 		if (write)
1063 			outl(*(u32 *)buf, port);
1064 		else
1065 			*(u32 *)buf = inl(port);
1066 		return 4;
1067 	}
1068 	return -EINVAL;
1069 }
1070 
1071 static ssize_t
1072 pci_read_resource_io(struct file *filp, struct kobject *kobj,
1073 		     struct bin_attribute *attr, char *buf,
1074 		     loff_t off, size_t count)
1075 {
1076 	return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1077 }
1078 
1079 static ssize_t
1080 pci_write_resource_io(struct file *filp, struct kobject *kobj,
1081 		      struct bin_attribute *attr, char *buf,
1082 		      loff_t off, size_t count)
1083 {
1084 	return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1085 }
1086 
1087 /**
1088  * pci_remove_resource_files - cleanup resource files
1089  * @pdev: dev to cleanup
1090  *
1091  * If we created resource files for @pdev, remove them from sysfs and
1092  * free their resources.
1093  */
1094 static void
1095 pci_remove_resource_files(struct pci_dev *pdev)
1096 {
1097 	int i;
1098 
1099 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1100 		struct bin_attribute *res_attr;
1101 
1102 		res_attr = pdev->res_attr[i];
1103 		if (res_attr) {
1104 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1105 			kfree(res_attr);
1106 		}
1107 
1108 		res_attr = pdev->res_attr_wc[i];
1109 		if (res_attr) {
1110 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1111 			kfree(res_attr);
1112 		}
1113 	}
1114 }
1115 
1116 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1117 {
1118 	/* allocate attribute structure, piggyback attribute name */
1119 	int name_len = write_combine ? 13 : 10;
1120 	struct bin_attribute *res_attr;
1121 	int retval;
1122 
1123 	res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1124 	if (res_attr) {
1125 		char *res_attr_name = (char *)(res_attr + 1);
1126 
1127 		sysfs_bin_attr_init(res_attr);
1128 		if (write_combine) {
1129 			pdev->res_attr_wc[num] = res_attr;
1130 			sprintf(res_attr_name, "resource%d_wc", num);
1131 			res_attr->mmap = pci_mmap_resource_wc;
1132 		} else {
1133 			pdev->res_attr[num] = res_attr;
1134 			sprintf(res_attr_name, "resource%d", num);
1135 			res_attr->mmap = pci_mmap_resource_uc;
1136 		}
1137 		if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1138 			res_attr->read = pci_read_resource_io;
1139 			res_attr->write = pci_write_resource_io;
1140 		}
1141 		res_attr->attr.name = res_attr_name;
1142 		res_attr->attr.mode = S_IRUSR | S_IWUSR;
1143 		res_attr->size = pci_resource_len(pdev, num);
1144 		res_attr->private = &pdev->resource[num];
1145 		retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1146 	} else
1147 		retval = -ENOMEM;
1148 
1149 	return retval;
1150 }
1151 
1152 /**
1153  * pci_create_resource_files - create resource files in sysfs for @dev
1154  * @pdev: dev in question
1155  *
1156  * Walk the resources in @pdev creating files for each resource available.
1157  */
1158 static int pci_create_resource_files(struct pci_dev *pdev)
1159 {
1160 	int i;
1161 	int retval;
1162 
1163 	/* Expose the PCI resources from this device as files */
1164 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1165 
1166 		/* skip empty resources */
1167 		if (!pci_resource_len(pdev, i))
1168 			continue;
1169 
1170 		retval = pci_create_attr(pdev, i, 0);
1171 		/* for prefetchable resources, create a WC mappable file */
1172 		if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1173 			retval = pci_create_attr(pdev, i, 1);
1174 
1175 		if (retval) {
1176 			pci_remove_resource_files(pdev);
1177 			return retval;
1178 		}
1179 	}
1180 	return 0;
1181 }
1182 #else /* !HAVE_PCI_MMAP */
1183 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1184 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1185 #endif /* HAVE_PCI_MMAP */
1186 
1187 /**
1188  * pci_write_rom - used to enable access to the PCI ROM display
1189  * @filp: sysfs file
1190  * @kobj: kernel object handle
1191  * @bin_attr: struct bin_attribute for this file
1192  * @buf: user input
1193  * @off: file offset
1194  * @count: number of byte in input
1195  *
1196  * writing anything except 0 enables it
1197  */
1198 static ssize_t
1199 pci_write_rom(struct file *filp, struct kobject *kobj,
1200 	      struct bin_attribute *bin_attr,
1201 	      char *buf, loff_t off, size_t count)
1202 {
1203 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1204 
1205 	if ((off ==  0) && (*buf == '0') && (count == 2))
1206 		pdev->rom_attr_enabled = 0;
1207 	else
1208 		pdev->rom_attr_enabled = 1;
1209 
1210 	return count;
1211 }
1212 
1213 /**
1214  * pci_read_rom - read a PCI ROM
1215  * @filp: sysfs file
1216  * @kobj: kernel object handle
1217  * @bin_attr: struct bin_attribute for this file
1218  * @buf: where to put the data we read from the ROM
1219  * @off: file offset
1220  * @count: number of bytes to read
1221  *
1222  * Put @count bytes starting at @off into @buf from the ROM in the PCI
1223  * device corresponding to @kobj.
1224  */
1225 static ssize_t
1226 pci_read_rom(struct file *filp, struct kobject *kobj,
1227 	     struct bin_attribute *bin_attr,
1228 	     char *buf, loff_t off, size_t count)
1229 {
1230 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1231 	void __iomem *rom;
1232 	size_t size;
1233 
1234 	if (!pdev->rom_attr_enabled)
1235 		return -EINVAL;
1236 
1237 	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
1238 	if (!rom || !size)
1239 		return -EIO;
1240 
1241 	if (off >= size)
1242 		count = 0;
1243 	else {
1244 		if (off + count > size)
1245 			count = size - off;
1246 
1247 		memcpy_fromio(buf, rom + off, count);
1248 	}
1249 	pci_unmap_rom(pdev, rom);
1250 
1251 	return count;
1252 }
1253 
1254 static struct bin_attribute pci_config_attr = {
1255 	.attr =	{
1256 		.name = "config",
1257 		.mode = S_IRUGO | S_IWUSR,
1258 	},
1259 	.size = PCI_CFG_SPACE_SIZE,
1260 	.read = pci_read_config,
1261 	.write = pci_write_config,
1262 };
1263 
1264 static struct bin_attribute pcie_config_attr = {
1265 	.attr =	{
1266 		.name = "config",
1267 		.mode = S_IRUGO | S_IWUSR,
1268 	},
1269 	.size = PCI_CFG_SPACE_EXP_SIZE,
1270 	.read = pci_read_config,
1271 	.write = pci_write_config,
1272 };
1273 
1274 int __weak pcibios_add_platform_entries(struct pci_dev *dev)
1275 {
1276 	return 0;
1277 }
1278 
1279 static ssize_t reset_store(struct device *dev,
1280 			   struct device_attribute *attr, const char *buf,
1281 			   size_t count)
1282 {
1283 	struct pci_dev *pdev = to_pci_dev(dev);
1284 	unsigned long val;
1285 	ssize_t result = kstrtoul(buf, 0, &val);
1286 
1287 	if (result < 0)
1288 		return result;
1289 
1290 	if (val != 1)
1291 		return -EINVAL;
1292 
1293 	result = pci_reset_function(pdev);
1294 	if (result < 0)
1295 		return result;
1296 
1297 	return count;
1298 }
1299 
1300 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1301 
1302 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1303 {
1304 	int retval;
1305 	struct bin_attribute *attr;
1306 
1307 	/* If the device has VPD, try to expose it in sysfs. */
1308 	if (dev->vpd) {
1309 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1310 		if (!attr)
1311 			return -ENOMEM;
1312 
1313 		sysfs_bin_attr_init(attr);
1314 		attr->size = dev->vpd->len;
1315 		attr->attr.name = "vpd";
1316 		attr->attr.mode = S_IRUSR | S_IWUSR;
1317 		attr->read = read_vpd_attr;
1318 		attr->write = write_vpd_attr;
1319 		retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1320 		if (retval) {
1321 			kfree(attr);
1322 			return retval;
1323 		}
1324 		dev->vpd->attr = attr;
1325 	}
1326 
1327 	/* Active State Power Management */
1328 	pcie_aspm_create_sysfs_dev_files(dev);
1329 
1330 	if (!pci_probe_reset_function(dev)) {
1331 		retval = device_create_file(&dev->dev, &reset_attr);
1332 		if (retval)
1333 			goto error;
1334 		dev->reset_fn = 1;
1335 	}
1336 	return 0;
1337 
1338 error:
1339 	pcie_aspm_remove_sysfs_dev_files(dev);
1340 	if (dev->vpd && dev->vpd->attr) {
1341 		sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1342 		kfree(dev->vpd->attr);
1343 	}
1344 
1345 	return retval;
1346 }
1347 
1348 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1349 {
1350 	int retval;
1351 	int rom_size = 0;
1352 	struct bin_attribute *attr;
1353 
1354 	if (!sysfs_initialized)
1355 		return -EACCES;
1356 
1357 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1358 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1359 	else
1360 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1361 	if (retval)
1362 		goto err;
1363 
1364 	retval = pci_create_resource_files(pdev);
1365 	if (retval)
1366 		goto err_config_file;
1367 
1368 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1369 		rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 	else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1371 		rom_size = 0x20000;
1372 
1373 	/* If the device has a ROM, try to expose it in sysfs. */
1374 	if (rom_size) {
1375 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1376 		if (!attr) {
1377 			retval = -ENOMEM;
1378 			goto err_resource_files;
1379 		}
1380 		sysfs_bin_attr_init(attr);
1381 		attr->size = rom_size;
1382 		attr->attr.name = "rom";
1383 		attr->attr.mode = S_IRUSR | S_IWUSR;
1384 		attr->read = pci_read_rom;
1385 		attr->write = pci_write_rom;
1386 		retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1387 		if (retval) {
1388 			kfree(attr);
1389 			goto err_resource_files;
1390 		}
1391 		pdev->rom_attr = attr;
1392 	}
1393 
1394 	/* add platform-specific attributes */
1395 	retval = pcibios_add_platform_entries(pdev);
1396 	if (retval)
1397 		goto err_rom_file;
1398 
1399 	/* add sysfs entries for various capabilities */
1400 	retval = pci_create_capabilities_sysfs(pdev);
1401 	if (retval)
1402 		goto err_rom_file;
1403 
1404 	pci_create_firmware_label_files(pdev);
1405 
1406 	return 0;
1407 
1408 err_rom_file:
1409 	if (rom_size) {
1410 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1411 		kfree(pdev->rom_attr);
1412 		pdev->rom_attr = NULL;
1413 	}
1414 err_resource_files:
1415 	pci_remove_resource_files(pdev);
1416 err_config_file:
1417 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1418 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1419 	else
1420 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1421 err:
1422 	return retval;
1423 }
1424 
1425 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1426 {
1427 	if (dev->vpd && dev->vpd->attr) {
1428 		sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1429 		kfree(dev->vpd->attr);
1430 	}
1431 
1432 	pcie_aspm_remove_sysfs_dev_files(dev);
1433 	if (dev->reset_fn) {
1434 		device_remove_file(&dev->dev, &reset_attr);
1435 		dev->reset_fn = 0;
1436 	}
1437 }
1438 
1439 /**
1440  * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1441  * @pdev: device whose entries we should free
1442  *
1443  * Cleanup when @pdev is removed from sysfs.
1444  */
1445 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1446 {
1447 	int rom_size = 0;
1448 
1449 	if (!sysfs_initialized)
1450 		return;
1451 
1452 	pci_remove_capabilities_sysfs(pdev);
1453 
1454 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1455 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1456 	else
1457 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1458 
1459 	pci_remove_resource_files(pdev);
1460 
1461 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1462 		rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1463 	else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1464 		rom_size = 0x20000;
1465 
1466 	if (rom_size && pdev->rom_attr) {
1467 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1468 		kfree(pdev->rom_attr);
1469 	}
1470 
1471 	pci_remove_firmware_label_files(pdev);
1472 
1473 }
1474 
1475 static int __init pci_sysfs_init(void)
1476 {
1477 	struct pci_dev *pdev = NULL;
1478 	int retval;
1479 
1480 	sysfs_initialized = 1;
1481 	for_each_pci_dev(pdev) {
1482 		retval = pci_create_sysfs_dev_files(pdev);
1483 		if (retval) {
1484 			pci_dev_put(pdev);
1485 			return retval;
1486 		}
1487 	}
1488 
1489 	return 0;
1490 }
1491 
1492 late_initcall(pci_sysfs_init);
1493 
1494 static struct attribute *pci_dev_dev_attrs[] = {
1495 	&vga_attr.attr,
1496 	NULL,
1497 };
1498 
1499 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1500 						struct attribute *a, int n)
1501 {
1502 	struct device *dev = container_of(kobj, struct device, kobj);
1503 	struct pci_dev *pdev = to_pci_dev(dev);
1504 
1505 	if (a == &vga_attr.attr)
1506 		if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1507 			return 0;
1508 
1509 	return a->mode;
1510 }
1511 
1512 static struct attribute *pci_dev_hp_attrs[] = {
1513 	&dev_remove_attr.attr,
1514 	&dev_rescan_attr.attr,
1515 	NULL,
1516 };
1517 
1518 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1519 						struct attribute *a, int n)
1520 {
1521 	struct device *dev = container_of(kobj, struct device, kobj);
1522 	struct pci_dev *pdev = to_pci_dev(dev);
1523 
1524 	if (pdev->is_virtfn)
1525 		return 0;
1526 
1527 	return a->mode;
1528 }
1529 
1530 static struct attribute_group pci_dev_hp_attr_group = {
1531 	.attrs = pci_dev_hp_attrs,
1532 	.is_visible = pci_dev_hp_attrs_are_visible,
1533 };
1534 
1535 #ifdef CONFIG_PCI_IOV
1536 static struct attribute *sriov_dev_attrs[] = {
1537 	&sriov_totalvfs_attr.attr,
1538 	&sriov_numvfs_attr.attr,
1539 	NULL,
1540 };
1541 
1542 static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1543 					 struct attribute *a, int n)
1544 {
1545 	struct device *dev = container_of(kobj, struct device, kobj);
1546 
1547 	if (!dev_is_pf(dev))
1548 		return 0;
1549 
1550 	return a->mode;
1551 }
1552 
1553 static struct attribute_group sriov_dev_attr_group = {
1554 	.attrs = sriov_dev_attrs,
1555 	.is_visible = sriov_attrs_are_visible,
1556 };
1557 #endif /* CONFIG_PCI_IOV */
1558 
1559 static struct attribute_group pci_dev_attr_group = {
1560 	.attrs = pci_dev_dev_attrs,
1561 	.is_visible = pci_dev_attrs_are_visible,
1562 };
1563 
1564 static const struct attribute_group *pci_dev_attr_groups[] = {
1565 	&pci_dev_attr_group,
1566 	&pci_dev_hp_attr_group,
1567 #ifdef CONFIG_PCI_IOV
1568 	&sriov_dev_attr_group,
1569 #endif
1570 	NULL,
1571 };
1572 
1573 struct device_type pci_dev_type = {
1574 	.groups = pci_dev_attr_groups,
1575 };
1576