1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/of.h> 30 #include "pci.h" 31 32 static int sysfs_initialized; /* = 0 */ 33 34 /* show configuration fields */ 35 #define pci_config_attr(field, format_string) \ 36 static ssize_t \ 37 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 38 { \ 39 struct pci_dev *pdev; \ 40 \ 41 pdev = to_pci_dev(dev); \ 42 return sprintf(buf, format_string, pdev->field); \ 43 } \ 44 static DEVICE_ATTR_RO(field) 45 46 pci_config_attr(vendor, "0x%04x\n"); 47 pci_config_attr(device, "0x%04x\n"); 48 pci_config_attr(subsystem_vendor, "0x%04x\n"); 49 pci_config_attr(subsystem_device, "0x%04x\n"); 50 pci_config_attr(revision, "0x%02x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf(buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (kstrtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 static DEVICE_ATTR_RW(broken_parity_status); 77 78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 79 struct device_attribute *attr, char *buf) 80 { 81 const struct cpumask *mask; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 return cpumap_print_to_pagebuf(list, buf, mask); 90 } 91 92 static ssize_t local_cpus_show(struct device *dev, 93 struct device_attribute *attr, char *buf) 94 { 95 return pci_dev_show_local_cpu(dev, false, attr, buf); 96 } 97 static DEVICE_ATTR_RO(local_cpus); 98 99 static ssize_t local_cpulist_show(struct device *dev, 100 struct device_attribute *attr, char *buf) 101 { 102 return pci_dev_show_local_cpu(dev, true, attr, buf); 103 } 104 static DEVICE_ATTR_RO(local_cpulist); 105 106 /* 107 * PCI Bus Class Devices 108 */ 109 static ssize_t cpuaffinity_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 113 114 return cpumap_print_to_pagebuf(false, buf, cpumask); 115 } 116 static DEVICE_ATTR_RO(cpuaffinity); 117 118 static ssize_t cpulistaffinity_show(struct device *dev, 119 struct device_attribute *attr, char *buf) 120 { 121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 122 123 return cpumap_print_to_pagebuf(true, buf, cpumask); 124 } 125 static DEVICE_ATTR_RO(cpulistaffinity); 126 127 /* show resources */ 128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 129 char *buf) 130 { 131 struct pci_dev *pci_dev = to_pci_dev(dev); 132 char *str = buf; 133 int i; 134 int max; 135 resource_size_t start, end; 136 137 if (pci_dev->subordinate) 138 max = DEVICE_COUNT_RESOURCE; 139 else 140 max = PCI_BRIDGE_RESOURCES; 141 142 for (i = 0; i < max; i++) { 143 struct resource *res = &pci_dev->resource[i]; 144 pci_resource_to_user(pci_dev, i, res, &start, &end); 145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 146 (unsigned long long)start, 147 (unsigned long long)end, 148 (unsigned long long)res->flags); 149 } 150 return (str - buf); 151 } 152 static DEVICE_ATTR_RO(resource); 153 154 static ssize_t max_link_speed_show(struct device *dev, 155 struct device_attribute *attr, char *buf) 156 { 157 struct pci_dev *pdev = to_pci_dev(dev); 158 159 return sprintf(buf, "%s\n", 160 pci_speed_string(pcie_get_speed_cap(pdev))); 161 } 162 static DEVICE_ATTR_RO(max_link_speed); 163 164 static ssize_t max_link_width_show(struct device *dev, 165 struct device_attribute *attr, char *buf) 166 { 167 struct pci_dev *pdev = to_pci_dev(dev); 168 169 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev)); 170 } 171 static DEVICE_ATTR_RO(max_link_width); 172 173 static ssize_t current_link_speed_show(struct device *dev, 174 struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 u16 linkstat; 178 int err; 179 enum pci_bus_speed speed; 180 181 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 182 if (err) 183 return -EINVAL; 184 185 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 186 187 return sprintf(buf, "%s\n", pci_speed_string(speed)); 188 } 189 static DEVICE_ATTR_RO(current_link_speed); 190 191 static ssize_t current_link_width_show(struct device *dev, 192 struct device_attribute *attr, char *buf) 193 { 194 struct pci_dev *pci_dev = to_pci_dev(dev); 195 u16 linkstat; 196 int err; 197 198 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 199 if (err) 200 return -EINVAL; 201 202 return sprintf(buf, "%u\n", 203 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 204 } 205 static DEVICE_ATTR_RO(current_link_width); 206 207 static ssize_t secondary_bus_number_show(struct device *dev, 208 struct device_attribute *attr, 209 char *buf) 210 { 211 struct pci_dev *pci_dev = to_pci_dev(dev); 212 u8 sec_bus; 213 int err; 214 215 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 216 if (err) 217 return -EINVAL; 218 219 return sprintf(buf, "%u\n", sec_bus); 220 } 221 static DEVICE_ATTR_RO(secondary_bus_number); 222 223 static ssize_t subordinate_bus_number_show(struct device *dev, 224 struct device_attribute *attr, 225 char *buf) 226 { 227 struct pci_dev *pci_dev = to_pci_dev(dev); 228 u8 sub_bus; 229 int err; 230 231 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 232 if (err) 233 return -EINVAL; 234 235 return sprintf(buf, "%u\n", sub_bus); 236 } 237 static DEVICE_ATTR_RO(subordinate_bus_number); 238 239 static ssize_t ari_enabled_show(struct device *dev, 240 struct device_attribute *attr, 241 char *buf) 242 { 243 struct pci_dev *pci_dev = to_pci_dev(dev); 244 245 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 246 } 247 static DEVICE_ATTR_RO(ari_enabled); 248 249 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 250 char *buf) 251 { 252 struct pci_dev *pci_dev = to_pci_dev(dev); 253 254 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 255 pci_dev->vendor, pci_dev->device, 256 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 257 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 258 (u8)(pci_dev->class)); 259 } 260 static DEVICE_ATTR_RO(modalias); 261 262 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 263 const char *buf, size_t count) 264 { 265 struct pci_dev *pdev = to_pci_dev(dev); 266 unsigned long val; 267 ssize_t result = kstrtoul(buf, 0, &val); 268 269 if (result < 0) 270 return result; 271 272 /* this can crash the machine when done on the "wrong" device */ 273 if (!capable(CAP_SYS_ADMIN)) 274 return -EPERM; 275 276 device_lock(dev); 277 if (dev->driver) 278 result = -EBUSY; 279 else if (val) 280 result = pci_enable_device(pdev); 281 else if (pci_is_enabled(pdev)) 282 pci_disable_device(pdev); 283 else 284 result = -EIO; 285 device_unlock(dev); 286 287 return result < 0 ? result : count; 288 } 289 290 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 291 char *buf) 292 { 293 struct pci_dev *pdev; 294 295 pdev = to_pci_dev(dev); 296 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 297 } 298 static DEVICE_ATTR_RW(enable); 299 300 #ifdef CONFIG_NUMA 301 static ssize_t numa_node_store(struct device *dev, 302 struct device_attribute *attr, const char *buf, 303 size_t count) 304 { 305 struct pci_dev *pdev = to_pci_dev(dev); 306 int node, ret; 307 308 if (!capable(CAP_SYS_ADMIN)) 309 return -EPERM; 310 311 ret = kstrtoint(buf, 0, &node); 312 if (ret) 313 return ret; 314 315 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 316 return -EINVAL; 317 318 if (node != NUMA_NO_NODE && !node_online(node)) 319 return -EINVAL; 320 321 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 322 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 323 node); 324 325 dev->numa_node = node; 326 return count; 327 } 328 329 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 330 char *buf) 331 { 332 return sprintf(buf, "%d\n", dev->numa_node); 333 } 334 static DEVICE_ATTR_RW(numa_node); 335 #endif 336 337 static ssize_t dma_mask_bits_show(struct device *dev, 338 struct device_attribute *attr, char *buf) 339 { 340 struct pci_dev *pdev = to_pci_dev(dev); 341 342 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 343 } 344 static DEVICE_ATTR_RO(dma_mask_bits); 345 346 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 347 struct device_attribute *attr, 348 char *buf) 349 { 350 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 351 } 352 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 353 354 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 355 char *buf) 356 { 357 struct pci_dev *pdev = to_pci_dev(dev); 358 struct pci_bus *subordinate = pdev->subordinate; 359 360 return sprintf(buf, "%u\n", subordinate ? 361 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 362 : !pdev->no_msi); 363 } 364 365 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 366 const char *buf, size_t count) 367 { 368 struct pci_dev *pdev = to_pci_dev(dev); 369 struct pci_bus *subordinate = pdev->subordinate; 370 unsigned long val; 371 372 if (kstrtoul(buf, 0, &val) < 0) 373 return -EINVAL; 374 375 if (!capable(CAP_SYS_ADMIN)) 376 return -EPERM; 377 378 /* 379 * "no_msi" and "bus_flags" only affect what happens when a driver 380 * requests MSI or MSI-X. They don't affect any drivers that have 381 * already requested MSI or MSI-X. 382 */ 383 if (!subordinate) { 384 pdev->no_msi = !val; 385 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 386 val ? "allowed" : "disallowed"); 387 return count; 388 } 389 390 if (val) 391 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 392 else 393 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 394 395 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 396 val ? "allowed" : "disallowed"); 397 return count; 398 } 399 static DEVICE_ATTR_RW(msi_bus); 400 401 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count) 402 { 403 unsigned long val; 404 struct pci_bus *b = NULL; 405 406 if (kstrtoul(buf, 0, &val) < 0) 407 return -EINVAL; 408 409 if (val) { 410 pci_lock_rescan_remove(); 411 while ((b = pci_find_next_bus(b)) != NULL) 412 pci_rescan_bus(b); 413 pci_unlock_rescan_remove(); 414 } 415 return count; 416 } 417 static BUS_ATTR_WO(rescan); 418 419 static struct attribute *pci_bus_attrs[] = { 420 &bus_attr_rescan.attr, 421 NULL, 422 }; 423 424 static const struct attribute_group pci_bus_group = { 425 .attrs = pci_bus_attrs, 426 }; 427 428 const struct attribute_group *pci_bus_groups[] = { 429 &pci_bus_group, 430 NULL, 431 }; 432 433 static ssize_t dev_rescan_store(struct device *dev, 434 struct device_attribute *attr, const char *buf, 435 size_t count) 436 { 437 unsigned long val; 438 struct pci_dev *pdev = to_pci_dev(dev); 439 440 if (kstrtoul(buf, 0, &val) < 0) 441 return -EINVAL; 442 443 if (val) { 444 pci_lock_rescan_remove(); 445 pci_rescan_bus(pdev->bus); 446 pci_unlock_rescan_remove(); 447 } 448 return count; 449 } 450 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 451 dev_rescan_store); 452 453 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 454 const char *buf, size_t count) 455 { 456 unsigned long val; 457 458 if (kstrtoul(buf, 0, &val) < 0) 459 return -EINVAL; 460 461 if (val && device_remove_file_self(dev, attr)) 462 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 463 return count; 464 } 465 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 466 remove_store); 467 468 static ssize_t bus_rescan_store(struct device *dev, 469 struct device_attribute *attr, 470 const char *buf, size_t count) 471 { 472 unsigned long val; 473 struct pci_bus *bus = to_pci_bus(dev); 474 475 if (kstrtoul(buf, 0, &val) < 0) 476 return -EINVAL; 477 478 if (val) { 479 pci_lock_rescan_remove(); 480 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 481 pci_rescan_bus_bridge_resize(bus->self); 482 else 483 pci_rescan_bus(bus); 484 pci_unlock_rescan_remove(); 485 } 486 return count; 487 } 488 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 489 bus_rescan_store); 490 491 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 492 static ssize_t d3cold_allowed_store(struct device *dev, 493 struct device_attribute *attr, 494 const char *buf, size_t count) 495 { 496 struct pci_dev *pdev = to_pci_dev(dev); 497 unsigned long val; 498 499 if (kstrtoul(buf, 0, &val) < 0) 500 return -EINVAL; 501 502 pdev->d3cold_allowed = !!val; 503 if (pdev->d3cold_allowed) 504 pci_d3cold_enable(pdev); 505 else 506 pci_d3cold_disable(pdev); 507 508 pm_runtime_resume(dev); 509 510 return count; 511 } 512 513 static ssize_t d3cold_allowed_show(struct device *dev, 514 struct device_attribute *attr, char *buf) 515 { 516 struct pci_dev *pdev = to_pci_dev(dev); 517 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 518 } 519 static DEVICE_ATTR_RW(d3cold_allowed); 520 #endif 521 522 #ifdef CONFIG_OF 523 static ssize_t devspec_show(struct device *dev, 524 struct device_attribute *attr, char *buf) 525 { 526 struct pci_dev *pdev = to_pci_dev(dev); 527 struct device_node *np = pci_device_to_OF_node(pdev); 528 529 if (np == NULL) 530 return 0; 531 return sprintf(buf, "%pOF", np); 532 } 533 static DEVICE_ATTR_RO(devspec); 534 #endif 535 536 static ssize_t driver_override_store(struct device *dev, 537 struct device_attribute *attr, 538 const char *buf, size_t count) 539 { 540 struct pci_dev *pdev = to_pci_dev(dev); 541 char *driver_override, *old, *cp; 542 543 /* We need to keep extra room for a newline */ 544 if (count >= (PAGE_SIZE - 1)) 545 return -EINVAL; 546 547 driver_override = kstrndup(buf, count, GFP_KERNEL); 548 if (!driver_override) 549 return -ENOMEM; 550 551 cp = strchr(driver_override, '\n'); 552 if (cp) 553 *cp = '\0'; 554 555 device_lock(dev); 556 old = pdev->driver_override; 557 if (strlen(driver_override)) { 558 pdev->driver_override = driver_override; 559 } else { 560 kfree(driver_override); 561 pdev->driver_override = NULL; 562 } 563 device_unlock(dev); 564 565 kfree(old); 566 567 return count; 568 } 569 570 static ssize_t driver_override_show(struct device *dev, 571 struct device_attribute *attr, char *buf) 572 { 573 struct pci_dev *pdev = to_pci_dev(dev); 574 ssize_t len; 575 576 device_lock(dev); 577 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 578 device_unlock(dev); 579 return len; 580 } 581 static DEVICE_ATTR_RW(driver_override); 582 583 static struct attribute *pci_dev_attrs[] = { 584 &dev_attr_resource.attr, 585 &dev_attr_vendor.attr, 586 &dev_attr_device.attr, 587 &dev_attr_subsystem_vendor.attr, 588 &dev_attr_subsystem_device.attr, 589 &dev_attr_revision.attr, 590 &dev_attr_class.attr, 591 &dev_attr_irq.attr, 592 &dev_attr_local_cpus.attr, 593 &dev_attr_local_cpulist.attr, 594 &dev_attr_modalias.attr, 595 #ifdef CONFIG_NUMA 596 &dev_attr_numa_node.attr, 597 #endif 598 &dev_attr_dma_mask_bits.attr, 599 &dev_attr_consistent_dma_mask_bits.attr, 600 &dev_attr_enable.attr, 601 &dev_attr_broken_parity_status.attr, 602 &dev_attr_msi_bus.attr, 603 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 604 &dev_attr_d3cold_allowed.attr, 605 #endif 606 #ifdef CONFIG_OF 607 &dev_attr_devspec.attr, 608 #endif 609 &dev_attr_driver_override.attr, 610 &dev_attr_ari_enabled.attr, 611 NULL, 612 }; 613 614 static struct attribute *pci_bridge_attrs[] = { 615 &dev_attr_subordinate_bus_number.attr, 616 &dev_attr_secondary_bus_number.attr, 617 NULL, 618 }; 619 620 static struct attribute *pcie_dev_attrs[] = { 621 &dev_attr_current_link_speed.attr, 622 &dev_attr_current_link_width.attr, 623 &dev_attr_max_link_width.attr, 624 &dev_attr_max_link_speed.attr, 625 NULL, 626 }; 627 628 static struct attribute *pcibus_attrs[] = { 629 &dev_attr_bus_rescan.attr, 630 &dev_attr_cpuaffinity.attr, 631 &dev_attr_cpulistaffinity.attr, 632 NULL, 633 }; 634 635 static const struct attribute_group pcibus_group = { 636 .attrs = pcibus_attrs, 637 }; 638 639 const struct attribute_group *pcibus_groups[] = { 640 &pcibus_group, 641 NULL, 642 }; 643 644 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 645 char *buf) 646 { 647 struct pci_dev *pdev = to_pci_dev(dev); 648 struct pci_dev *vga_dev = vga_default_device(); 649 650 if (vga_dev) 651 return sprintf(buf, "%u\n", (pdev == vga_dev)); 652 653 return sprintf(buf, "%u\n", 654 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 655 IORESOURCE_ROM_SHADOW)); 656 } 657 static DEVICE_ATTR_RO(boot_vga); 658 659 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 660 struct bin_attribute *bin_attr, char *buf, 661 loff_t off, size_t count) 662 { 663 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 664 unsigned int size = 64; 665 loff_t init_off = off; 666 u8 *data = (u8 *) buf; 667 668 /* Several chips lock up trying to read undefined config space */ 669 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 670 size = dev->cfg_size; 671 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 672 size = 128; 673 674 if (off > size) 675 return 0; 676 if (off + count > size) { 677 size -= off; 678 count = size; 679 } else { 680 size = count; 681 } 682 683 pci_config_pm_runtime_get(dev); 684 685 if ((off & 1) && size) { 686 u8 val; 687 pci_user_read_config_byte(dev, off, &val); 688 data[off - init_off] = val; 689 off++; 690 size--; 691 } 692 693 if ((off & 3) && size > 2) { 694 u16 val; 695 pci_user_read_config_word(dev, off, &val); 696 data[off - init_off] = val & 0xff; 697 data[off - init_off + 1] = (val >> 8) & 0xff; 698 off += 2; 699 size -= 2; 700 } 701 702 while (size > 3) { 703 u32 val; 704 pci_user_read_config_dword(dev, off, &val); 705 data[off - init_off] = val & 0xff; 706 data[off - init_off + 1] = (val >> 8) & 0xff; 707 data[off - init_off + 2] = (val >> 16) & 0xff; 708 data[off - init_off + 3] = (val >> 24) & 0xff; 709 off += 4; 710 size -= 4; 711 } 712 713 if (size >= 2) { 714 u16 val; 715 pci_user_read_config_word(dev, off, &val); 716 data[off - init_off] = val & 0xff; 717 data[off - init_off + 1] = (val >> 8) & 0xff; 718 off += 2; 719 size -= 2; 720 } 721 722 if (size > 0) { 723 u8 val; 724 pci_user_read_config_byte(dev, off, &val); 725 data[off - init_off] = val; 726 off++; 727 --size; 728 } 729 730 pci_config_pm_runtime_put(dev); 731 732 return count; 733 } 734 735 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 736 struct bin_attribute *bin_attr, char *buf, 737 loff_t off, size_t count) 738 { 739 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 740 unsigned int size = count; 741 loff_t init_off = off; 742 u8 *data = (u8 *) buf; 743 int ret; 744 745 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 746 if (ret) 747 return ret; 748 749 if (off > dev->cfg_size) 750 return 0; 751 if (off + count > dev->cfg_size) { 752 size = dev->cfg_size - off; 753 count = size; 754 } 755 756 pci_config_pm_runtime_get(dev); 757 758 if ((off & 1) && size) { 759 pci_user_write_config_byte(dev, off, data[off - init_off]); 760 off++; 761 size--; 762 } 763 764 if ((off & 3) && size > 2) { 765 u16 val = data[off - init_off]; 766 val |= (u16) data[off - init_off + 1] << 8; 767 pci_user_write_config_word(dev, off, val); 768 off += 2; 769 size -= 2; 770 } 771 772 while (size > 3) { 773 u32 val = data[off - init_off]; 774 val |= (u32) data[off - init_off + 1] << 8; 775 val |= (u32) data[off - init_off + 2] << 16; 776 val |= (u32) data[off - init_off + 3] << 24; 777 pci_user_write_config_dword(dev, off, val); 778 off += 4; 779 size -= 4; 780 } 781 782 if (size >= 2) { 783 u16 val = data[off - init_off]; 784 val |= (u16) data[off - init_off + 1] << 8; 785 pci_user_write_config_word(dev, off, val); 786 off += 2; 787 size -= 2; 788 } 789 790 if (size) { 791 pci_user_write_config_byte(dev, off, data[off - init_off]); 792 off++; 793 --size; 794 } 795 796 pci_config_pm_runtime_put(dev); 797 798 return count; 799 } 800 801 #ifdef HAVE_PCI_LEGACY 802 /** 803 * pci_read_legacy_io - read byte(s) from legacy I/O port space 804 * @filp: open sysfs file 805 * @kobj: kobject corresponding to file to read from 806 * @bin_attr: struct bin_attribute for this file 807 * @buf: buffer to store results 808 * @off: offset into legacy I/O port space 809 * @count: number of bytes to read 810 * 811 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 812 * callback routine (pci_legacy_read). 813 */ 814 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 815 struct bin_attribute *bin_attr, char *buf, 816 loff_t off, size_t count) 817 { 818 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 819 820 /* Only support 1, 2 or 4 byte accesses */ 821 if (count != 1 && count != 2 && count != 4) 822 return -EINVAL; 823 824 return pci_legacy_read(bus, off, (u32 *)buf, count); 825 } 826 827 /** 828 * pci_write_legacy_io - write byte(s) to legacy I/O port space 829 * @filp: open sysfs file 830 * @kobj: kobject corresponding to file to read from 831 * @bin_attr: struct bin_attribute for this file 832 * @buf: buffer containing value to be written 833 * @off: offset into legacy I/O port space 834 * @count: number of bytes to write 835 * 836 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 837 * callback routine (pci_legacy_write). 838 */ 839 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 840 struct bin_attribute *bin_attr, char *buf, 841 loff_t off, size_t count) 842 { 843 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 844 845 /* Only support 1, 2 or 4 byte accesses */ 846 if (count != 1 && count != 2 && count != 4) 847 return -EINVAL; 848 849 return pci_legacy_write(bus, off, *(u32 *)buf, count); 850 } 851 852 /** 853 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 854 * @filp: open sysfs file 855 * @kobj: kobject corresponding to device to be mapped 856 * @attr: struct bin_attribute for this file 857 * @vma: struct vm_area_struct passed to mmap 858 * 859 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 860 * legacy memory space (first meg of bus space) into application virtual 861 * memory space. 862 */ 863 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 864 struct bin_attribute *attr, 865 struct vm_area_struct *vma) 866 { 867 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 868 869 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 870 } 871 872 /** 873 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 874 * @filp: open sysfs file 875 * @kobj: kobject corresponding to device to be mapped 876 * @attr: struct bin_attribute for this file 877 * @vma: struct vm_area_struct passed to mmap 878 * 879 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 880 * legacy IO space (first meg of bus space) into application virtual 881 * memory space. Returns -ENOSYS if the operation isn't supported 882 */ 883 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 884 struct bin_attribute *attr, 885 struct vm_area_struct *vma) 886 { 887 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 888 889 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 890 } 891 892 /** 893 * pci_adjust_legacy_attr - adjustment of legacy file attributes 894 * @b: bus to create files under 895 * @mmap_type: I/O port or memory 896 * 897 * Stub implementation. Can be overridden by arch if necessary. 898 */ 899 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 900 enum pci_mmap_state mmap_type) 901 { 902 } 903 904 /** 905 * pci_create_legacy_files - create legacy I/O port and memory files 906 * @b: bus to create files under 907 * 908 * Some platforms allow access to legacy I/O port and ISA memory space on 909 * a per-bus basis. This routine creates the files and ties them into 910 * their associated read, write and mmap files from pci-sysfs.c 911 * 912 * On error unwind, but don't propagate the error to the caller 913 * as it is ok to set up the PCI bus without these files. 914 */ 915 void pci_create_legacy_files(struct pci_bus *b) 916 { 917 int error; 918 919 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 920 GFP_ATOMIC); 921 if (!b->legacy_io) 922 goto kzalloc_err; 923 924 sysfs_bin_attr_init(b->legacy_io); 925 b->legacy_io->attr.name = "legacy_io"; 926 b->legacy_io->size = 0xffff; 927 b->legacy_io->attr.mode = 0600; 928 b->legacy_io->read = pci_read_legacy_io; 929 b->legacy_io->write = pci_write_legacy_io; 930 b->legacy_io->mmap = pci_mmap_legacy_io; 931 pci_adjust_legacy_attr(b, pci_mmap_io); 932 error = device_create_bin_file(&b->dev, b->legacy_io); 933 if (error) 934 goto legacy_io_err; 935 936 /* Allocated above after the legacy_io struct */ 937 b->legacy_mem = b->legacy_io + 1; 938 sysfs_bin_attr_init(b->legacy_mem); 939 b->legacy_mem->attr.name = "legacy_mem"; 940 b->legacy_mem->size = 1024*1024; 941 b->legacy_mem->attr.mode = 0600; 942 b->legacy_mem->mmap = pci_mmap_legacy_mem; 943 pci_adjust_legacy_attr(b, pci_mmap_mem); 944 error = device_create_bin_file(&b->dev, b->legacy_mem); 945 if (error) 946 goto legacy_mem_err; 947 948 return; 949 950 legacy_mem_err: 951 device_remove_bin_file(&b->dev, b->legacy_io); 952 legacy_io_err: 953 kfree(b->legacy_io); 954 b->legacy_io = NULL; 955 kzalloc_err: 956 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 957 } 958 959 void pci_remove_legacy_files(struct pci_bus *b) 960 { 961 if (b->legacy_io) { 962 device_remove_bin_file(&b->dev, b->legacy_io); 963 device_remove_bin_file(&b->dev, b->legacy_mem); 964 kfree(b->legacy_io); /* both are allocated here */ 965 } 966 } 967 #endif /* HAVE_PCI_LEGACY */ 968 969 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 970 971 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 972 enum pci_mmap_api mmap_api) 973 { 974 unsigned long nr, start, size; 975 resource_size_t pci_start = 0, pci_end; 976 977 if (pci_resource_len(pdev, resno) == 0) 978 return 0; 979 nr = vma_pages(vma); 980 start = vma->vm_pgoff; 981 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 982 if (mmap_api == PCI_MMAP_PROCFS) { 983 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 984 &pci_start, &pci_end); 985 pci_start >>= PAGE_SHIFT; 986 } 987 if (start >= pci_start && start < pci_start + size && 988 start + nr <= pci_start + size) 989 return 1; 990 return 0; 991 } 992 993 /** 994 * pci_mmap_resource - map a PCI resource into user memory space 995 * @kobj: kobject for mapping 996 * @attr: struct bin_attribute for the file being mapped 997 * @vma: struct vm_area_struct passed into the mmap 998 * @write_combine: 1 for write_combine mapping 999 * 1000 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1001 */ 1002 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1003 struct vm_area_struct *vma, int write_combine) 1004 { 1005 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1006 int bar = (unsigned long)attr->private; 1007 enum pci_mmap_state mmap_type; 1008 struct resource *res = &pdev->resource[bar]; 1009 int ret; 1010 1011 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1012 if (ret) 1013 return ret; 1014 1015 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1016 return -EINVAL; 1017 1018 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1019 return -EINVAL; 1020 1021 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1022 1023 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1024 } 1025 1026 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1027 struct bin_attribute *attr, 1028 struct vm_area_struct *vma) 1029 { 1030 return pci_mmap_resource(kobj, attr, vma, 0); 1031 } 1032 1033 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1034 struct bin_attribute *attr, 1035 struct vm_area_struct *vma) 1036 { 1037 return pci_mmap_resource(kobj, attr, vma, 1); 1038 } 1039 1040 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1041 struct bin_attribute *attr, char *buf, 1042 loff_t off, size_t count, bool write) 1043 { 1044 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1045 int bar = (unsigned long)attr->private; 1046 unsigned long port = off; 1047 1048 port += pci_resource_start(pdev, bar); 1049 1050 if (port > pci_resource_end(pdev, bar)) 1051 return 0; 1052 1053 if (port + count - 1 > pci_resource_end(pdev, bar)) 1054 return -EINVAL; 1055 1056 switch (count) { 1057 case 1: 1058 if (write) 1059 outb(*(u8 *)buf, port); 1060 else 1061 *(u8 *)buf = inb(port); 1062 return 1; 1063 case 2: 1064 if (write) 1065 outw(*(u16 *)buf, port); 1066 else 1067 *(u16 *)buf = inw(port); 1068 return 2; 1069 case 4: 1070 if (write) 1071 outl(*(u32 *)buf, port); 1072 else 1073 *(u32 *)buf = inl(port); 1074 return 4; 1075 } 1076 return -EINVAL; 1077 } 1078 1079 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1080 struct bin_attribute *attr, char *buf, 1081 loff_t off, size_t count) 1082 { 1083 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1084 } 1085 1086 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1087 struct bin_attribute *attr, char *buf, 1088 loff_t off, size_t count) 1089 { 1090 int ret; 1091 1092 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1093 if (ret) 1094 return ret; 1095 1096 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1097 } 1098 1099 /** 1100 * pci_remove_resource_files - cleanup resource files 1101 * @pdev: dev to cleanup 1102 * 1103 * If we created resource files for @pdev, remove them from sysfs and 1104 * free their resources. 1105 */ 1106 static void pci_remove_resource_files(struct pci_dev *pdev) 1107 { 1108 int i; 1109 1110 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1111 struct bin_attribute *res_attr; 1112 1113 res_attr = pdev->res_attr[i]; 1114 if (res_attr) { 1115 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1116 kfree(res_attr); 1117 } 1118 1119 res_attr = pdev->res_attr_wc[i]; 1120 if (res_attr) { 1121 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1122 kfree(res_attr); 1123 } 1124 } 1125 } 1126 1127 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1128 { 1129 /* allocate attribute structure, piggyback attribute name */ 1130 int name_len = write_combine ? 13 : 10; 1131 struct bin_attribute *res_attr; 1132 char *res_attr_name; 1133 int retval; 1134 1135 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1136 if (!res_attr) 1137 return -ENOMEM; 1138 1139 res_attr_name = (char *)(res_attr + 1); 1140 1141 sysfs_bin_attr_init(res_attr); 1142 if (write_combine) { 1143 pdev->res_attr_wc[num] = res_attr; 1144 sprintf(res_attr_name, "resource%d_wc", num); 1145 res_attr->mmap = pci_mmap_resource_wc; 1146 } else { 1147 pdev->res_attr[num] = res_attr; 1148 sprintf(res_attr_name, "resource%d", num); 1149 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1150 res_attr->read = pci_read_resource_io; 1151 res_attr->write = pci_write_resource_io; 1152 if (arch_can_pci_mmap_io()) 1153 res_attr->mmap = pci_mmap_resource_uc; 1154 } else { 1155 res_attr->mmap = pci_mmap_resource_uc; 1156 } 1157 } 1158 res_attr->attr.name = res_attr_name; 1159 res_attr->attr.mode = 0600; 1160 res_attr->size = pci_resource_len(pdev, num); 1161 res_attr->private = (void *)(unsigned long)num; 1162 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1163 if (retval) 1164 kfree(res_attr); 1165 1166 return retval; 1167 } 1168 1169 /** 1170 * pci_create_resource_files - create resource files in sysfs for @dev 1171 * @pdev: dev in question 1172 * 1173 * Walk the resources in @pdev creating files for each resource available. 1174 */ 1175 static int pci_create_resource_files(struct pci_dev *pdev) 1176 { 1177 int i; 1178 int retval; 1179 1180 /* Expose the PCI resources from this device as files */ 1181 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1182 1183 /* skip empty resources */ 1184 if (!pci_resource_len(pdev, i)) 1185 continue; 1186 1187 retval = pci_create_attr(pdev, i, 0); 1188 /* for prefetchable resources, create a WC mappable file */ 1189 if (!retval && arch_can_pci_mmap_wc() && 1190 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1191 retval = pci_create_attr(pdev, i, 1); 1192 if (retval) { 1193 pci_remove_resource_files(pdev); 1194 return retval; 1195 } 1196 } 1197 return 0; 1198 } 1199 #else /* !HAVE_PCI_MMAP */ 1200 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1201 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1202 #endif /* HAVE_PCI_MMAP */ 1203 1204 /** 1205 * pci_write_rom - used to enable access to the PCI ROM display 1206 * @filp: sysfs file 1207 * @kobj: kernel object handle 1208 * @bin_attr: struct bin_attribute for this file 1209 * @buf: user input 1210 * @off: file offset 1211 * @count: number of byte in input 1212 * 1213 * writing anything except 0 enables it 1214 */ 1215 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1216 struct bin_attribute *bin_attr, char *buf, 1217 loff_t off, size_t count) 1218 { 1219 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1220 1221 if ((off == 0) && (*buf == '0') && (count == 2)) 1222 pdev->rom_attr_enabled = 0; 1223 else 1224 pdev->rom_attr_enabled = 1; 1225 1226 return count; 1227 } 1228 1229 /** 1230 * pci_read_rom - read a PCI ROM 1231 * @filp: sysfs file 1232 * @kobj: kernel object handle 1233 * @bin_attr: struct bin_attribute for this file 1234 * @buf: where to put the data we read from the ROM 1235 * @off: file offset 1236 * @count: number of bytes to read 1237 * 1238 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1239 * device corresponding to @kobj. 1240 */ 1241 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1242 struct bin_attribute *bin_attr, char *buf, 1243 loff_t off, size_t count) 1244 { 1245 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1246 void __iomem *rom; 1247 size_t size; 1248 1249 if (!pdev->rom_attr_enabled) 1250 return -EINVAL; 1251 1252 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1253 if (!rom || !size) 1254 return -EIO; 1255 1256 if (off >= size) 1257 count = 0; 1258 else { 1259 if (off + count > size) 1260 count = size - off; 1261 1262 memcpy_fromio(buf, rom + off, count); 1263 } 1264 pci_unmap_rom(pdev, rom); 1265 1266 return count; 1267 } 1268 1269 static const struct bin_attribute pci_config_attr = { 1270 .attr = { 1271 .name = "config", 1272 .mode = 0644, 1273 }, 1274 .size = PCI_CFG_SPACE_SIZE, 1275 .read = pci_read_config, 1276 .write = pci_write_config, 1277 }; 1278 1279 static const struct bin_attribute pcie_config_attr = { 1280 .attr = { 1281 .name = "config", 1282 .mode = 0644, 1283 }, 1284 .size = PCI_CFG_SPACE_EXP_SIZE, 1285 .read = pci_read_config, 1286 .write = pci_write_config, 1287 }; 1288 1289 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1290 const char *buf, size_t count) 1291 { 1292 struct pci_dev *pdev = to_pci_dev(dev); 1293 unsigned long val; 1294 ssize_t result = kstrtoul(buf, 0, &val); 1295 1296 if (result < 0) 1297 return result; 1298 1299 if (val != 1) 1300 return -EINVAL; 1301 1302 pm_runtime_get_sync(dev); 1303 result = pci_reset_function(pdev); 1304 pm_runtime_put(dev); 1305 if (result < 0) 1306 return result; 1307 1308 return count; 1309 } 1310 1311 static DEVICE_ATTR(reset, 0200, NULL, reset_store); 1312 1313 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1314 { 1315 int retval; 1316 1317 pcie_vpd_create_sysfs_dev_files(dev); 1318 1319 if (dev->reset_fn) { 1320 retval = device_create_file(&dev->dev, &dev_attr_reset); 1321 if (retval) 1322 goto error; 1323 } 1324 return 0; 1325 1326 error: 1327 pcie_vpd_remove_sysfs_dev_files(dev); 1328 return retval; 1329 } 1330 1331 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1332 { 1333 int retval; 1334 int rom_size; 1335 struct bin_attribute *attr; 1336 1337 if (!sysfs_initialized) 1338 return -EACCES; 1339 1340 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1341 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1342 else 1343 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1344 if (retval) 1345 goto err; 1346 1347 retval = pci_create_resource_files(pdev); 1348 if (retval) 1349 goto err_config_file; 1350 1351 /* If the device has a ROM, try to expose it in sysfs. */ 1352 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1353 if (rom_size) { 1354 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1355 if (!attr) { 1356 retval = -ENOMEM; 1357 goto err_resource_files; 1358 } 1359 sysfs_bin_attr_init(attr); 1360 attr->size = rom_size; 1361 attr->attr.name = "rom"; 1362 attr->attr.mode = 0600; 1363 attr->read = pci_read_rom; 1364 attr->write = pci_write_rom; 1365 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1366 if (retval) { 1367 kfree(attr); 1368 goto err_resource_files; 1369 } 1370 pdev->rom_attr = attr; 1371 } 1372 1373 /* add sysfs entries for various capabilities */ 1374 retval = pci_create_capabilities_sysfs(pdev); 1375 if (retval) 1376 goto err_rom_file; 1377 1378 pci_create_firmware_label_files(pdev); 1379 1380 return 0; 1381 1382 err_rom_file: 1383 if (pdev->rom_attr) { 1384 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1385 kfree(pdev->rom_attr); 1386 pdev->rom_attr = NULL; 1387 } 1388 err_resource_files: 1389 pci_remove_resource_files(pdev); 1390 err_config_file: 1391 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1392 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1393 else 1394 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1395 err: 1396 return retval; 1397 } 1398 1399 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1400 { 1401 pcie_vpd_remove_sysfs_dev_files(dev); 1402 if (dev->reset_fn) { 1403 device_remove_file(&dev->dev, &dev_attr_reset); 1404 dev->reset_fn = 0; 1405 } 1406 } 1407 1408 /** 1409 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1410 * @pdev: device whose entries we should free 1411 * 1412 * Cleanup when @pdev is removed from sysfs. 1413 */ 1414 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1415 { 1416 if (!sysfs_initialized) 1417 return; 1418 1419 pci_remove_capabilities_sysfs(pdev); 1420 1421 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1422 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1423 else 1424 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1425 1426 pci_remove_resource_files(pdev); 1427 1428 if (pdev->rom_attr) { 1429 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1430 kfree(pdev->rom_attr); 1431 pdev->rom_attr = NULL; 1432 } 1433 1434 pci_remove_firmware_label_files(pdev); 1435 } 1436 1437 static int __init pci_sysfs_init(void) 1438 { 1439 struct pci_dev *pdev = NULL; 1440 int retval; 1441 1442 sysfs_initialized = 1; 1443 for_each_pci_dev(pdev) { 1444 retval = pci_create_sysfs_dev_files(pdev); 1445 if (retval) { 1446 pci_dev_put(pdev); 1447 return retval; 1448 } 1449 } 1450 1451 return 0; 1452 } 1453 late_initcall(pci_sysfs_init); 1454 1455 static struct attribute *pci_dev_dev_attrs[] = { 1456 &dev_attr_boot_vga.attr, 1457 NULL, 1458 }; 1459 1460 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1461 struct attribute *a, int n) 1462 { 1463 struct device *dev = kobj_to_dev(kobj); 1464 struct pci_dev *pdev = to_pci_dev(dev); 1465 1466 if (a == &dev_attr_boot_vga.attr) 1467 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1468 return 0; 1469 1470 return a->mode; 1471 } 1472 1473 static struct attribute *pci_dev_hp_attrs[] = { 1474 &dev_attr_remove.attr, 1475 &dev_attr_dev_rescan.attr, 1476 NULL, 1477 }; 1478 1479 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1480 struct attribute *a, int n) 1481 { 1482 struct device *dev = kobj_to_dev(kobj); 1483 struct pci_dev *pdev = to_pci_dev(dev); 1484 1485 if (pdev->is_virtfn) 1486 return 0; 1487 1488 return a->mode; 1489 } 1490 1491 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1492 struct attribute *a, int n) 1493 { 1494 struct device *dev = kobj_to_dev(kobj); 1495 struct pci_dev *pdev = to_pci_dev(dev); 1496 1497 if (pci_is_bridge(pdev)) 1498 return a->mode; 1499 1500 return 0; 1501 } 1502 1503 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1504 struct attribute *a, int n) 1505 { 1506 struct device *dev = kobj_to_dev(kobj); 1507 struct pci_dev *pdev = to_pci_dev(dev); 1508 1509 if (pci_is_pcie(pdev)) 1510 return a->mode; 1511 1512 return 0; 1513 } 1514 1515 static const struct attribute_group pci_dev_group = { 1516 .attrs = pci_dev_attrs, 1517 }; 1518 1519 const struct attribute_group *pci_dev_groups[] = { 1520 &pci_dev_group, 1521 NULL, 1522 }; 1523 1524 static const struct attribute_group pci_dev_hp_attr_group = { 1525 .attrs = pci_dev_hp_attrs, 1526 .is_visible = pci_dev_hp_attrs_are_visible, 1527 }; 1528 1529 static const struct attribute_group pci_dev_attr_group = { 1530 .attrs = pci_dev_dev_attrs, 1531 .is_visible = pci_dev_attrs_are_visible, 1532 }; 1533 1534 static const struct attribute_group pci_bridge_attr_group = { 1535 .attrs = pci_bridge_attrs, 1536 .is_visible = pci_bridge_attrs_are_visible, 1537 }; 1538 1539 static const struct attribute_group pcie_dev_attr_group = { 1540 .attrs = pcie_dev_attrs, 1541 .is_visible = pcie_dev_attrs_are_visible, 1542 }; 1543 1544 static const struct attribute_group *pci_dev_attr_groups[] = { 1545 &pci_dev_attr_group, 1546 &pci_dev_hp_attr_group, 1547 #ifdef CONFIG_PCI_IOV 1548 &sriov_dev_attr_group, 1549 #endif 1550 &pci_bridge_attr_group, 1551 &pcie_dev_attr_group, 1552 #ifdef CONFIG_PCIEAER 1553 &aer_stats_attr_group, 1554 #endif 1555 #ifdef CONFIG_PCIEASPM 1556 &aspm_ctrl_attr_group, 1557 #endif 1558 NULL, 1559 }; 1560 1561 const struct device_type pci_dev_type = { 1562 .groups = pci_dev_attr_groups, 1563 }; 1564