1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/of.h> 30 #include "pci.h" 31 32 static int sysfs_initialized; /* = 0 */ 33 34 /* show configuration fields */ 35 #define pci_config_attr(field, format_string) \ 36 static ssize_t \ 37 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 38 { \ 39 struct pci_dev *pdev; \ 40 \ 41 pdev = to_pci_dev(dev); \ 42 return sprintf(buf, format_string, pdev->field); \ 43 } \ 44 static DEVICE_ATTR_RO(field) 45 46 pci_config_attr(vendor, "0x%04x\n"); 47 pci_config_attr(device, "0x%04x\n"); 48 pci_config_attr(subsystem_vendor, "0x%04x\n"); 49 pci_config_attr(subsystem_device, "0x%04x\n"); 50 pci_config_attr(revision, "0x%02x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf(buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (kstrtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 static DEVICE_ATTR_RW(broken_parity_status); 77 78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 79 struct device_attribute *attr, char *buf) 80 { 81 const struct cpumask *mask; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 return cpumap_print_to_pagebuf(list, buf, mask); 90 } 91 92 static ssize_t local_cpus_show(struct device *dev, 93 struct device_attribute *attr, char *buf) 94 { 95 return pci_dev_show_local_cpu(dev, false, attr, buf); 96 } 97 static DEVICE_ATTR_RO(local_cpus); 98 99 static ssize_t local_cpulist_show(struct device *dev, 100 struct device_attribute *attr, char *buf) 101 { 102 return pci_dev_show_local_cpu(dev, true, attr, buf); 103 } 104 static DEVICE_ATTR_RO(local_cpulist); 105 106 /* 107 * PCI Bus Class Devices 108 */ 109 static ssize_t cpuaffinity_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 113 114 return cpumap_print_to_pagebuf(false, buf, cpumask); 115 } 116 static DEVICE_ATTR_RO(cpuaffinity); 117 118 static ssize_t cpulistaffinity_show(struct device *dev, 119 struct device_attribute *attr, char *buf) 120 { 121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 122 123 return cpumap_print_to_pagebuf(true, buf, cpumask); 124 } 125 static DEVICE_ATTR_RO(cpulistaffinity); 126 127 /* show resources */ 128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 129 char *buf) 130 { 131 struct pci_dev *pci_dev = to_pci_dev(dev); 132 char *str = buf; 133 int i; 134 int max; 135 resource_size_t start, end; 136 137 if (pci_dev->subordinate) 138 max = DEVICE_COUNT_RESOURCE; 139 else 140 max = PCI_BRIDGE_RESOURCES; 141 142 for (i = 0; i < max; i++) { 143 struct resource *res = &pci_dev->resource[i]; 144 pci_resource_to_user(pci_dev, i, res, &start, &end); 145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 146 (unsigned long long)start, 147 (unsigned long long)end, 148 (unsigned long long)res->flags); 149 } 150 return (str - buf); 151 } 152 static DEVICE_ATTR_RO(resource); 153 154 static ssize_t max_link_speed_show(struct device *dev, 155 struct device_attribute *attr, char *buf) 156 { 157 struct pci_dev *pdev = to_pci_dev(dev); 158 159 return sprintf(buf, "%s\n", 160 pci_speed_string(pcie_get_speed_cap(pdev))); 161 } 162 static DEVICE_ATTR_RO(max_link_speed); 163 164 static ssize_t max_link_width_show(struct device *dev, 165 struct device_attribute *attr, char *buf) 166 { 167 struct pci_dev *pdev = to_pci_dev(dev); 168 169 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev)); 170 } 171 static DEVICE_ATTR_RO(max_link_width); 172 173 static ssize_t current_link_speed_show(struct device *dev, 174 struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 u16 linkstat; 178 int err; 179 enum pci_bus_speed speed; 180 181 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 182 if (err) 183 return -EINVAL; 184 185 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 186 187 return sprintf(buf, "%s\n", pci_speed_string(speed)); 188 } 189 static DEVICE_ATTR_RO(current_link_speed); 190 191 static ssize_t current_link_width_show(struct device *dev, 192 struct device_attribute *attr, char *buf) 193 { 194 struct pci_dev *pci_dev = to_pci_dev(dev); 195 u16 linkstat; 196 int err; 197 198 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 199 if (err) 200 return -EINVAL; 201 202 return sprintf(buf, "%u\n", 203 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 204 } 205 static DEVICE_ATTR_RO(current_link_width); 206 207 static ssize_t secondary_bus_number_show(struct device *dev, 208 struct device_attribute *attr, 209 char *buf) 210 { 211 struct pci_dev *pci_dev = to_pci_dev(dev); 212 u8 sec_bus; 213 int err; 214 215 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 216 if (err) 217 return -EINVAL; 218 219 return sprintf(buf, "%u\n", sec_bus); 220 } 221 static DEVICE_ATTR_RO(secondary_bus_number); 222 223 static ssize_t subordinate_bus_number_show(struct device *dev, 224 struct device_attribute *attr, 225 char *buf) 226 { 227 struct pci_dev *pci_dev = to_pci_dev(dev); 228 u8 sub_bus; 229 int err; 230 231 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 232 if (err) 233 return -EINVAL; 234 235 return sprintf(buf, "%u\n", sub_bus); 236 } 237 static DEVICE_ATTR_RO(subordinate_bus_number); 238 239 static ssize_t ari_enabled_show(struct device *dev, 240 struct device_attribute *attr, 241 char *buf) 242 { 243 struct pci_dev *pci_dev = to_pci_dev(dev); 244 245 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 246 } 247 static DEVICE_ATTR_RO(ari_enabled); 248 249 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 250 char *buf) 251 { 252 struct pci_dev *pci_dev = to_pci_dev(dev); 253 254 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 255 pci_dev->vendor, pci_dev->device, 256 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 257 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 258 (u8)(pci_dev->class)); 259 } 260 static DEVICE_ATTR_RO(modalias); 261 262 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 263 const char *buf, size_t count) 264 { 265 struct pci_dev *pdev = to_pci_dev(dev); 266 unsigned long val; 267 ssize_t result = kstrtoul(buf, 0, &val); 268 269 if (result < 0) 270 return result; 271 272 /* this can crash the machine when done on the "wrong" device */ 273 if (!capable(CAP_SYS_ADMIN)) 274 return -EPERM; 275 276 device_lock(dev); 277 if (dev->driver) 278 result = -EBUSY; 279 else if (val) 280 result = pci_enable_device(pdev); 281 else if (pci_is_enabled(pdev)) 282 pci_disable_device(pdev); 283 else 284 result = -EIO; 285 device_unlock(dev); 286 287 return result < 0 ? result : count; 288 } 289 290 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 291 char *buf) 292 { 293 struct pci_dev *pdev; 294 295 pdev = to_pci_dev(dev); 296 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 297 } 298 static DEVICE_ATTR_RW(enable); 299 300 #ifdef CONFIG_NUMA 301 static ssize_t numa_node_store(struct device *dev, 302 struct device_attribute *attr, const char *buf, 303 size_t count) 304 { 305 struct pci_dev *pdev = to_pci_dev(dev); 306 int node, ret; 307 308 if (!capable(CAP_SYS_ADMIN)) 309 return -EPERM; 310 311 ret = kstrtoint(buf, 0, &node); 312 if (ret) 313 return ret; 314 315 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 316 return -EINVAL; 317 318 if (node != NUMA_NO_NODE && !node_online(node)) 319 return -EINVAL; 320 321 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 322 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 323 node); 324 325 dev->numa_node = node; 326 return count; 327 } 328 329 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 330 char *buf) 331 { 332 return sprintf(buf, "%d\n", dev->numa_node); 333 } 334 static DEVICE_ATTR_RW(numa_node); 335 #endif 336 337 static ssize_t dma_mask_bits_show(struct device *dev, 338 struct device_attribute *attr, char *buf) 339 { 340 struct pci_dev *pdev = to_pci_dev(dev); 341 342 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 343 } 344 static DEVICE_ATTR_RO(dma_mask_bits); 345 346 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 347 struct device_attribute *attr, 348 char *buf) 349 { 350 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 351 } 352 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 353 354 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 355 char *buf) 356 { 357 struct pci_dev *pdev = to_pci_dev(dev); 358 struct pci_bus *subordinate = pdev->subordinate; 359 360 return sprintf(buf, "%u\n", subordinate ? 361 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 362 : !pdev->no_msi); 363 } 364 365 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 366 const char *buf, size_t count) 367 { 368 struct pci_dev *pdev = to_pci_dev(dev); 369 struct pci_bus *subordinate = pdev->subordinate; 370 unsigned long val; 371 372 if (kstrtoul(buf, 0, &val) < 0) 373 return -EINVAL; 374 375 if (!capable(CAP_SYS_ADMIN)) 376 return -EPERM; 377 378 /* 379 * "no_msi" and "bus_flags" only affect what happens when a driver 380 * requests MSI or MSI-X. They don't affect any drivers that have 381 * already requested MSI or MSI-X. 382 */ 383 if (!subordinate) { 384 pdev->no_msi = !val; 385 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 386 val ? "allowed" : "disallowed"); 387 return count; 388 } 389 390 if (val) 391 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 392 else 393 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 394 395 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 396 val ? "allowed" : "disallowed"); 397 return count; 398 } 399 static DEVICE_ATTR_RW(msi_bus); 400 401 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count) 402 { 403 unsigned long val; 404 struct pci_bus *b = NULL; 405 406 if (kstrtoul(buf, 0, &val) < 0) 407 return -EINVAL; 408 409 if (val) { 410 pci_lock_rescan_remove(); 411 while ((b = pci_find_next_bus(b)) != NULL) 412 pci_rescan_bus(b); 413 pci_unlock_rescan_remove(); 414 } 415 return count; 416 } 417 static BUS_ATTR_WO(rescan); 418 419 static struct attribute *pci_bus_attrs[] = { 420 &bus_attr_rescan.attr, 421 NULL, 422 }; 423 424 static const struct attribute_group pci_bus_group = { 425 .attrs = pci_bus_attrs, 426 }; 427 428 const struct attribute_group *pci_bus_groups[] = { 429 &pci_bus_group, 430 NULL, 431 }; 432 433 static ssize_t dev_rescan_store(struct device *dev, 434 struct device_attribute *attr, const char *buf, 435 size_t count) 436 { 437 unsigned long val; 438 struct pci_dev *pdev = to_pci_dev(dev); 439 440 if (kstrtoul(buf, 0, &val) < 0) 441 return -EINVAL; 442 443 if (val) { 444 pci_lock_rescan_remove(); 445 pci_rescan_bus(pdev->bus); 446 pci_unlock_rescan_remove(); 447 } 448 return count; 449 } 450 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 451 dev_rescan_store); 452 453 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 454 const char *buf, size_t count) 455 { 456 unsigned long val; 457 458 if (kstrtoul(buf, 0, &val) < 0) 459 return -EINVAL; 460 461 if (val && device_remove_file_self(dev, attr)) 462 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 463 return count; 464 } 465 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 466 remove_store); 467 468 static ssize_t bus_rescan_store(struct device *dev, 469 struct device_attribute *attr, 470 const char *buf, size_t count) 471 { 472 unsigned long val; 473 struct pci_bus *bus = to_pci_bus(dev); 474 475 if (kstrtoul(buf, 0, &val) < 0) 476 return -EINVAL; 477 478 if (val) { 479 pci_lock_rescan_remove(); 480 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 481 pci_rescan_bus_bridge_resize(bus->self); 482 else 483 pci_rescan_bus(bus); 484 pci_unlock_rescan_remove(); 485 } 486 return count; 487 } 488 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 489 bus_rescan_store); 490 491 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 492 static ssize_t d3cold_allowed_store(struct device *dev, 493 struct device_attribute *attr, 494 const char *buf, size_t count) 495 { 496 struct pci_dev *pdev = to_pci_dev(dev); 497 unsigned long val; 498 499 if (kstrtoul(buf, 0, &val) < 0) 500 return -EINVAL; 501 502 pdev->d3cold_allowed = !!val; 503 if (pdev->d3cold_allowed) 504 pci_d3cold_enable(pdev); 505 else 506 pci_d3cold_disable(pdev); 507 508 pm_runtime_resume(dev); 509 510 return count; 511 } 512 513 static ssize_t d3cold_allowed_show(struct device *dev, 514 struct device_attribute *attr, char *buf) 515 { 516 struct pci_dev *pdev = to_pci_dev(dev); 517 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 518 } 519 static DEVICE_ATTR_RW(d3cold_allowed); 520 #endif 521 522 #ifdef CONFIG_OF 523 static ssize_t devspec_show(struct device *dev, 524 struct device_attribute *attr, char *buf) 525 { 526 struct pci_dev *pdev = to_pci_dev(dev); 527 struct device_node *np = pci_device_to_OF_node(pdev); 528 529 if (np == NULL) 530 return 0; 531 return sprintf(buf, "%pOF", np); 532 } 533 static DEVICE_ATTR_RO(devspec); 534 #endif 535 536 static ssize_t driver_override_store(struct device *dev, 537 struct device_attribute *attr, 538 const char *buf, size_t count) 539 { 540 struct pci_dev *pdev = to_pci_dev(dev); 541 char *driver_override, *old, *cp; 542 543 /* We need to keep extra room for a newline */ 544 if (count >= (PAGE_SIZE - 1)) 545 return -EINVAL; 546 547 driver_override = kstrndup(buf, count, GFP_KERNEL); 548 if (!driver_override) 549 return -ENOMEM; 550 551 cp = strchr(driver_override, '\n'); 552 if (cp) 553 *cp = '\0'; 554 555 device_lock(dev); 556 old = pdev->driver_override; 557 if (strlen(driver_override)) { 558 pdev->driver_override = driver_override; 559 } else { 560 kfree(driver_override); 561 pdev->driver_override = NULL; 562 } 563 device_unlock(dev); 564 565 kfree(old); 566 567 return count; 568 } 569 570 static ssize_t driver_override_show(struct device *dev, 571 struct device_attribute *attr, char *buf) 572 { 573 struct pci_dev *pdev = to_pci_dev(dev); 574 ssize_t len; 575 576 device_lock(dev); 577 len = scnprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 578 device_unlock(dev); 579 return len; 580 } 581 static DEVICE_ATTR_RW(driver_override); 582 583 static struct attribute *pci_dev_attrs[] = { 584 &dev_attr_resource.attr, 585 &dev_attr_vendor.attr, 586 &dev_attr_device.attr, 587 &dev_attr_subsystem_vendor.attr, 588 &dev_attr_subsystem_device.attr, 589 &dev_attr_revision.attr, 590 &dev_attr_class.attr, 591 &dev_attr_irq.attr, 592 &dev_attr_local_cpus.attr, 593 &dev_attr_local_cpulist.attr, 594 &dev_attr_modalias.attr, 595 #ifdef CONFIG_NUMA 596 &dev_attr_numa_node.attr, 597 #endif 598 &dev_attr_dma_mask_bits.attr, 599 &dev_attr_consistent_dma_mask_bits.attr, 600 &dev_attr_enable.attr, 601 &dev_attr_broken_parity_status.attr, 602 &dev_attr_msi_bus.attr, 603 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 604 &dev_attr_d3cold_allowed.attr, 605 #endif 606 #ifdef CONFIG_OF 607 &dev_attr_devspec.attr, 608 #endif 609 &dev_attr_driver_override.attr, 610 &dev_attr_ari_enabled.attr, 611 NULL, 612 }; 613 614 static struct attribute *pci_bridge_attrs[] = { 615 &dev_attr_subordinate_bus_number.attr, 616 &dev_attr_secondary_bus_number.attr, 617 NULL, 618 }; 619 620 static struct attribute *pcie_dev_attrs[] = { 621 &dev_attr_current_link_speed.attr, 622 &dev_attr_current_link_width.attr, 623 &dev_attr_max_link_width.attr, 624 &dev_attr_max_link_speed.attr, 625 NULL, 626 }; 627 628 static struct attribute *pcibus_attrs[] = { 629 &dev_attr_bus_rescan.attr, 630 &dev_attr_cpuaffinity.attr, 631 &dev_attr_cpulistaffinity.attr, 632 NULL, 633 }; 634 635 static const struct attribute_group pcibus_group = { 636 .attrs = pcibus_attrs, 637 }; 638 639 const struct attribute_group *pcibus_groups[] = { 640 &pcibus_group, 641 NULL, 642 }; 643 644 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 645 char *buf) 646 { 647 struct pci_dev *pdev = to_pci_dev(dev); 648 struct pci_dev *vga_dev = vga_default_device(); 649 650 if (vga_dev) 651 return sprintf(buf, "%u\n", (pdev == vga_dev)); 652 653 return sprintf(buf, "%u\n", 654 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 655 IORESOURCE_ROM_SHADOW)); 656 } 657 static DEVICE_ATTR_RO(boot_vga); 658 659 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 660 struct bin_attribute *bin_attr, char *buf, 661 loff_t off, size_t count) 662 { 663 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 664 unsigned int size = 64; 665 loff_t init_off = off; 666 u8 *data = (u8 *) buf; 667 668 /* Several chips lock up trying to read undefined config space */ 669 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 670 size = dev->cfg_size; 671 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 672 size = 128; 673 674 if (off > size) 675 return 0; 676 if (off + count > size) { 677 size -= off; 678 count = size; 679 } else { 680 size = count; 681 } 682 683 pci_config_pm_runtime_get(dev); 684 685 if ((off & 1) && size) { 686 u8 val; 687 pci_user_read_config_byte(dev, off, &val); 688 data[off - init_off] = val; 689 off++; 690 size--; 691 } 692 693 if ((off & 3) && size > 2) { 694 u16 val; 695 pci_user_read_config_word(dev, off, &val); 696 data[off - init_off] = val & 0xff; 697 data[off - init_off + 1] = (val >> 8) & 0xff; 698 off += 2; 699 size -= 2; 700 } 701 702 while (size > 3) { 703 u32 val; 704 pci_user_read_config_dword(dev, off, &val); 705 data[off - init_off] = val & 0xff; 706 data[off - init_off + 1] = (val >> 8) & 0xff; 707 data[off - init_off + 2] = (val >> 16) & 0xff; 708 data[off - init_off + 3] = (val >> 24) & 0xff; 709 off += 4; 710 size -= 4; 711 cond_resched(); 712 } 713 714 if (size >= 2) { 715 u16 val; 716 pci_user_read_config_word(dev, off, &val); 717 data[off - init_off] = val & 0xff; 718 data[off - init_off + 1] = (val >> 8) & 0xff; 719 off += 2; 720 size -= 2; 721 } 722 723 if (size > 0) { 724 u8 val; 725 pci_user_read_config_byte(dev, off, &val); 726 data[off - init_off] = val; 727 off++; 728 --size; 729 } 730 731 pci_config_pm_runtime_put(dev); 732 733 return count; 734 } 735 736 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 737 struct bin_attribute *bin_attr, char *buf, 738 loff_t off, size_t count) 739 { 740 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 741 unsigned int size = count; 742 loff_t init_off = off; 743 u8 *data = (u8 *) buf; 744 int ret; 745 746 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 747 if (ret) 748 return ret; 749 750 if (off > dev->cfg_size) 751 return 0; 752 if (off + count > dev->cfg_size) { 753 size = dev->cfg_size - off; 754 count = size; 755 } 756 757 pci_config_pm_runtime_get(dev); 758 759 if ((off & 1) && size) { 760 pci_user_write_config_byte(dev, off, data[off - init_off]); 761 off++; 762 size--; 763 } 764 765 if ((off & 3) && size > 2) { 766 u16 val = data[off - init_off]; 767 val |= (u16) data[off - init_off + 1] << 8; 768 pci_user_write_config_word(dev, off, val); 769 off += 2; 770 size -= 2; 771 } 772 773 while (size > 3) { 774 u32 val = data[off - init_off]; 775 val |= (u32) data[off - init_off + 1] << 8; 776 val |= (u32) data[off - init_off + 2] << 16; 777 val |= (u32) data[off - init_off + 3] << 24; 778 pci_user_write_config_dword(dev, off, val); 779 off += 4; 780 size -= 4; 781 } 782 783 if (size >= 2) { 784 u16 val = data[off - init_off]; 785 val |= (u16) data[off - init_off + 1] << 8; 786 pci_user_write_config_word(dev, off, val); 787 off += 2; 788 size -= 2; 789 } 790 791 if (size) { 792 pci_user_write_config_byte(dev, off, data[off - init_off]); 793 off++; 794 --size; 795 } 796 797 pci_config_pm_runtime_put(dev); 798 799 return count; 800 } 801 802 #ifdef HAVE_PCI_LEGACY 803 /** 804 * pci_read_legacy_io - read byte(s) from legacy I/O port space 805 * @filp: open sysfs file 806 * @kobj: kobject corresponding to file to read from 807 * @bin_attr: struct bin_attribute for this file 808 * @buf: buffer to store results 809 * @off: offset into legacy I/O port space 810 * @count: number of bytes to read 811 * 812 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 813 * callback routine (pci_legacy_read). 814 */ 815 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 816 struct bin_attribute *bin_attr, char *buf, 817 loff_t off, size_t count) 818 { 819 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 820 821 /* Only support 1, 2 or 4 byte accesses */ 822 if (count != 1 && count != 2 && count != 4) 823 return -EINVAL; 824 825 return pci_legacy_read(bus, off, (u32 *)buf, count); 826 } 827 828 /** 829 * pci_write_legacy_io - write byte(s) to legacy I/O port space 830 * @filp: open sysfs file 831 * @kobj: kobject corresponding to file to read from 832 * @bin_attr: struct bin_attribute for this file 833 * @buf: buffer containing value to be written 834 * @off: offset into legacy I/O port space 835 * @count: number of bytes to write 836 * 837 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 838 * callback routine (pci_legacy_write). 839 */ 840 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 841 struct bin_attribute *bin_attr, char *buf, 842 loff_t off, size_t count) 843 { 844 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 845 846 /* Only support 1, 2 or 4 byte accesses */ 847 if (count != 1 && count != 2 && count != 4) 848 return -EINVAL; 849 850 return pci_legacy_write(bus, off, *(u32 *)buf, count); 851 } 852 853 /** 854 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 855 * @filp: open sysfs file 856 * @kobj: kobject corresponding to device to be mapped 857 * @attr: struct bin_attribute for this file 858 * @vma: struct vm_area_struct passed to mmap 859 * 860 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 861 * legacy memory space (first meg of bus space) into application virtual 862 * memory space. 863 */ 864 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 865 struct bin_attribute *attr, 866 struct vm_area_struct *vma) 867 { 868 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 869 870 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 871 } 872 873 /** 874 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 875 * @filp: open sysfs file 876 * @kobj: kobject corresponding to device to be mapped 877 * @attr: struct bin_attribute for this file 878 * @vma: struct vm_area_struct passed to mmap 879 * 880 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 881 * legacy IO space (first meg of bus space) into application virtual 882 * memory space. Returns -ENOSYS if the operation isn't supported 883 */ 884 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 885 struct bin_attribute *attr, 886 struct vm_area_struct *vma) 887 { 888 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 889 890 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 891 } 892 893 /** 894 * pci_adjust_legacy_attr - adjustment of legacy file attributes 895 * @b: bus to create files under 896 * @mmap_type: I/O port or memory 897 * 898 * Stub implementation. Can be overridden by arch if necessary. 899 */ 900 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 901 enum pci_mmap_state mmap_type) 902 { 903 } 904 905 /** 906 * pci_create_legacy_files - create legacy I/O port and memory files 907 * @b: bus to create files under 908 * 909 * Some platforms allow access to legacy I/O port and ISA memory space on 910 * a per-bus basis. This routine creates the files and ties them into 911 * their associated read, write and mmap files from pci-sysfs.c 912 * 913 * On error unwind, but don't propagate the error to the caller 914 * as it is ok to set up the PCI bus without these files. 915 */ 916 void pci_create_legacy_files(struct pci_bus *b) 917 { 918 int error; 919 920 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 921 GFP_ATOMIC); 922 if (!b->legacy_io) 923 goto kzalloc_err; 924 925 sysfs_bin_attr_init(b->legacy_io); 926 b->legacy_io->attr.name = "legacy_io"; 927 b->legacy_io->size = 0xffff; 928 b->legacy_io->attr.mode = 0600; 929 b->legacy_io->read = pci_read_legacy_io; 930 b->legacy_io->write = pci_write_legacy_io; 931 b->legacy_io->mmap = pci_mmap_legacy_io; 932 pci_adjust_legacy_attr(b, pci_mmap_io); 933 error = device_create_bin_file(&b->dev, b->legacy_io); 934 if (error) 935 goto legacy_io_err; 936 937 /* Allocated above after the legacy_io struct */ 938 b->legacy_mem = b->legacy_io + 1; 939 sysfs_bin_attr_init(b->legacy_mem); 940 b->legacy_mem->attr.name = "legacy_mem"; 941 b->legacy_mem->size = 1024*1024; 942 b->legacy_mem->attr.mode = 0600; 943 b->legacy_mem->mmap = pci_mmap_legacy_mem; 944 pci_adjust_legacy_attr(b, pci_mmap_mem); 945 error = device_create_bin_file(&b->dev, b->legacy_mem); 946 if (error) 947 goto legacy_mem_err; 948 949 return; 950 951 legacy_mem_err: 952 device_remove_bin_file(&b->dev, b->legacy_io); 953 legacy_io_err: 954 kfree(b->legacy_io); 955 b->legacy_io = NULL; 956 kzalloc_err: 957 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 958 } 959 960 void pci_remove_legacy_files(struct pci_bus *b) 961 { 962 if (b->legacy_io) { 963 device_remove_bin_file(&b->dev, b->legacy_io); 964 device_remove_bin_file(&b->dev, b->legacy_mem); 965 kfree(b->legacy_io); /* both are allocated here */ 966 } 967 } 968 #endif /* HAVE_PCI_LEGACY */ 969 970 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 971 972 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 973 enum pci_mmap_api mmap_api) 974 { 975 unsigned long nr, start, size; 976 resource_size_t pci_start = 0, pci_end; 977 978 if (pci_resource_len(pdev, resno) == 0) 979 return 0; 980 nr = vma_pages(vma); 981 start = vma->vm_pgoff; 982 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 983 if (mmap_api == PCI_MMAP_PROCFS) { 984 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 985 &pci_start, &pci_end); 986 pci_start >>= PAGE_SHIFT; 987 } 988 if (start >= pci_start && start < pci_start + size && 989 start + nr <= pci_start + size) 990 return 1; 991 return 0; 992 } 993 994 /** 995 * pci_mmap_resource - map a PCI resource into user memory space 996 * @kobj: kobject for mapping 997 * @attr: struct bin_attribute for the file being mapped 998 * @vma: struct vm_area_struct passed into the mmap 999 * @write_combine: 1 for write_combine mapping 1000 * 1001 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1002 */ 1003 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1004 struct vm_area_struct *vma, int write_combine) 1005 { 1006 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1007 int bar = (unsigned long)attr->private; 1008 enum pci_mmap_state mmap_type; 1009 struct resource *res = &pdev->resource[bar]; 1010 int ret; 1011 1012 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1013 if (ret) 1014 return ret; 1015 1016 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1017 return -EINVAL; 1018 1019 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1020 return -EINVAL; 1021 1022 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1023 1024 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1025 } 1026 1027 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1028 struct bin_attribute *attr, 1029 struct vm_area_struct *vma) 1030 { 1031 return pci_mmap_resource(kobj, attr, vma, 0); 1032 } 1033 1034 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1035 struct bin_attribute *attr, 1036 struct vm_area_struct *vma) 1037 { 1038 return pci_mmap_resource(kobj, attr, vma, 1); 1039 } 1040 1041 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1042 struct bin_attribute *attr, char *buf, 1043 loff_t off, size_t count, bool write) 1044 { 1045 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1046 int bar = (unsigned long)attr->private; 1047 unsigned long port = off; 1048 1049 port += pci_resource_start(pdev, bar); 1050 1051 if (port > pci_resource_end(pdev, bar)) 1052 return 0; 1053 1054 if (port + count - 1 > pci_resource_end(pdev, bar)) 1055 return -EINVAL; 1056 1057 switch (count) { 1058 case 1: 1059 if (write) 1060 outb(*(u8 *)buf, port); 1061 else 1062 *(u8 *)buf = inb(port); 1063 return 1; 1064 case 2: 1065 if (write) 1066 outw(*(u16 *)buf, port); 1067 else 1068 *(u16 *)buf = inw(port); 1069 return 2; 1070 case 4: 1071 if (write) 1072 outl(*(u32 *)buf, port); 1073 else 1074 *(u32 *)buf = inl(port); 1075 return 4; 1076 } 1077 return -EINVAL; 1078 } 1079 1080 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1081 struct bin_attribute *attr, char *buf, 1082 loff_t off, size_t count) 1083 { 1084 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1085 } 1086 1087 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1088 struct bin_attribute *attr, char *buf, 1089 loff_t off, size_t count) 1090 { 1091 int ret; 1092 1093 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1094 if (ret) 1095 return ret; 1096 1097 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1098 } 1099 1100 /** 1101 * pci_remove_resource_files - cleanup resource files 1102 * @pdev: dev to cleanup 1103 * 1104 * If we created resource files for @pdev, remove them from sysfs and 1105 * free their resources. 1106 */ 1107 static void pci_remove_resource_files(struct pci_dev *pdev) 1108 { 1109 int i; 1110 1111 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1112 struct bin_attribute *res_attr; 1113 1114 res_attr = pdev->res_attr[i]; 1115 if (res_attr) { 1116 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1117 kfree(res_attr); 1118 } 1119 1120 res_attr = pdev->res_attr_wc[i]; 1121 if (res_attr) { 1122 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1123 kfree(res_attr); 1124 } 1125 } 1126 } 1127 1128 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1129 { 1130 /* allocate attribute structure, piggyback attribute name */ 1131 int name_len = write_combine ? 13 : 10; 1132 struct bin_attribute *res_attr; 1133 char *res_attr_name; 1134 int retval; 1135 1136 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1137 if (!res_attr) 1138 return -ENOMEM; 1139 1140 res_attr_name = (char *)(res_attr + 1); 1141 1142 sysfs_bin_attr_init(res_attr); 1143 if (write_combine) { 1144 pdev->res_attr_wc[num] = res_attr; 1145 sprintf(res_attr_name, "resource%d_wc", num); 1146 res_attr->mmap = pci_mmap_resource_wc; 1147 } else { 1148 pdev->res_attr[num] = res_attr; 1149 sprintf(res_attr_name, "resource%d", num); 1150 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1151 res_attr->read = pci_read_resource_io; 1152 res_attr->write = pci_write_resource_io; 1153 if (arch_can_pci_mmap_io()) 1154 res_attr->mmap = pci_mmap_resource_uc; 1155 } else { 1156 res_attr->mmap = pci_mmap_resource_uc; 1157 } 1158 } 1159 res_attr->attr.name = res_attr_name; 1160 res_attr->attr.mode = 0600; 1161 res_attr->size = pci_resource_len(pdev, num); 1162 res_attr->private = (void *)(unsigned long)num; 1163 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1164 if (retval) 1165 kfree(res_attr); 1166 1167 return retval; 1168 } 1169 1170 /** 1171 * pci_create_resource_files - create resource files in sysfs for @dev 1172 * @pdev: dev in question 1173 * 1174 * Walk the resources in @pdev creating files for each resource available. 1175 */ 1176 static int pci_create_resource_files(struct pci_dev *pdev) 1177 { 1178 int i; 1179 int retval; 1180 1181 /* Expose the PCI resources from this device as files */ 1182 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1183 1184 /* skip empty resources */ 1185 if (!pci_resource_len(pdev, i)) 1186 continue; 1187 1188 retval = pci_create_attr(pdev, i, 0); 1189 /* for prefetchable resources, create a WC mappable file */ 1190 if (!retval && arch_can_pci_mmap_wc() && 1191 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1192 retval = pci_create_attr(pdev, i, 1); 1193 if (retval) { 1194 pci_remove_resource_files(pdev); 1195 return retval; 1196 } 1197 } 1198 return 0; 1199 } 1200 #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ 1201 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1202 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1203 #endif 1204 1205 /** 1206 * pci_write_rom - used to enable access to the PCI ROM display 1207 * @filp: sysfs file 1208 * @kobj: kernel object handle 1209 * @bin_attr: struct bin_attribute for this file 1210 * @buf: user input 1211 * @off: file offset 1212 * @count: number of byte in input 1213 * 1214 * writing anything except 0 enables it 1215 */ 1216 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1217 struct bin_attribute *bin_attr, char *buf, 1218 loff_t off, size_t count) 1219 { 1220 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1221 1222 if ((off == 0) && (*buf == '0') && (count == 2)) 1223 pdev->rom_attr_enabled = 0; 1224 else 1225 pdev->rom_attr_enabled = 1; 1226 1227 return count; 1228 } 1229 1230 /** 1231 * pci_read_rom - read a PCI ROM 1232 * @filp: sysfs file 1233 * @kobj: kernel object handle 1234 * @bin_attr: struct bin_attribute for this file 1235 * @buf: where to put the data we read from the ROM 1236 * @off: file offset 1237 * @count: number of bytes to read 1238 * 1239 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1240 * device corresponding to @kobj. 1241 */ 1242 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1243 struct bin_attribute *bin_attr, char *buf, 1244 loff_t off, size_t count) 1245 { 1246 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1247 void __iomem *rom; 1248 size_t size; 1249 1250 if (!pdev->rom_attr_enabled) 1251 return -EINVAL; 1252 1253 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1254 if (!rom || !size) 1255 return -EIO; 1256 1257 if (off >= size) 1258 count = 0; 1259 else { 1260 if (off + count > size) 1261 count = size - off; 1262 1263 memcpy_fromio(buf, rom + off, count); 1264 } 1265 pci_unmap_rom(pdev, rom); 1266 1267 return count; 1268 } 1269 1270 static const struct bin_attribute pci_config_attr = { 1271 .attr = { 1272 .name = "config", 1273 .mode = 0644, 1274 }, 1275 .size = PCI_CFG_SPACE_SIZE, 1276 .read = pci_read_config, 1277 .write = pci_write_config, 1278 }; 1279 1280 static const struct bin_attribute pcie_config_attr = { 1281 .attr = { 1282 .name = "config", 1283 .mode = 0644, 1284 }, 1285 .size = PCI_CFG_SPACE_EXP_SIZE, 1286 .read = pci_read_config, 1287 .write = pci_write_config, 1288 }; 1289 1290 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1291 const char *buf, size_t count) 1292 { 1293 struct pci_dev *pdev = to_pci_dev(dev); 1294 unsigned long val; 1295 ssize_t result = kstrtoul(buf, 0, &val); 1296 1297 if (result < 0) 1298 return result; 1299 1300 if (val != 1) 1301 return -EINVAL; 1302 1303 pm_runtime_get_sync(dev); 1304 result = pci_reset_function(pdev); 1305 pm_runtime_put(dev); 1306 if (result < 0) 1307 return result; 1308 1309 return count; 1310 } 1311 1312 static DEVICE_ATTR(reset, 0200, NULL, reset_store); 1313 1314 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1315 { 1316 int retval; 1317 1318 pcie_vpd_create_sysfs_dev_files(dev); 1319 1320 if (dev->reset_fn) { 1321 retval = device_create_file(&dev->dev, &dev_attr_reset); 1322 if (retval) 1323 goto error; 1324 } 1325 return 0; 1326 1327 error: 1328 pcie_vpd_remove_sysfs_dev_files(dev); 1329 return retval; 1330 } 1331 1332 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1333 { 1334 int retval; 1335 int rom_size; 1336 struct bin_attribute *attr; 1337 1338 if (!sysfs_initialized) 1339 return -EACCES; 1340 1341 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1342 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1343 else 1344 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1345 if (retval) 1346 goto err; 1347 1348 retval = pci_create_resource_files(pdev); 1349 if (retval) 1350 goto err_config_file; 1351 1352 /* If the device has a ROM, try to expose it in sysfs. */ 1353 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1354 if (rom_size) { 1355 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1356 if (!attr) { 1357 retval = -ENOMEM; 1358 goto err_resource_files; 1359 } 1360 sysfs_bin_attr_init(attr); 1361 attr->size = rom_size; 1362 attr->attr.name = "rom"; 1363 attr->attr.mode = 0600; 1364 attr->read = pci_read_rom; 1365 attr->write = pci_write_rom; 1366 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1367 if (retval) { 1368 kfree(attr); 1369 goto err_resource_files; 1370 } 1371 pdev->rom_attr = attr; 1372 } 1373 1374 /* add sysfs entries for various capabilities */ 1375 retval = pci_create_capabilities_sysfs(pdev); 1376 if (retval) 1377 goto err_rom_file; 1378 1379 pci_create_firmware_label_files(pdev); 1380 1381 return 0; 1382 1383 err_rom_file: 1384 if (pdev->rom_attr) { 1385 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1386 kfree(pdev->rom_attr); 1387 pdev->rom_attr = NULL; 1388 } 1389 err_resource_files: 1390 pci_remove_resource_files(pdev); 1391 err_config_file: 1392 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1393 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1394 else 1395 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1396 err: 1397 return retval; 1398 } 1399 1400 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1401 { 1402 pcie_vpd_remove_sysfs_dev_files(dev); 1403 if (dev->reset_fn) { 1404 device_remove_file(&dev->dev, &dev_attr_reset); 1405 dev->reset_fn = 0; 1406 } 1407 } 1408 1409 /** 1410 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1411 * @pdev: device whose entries we should free 1412 * 1413 * Cleanup when @pdev is removed from sysfs. 1414 */ 1415 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1416 { 1417 if (!sysfs_initialized) 1418 return; 1419 1420 pci_remove_capabilities_sysfs(pdev); 1421 1422 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1423 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1424 else 1425 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1426 1427 pci_remove_resource_files(pdev); 1428 1429 if (pdev->rom_attr) { 1430 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1431 kfree(pdev->rom_attr); 1432 pdev->rom_attr = NULL; 1433 } 1434 1435 pci_remove_firmware_label_files(pdev); 1436 } 1437 1438 static int __init pci_sysfs_init(void) 1439 { 1440 struct pci_dev *pdev = NULL; 1441 int retval; 1442 1443 sysfs_initialized = 1; 1444 for_each_pci_dev(pdev) { 1445 retval = pci_create_sysfs_dev_files(pdev); 1446 if (retval) { 1447 pci_dev_put(pdev); 1448 return retval; 1449 } 1450 } 1451 1452 return 0; 1453 } 1454 late_initcall(pci_sysfs_init); 1455 1456 static struct attribute *pci_dev_dev_attrs[] = { 1457 &dev_attr_boot_vga.attr, 1458 NULL, 1459 }; 1460 1461 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1462 struct attribute *a, int n) 1463 { 1464 struct device *dev = kobj_to_dev(kobj); 1465 struct pci_dev *pdev = to_pci_dev(dev); 1466 1467 if (a == &dev_attr_boot_vga.attr) 1468 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1469 return 0; 1470 1471 return a->mode; 1472 } 1473 1474 static struct attribute *pci_dev_hp_attrs[] = { 1475 &dev_attr_remove.attr, 1476 &dev_attr_dev_rescan.attr, 1477 NULL, 1478 }; 1479 1480 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1481 struct attribute *a, int n) 1482 { 1483 struct device *dev = kobj_to_dev(kobj); 1484 struct pci_dev *pdev = to_pci_dev(dev); 1485 1486 if (pdev->is_virtfn) 1487 return 0; 1488 1489 return a->mode; 1490 } 1491 1492 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1493 struct attribute *a, int n) 1494 { 1495 struct device *dev = kobj_to_dev(kobj); 1496 struct pci_dev *pdev = to_pci_dev(dev); 1497 1498 if (pci_is_bridge(pdev)) 1499 return a->mode; 1500 1501 return 0; 1502 } 1503 1504 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1505 struct attribute *a, int n) 1506 { 1507 struct device *dev = kobj_to_dev(kobj); 1508 struct pci_dev *pdev = to_pci_dev(dev); 1509 1510 if (pci_is_pcie(pdev)) 1511 return a->mode; 1512 1513 return 0; 1514 } 1515 1516 static const struct attribute_group pci_dev_group = { 1517 .attrs = pci_dev_attrs, 1518 }; 1519 1520 const struct attribute_group *pci_dev_groups[] = { 1521 &pci_dev_group, 1522 NULL, 1523 }; 1524 1525 static const struct attribute_group pci_dev_hp_attr_group = { 1526 .attrs = pci_dev_hp_attrs, 1527 .is_visible = pci_dev_hp_attrs_are_visible, 1528 }; 1529 1530 static const struct attribute_group pci_dev_attr_group = { 1531 .attrs = pci_dev_dev_attrs, 1532 .is_visible = pci_dev_attrs_are_visible, 1533 }; 1534 1535 static const struct attribute_group pci_bridge_attr_group = { 1536 .attrs = pci_bridge_attrs, 1537 .is_visible = pci_bridge_attrs_are_visible, 1538 }; 1539 1540 static const struct attribute_group pcie_dev_attr_group = { 1541 .attrs = pcie_dev_attrs, 1542 .is_visible = pcie_dev_attrs_are_visible, 1543 }; 1544 1545 static const struct attribute_group *pci_dev_attr_groups[] = { 1546 &pci_dev_attr_group, 1547 &pci_dev_hp_attr_group, 1548 #ifdef CONFIG_PCI_IOV 1549 &sriov_dev_attr_group, 1550 #endif 1551 &pci_bridge_attr_group, 1552 &pcie_dev_attr_group, 1553 #ifdef CONFIG_PCIEAER 1554 &aer_stats_attr_group, 1555 #endif 1556 #ifdef CONFIG_PCIEASPM 1557 &aspm_ctrl_attr_group, 1558 #endif 1559 NULL, 1560 }; 1561 1562 const struct device_type pci_dev_type = { 1563 .groups = pci_dev_attr_groups, 1564 }; 1565