1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/of.h> 30 #include "pci.h" 31 32 static int sysfs_initialized; /* = 0 */ 33 34 /* show configuration fields */ 35 #define pci_config_attr(field, format_string) \ 36 static ssize_t \ 37 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 38 { \ 39 struct pci_dev *pdev; \ 40 \ 41 pdev = to_pci_dev(dev); \ 42 return sprintf(buf, format_string, pdev->field); \ 43 } \ 44 static DEVICE_ATTR_RO(field) 45 46 pci_config_attr(vendor, "0x%04x\n"); 47 pci_config_attr(device, "0x%04x\n"); 48 pci_config_attr(subsystem_vendor, "0x%04x\n"); 49 pci_config_attr(subsystem_device, "0x%04x\n"); 50 pci_config_attr(revision, "0x%02x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf(buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (kstrtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 static DEVICE_ATTR_RW(broken_parity_status); 77 78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 79 struct device_attribute *attr, char *buf) 80 { 81 const struct cpumask *mask; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 return cpumap_print_to_pagebuf(list, buf, mask); 90 } 91 92 static ssize_t local_cpus_show(struct device *dev, 93 struct device_attribute *attr, char *buf) 94 { 95 return pci_dev_show_local_cpu(dev, false, attr, buf); 96 } 97 static DEVICE_ATTR_RO(local_cpus); 98 99 static ssize_t local_cpulist_show(struct device *dev, 100 struct device_attribute *attr, char *buf) 101 { 102 return pci_dev_show_local_cpu(dev, true, attr, buf); 103 } 104 static DEVICE_ATTR_RO(local_cpulist); 105 106 /* 107 * PCI Bus Class Devices 108 */ 109 static ssize_t cpuaffinity_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 113 114 return cpumap_print_to_pagebuf(false, buf, cpumask); 115 } 116 static DEVICE_ATTR_RO(cpuaffinity); 117 118 static ssize_t cpulistaffinity_show(struct device *dev, 119 struct device_attribute *attr, char *buf) 120 { 121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 122 123 return cpumap_print_to_pagebuf(true, buf, cpumask); 124 } 125 static DEVICE_ATTR_RO(cpulistaffinity); 126 127 static ssize_t power_state_show(struct device *dev, 128 struct device_attribute *attr, char *buf) 129 { 130 struct pci_dev *pdev = to_pci_dev(dev); 131 132 return sprintf(buf, "%s\n", pci_power_name(pdev->current_state)); 133 } 134 static DEVICE_ATTR_RO(power_state); 135 136 /* show resources */ 137 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 138 char *buf) 139 { 140 struct pci_dev *pci_dev = to_pci_dev(dev); 141 char *str = buf; 142 int i; 143 int max; 144 resource_size_t start, end; 145 146 if (pci_dev->subordinate) 147 max = DEVICE_COUNT_RESOURCE; 148 else 149 max = PCI_BRIDGE_RESOURCES; 150 151 for (i = 0; i < max; i++) { 152 struct resource *res = &pci_dev->resource[i]; 153 pci_resource_to_user(pci_dev, i, res, &start, &end); 154 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 155 (unsigned long long)start, 156 (unsigned long long)end, 157 (unsigned long long)res->flags); 158 } 159 return (str - buf); 160 } 161 static DEVICE_ATTR_RO(resource); 162 163 static ssize_t max_link_speed_show(struct device *dev, 164 struct device_attribute *attr, char *buf) 165 { 166 struct pci_dev *pdev = to_pci_dev(dev); 167 168 return sprintf(buf, "%s\n", 169 pci_speed_string(pcie_get_speed_cap(pdev))); 170 } 171 static DEVICE_ATTR_RO(max_link_speed); 172 173 static ssize_t max_link_width_show(struct device *dev, 174 struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pdev = to_pci_dev(dev); 177 178 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev)); 179 } 180 static DEVICE_ATTR_RO(max_link_width); 181 182 static ssize_t current_link_speed_show(struct device *dev, 183 struct device_attribute *attr, char *buf) 184 { 185 struct pci_dev *pci_dev = to_pci_dev(dev); 186 u16 linkstat; 187 int err; 188 enum pci_bus_speed speed; 189 190 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 191 if (err) 192 return -EINVAL; 193 194 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 195 196 return sprintf(buf, "%s\n", pci_speed_string(speed)); 197 } 198 static DEVICE_ATTR_RO(current_link_speed); 199 200 static ssize_t current_link_width_show(struct device *dev, 201 struct device_attribute *attr, char *buf) 202 { 203 struct pci_dev *pci_dev = to_pci_dev(dev); 204 u16 linkstat; 205 int err; 206 207 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 208 if (err) 209 return -EINVAL; 210 211 return sprintf(buf, "%u\n", 212 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 213 } 214 static DEVICE_ATTR_RO(current_link_width); 215 216 static ssize_t secondary_bus_number_show(struct device *dev, 217 struct device_attribute *attr, 218 char *buf) 219 { 220 struct pci_dev *pci_dev = to_pci_dev(dev); 221 u8 sec_bus; 222 int err; 223 224 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 225 if (err) 226 return -EINVAL; 227 228 return sprintf(buf, "%u\n", sec_bus); 229 } 230 static DEVICE_ATTR_RO(secondary_bus_number); 231 232 static ssize_t subordinate_bus_number_show(struct device *dev, 233 struct device_attribute *attr, 234 char *buf) 235 { 236 struct pci_dev *pci_dev = to_pci_dev(dev); 237 u8 sub_bus; 238 int err; 239 240 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 241 if (err) 242 return -EINVAL; 243 244 return sprintf(buf, "%u\n", sub_bus); 245 } 246 static DEVICE_ATTR_RO(subordinate_bus_number); 247 248 static ssize_t ari_enabled_show(struct device *dev, 249 struct device_attribute *attr, 250 char *buf) 251 { 252 struct pci_dev *pci_dev = to_pci_dev(dev); 253 254 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 255 } 256 static DEVICE_ATTR_RO(ari_enabled); 257 258 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 259 char *buf) 260 { 261 struct pci_dev *pci_dev = to_pci_dev(dev); 262 263 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 264 pci_dev->vendor, pci_dev->device, 265 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 266 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 267 (u8)(pci_dev->class)); 268 } 269 static DEVICE_ATTR_RO(modalias); 270 271 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 272 const char *buf, size_t count) 273 { 274 struct pci_dev *pdev = to_pci_dev(dev); 275 unsigned long val; 276 ssize_t result = kstrtoul(buf, 0, &val); 277 278 if (result < 0) 279 return result; 280 281 /* this can crash the machine when done on the "wrong" device */ 282 if (!capable(CAP_SYS_ADMIN)) 283 return -EPERM; 284 285 device_lock(dev); 286 if (dev->driver) 287 result = -EBUSY; 288 else if (val) 289 result = pci_enable_device(pdev); 290 else if (pci_is_enabled(pdev)) 291 pci_disable_device(pdev); 292 else 293 result = -EIO; 294 device_unlock(dev); 295 296 return result < 0 ? result : count; 297 } 298 299 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 300 char *buf) 301 { 302 struct pci_dev *pdev; 303 304 pdev = to_pci_dev(dev); 305 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 306 } 307 static DEVICE_ATTR_RW(enable); 308 309 #ifdef CONFIG_NUMA 310 static ssize_t numa_node_store(struct device *dev, 311 struct device_attribute *attr, const char *buf, 312 size_t count) 313 { 314 struct pci_dev *pdev = to_pci_dev(dev); 315 int node, ret; 316 317 if (!capable(CAP_SYS_ADMIN)) 318 return -EPERM; 319 320 ret = kstrtoint(buf, 0, &node); 321 if (ret) 322 return ret; 323 324 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 325 return -EINVAL; 326 327 if (node != NUMA_NO_NODE && !node_online(node)) 328 return -EINVAL; 329 330 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 331 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 332 node); 333 334 dev->numa_node = node; 335 return count; 336 } 337 338 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 339 char *buf) 340 { 341 return sprintf(buf, "%d\n", dev->numa_node); 342 } 343 static DEVICE_ATTR_RW(numa_node); 344 #endif 345 346 static ssize_t dma_mask_bits_show(struct device *dev, 347 struct device_attribute *attr, char *buf) 348 { 349 struct pci_dev *pdev = to_pci_dev(dev); 350 351 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 352 } 353 static DEVICE_ATTR_RO(dma_mask_bits); 354 355 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 356 struct device_attribute *attr, 357 char *buf) 358 { 359 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 360 } 361 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 362 363 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 364 char *buf) 365 { 366 struct pci_dev *pdev = to_pci_dev(dev); 367 struct pci_bus *subordinate = pdev->subordinate; 368 369 return sprintf(buf, "%u\n", subordinate ? 370 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 371 : !pdev->no_msi); 372 } 373 374 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 375 const char *buf, size_t count) 376 { 377 struct pci_dev *pdev = to_pci_dev(dev); 378 struct pci_bus *subordinate = pdev->subordinate; 379 unsigned long val; 380 381 if (kstrtoul(buf, 0, &val) < 0) 382 return -EINVAL; 383 384 if (!capable(CAP_SYS_ADMIN)) 385 return -EPERM; 386 387 /* 388 * "no_msi" and "bus_flags" only affect what happens when a driver 389 * requests MSI or MSI-X. They don't affect any drivers that have 390 * already requested MSI or MSI-X. 391 */ 392 if (!subordinate) { 393 pdev->no_msi = !val; 394 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 395 val ? "allowed" : "disallowed"); 396 return count; 397 } 398 399 if (val) 400 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 401 else 402 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 403 404 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 405 val ? "allowed" : "disallowed"); 406 return count; 407 } 408 static DEVICE_ATTR_RW(msi_bus); 409 410 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count) 411 { 412 unsigned long val; 413 struct pci_bus *b = NULL; 414 415 if (kstrtoul(buf, 0, &val) < 0) 416 return -EINVAL; 417 418 if (val) { 419 pci_lock_rescan_remove(); 420 while ((b = pci_find_next_bus(b)) != NULL) 421 pci_rescan_bus(b); 422 pci_unlock_rescan_remove(); 423 } 424 return count; 425 } 426 static BUS_ATTR_WO(rescan); 427 428 static struct attribute *pci_bus_attrs[] = { 429 &bus_attr_rescan.attr, 430 NULL, 431 }; 432 433 static const struct attribute_group pci_bus_group = { 434 .attrs = pci_bus_attrs, 435 }; 436 437 const struct attribute_group *pci_bus_groups[] = { 438 &pci_bus_group, 439 NULL, 440 }; 441 442 static ssize_t dev_rescan_store(struct device *dev, 443 struct device_attribute *attr, const char *buf, 444 size_t count) 445 { 446 unsigned long val; 447 struct pci_dev *pdev = to_pci_dev(dev); 448 449 if (kstrtoul(buf, 0, &val) < 0) 450 return -EINVAL; 451 452 if (val) { 453 pci_lock_rescan_remove(); 454 pci_rescan_bus(pdev->bus); 455 pci_unlock_rescan_remove(); 456 } 457 return count; 458 } 459 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 460 dev_rescan_store); 461 462 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 463 const char *buf, size_t count) 464 { 465 unsigned long val; 466 467 if (kstrtoul(buf, 0, &val) < 0) 468 return -EINVAL; 469 470 if (val && device_remove_file_self(dev, attr)) 471 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 472 return count; 473 } 474 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 475 remove_store); 476 477 static ssize_t bus_rescan_store(struct device *dev, 478 struct device_attribute *attr, 479 const char *buf, size_t count) 480 { 481 unsigned long val; 482 struct pci_bus *bus = to_pci_bus(dev); 483 484 if (kstrtoul(buf, 0, &val) < 0) 485 return -EINVAL; 486 487 if (val) { 488 pci_lock_rescan_remove(); 489 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 490 pci_rescan_bus_bridge_resize(bus->self); 491 else 492 pci_rescan_bus(bus); 493 pci_unlock_rescan_remove(); 494 } 495 return count; 496 } 497 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 498 bus_rescan_store); 499 500 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 501 static ssize_t d3cold_allowed_store(struct device *dev, 502 struct device_attribute *attr, 503 const char *buf, size_t count) 504 { 505 struct pci_dev *pdev = to_pci_dev(dev); 506 unsigned long val; 507 508 if (kstrtoul(buf, 0, &val) < 0) 509 return -EINVAL; 510 511 pdev->d3cold_allowed = !!val; 512 if (pdev->d3cold_allowed) 513 pci_d3cold_enable(pdev); 514 else 515 pci_d3cold_disable(pdev); 516 517 pm_runtime_resume(dev); 518 519 return count; 520 } 521 522 static ssize_t d3cold_allowed_show(struct device *dev, 523 struct device_attribute *attr, char *buf) 524 { 525 struct pci_dev *pdev = to_pci_dev(dev); 526 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 527 } 528 static DEVICE_ATTR_RW(d3cold_allowed); 529 #endif 530 531 #ifdef CONFIG_OF 532 static ssize_t devspec_show(struct device *dev, 533 struct device_attribute *attr, char *buf) 534 { 535 struct pci_dev *pdev = to_pci_dev(dev); 536 struct device_node *np = pci_device_to_OF_node(pdev); 537 538 if (np == NULL) 539 return 0; 540 return sprintf(buf, "%pOF", np); 541 } 542 static DEVICE_ATTR_RO(devspec); 543 #endif 544 545 static ssize_t driver_override_store(struct device *dev, 546 struct device_attribute *attr, 547 const char *buf, size_t count) 548 { 549 struct pci_dev *pdev = to_pci_dev(dev); 550 char *driver_override, *old, *cp; 551 552 /* We need to keep extra room for a newline */ 553 if (count >= (PAGE_SIZE - 1)) 554 return -EINVAL; 555 556 driver_override = kstrndup(buf, count, GFP_KERNEL); 557 if (!driver_override) 558 return -ENOMEM; 559 560 cp = strchr(driver_override, '\n'); 561 if (cp) 562 *cp = '\0'; 563 564 device_lock(dev); 565 old = pdev->driver_override; 566 if (strlen(driver_override)) { 567 pdev->driver_override = driver_override; 568 } else { 569 kfree(driver_override); 570 pdev->driver_override = NULL; 571 } 572 device_unlock(dev); 573 574 kfree(old); 575 576 return count; 577 } 578 579 static ssize_t driver_override_show(struct device *dev, 580 struct device_attribute *attr, char *buf) 581 { 582 struct pci_dev *pdev = to_pci_dev(dev); 583 ssize_t len; 584 585 device_lock(dev); 586 len = scnprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 587 device_unlock(dev); 588 return len; 589 } 590 static DEVICE_ATTR_RW(driver_override); 591 592 static struct attribute *pci_dev_attrs[] = { 593 &dev_attr_power_state.attr, 594 &dev_attr_resource.attr, 595 &dev_attr_vendor.attr, 596 &dev_attr_device.attr, 597 &dev_attr_subsystem_vendor.attr, 598 &dev_attr_subsystem_device.attr, 599 &dev_attr_revision.attr, 600 &dev_attr_class.attr, 601 &dev_attr_irq.attr, 602 &dev_attr_local_cpus.attr, 603 &dev_attr_local_cpulist.attr, 604 &dev_attr_modalias.attr, 605 #ifdef CONFIG_NUMA 606 &dev_attr_numa_node.attr, 607 #endif 608 &dev_attr_dma_mask_bits.attr, 609 &dev_attr_consistent_dma_mask_bits.attr, 610 &dev_attr_enable.attr, 611 &dev_attr_broken_parity_status.attr, 612 &dev_attr_msi_bus.attr, 613 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 614 &dev_attr_d3cold_allowed.attr, 615 #endif 616 #ifdef CONFIG_OF 617 &dev_attr_devspec.attr, 618 #endif 619 &dev_attr_driver_override.attr, 620 &dev_attr_ari_enabled.attr, 621 NULL, 622 }; 623 624 static struct attribute *pci_bridge_attrs[] = { 625 &dev_attr_subordinate_bus_number.attr, 626 &dev_attr_secondary_bus_number.attr, 627 NULL, 628 }; 629 630 static struct attribute *pcie_dev_attrs[] = { 631 &dev_attr_current_link_speed.attr, 632 &dev_attr_current_link_width.attr, 633 &dev_attr_max_link_width.attr, 634 &dev_attr_max_link_speed.attr, 635 NULL, 636 }; 637 638 static struct attribute *pcibus_attrs[] = { 639 &dev_attr_bus_rescan.attr, 640 &dev_attr_cpuaffinity.attr, 641 &dev_attr_cpulistaffinity.attr, 642 NULL, 643 }; 644 645 static const struct attribute_group pcibus_group = { 646 .attrs = pcibus_attrs, 647 }; 648 649 const struct attribute_group *pcibus_groups[] = { 650 &pcibus_group, 651 NULL, 652 }; 653 654 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 655 char *buf) 656 { 657 struct pci_dev *pdev = to_pci_dev(dev); 658 struct pci_dev *vga_dev = vga_default_device(); 659 660 if (vga_dev) 661 return sprintf(buf, "%u\n", (pdev == vga_dev)); 662 663 return sprintf(buf, "%u\n", 664 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 665 IORESOURCE_ROM_SHADOW)); 666 } 667 static DEVICE_ATTR_RO(boot_vga); 668 669 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 670 struct bin_attribute *bin_attr, char *buf, 671 loff_t off, size_t count) 672 { 673 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 674 unsigned int size = 64; 675 loff_t init_off = off; 676 u8 *data = (u8 *) buf; 677 678 /* Several chips lock up trying to read undefined config space */ 679 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 680 size = dev->cfg_size; 681 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 682 size = 128; 683 684 if (off > size) 685 return 0; 686 if (off + count > size) { 687 size -= off; 688 count = size; 689 } else { 690 size = count; 691 } 692 693 pci_config_pm_runtime_get(dev); 694 695 if ((off & 1) && size) { 696 u8 val; 697 pci_user_read_config_byte(dev, off, &val); 698 data[off - init_off] = val; 699 off++; 700 size--; 701 } 702 703 if ((off & 3) && size > 2) { 704 u16 val; 705 pci_user_read_config_word(dev, off, &val); 706 data[off - init_off] = val & 0xff; 707 data[off - init_off + 1] = (val >> 8) & 0xff; 708 off += 2; 709 size -= 2; 710 } 711 712 while (size > 3) { 713 u32 val; 714 pci_user_read_config_dword(dev, off, &val); 715 data[off - init_off] = val & 0xff; 716 data[off - init_off + 1] = (val >> 8) & 0xff; 717 data[off - init_off + 2] = (val >> 16) & 0xff; 718 data[off - init_off + 3] = (val >> 24) & 0xff; 719 off += 4; 720 size -= 4; 721 cond_resched(); 722 } 723 724 if (size >= 2) { 725 u16 val; 726 pci_user_read_config_word(dev, off, &val); 727 data[off - init_off] = val & 0xff; 728 data[off - init_off + 1] = (val >> 8) & 0xff; 729 off += 2; 730 size -= 2; 731 } 732 733 if (size > 0) { 734 u8 val; 735 pci_user_read_config_byte(dev, off, &val); 736 data[off - init_off] = val; 737 off++; 738 --size; 739 } 740 741 pci_config_pm_runtime_put(dev); 742 743 return count; 744 } 745 746 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 747 struct bin_attribute *bin_attr, char *buf, 748 loff_t off, size_t count) 749 { 750 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 751 unsigned int size = count; 752 loff_t init_off = off; 753 u8 *data = (u8 *) buf; 754 int ret; 755 756 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 757 if (ret) 758 return ret; 759 760 if (off > dev->cfg_size) 761 return 0; 762 if (off + count > dev->cfg_size) { 763 size = dev->cfg_size - off; 764 count = size; 765 } 766 767 pci_config_pm_runtime_get(dev); 768 769 if ((off & 1) && size) { 770 pci_user_write_config_byte(dev, off, data[off - init_off]); 771 off++; 772 size--; 773 } 774 775 if ((off & 3) && size > 2) { 776 u16 val = data[off - init_off]; 777 val |= (u16) data[off - init_off + 1] << 8; 778 pci_user_write_config_word(dev, off, val); 779 off += 2; 780 size -= 2; 781 } 782 783 while (size > 3) { 784 u32 val = data[off - init_off]; 785 val |= (u32) data[off - init_off + 1] << 8; 786 val |= (u32) data[off - init_off + 2] << 16; 787 val |= (u32) data[off - init_off + 3] << 24; 788 pci_user_write_config_dword(dev, off, val); 789 off += 4; 790 size -= 4; 791 } 792 793 if (size >= 2) { 794 u16 val = data[off - init_off]; 795 val |= (u16) data[off - init_off + 1] << 8; 796 pci_user_write_config_word(dev, off, val); 797 off += 2; 798 size -= 2; 799 } 800 801 if (size) { 802 pci_user_write_config_byte(dev, off, data[off - init_off]); 803 off++; 804 --size; 805 } 806 807 pci_config_pm_runtime_put(dev); 808 809 return count; 810 } 811 812 #ifdef HAVE_PCI_LEGACY 813 /** 814 * pci_read_legacy_io - read byte(s) from legacy I/O port space 815 * @filp: open sysfs file 816 * @kobj: kobject corresponding to file to read from 817 * @bin_attr: struct bin_attribute for this file 818 * @buf: buffer to store results 819 * @off: offset into legacy I/O port space 820 * @count: number of bytes to read 821 * 822 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 823 * callback routine (pci_legacy_read). 824 */ 825 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 826 struct bin_attribute *bin_attr, char *buf, 827 loff_t off, size_t count) 828 { 829 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 830 831 /* Only support 1, 2 or 4 byte accesses */ 832 if (count != 1 && count != 2 && count != 4) 833 return -EINVAL; 834 835 return pci_legacy_read(bus, off, (u32 *)buf, count); 836 } 837 838 /** 839 * pci_write_legacy_io - write byte(s) to legacy I/O port space 840 * @filp: open sysfs file 841 * @kobj: kobject corresponding to file to read from 842 * @bin_attr: struct bin_attribute for this file 843 * @buf: buffer containing value to be written 844 * @off: offset into legacy I/O port space 845 * @count: number of bytes to write 846 * 847 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 848 * callback routine (pci_legacy_write). 849 */ 850 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 851 struct bin_attribute *bin_attr, char *buf, 852 loff_t off, size_t count) 853 { 854 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 855 856 /* Only support 1, 2 or 4 byte accesses */ 857 if (count != 1 && count != 2 && count != 4) 858 return -EINVAL; 859 860 return pci_legacy_write(bus, off, *(u32 *)buf, count); 861 } 862 863 /** 864 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 865 * @filp: open sysfs file 866 * @kobj: kobject corresponding to device to be mapped 867 * @attr: struct bin_attribute for this file 868 * @vma: struct vm_area_struct passed to mmap 869 * 870 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 871 * legacy memory space (first meg of bus space) into application virtual 872 * memory space. 873 */ 874 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 875 struct bin_attribute *attr, 876 struct vm_area_struct *vma) 877 { 878 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 879 880 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 881 } 882 883 /** 884 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 885 * @filp: open sysfs file 886 * @kobj: kobject corresponding to device to be mapped 887 * @attr: struct bin_attribute for this file 888 * @vma: struct vm_area_struct passed to mmap 889 * 890 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 891 * legacy IO space (first meg of bus space) into application virtual 892 * memory space. Returns -ENOSYS if the operation isn't supported 893 */ 894 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 895 struct bin_attribute *attr, 896 struct vm_area_struct *vma) 897 { 898 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 899 900 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 901 } 902 903 /** 904 * pci_adjust_legacy_attr - adjustment of legacy file attributes 905 * @b: bus to create files under 906 * @mmap_type: I/O port or memory 907 * 908 * Stub implementation. Can be overridden by arch if necessary. 909 */ 910 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 911 enum pci_mmap_state mmap_type) 912 { 913 } 914 915 /** 916 * pci_create_legacy_files - create legacy I/O port and memory files 917 * @b: bus to create files under 918 * 919 * Some platforms allow access to legacy I/O port and ISA memory space on 920 * a per-bus basis. This routine creates the files and ties them into 921 * their associated read, write and mmap files from pci-sysfs.c 922 * 923 * On error unwind, but don't propagate the error to the caller 924 * as it is ok to set up the PCI bus without these files. 925 */ 926 void pci_create_legacy_files(struct pci_bus *b) 927 { 928 int error; 929 930 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 931 GFP_ATOMIC); 932 if (!b->legacy_io) 933 goto kzalloc_err; 934 935 sysfs_bin_attr_init(b->legacy_io); 936 b->legacy_io->attr.name = "legacy_io"; 937 b->legacy_io->size = 0xffff; 938 b->legacy_io->attr.mode = 0600; 939 b->legacy_io->read = pci_read_legacy_io; 940 b->legacy_io->write = pci_write_legacy_io; 941 b->legacy_io->mmap = pci_mmap_legacy_io; 942 pci_adjust_legacy_attr(b, pci_mmap_io); 943 error = device_create_bin_file(&b->dev, b->legacy_io); 944 if (error) 945 goto legacy_io_err; 946 947 /* Allocated above after the legacy_io struct */ 948 b->legacy_mem = b->legacy_io + 1; 949 sysfs_bin_attr_init(b->legacy_mem); 950 b->legacy_mem->attr.name = "legacy_mem"; 951 b->legacy_mem->size = 1024*1024; 952 b->legacy_mem->attr.mode = 0600; 953 b->legacy_mem->mmap = pci_mmap_legacy_mem; 954 pci_adjust_legacy_attr(b, pci_mmap_mem); 955 error = device_create_bin_file(&b->dev, b->legacy_mem); 956 if (error) 957 goto legacy_mem_err; 958 959 return; 960 961 legacy_mem_err: 962 device_remove_bin_file(&b->dev, b->legacy_io); 963 legacy_io_err: 964 kfree(b->legacy_io); 965 b->legacy_io = NULL; 966 kzalloc_err: 967 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 968 } 969 970 void pci_remove_legacy_files(struct pci_bus *b) 971 { 972 if (b->legacy_io) { 973 device_remove_bin_file(&b->dev, b->legacy_io); 974 device_remove_bin_file(&b->dev, b->legacy_mem); 975 kfree(b->legacy_io); /* both are allocated here */ 976 } 977 } 978 #endif /* HAVE_PCI_LEGACY */ 979 980 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 981 982 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 983 enum pci_mmap_api mmap_api) 984 { 985 unsigned long nr, start, size; 986 resource_size_t pci_start = 0, pci_end; 987 988 if (pci_resource_len(pdev, resno) == 0) 989 return 0; 990 nr = vma_pages(vma); 991 start = vma->vm_pgoff; 992 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 993 if (mmap_api == PCI_MMAP_PROCFS) { 994 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 995 &pci_start, &pci_end); 996 pci_start >>= PAGE_SHIFT; 997 } 998 if (start >= pci_start && start < pci_start + size && 999 start + nr <= pci_start + size) 1000 return 1; 1001 return 0; 1002 } 1003 1004 /** 1005 * pci_mmap_resource - map a PCI resource into user memory space 1006 * @kobj: kobject for mapping 1007 * @attr: struct bin_attribute for the file being mapped 1008 * @vma: struct vm_area_struct passed into the mmap 1009 * @write_combine: 1 for write_combine mapping 1010 * 1011 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1012 */ 1013 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1014 struct vm_area_struct *vma, int write_combine) 1015 { 1016 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1017 int bar = (unsigned long)attr->private; 1018 enum pci_mmap_state mmap_type; 1019 struct resource *res = &pdev->resource[bar]; 1020 int ret; 1021 1022 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1023 if (ret) 1024 return ret; 1025 1026 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1027 return -EINVAL; 1028 1029 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1030 return -EINVAL; 1031 1032 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1033 1034 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1035 } 1036 1037 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1038 struct bin_attribute *attr, 1039 struct vm_area_struct *vma) 1040 { 1041 return pci_mmap_resource(kobj, attr, vma, 0); 1042 } 1043 1044 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1045 struct bin_attribute *attr, 1046 struct vm_area_struct *vma) 1047 { 1048 return pci_mmap_resource(kobj, attr, vma, 1); 1049 } 1050 1051 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1052 struct bin_attribute *attr, char *buf, 1053 loff_t off, size_t count, bool write) 1054 { 1055 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1056 int bar = (unsigned long)attr->private; 1057 unsigned long port = off; 1058 1059 port += pci_resource_start(pdev, bar); 1060 1061 if (port > pci_resource_end(pdev, bar)) 1062 return 0; 1063 1064 if (port + count - 1 > pci_resource_end(pdev, bar)) 1065 return -EINVAL; 1066 1067 switch (count) { 1068 case 1: 1069 if (write) 1070 outb(*(u8 *)buf, port); 1071 else 1072 *(u8 *)buf = inb(port); 1073 return 1; 1074 case 2: 1075 if (write) 1076 outw(*(u16 *)buf, port); 1077 else 1078 *(u16 *)buf = inw(port); 1079 return 2; 1080 case 4: 1081 if (write) 1082 outl(*(u32 *)buf, port); 1083 else 1084 *(u32 *)buf = inl(port); 1085 return 4; 1086 } 1087 return -EINVAL; 1088 } 1089 1090 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1091 struct bin_attribute *attr, char *buf, 1092 loff_t off, size_t count) 1093 { 1094 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1095 } 1096 1097 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1098 struct bin_attribute *attr, char *buf, 1099 loff_t off, size_t count) 1100 { 1101 int ret; 1102 1103 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1104 if (ret) 1105 return ret; 1106 1107 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1108 } 1109 1110 /** 1111 * pci_remove_resource_files - cleanup resource files 1112 * @pdev: dev to cleanup 1113 * 1114 * If we created resource files for @pdev, remove them from sysfs and 1115 * free their resources. 1116 */ 1117 static void pci_remove_resource_files(struct pci_dev *pdev) 1118 { 1119 int i; 1120 1121 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1122 struct bin_attribute *res_attr; 1123 1124 res_attr = pdev->res_attr[i]; 1125 if (res_attr) { 1126 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1127 kfree(res_attr); 1128 } 1129 1130 res_attr = pdev->res_attr_wc[i]; 1131 if (res_attr) { 1132 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1133 kfree(res_attr); 1134 } 1135 } 1136 } 1137 1138 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1139 { 1140 /* allocate attribute structure, piggyback attribute name */ 1141 int name_len = write_combine ? 13 : 10; 1142 struct bin_attribute *res_attr; 1143 char *res_attr_name; 1144 int retval; 1145 1146 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1147 if (!res_attr) 1148 return -ENOMEM; 1149 1150 res_attr_name = (char *)(res_attr + 1); 1151 1152 sysfs_bin_attr_init(res_attr); 1153 if (write_combine) { 1154 pdev->res_attr_wc[num] = res_attr; 1155 sprintf(res_attr_name, "resource%d_wc", num); 1156 res_attr->mmap = pci_mmap_resource_wc; 1157 } else { 1158 pdev->res_attr[num] = res_attr; 1159 sprintf(res_attr_name, "resource%d", num); 1160 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1161 res_attr->read = pci_read_resource_io; 1162 res_attr->write = pci_write_resource_io; 1163 if (arch_can_pci_mmap_io()) 1164 res_attr->mmap = pci_mmap_resource_uc; 1165 } else { 1166 res_attr->mmap = pci_mmap_resource_uc; 1167 } 1168 } 1169 res_attr->attr.name = res_attr_name; 1170 res_attr->attr.mode = 0600; 1171 res_attr->size = pci_resource_len(pdev, num); 1172 res_attr->private = (void *)(unsigned long)num; 1173 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1174 if (retval) 1175 kfree(res_attr); 1176 1177 return retval; 1178 } 1179 1180 /** 1181 * pci_create_resource_files - create resource files in sysfs for @dev 1182 * @pdev: dev in question 1183 * 1184 * Walk the resources in @pdev creating files for each resource available. 1185 */ 1186 static int pci_create_resource_files(struct pci_dev *pdev) 1187 { 1188 int i; 1189 int retval; 1190 1191 /* Expose the PCI resources from this device as files */ 1192 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1193 1194 /* skip empty resources */ 1195 if (!pci_resource_len(pdev, i)) 1196 continue; 1197 1198 retval = pci_create_attr(pdev, i, 0); 1199 /* for prefetchable resources, create a WC mappable file */ 1200 if (!retval && arch_can_pci_mmap_wc() && 1201 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1202 retval = pci_create_attr(pdev, i, 1); 1203 if (retval) { 1204 pci_remove_resource_files(pdev); 1205 return retval; 1206 } 1207 } 1208 return 0; 1209 } 1210 #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ 1211 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1212 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1213 #endif 1214 1215 /** 1216 * pci_write_rom - used to enable access to the PCI ROM display 1217 * @filp: sysfs file 1218 * @kobj: kernel object handle 1219 * @bin_attr: struct bin_attribute for this file 1220 * @buf: user input 1221 * @off: file offset 1222 * @count: number of byte in input 1223 * 1224 * writing anything except 0 enables it 1225 */ 1226 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1227 struct bin_attribute *bin_attr, char *buf, 1228 loff_t off, size_t count) 1229 { 1230 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1231 1232 if ((off == 0) && (*buf == '0') && (count == 2)) 1233 pdev->rom_attr_enabled = 0; 1234 else 1235 pdev->rom_attr_enabled = 1; 1236 1237 return count; 1238 } 1239 1240 /** 1241 * pci_read_rom - read a PCI ROM 1242 * @filp: sysfs file 1243 * @kobj: kernel object handle 1244 * @bin_attr: struct bin_attribute for this file 1245 * @buf: where to put the data we read from the ROM 1246 * @off: file offset 1247 * @count: number of bytes to read 1248 * 1249 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1250 * device corresponding to @kobj. 1251 */ 1252 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1253 struct bin_attribute *bin_attr, char *buf, 1254 loff_t off, size_t count) 1255 { 1256 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1257 void __iomem *rom; 1258 size_t size; 1259 1260 if (!pdev->rom_attr_enabled) 1261 return -EINVAL; 1262 1263 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1264 if (!rom || !size) 1265 return -EIO; 1266 1267 if (off >= size) 1268 count = 0; 1269 else { 1270 if (off + count > size) 1271 count = size - off; 1272 1273 memcpy_fromio(buf, rom + off, count); 1274 } 1275 pci_unmap_rom(pdev, rom); 1276 1277 return count; 1278 } 1279 1280 static const struct bin_attribute pci_config_attr = { 1281 .attr = { 1282 .name = "config", 1283 .mode = 0644, 1284 }, 1285 .size = PCI_CFG_SPACE_SIZE, 1286 .read = pci_read_config, 1287 .write = pci_write_config, 1288 }; 1289 1290 static const struct bin_attribute pcie_config_attr = { 1291 .attr = { 1292 .name = "config", 1293 .mode = 0644, 1294 }, 1295 .size = PCI_CFG_SPACE_EXP_SIZE, 1296 .read = pci_read_config, 1297 .write = pci_write_config, 1298 }; 1299 1300 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1301 const char *buf, size_t count) 1302 { 1303 struct pci_dev *pdev = to_pci_dev(dev); 1304 unsigned long val; 1305 ssize_t result = kstrtoul(buf, 0, &val); 1306 1307 if (result < 0) 1308 return result; 1309 1310 if (val != 1) 1311 return -EINVAL; 1312 1313 pm_runtime_get_sync(dev); 1314 result = pci_reset_function(pdev); 1315 pm_runtime_put(dev); 1316 if (result < 0) 1317 return result; 1318 1319 return count; 1320 } 1321 1322 static DEVICE_ATTR(reset, 0200, NULL, reset_store); 1323 1324 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1325 { 1326 int retval; 1327 1328 pcie_vpd_create_sysfs_dev_files(dev); 1329 1330 if (dev->reset_fn) { 1331 retval = device_create_file(&dev->dev, &dev_attr_reset); 1332 if (retval) 1333 goto error; 1334 } 1335 return 0; 1336 1337 error: 1338 pcie_vpd_remove_sysfs_dev_files(dev); 1339 return retval; 1340 } 1341 1342 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1343 { 1344 int retval; 1345 int rom_size; 1346 struct bin_attribute *attr; 1347 1348 if (!sysfs_initialized) 1349 return -EACCES; 1350 1351 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1352 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1353 else 1354 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1355 if (retval) 1356 goto err; 1357 1358 retval = pci_create_resource_files(pdev); 1359 if (retval) 1360 goto err_config_file; 1361 1362 /* If the device has a ROM, try to expose it in sysfs. */ 1363 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1364 if (rom_size) { 1365 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1366 if (!attr) { 1367 retval = -ENOMEM; 1368 goto err_resource_files; 1369 } 1370 sysfs_bin_attr_init(attr); 1371 attr->size = rom_size; 1372 attr->attr.name = "rom"; 1373 attr->attr.mode = 0600; 1374 attr->read = pci_read_rom; 1375 attr->write = pci_write_rom; 1376 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1377 if (retval) { 1378 kfree(attr); 1379 goto err_resource_files; 1380 } 1381 pdev->rom_attr = attr; 1382 } 1383 1384 /* add sysfs entries for various capabilities */ 1385 retval = pci_create_capabilities_sysfs(pdev); 1386 if (retval) 1387 goto err_rom_file; 1388 1389 pci_create_firmware_label_files(pdev); 1390 1391 return 0; 1392 1393 err_rom_file: 1394 if (pdev->rom_attr) { 1395 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1396 kfree(pdev->rom_attr); 1397 pdev->rom_attr = NULL; 1398 } 1399 err_resource_files: 1400 pci_remove_resource_files(pdev); 1401 err_config_file: 1402 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1403 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1404 else 1405 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1406 err: 1407 return retval; 1408 } 1409 1410 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1411 { 1412 pcie_vpd_remove_sysfs_dev_files(dev); 1413 if (dev->reset_fn) { 1414 device_remove_file(&dev->dev, &dev_attr_reset); 1415 dev->reset_fn = 0; 1416 } 1417 } 1418 1419 /** 1420 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1421 * @pdev: device whose entries we should free 1422 * 1423 * Cleanup when @pdev is removed from sysfs. 1424 */ 1425 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1426 { 1427 if (!sysfs_initialized) 1428 return; 1429 1430 pci_remove_capabilities_sysfs(pdev); 1431 1432 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1433 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1434 else 1435 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1436 1437 pci_remove_resource_files(pdev); 1438 1439 if (pdev->rom_attr) { 1440 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1441 kfree(pdev->rom_attr); 1442 pdev->rom_attr = NULL; 1443 } 1444 1445 pci_remove_firmware_label_files(pdev); 1446 } 1447 1448 static int __init pci_sysfs_init(void) 1449 { 1450 struct pci_dev *pdev = NULL; 1451 int retval; 1452 1453 sysfs_initialized = 1; 1454 for_each_pci_dev(pdev) { 1455 retval = pci_create_sysfs_dev_files(pdev); 1456 if (retval) { 1457 pci_dev_put(pdev); 1458 return retval; 1459 } 1460 } 1461 1462 return 0; 1463 } 1464 late_initcall(pci_sysfs_init); 1465 1466 static struct attribute *pci_dev_dev_attrs[] = { 1467 &dev_attr_boot_vga.attr, 1468 NULL, 1469 }; 1470 1471 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1472 struct attribute *a, int n) 1473 { 1474 struct device *dev = kobj_to_dev(kobj); 1475 struct pci_dev *pdev = to_pci_dev(dev); 1476 1477 if (a == &dev_attr_boot_vga.attr) 1478 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1479 return 0; 1480 1481 return a->mode; 1482 } 1483 1484 static struct attribute *pci_dev_hp_attrs[] = { 1485 &dev_attr_remove.attr, 1486 &dev_attr_dev_rescan.attr, 1487 NULL, 1488 }; 1489 1490 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1491 struct attribute *a, int n) 1492 { 1493 struct device *dev = kobj_to_dev(kobj); 1494 struct pci_dev *pdev = to_pci_dev(dev); 1495 1496 if (pdev->is_virtfn) 1497 return 0; 1498 1499 return a->mode; 1500 } 1501 1502 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1503 struct attribute *a, int n) 1504 { 1505 struct device *dev = kobj_to_dev(kobj); 1506 struct pci_dev *pdev = to_pci_dev(dev); 1507 1508 if (pci_is_bridge(pdev)) 1509 return a->mode; 1510 1511 return 0; 1512 } 1513 1514 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1515 struct attribute *a, int n) 1516 { 1517 struct device *dev = kobj_to_dev(kobj); 1518 struct pci_dev *pdev = to_pci_dev(dev); 1519 1520 if (pci_is_pcie(pdev)) 1521 return a->mode; 1522 1523 return 0; 1524 } 1525 1526 static const struct attribute_group pci_dev_group = { 1527 .attrs = pci_dev_attrs, 1528 }; 1529 1530 const struct attribute_group *pci_dev_groups[] = { 1531 &pci_dev_group, 1532 NULL, 1533 }; 1534 1535 static const struct attribute_group pci_dev_hp_attr_group = { 1536 .attrs = pci_dev_hp_attrs, 1537 .is_visible = pci_dev_hp_attrs_are_visible, 1538 }; 1539 1540 static const struct attribute_group pci_dev_attr_group = { 1541 .attrs = pci_dev_dev_attrs, 1542 .is_visible = pci_dev_attrs_are_visible, 1543 }; 1544 1545 static const struct attribute_group pci_bridge_attr_group = { 1546 .attrs = pci_bridge_attrs, 1547 .is_visible = pci_bridge_attrs_are_visible, 1548 }; 1549 1550 static const struct attribute_group pcie_dev_attr_group = { 1551 .attrs = pcie_dev_attrs, 1552 .is_visible = pcie_dev_attrs_are_visible, 1553 }; 1554 1555 static const struct attribute_group *pci_dev_attr_groups[] = { 1556 &pci_dev_attr_group, 1557 &pci_dev_hp_attr_group, 1558 #ifdef CONFIG_PCI_IOV 1559 &sriov_dev_attr_group, 1560 #endif 1561 &pci_bridge_attr_group, 1562 &pcie_dev_attr_group, 1563 #ifdef CONFIG_PCIEAER 1564 &aer_stats_attr_group, 1565 #endif 1566 #ifdef CONFIG_PCIEASPM 1567 &aspm_ctrl_attr_group, 1568 #endif 1569 NULL, 1570 }; 1571 1572 const struct device_type pci_dev_type = { 1573 .groups = pci_dev_attr_groups, 1574 }; 1575