1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 #include <linux/bitfield.h> 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/msi.h> 30 #include <linux/of.h> 31 #include <linux/aperture.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev(dev); \ 44 return sysfs_emit(buf, format_string, pdev->field); \ 45 } \ 46 static DEVICE_ATTR_RO(field) 47 48 pci_config_attr(vendor, "0x%04x\n"); 49 pci_config_attr(device, "0x%04x\n"); 50 pci_config_attr(subsystem_vendor, "0x%04x\n"); 51 pci_config_attr(subsystem_device, "0x%04x\n"); 52 pci_config_attr(revision, "0x%02x\n"); 53 pci_config_attr(class, "0x%06x\n"); 54 55 static ssize_t irq_show(struct device *dev, 56 struct device_attribute *attr, 57 char *buf) 58 { 59 struct pci_dev *pdev = to_pci_dev(dev); 60 61 #ifdef CONFIG_PCI_MSI 62 /* 63 * For MSI, show the first MSI IRQ; for all other cases including 64 * MSI-X, show the legacy INTx IRQ. 65 */ 66 if (pdev->msi_enabled) 67 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0)); 68 #endif 69 70 return sysfs_emit(buf, "%u\n", pdev->irq); 71 } 72 static DEVICE_ATTR_RO(irq); 73 74 static ssize_t broken_parity_status_show(struct device *dev, 75 struct device_attribute *attr, 76 char *buf) 77 { 78 struct pci_dev *pdev = to_pci_dev(dev); 79 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status); 80 } 81 82 static ssize_t broken_parity_status_store(struct device *dev, 83 struct device_attribute *attr, 84 const char *buf, size_t count) 85 { 86 struct pci_dev *pdev = to_pci_dev(dev); 87 unsigned long val; 88 89 if (kstrtoul(buf, 0, &val) < 0) 90 return -EINVAL; 91 92 pdev->broken_parity_status = !!val; 93 94 return count; 95 } 96 static DEVICE_ATTR_RW(broken_parity_status); 97 98 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 99 struct device_attribute *attr, char *buf) 100 { 101 const struct cpumask *mask; 102 103 #ifdef CONFIG_NUMA 104 if (dev_to_node(dev) == NUMA_NO_NODE) 105 mask = cpu_online_mask; 106 else 107 mask = cpumask_of_node(dev_to_node(dev)); 108 #else 109 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 110 #endif 111 return cpumap_print_to_pagebuf(list, buf, mask); 112 } 113 114 static ssize_t local_cpus_show(struct device *dev, 115 struct device_attribute *attr, char *buf) 116 { 117 return pci_dev_show_local_cpu(dev, false, attr, buf); 118 } 119 static DEVICE_ATTR_RO(local_cpus); 120 121 static ssize_t local_cpulist_show(struct device *dev, 122 struct device_attribute *attr, char *buf) 123 { 124 return pci_dev_show_local_cpu(dev, true, attr, buf); 125 } 126 static DEVICE_ATTR_RO(local_cpulist); 127 128 /* 129 * PCI Bus Class Devices 130 */ 131 static ssize_t cpuaffinity_show(struct device *dev, 132 struct device_attribute *attr, char *buf) 133 { 134 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 135 136 return cpumap_print_to_pagebuf(false, buf, cpumask); 137 } 138 static DEVICE_ATTR_RO(cpuaffinity); 139 140 static ssize_t cpulistaffinity_show(struct device *dev, 141 struct device_attribute *attr, char *buf) 142 { 143 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 144 145 return cpumap_print_to_pagebuf(true, buf, cpumask); 146 } 147 static DEVICE_ATTR_RO(cpulistaffinity); 148 149 static ssize_t power_state_show(struct device *dev, 150 struct device_attribute *attr, char *buf) 151 { 152 struct pci_dev *pdev = to_pci_dev(dev); 153 154 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state)); 155 } 156 static DEVICE_ATTR_RO(power_state); 157 158 /* show resources */ 159 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 160 char *buf) 161 { 162 struct pci_dev *pci_dev = to_pci_dev(dev); 163 int i; 164 int max; 165 resource_size_t start, end; 166 size_t len = 0; 167 168 if (pci_dev->subordinate) 169 max = DEVICE_COUNT_RESOURCE; 170 else 171 max = PCI_BRIDGE_RESOURCES; 172 173 for (i = 0; i < max; i++) { 174 struct resource *res = &pci_dev->resource[i]; 175 pci_resource_to_user(pci_dev, i, res, &start, &end); 176 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n", 177 (unsigned long long)start, 178 (unsigned long long)end, 179 (unsigned long long)res->flags); 180 } 181 return len; 182 } 183 static DEVICE_ATTR_RO(resource); 184 185 static ssize_t max_link_speed_show(struct device *dev, 186 struct device_attribute *attr, char *buf) 187 { 188 struct pci_dev *pdev = to_pci_dev(dev); 189 190 return sysfs_emit(buf, "%s\n", 191 pci_speed_string(pcie_get_speed_cap(pdev))); 192 } 193 static DEVICE_ATTR_RO(max_link_speed); 194 195 static ssize_t max_link_width_show(struct device *dev, 196 struct device_attribute *attr, char *buf) 197 { 198 struct pci_dev *pdev = to_pci_dev(dev); 199 200 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); 201 } 202 static DEVICE_ATTR_RO(max_link_width); 203 204 static ssize_t current_link_speed_show(struct device *dev, 205 struct device_attribute *attr, char *buf) 206 { 207 struct pci_dev *pci_dev = to_pci_dev(dev); 208 u16 linkstat; 209 int err; 210 enum pci_bus_speed speed; 211 212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 213 if (err) 214 return -EINVAL; 215 216 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 217 218 return sysfs_emit(buf, "%s\n", pci_speed_string(speed)); 219 } 220 static DEVICE_ATTR_RO(current_link_speed); 221 222 static ssize_t current_link_width_show(struct device *dev, 223 struct device_attribute *attr, char *buf) 224 { 225 struct pci_dev *pci_dev = to_pci_dev(dev); 226 u16 linkstat; 227 int err; 228 229 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 230 if (err) 231 return -EINVAL; 232 233 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat)); 234 } 235 static DEVICE_ATTR_RO(current_link_width); 236 237 static ssize_t secondary_bus_number_show(struct device *dev, 238 struct device_attribute *attr, 239 char *buf) 240 { 241 struct pci_dev *pci_dev = to_pci_dev(dev); 242 u8 sec_bus; 243 int err; 244 245 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 246 if (err) 247 return -EINVAL; 248 249 return sysfs_emit(buf, "%u\n", sec_bus); 250 } 251 static DEVICE_ATTR_RO(secondary_bus_number); 252 253 static ssize_t subordinate_bus_number_show(struct device *dev, 254 struct device_attribute *attr, 255 char *buf) 256 { 257 struct pci_dev *pci_dev = to_pci_dev(dev); 258 u8 sub_bus; 259 int err; 260 261 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 262 if (err) 263 return -EINVAL; 264 265 return sysfs_emit(buf, "%u\n", sub_bus); 266 } 267 static DEVICE_ATTR_RO(subordinate_bus_number); 268 269 static ssize_t ari_enabled_show(struct device *dev, 270 struct device_attribute *attr, 271 char *buf) 272 { 273 struct pci_dev *pci_dev = to_pci_dev(dev); 274 275 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 276 } 277 static DEVICE_ATTR_RO(ari_enabled); 278 279 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 280 char *buf) 281 { 282 struct pci_dev *pci_dev = to_pci_dev(dev); 283 284 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 285 pci_dev->vendor, pci_dev->device, 286 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 287 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 288 (u8)(pci_dev->class)); 289 } 290 static DEVICE_ATTR_RO(modalias); 291 292 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 293 const char *buf, size_t count) 294 { 295 struct pci_dev *pdev = to_pci_dev(dev); 296 unsigned long val; 297 ssize_t result = 0; 298 299 /* this can crash the machine when done on the "wrong" device */ 300 if (!capable(CAP_SYS_ADMIN)) 301 return -EPERM; 302 303 if (kstrtoul(buf, 0, &val) < 0) 304 return -EINVAL; 305 306 device_lock(dev); 307 if (dev->driver) 308 result = -EBUSY; 309 else if (val) 310 result = pci_enable_device(pdev); 311 else if (pci_is_enabled(pdev)) 312 pci_disable_device(pdev); 313 else 314 result = -EIO; 315 device_unlock(dev); 316 317 return result < 0 ? result : count; 318 } 319 320 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 321 char *buf) 322 { 323 struct pci_dev *pdev; 324 325 pdev = to_pci_dev(dev); 326 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 327 } 328 static DEVICE_ATTR_RW(enable); 329 330 #ifdef CONFIG_NUMA 331 static ssize_t numa_node_store(struct device *dev, 332 struct device_attribute *attr, const char *buf, 333 size_t count) 334 { 335 struct pci_dev *pdev = to_pci_dev(dev); 336 int node; 337 338 if (!capable(CAP_SYS_ADMIN)) 339 return -EPERM; 340 341 if (kstrtoint(buf, 0, &node) < 0) 342 return -EINVAL; 343 344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 345 return -EINVAL; 346 347 if (node != NUMA_NO_NODE && !node_online(node)) 348 return -EINVAL; 349 350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 351 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 352 node); 353 354 dev->numa_node = node; 355 return count; 356 } 357 358 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 359 char *buf) 360 { 361 return sysfs_emit(buf, "%d\n", dev->numa_node); 362 } 363 static DEVICE_ATTR_RW(numa_node); 364 #endif 365 366 static ssize_t dma_mask_bits_show(struct device *dev, 367 struct device_attribute *attr, char *buf) 368 { 369 struct pci_dev *pdev = to_pci_dev(dev); 370 371 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask)); 372 } 373 static DEVICE_ATTR_RO(dma_mask_bits); 374 375 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 376 struct device_attribute *attr, 377 char *buf) 378 { 379 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask)); 380 } 381 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 382 383 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 384 char *buf) 385 { 386 struct pci_dev *pdev = to_pci_dev(dev); 387 struct pci_bus *subordinate = pdev->subordinate; 388 389 return sysfs_emit(buf, "%u\n", subordinate ? 390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 391 : !pdev->no_msi); 392 } 393 394 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 395 const char *buf, size_t count) 396 { 397 struct pci_dev *pdev = to_pci_dev(dev); 398 struct pci_bus *subordinate = pdev->subordinate; 399 unsigned long val; 400 401 if (!capable(CAP_SYS_ADMIN)) 402 return -EPERM; 403 404 if (kstrtoul(buf, 0, &val) < 0) 405 return -EINVAL; 406 407 /* 408 * "no_msi" and "bus_flags" only affect what happens when a driver 409 * requests MSI or MSI-X. They don't affect any drivers that have 410 * already requested MSI or MSI-X. 411 */ 412 if (!subordinate) { 413 pdev->no_msi = !val; 414 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 415 val ? "allowed" : "disallowed"); 416 return count; 417 } 418 419 if (val) 420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 421 else 422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 423 424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 425 val ? "allowed" : "disallowed"); 426 return count; 427 } 428 static DEVICE_ATTR_RW(msi_bus); 429 430 static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count) 431 { 432 unsigned long val; 433 struct pci_bus *b = NULL; 434 435 if (kstrtoul(buf, 0, &val) < 0) 436 return -EINVAL; 437 438 if (val) { 439 pci_lock_rescan_remove(); 440 while ((b = pci_find_next_bus(b)) != NULL) 441 pci_rescan_bus(b); 442 pci_unlock_rescan_remove(); 443 } 444 return count; 445 } 446 static BUS_ATTR_WO(rescan); 447 448 static struct attribute *pci_bus_attrs[] = { 449 &bus_attr_rescan.attr, 450 NULL, 451 }; 452 453 static const struct attribute_group pci_bus_group = { 454 .attrs = pci_bus_attrs, 455 }; 456 457 const struct attribute_group *pci_bus_groups[] = { 458 &pci_bus_group, 459 NULL, 460 }; 461 462 static ssize_t dev_rescan_store(struct device *dev, 463 struct device_attribute *attr, const char *buf, 464 size_t count) 465 { 466 unsigned long val; 467 struct pci_dev *pdev = to_pci_dev(dev); 468 469 if (kstrtoul(buf, 0, &val) < 0) 470 return -EINVAL; 471 472 if (val) { 473 pci_lock_rescan_remove(); 474 pci_rescan_bus(pdev->bus); 475 pci_unlock_rescan_remove(); 476 } 477 return count; 478 } 479 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 480 dev_rescan_store); 481 482 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 483 const char *buf, size_t count) 484 { 485 unsigned long val; 486 487 if (kstrtoul(buf, 0, &val) < 0) 488 return -EINVAL; 489 490 if (val && device_remove_file_self(dev, attr)) 491 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 492 return count; 493 } 494 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 495 remove_store); 496 497 static ssize_t bus_rescan_store(struct device *dev, 498 struct device_attribute *attr, 499 const char *buf, size_t count) 500 { 501 unsigned long val; 502 struct pci_bus *bus = to_pci_bus(dev); 503 504 if (kstrtoul(buf, 0, &val) < 0) 505 return -EINVAL; 506 507 if (val) { 508 pci_lock_rescan_remove(); 509 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 510 pci_rescan_bus_bridge_resize(bus->self); 511 else 512 pci_rescan_bus(bus); 513 pci_unlock_rescan_remove(); 514 } 515 return count; 516 } 517 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 518 bus_rescan_store); 519 520 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 521 static ssize_t d3cold_allowed_store(struct device *dev, 522 struct device_attribute *attr, 523 const char *buf, size_t count) 524 { 525 struct pci_dev *pdev = to_pci_dev(dev); 526 unsigned long val; 527 528 if (kstrtoul(buf, 0, &val) < 0) 529 return -EINVAL; 530 531 pdev->d3cold_allowed = !!val; 532 if (pdev->d3cold_allowed) 533 pci_d3cold_enable(pdev); 534 else 535 pci_d3cold_disable(pdev); 536 537 pm_runtime_resume(dev); 538 539 return count; 540 } 541 542 static ssize_t d3cold_allowed_show(struct device *dev, 543 struct device_attribute *attr, char *buf) 544 { 545 struct pci_dev *pdev = to_pci_dev(dev); 546 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); 547 } 548 static DEVICE_ATTR_RW(d3cold_allowed); 549 #endif 550 551 #ifdef CONFIG_OF 552 static ssize_t devspec_show(struct device *dev, 553 struct device_attribute *attr, char *buf) 554 { 555 struct pci_dev *pdev = to_pci_dev(dev); 556 struct device_node *np = pci_device_to_OF_node(pdev); 557 558 if (np == NULL) 559 return 0; 560 return sysfs_emit(buf, "%pOF\n", np); 561 } 562 static DEVICE_ATTR_RO(devspec); 563 #endif 564 565 static ssize_t driver_override_store(struct device *dev, 566 struct device_attribute *attr, 567 const char *buf, size_t count) 568 { 569 struct pci_dev *pdev = to_pci_dev(dev); 570 int ret; 571 572 ret = driver_set_override(dev, &pdev->driver_override, buf, count); 573 if (ret) 574 return ret; 575 576 return count; 577 } 578 579 static ssize_t driver_override_show(struct device *dev, 580 struct device_attribute *attr, char *buf) 581 { 582 struct pci_dev *pdev = to_pci_dev(dev); 583 ssize_t len; 584 585 device_lock(dev); 586 len = sysfs_emit(buf, "%s\n", pdev->driver_override); 587 device_unlock(dev); 588 return len; 589 } 590 static DEVICE_ATTR_RW(driver_override); 591 592 static struct attribute *pci_dev_attrs[] = { 593 &dev_attr_power_state.attr, 594 &dev_attr_resource.attr, 595 &dev_attr_vendor.attr, 596 &dev_attr_device.attr, 597 &dev_attr_subsystem_vendor.attr, 598 &dev_attr_subsystem_device.attr, 599 &dev_attr_revision.attr, 600 &dev_attr_class.attr, 601 &dev_attr_irq.attr, 602 &dev_attr_local_cpus.attr, 603 &dev_attr_local_cpulist.attr, 604 &dev_attr_modalias.attr, 605 #ifdef CONFIG_NUMA 606 &dev_attr_numa_node.attr, 607 #endif 608 &dev_attr_dma_mask_bits.attr, 609 &dev_attr_consistent_dma_mask_bits.attr, 610 &dev_attr_enable.attr, 611 &dev_attr_broken_parity_status.attr, 612 &dev_attr_msi_bus.attr, 613 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 614 &dev_attr_d3cold_allowed.attr, 615 #endif 616 #ifdef CONFIG_OF 617 &dev_attr_devspec.attr, 618 #endif 619 &dev_attr_driver_override.attr, 620 &dev_attr_ari_enabled.attr, 621 NULL, 622 }; 623 624 static struct attribute *pci_bridge_attrs[] = { 625 &dev_attr_subordinate_bus_number.attr, 626 &dev_attr_secondary_bus_number.attr, 627 NULL, 628 }; 629 630 static struct attribute *pcie_dev_attrs[] = { 631 &dev_attr_current_link_speed.attr, 632 &dev_attr_current_link_width.attr, 633 &dev_attr_max_link_width.attr, 634 &dev_attr_max_link_speed.attr, 635 NULL, 636 }; 637 638 static struct attribute *pcibus_attrs[] = { 639 &dev_attr_bus_rescan.attr, 640 &dev_attr_cpuaffinity.attr, 641 &dev_attr_cpulistaffinity.attr, 642 NULL, 643 }; 644 645 static const struct attribute_group pcibus_group = { 646 .attrs = pcibus_attrs, 647 }; 648 649 const struct attribute_group *pcibus_groups[] = { 650 &pcibus_group, 651 NULL, 652 }; 653 654 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 655 char *buf) 656 { 657 struct pci_dev *pdev = to_pci_dev(dev); 658 struct pci_dev *vga_dev = vga_default_device(); 659 660 if (vga_dev) 661 return sysfs_emit(buf, "%u\n", (pdev == vga_dev)); 662 663 return sysfs_emit(buf, "%u\n", 664 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 665 IORESOURCE_ROM_SHADOW)); 666 } 667 static DEVICE_ATTR_RO(boot_vga); 668 669 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 670 struct bin_attribute *bin_attr, char *buf, 671 loff_t off, size_t count) 672 { 673 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 674 unsigned int size = 64; 675 loff_t init_off = off; 676 u8 *data = (u8 *) buf; 677 678 /* Several chips lock up trying to read undefined config space */ 679 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 680 size = dev->cfg_size; 681 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 682 size = 128; 683 684 if (off > size) 685 return 0; 686 if (off + count > size) { 687 size -= off; 688 count = size; 689 } else { 690 size = count; 691 } 692 693 pci_config_pm_runtime_get(dev); 694 695 if ((off & 1) && size) { 696 u8 val; 697 pci_user_read_config_byte(dev, off, &val); 698 data[off - init_off] = val; 699 off++; 700 size--; 701 } 702 703 if ((off & 3) && size > 2) { 704 u16 val; 705 pci_user_read_config_word(dev, off, &val); 706 data[off - init_off] = val & 0xff; 707 data[off - init_off + 1] = (val >> 8) & 0xff; 708 off += 2; 709 size -= 2; 710 } 711 712 while (size > 3) { 713 u32 val; 714 pci_user_read_config_dword(dev, off, &val); 715 data[off - init_off] = val & 0xff; 716 data[off - init_off + 1] = (val >> 8) & 0xff; 717 data[off - init_off + 2] = (val >> 16) & 0xff; 718 data[off - init_off + 3] = (val >> 24) & 0xff; 719 off += 4; 720 size -= 4; 721 cond_resched(); 722 } 723 724 if (size >= 2) { 725 u16 val; 726 pci_user_read_config_word(dev, off, &val); 727 data[off - init_off] = val & 0xff; 728 data[off - init_off + 1] = (val >> 8) & 0xff; 729 off += 2; 730 size -= 2; 731 } 732 733 if (size > 0) { 734 u8 val; 735 pci_user_read_config_byte(dev, off, &val); 736 data[off - init_off] = val; 737 } 738 739 pci_config_pm_runtime_put(dev); 740 741 return count; 742 } 743 744 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 745 struct bin_attribute *bin_attr, char *buf, 746 loff_t off, size_t count) 747 { 748 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 749 unsigned int size = count; 750 loff_t init_off = off; 751 u8 *data = (u8 *) buf; 752 int ret; 753 754 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 755 if (ret) 756 return ret; 757 758 if (resource_is_exclusive(&dev->driver_exclusive_resource, off, 759 count)) { 760 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx", 761 current->comm, off); 762 add_taint(TAINT_USER, LOCKDEP_STILL_OK); 763 } 764 765 if (off > dev->cfg_size) 766 return 0; 767 if (off + count > dev->cfg_size) { 768 size = dev->cfg_size - off; 769 count = size; 770 } 771 772 pci_config_pm_runtime_get(dev); 773 774 if ((off & 1) && size) { 775 pci_user_write_config_byte(dev, off, data[off - init_off]); 776 off++; 777 size--; 778 } 779 780 if ((off & 3) && size > 2) { 781 u16 val = data[off - init_off]; 782 val |= (u16) data[off - init_off + 1] << 8; 783 pci_user_write_config_word(dev, off, val); 784 off += 2; 785 size -= 2; 786 } 787 788 while (size > 3) { 789 u32 val = data[off - init_off]; 790 val |= (u32) data[off - init_off + 1] << 8; 791 val |= (u32) data[off - init_off + 2] << 16; 792 val |= (u32) data[off - init_off + 3] << 24; 793 pci_user_write_config_dword(dev, off, val); 794 off += 4; 795 size -= 4; 796 } 797 798 if (size >= 2) { 799 u16 val = data[off - init_off]; 800 val |= (u16) data[off - init_off + 1] << 8; 801 pci_user_write_config_word(dev, off, val); 802 off += 2; 803 size -= 2; 804 } 805 806 if (size) 807 pci_user_write_config_byte(dev, off, data[off - init_off]); 808 809 pci_config_pm_runtime_put(dev); 810 811 return count; 812 } 813 static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0); 814 815 static struct bin_attribute *pci_dev_config_attrs[] = { 816 &bin_attr_config, 817 NULL, 818 }; 819 820 static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj, 821 struct bin_attribute *a, int n) 822 { 823 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 824 825 a->size = PCI_CFG_SPACE_SIZE; 826 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 827 a->size = PCI_CFG_SPACE_EXP_SIZE; 828 829 return a->attr.mode; 830 } 831 832 static const struct attribute_group pci_dev_config_attr_group = { 833 .bin_attrs = pci_dev_config_attrs, 834 .is_bin_visible = pci_dev_config_attr_is_visible, 835 }; 836 837 #ifdef HAVE_PCI_LEGACY 838 /** 839 * pci_read_legacy_io - read byte(s) from legacy I/O port space 840 * @filp: open sysfs file 841 * @kobj: kobject corresponding to file to read from 842 * @bin_attr: struct bin_attribute for this file 843 * @buf: buffer to store results 844 * @off: offset into legacy I/O port space 845 * @count: number of bytes to read 846 * 847 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 848 * callback routine (pci_legacy_read). 849 */ 850 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 851 struct bin_attribute *bin_attr, char *buf, 852 loff_t off, size_t count) 853 { 854 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 855 856 /* Only support 1, 2 or 4 byte accesses */ 857 if (count != 1 && count != 2 && count != 4) 858 return -EINVAL; 859 860 return pci_legacy_read(bus, off, (u32 *)buf, count); 861 } 862 863 /** 864 * pci_write_legacy_io - write byte(s) to legacy I/O port space 865 * @filp: open sysfs file 866 * @kobj: kobject corresponding to file to read from 867 * @bin_attr: struct bin_attribute for this file 868 * @buf: buffer containing value to be written 869 * @off: offset into legacy I/O port space 870 * @count: number of bytes to write 871 * 872 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 873 * callback routine (pci_legacy_write). 874 */ 875 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 876 struct bin_attribute *bin_attr, char *buf, 877 loff_t off, size_t count) 878 { 879 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 880 881 /* Only support 1, 2 or 4 byte accesses */ 882 if (count != 1 && count != 2 && count != 4) 883 return -EINVAL; 884 885 return pci_legacy_write(bus, off, *(u32 *)buf, count); 886 } 887 888 /** 889 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 890 * @filp: open sysfs file 891 * @kobj: kobject corresponding to device to be mapped 892 * @attr: struct bin_attribute for this file 893 * @vma: struct vm_area_struct passed to mmap 894 * 895 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 896 * legacy memory space (first meg of bus space) into application virtual 897 * memory space. 898 */ 899 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 900 struct bin_attribute *attr, 901 struct vm_area_struct *vma) 902 { 903 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 904 905 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 906 } 907 908 /** 909 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 910 * @filp: open sysfs file 911 * @kobj: kobject corresponding to device to be mapped 912 * @attr: struct bin_attribute for this file 913 * @vma: struct vm_area_struct passed to mmap 914 * 915 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 916 * legacy IO space (first meg of bus space) into application virtual 917 * memory space. Returns -ENOSYS if the operation isn't supported 918 */ 919 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 920 struct bin_attribute *attr, 921 struct vm_area_struct *vma) 922 { 923 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 924 925 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 926 } 927 928 /** 929 * pci_adjust_legacy_attr - adjustment of legacy file attributes 930 * @b: bus to create files under 931 * @mmap_type: I/O port or memory 932 * 933 * Stub implementation. Can be overridden by arch if necessary. 934 */ 935 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 936 enum pci_mmap_state mmap_type) 937 { 938 } 939 940 /** 941 * pci_create_legacy_files - create legacy I/O port and memory files 942 * @b: bus to create files under 943 * 944 * Some platforms allow access to legacy I/O port and ISA memory space on 945 * a per-bus basis. This routine creates the files and ties them into 946 * their associated read, write and mmap files from pci-sysfs.c 947 * 948 * On error unwind, but don't propagate the error to the caller 949 * as it is ok to set up the PCI bus without these files. 950 */ 951 void pci_create_legacy_files(struct pci_bus *b) 952 { 953 int error; 954 955 if (!sysfs_initialized) 956 return; 957 958 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 959 GFP_ATOMIC); 960 if (!b->legacy_io) 961 goto kzalloc_err; 962 963 sysfs_bin_attr_init(b->legacy_io); 964 b->legacy_io->attr.name = "legacy_io"; 965 b->legacy_io->size = 0xffff; 966 b->legacy_io->attr.mode = 0600; 967 b->legacy_io->read = pci_read_legacy_io; 968 b->legacy_io->write = pci_write_legacy_io; 969 b->legacy_io->mmap = pci_mmap_legacy_io; 970 b->legacy_io->f_mapping = iomem_get_mapping; 971 pci_adjust_legacy_attr(b, pci_mmap_io); 972 error = device_create_bin_file(&b->dev, b->legacy_io); 973 if (error) 974 goto legacy_io_err; 975 976 /* Allocated above after the legacy_io struct */ 977 b->legacy_mem = b->legacy_io + 1; 978 sysfs_bin_attr_init(b->legacy_mem); 979 b->legacy_mem->attr.name = "legacy_mem"; 980 b->legacy_mem->size = 1024*1024; 981 b->legacy_mem->attr.mode = 0600; 982 b->legacy_mem->mmap = pci_mmap_legacy_mem; 983 b->legacy_mem->f_mapping = iomem_get_mapping; 984 pci_adjust_legacy_attr(b, pci_mmap_mem); 985 error = device_create_bin_file(&b->dev, b->legacy_mem); 986 if (error) 987 goto legacy_mem_err; 988 989 return; 990 991 legacy_mem_err: 992 device_remove_bin_file(&b->dev, b->legacy_io); 993 legacy_io_err: 994 kfree(b->legacy_io); 995 b->legacy_io = NULL; 996 kzalloc_err: 997 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 998 } 999 1000 void pci_remove_legacy_files(struct pci_bus *b) 1001 { 1002 if (b->legacy_io) { 1003 device_remove_bin_file(&b->dev, b->legacy_io); 1004 device_remove_bin_file(&b->dev, b->legacy_mem); 1005 kfree(b->legacy_io); /* both are allocated here */ 1006 } 1007 } 1008 #endif /* HAVE_PCI_LEGACY */ 1009 1010 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1011 1012 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1013 enum pci_mmap_api mmap_api) 1014 { 1015 unsigned long nr, start, size; 1016 resource_size_t pci_start = 0, pci_end; 1017 1018 if (pci_resource_len(pdev, resno) == 0) 1019 return 0; 1020 nr = vma_pages(vma); 1021 start = vma->vm_pgoff; 1022 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1023 if (mmap_api == PCI_MMAP_PROCFS) { 1024 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1025 &pci_start, &pci_end); 1026 pci_start >>= PAGE_SHIFT; 1027 } 1028 if (start >= pci_start && start < pci_start + size && 1029 start + nr <= pci_start + size) 1030 return 1; 1031 return 0; 1032 } 1033 1034 /** 1035 * pci_mmap_resource - map a PCI resource into user memory space 1036 * @kobj: kobject for mapping 1037 * @attr: struct bin_attribute for the file being mapped 1038 * @vma: struct vm_area_struct passed into the mmap 1039 * @write_combine: 1 for write_combine mapping 1040 * 1041 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1042 */ 1043 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1044 struct vm_area_struct *vma, int write_combine) 1045 { 1046 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1047 int bar = (unsigned long)attr->private; 1048 enum pci_mmap_state mmap_type; 1049 struct resource *res = &pdev->resource[bar]; 1050 int ret; 1051 1052 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1053 if (ret) 1054 return ret; 1055 1056 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1057 return -EINVAL; 1058 1059 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1060 return -EINVAL; 1061 1062 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1063 1064 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1065 } 1066 1067 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1068 struct bin_attribute *attr, 1069 struct vm_area_struct *vma) 1070 { 1071 return pci_mmap_resource(kobj, attr, vma, 0); 1072 } 1073 1074 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1075 struct bin_attribute *attr, 1076 struct vm_area_struct *vma) 1077 { 1078 return pci_mmap_resource(kobj, attr, vma, 1); 1079 } 1080 1081 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1082 struct bin_attribute *attr, char *buf, 1083 loff_t off, size_t count, bool write) 1084 { 1085 #ifdef CONFIG_HAS_IOPORT 1086 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1087 int bar = (unsigned long)attr->private; 1088 unsigned long port = off; 1089 1090 port += pci_resource_start(pdev, bar); 1091 1092 if (port > pci_resource_end(pdev, bar)) 1093 return 0; 1094 1095 if (port + count - 1 > pci_resource_end(pdev, bar)) 1096 return -EINVAL; 1097 1098 switch (count) { 1099 case 1: 1100 if (write) 1101 outb(*(u8 *)buf, port); 1102 else 1103 *(u8 *)buf = inb(port); 1104 return 1; 1105 case 2: 1106 if (write) 1107 outw(*(u16 *)buf, port); 1108 else 1109 *(u16 *)buf = inw(port); 1110 return 2; 1111 case 4: 1112 if (write) 1113 outl(*(u32 *)buf, port); 1114 else 1115 *(u32 *)buf = inl(port); 1116 return 4; 1117 } 1118 return -EINVAL; 1119 #else 1120 return -ENXIO; 1121 #endif 1122 } 1123 1124 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1125 struct bin_attribute *attr, char *buf, 1126 loff_t off, size_t count) 1127 { 1128 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1129 } 1130 1131 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1132 struct bin_attribute *attr, char *buf, 1133 loff_t off, size_t count) 1134 { 1135 int ret; 1136 1137 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1138 if (ret) 1139 return ret; 1140 1141 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1142 } 1143 1144 /** 1145 * pci_remove_resource_files - cleanup resource files 1146 * @pdev: dev to cleanup 1147 * 1148 * If we created resource files for @pdev, remove them from sysfs and 1149 * free their resources. 1150 */ 1151 static void pci_remove_resource_files(struct pci_dev *pdev) 1152 { 1153 int i; 1154 1155 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1156 struct bin_attribute *res_attr; 1157 1158 res_attr = pdev->res_attr[i]; 1159 if (res_attr) { 1160 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1161 kfree(res_attr); 1162 } 1163 1164 res_attr = pdev->res_attr_wc[i]; 1165 if (res_attr) { 1166 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1167 kfree(res_attr); 1168 } 1169 } 1170 } 1171 1172 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1173 { 1174 /* allocate attribute structure, piggyback attribute name */ 1175 int name_len = write_combine ? 13 : 10; 1176 struct bin_attribute *res_attr; 1177 char *res_attr_name; 1178 int retval; 1179 1180 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1181 if (!res_attr) 1182 return -ENOMEM; 1183 1184 res_attr_name = (char *)(res_attr + 1); 1185 1186 sysfs_bin_attr_init(res_attr); 1187 if (write_combine) { 1188 sprintf(res_attr_name, "resource%d_wc", num); 1189 res_attr->mmap = pci_mmap_resource_wc; 1190 } else { 1191 sprintf(res_attr_name, "resource%d", num); 1192 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1193 res_attr->read = pci_read_resource_io; 1194 res_attr->write = pci_write_resource_io; 1195 if (arch_can_pci_mmap_io()) 1196 res_attr->mmap = pci_mmap_resource_uc; 1197 } else { 1198 res_attr->mmap = pci_mmap_resource_uc; 1199 } 1200 } 1201 if (res_attr->mmap) 1202 res_attr->f_mapping = iomem_get_mapping; 1203 res_attr->attr.name = res_attr_name; 1204 res_attr->attr.mode = 0600; 1205 res_attr->size = pci_resource_len(pdev, num); 1206 res_attr->private = (void *)(unsigned long)num; 1207 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1208 if (retval) { 1209 kfree(res_attr); 1210 return retval; 1211 } 1212 1213 if (write_combine) 1214 pdev->res_attr_wc[num] = res_attr; 1215 else 1216 pdev->res_attr[num] = res_attr; 1217 1218 return 0; 1219 } 1220 1221 /** 1222 * pci_create_resource_files - create resource files in sysfs for @dev 1223 * @pdev: dev in question 1224 * 1225 * Walk the resources in @pdev creating files for each resource available. 1226 */ 1227 static int pci_create_resource_files(struct pci_dev *pdev) 1228 { 1229 int i; 1230 int retval; 1231 1232 /* Expose the PCI resources from this device as files */ 1233 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1234 1235 /* skip empty resources */ 1236 if (!pci_resource_len(pdev, i)) 1237 continue; 1238 1239 retval = pci_create_attr(pdev, i, 0); 1240 /* for prefetchable resources, create a WC mappable file */ 1241 if (!retval && arch_can_pci_mmap_wc() && 1242 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1243 retval = pci_create_attr(pdev, i, 1); 1244 if (retval) { 1245 pci_remove_resource_files(pdev); 1246 return retval; 1247 } 1248 } 1249 return 0; 1250 } 1251 #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ 1252 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1253 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1254 #endif 1255 1256 /** 1257 * pci_write_rom - used to enable access to the PCI ROM display 1258 * @filp: sysfs file 1259 * @kobj: kernel object handle 1260 * @bin_attr: struct bin_attribute for this file 1261 * @buf: user input 1262 * @off: file offset 1263 * @count: number of byte in input 1264 * 1265 * writing anything except 0 enables it 1266 */ 1267 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1268 struct bin_attribute *bin_attr, char *buf, 1269 loff_t off, size_t count) 1270 { 1271 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1272 1273 if ((off == 0) && (*buf == '0') && (count == 2)) 1274 pdev->rom_attr_enabled = 0; 1275 else 1276 pdev->rom_attr_enabled = 1; 1277 1278 return count; 1279 } 1280 1281 /** 1282 * pci_read_rom - read a PCI ROM 1283 * @filp: sysfs file 1284 * @kobj: kernel object handle 1285 * @bin_attr: struct bin_attribute for this file 1286 * @buf: where to put the data we read from the ROM 1287 * @off: file offset 1288 * @count: number of bytes to read 1289 * 1290 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1291 * device corresponding to @kobj. 1292 */ 1293 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1294 struct bin_attribute *bin_attr, char *buf, 1295 loff_t off, size_t count) 1296 { 1297 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1298 void __iomem *rom; 1299 size_t size; 1300 1301 if (!pdev->rom_attr_enabled) 1302 return -EINVAL; 1303 1304 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1305 if (!rom || !size) 1306 return -EIO; 1307 1308 if (off >= size) 1309 count = 0; 1310 else { 1311 if (off + count > size) 1312 count = size - off; 1313 1314 memcpy_fromio(buf, rom + off, count); 1315 } 1316 pci_unmap_rom(pdev, rom); 1317 1318 return count; 1319 } 1320 static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0); 1321 1322 static struct bin_attribute *pci_dev_rom_attrs[] = { 1323 &bin_attr_rom, 1324 NULL, 1325 }; 1326 1327 static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj, 1328 struct bin_attribute *a, int n) 1329 { 1330 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1331 size_t rom_size; 1332 1333 /* If the device has a ROM, try to expose it in sysfs. */ 1334 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1335 if (!rom_size) 1336 return 0; 1337 1338 a->size = rom_size; 1339 1340 return a->attr.mode; 1341 } 1342 1343 static const struct attribute_group pci_dev_rom_attr_group = { 1344 .bin_attrs = pci_dev_rom_attrs, 1345 .is_bin_visible = pci_dev_rom_attr_is_visible, 1346 }; 1347 1348 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1349 const char *buf, size_t count) 1350 { 1351 struct pci_dev *pdev = to_pci_dev(dev); 1352 unsigned long val; 1353 ssize_t result; 1354 1355 if (kstrtoul(buf, 0, &val) < 0) 1356 return -EINVAL; 1357 1358 if (val != 1) 1359 return -EINVAL; 1360 1361 pm_runtime_get_sync(dev); 1362 result = pci_reset_function(pdev); 1363 pm_runtime_put(dev); 1364 if (result < 0) 1365 return result; 1366 1367 return count; 1368 } 1369 static DEVICE_ATTR_WO(reset); 1370 1371 static struct attribute *pci_dev_reset_attrs[] = { 1372 &dev_attr_reset.attr, 1373 NULL, 1374 }; 1375 1376 static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, 1377 struct attribute *a, int n) 1378 { 1379 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1380 1381 if (!pci_reset_supported(pdev)) 1382 return 0; 1383 1384 return a->mode; 1385 } 1386 1387 static const struct attribute_group pci_dev_reset_attr_group = { 1388 .attrs = pci_dev_reset_attrs, 1389 .is_visible = pci_dev_reset_attr_is_visible, 1390 }; 1391 1392 #define pci_dev_resource_resize_attr(n) \ 1393 static ssize_t resource##n##_resize_show(struct device *dev, \ 1394 struct device_attribute *attr, \ 1395 char * buf) \ 1396 { \ 1397 struct pci_dev *pdev = to_pci_dev(dev); \ 1398 ssize_t ret; \ 1399 \ 1400 pci_config_pm_runtime_get(pdev); \ 1401 \ 1402 ret = sysfs_emit(buf, "%016llx\n", \ 1403 (u64)pci_rebar_get_possible_sizes(pdev, n)); \ 1404 \ 1405 pci_config_pm_runtime_put(pdev); \ 1406 \ 1407 return ret; \ 1408 } \ 1409 \ 1410 static ssize_t resource##n##_resize_store(struct device *dev, \ 1411 struct device_attribute *attr,\ 1412 const char *buf, size_t count)\ 1413 { \ 1414 struct pci_dev *pdev = to_pci_dev(dev); \ 1415 unsigned long size, flags; \ 1416 int ret, i; \ 1417 u16 cmd; \ 1418 \ 1419 if (kstrtoul(buf, 0, &size) < 0) \ 1420 return -EINVAL; \ 1421 \ 1422 device_lock(dev); \ 1423 if (dev->driver) { \ 1424 ret = -EBUSY; \ 1425 goto unlock; \ 1426 } \ 1427 \ 1428 pci_config_pm_runtime_get(pdev); \ 1429 \ 1430 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { \ 1431 ret = aperture_remove_conflicting_pci_devices(pdev, \ 1432 "resourceN_resize"); \ 1433 if (ret) \ 1434 goto pm_put; \ 1435 } \ 1436 \ 1437 pci_read_config_word(pdev, PCI_COMMAND, &cmd); \ 1438 pci_write_config_word(pdev, PCI_COMMAND, \ 1439 cmd & ~PCI_COMMAND_MEMORY); \ 1440 \ 1441 flags = pci_resource_flags(pdev, n); \ 1442 \ 1443 pci_remove_resource_files(pdev); \ 1444 \ 1445 for (i = 0; i < PCI_STD_NUM_BARS; i++) { \ 1446 if (pci_resource_len(pdev, i) && \ 1447 pci_resource_flags(pdev, i) == flags) \ 1448 pci_release_resource(pdev, i); \ 1449 } \ 1450 \ 1451 ret = pci_resize_resource(pdev, n, size); \ 1452 \ 1453 pci_assign_unassigned_bus_resources(pdev->bus); \ 1454 \ 1455 if (pci_create_resource_files(pdev)) \ 1456 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");\ 1457 \ 1458 pci_write_config_word(pdev, PCI_COMMAND, cmd); \ 1459 pm_put: \ 1460 pci_config_pm_runtime_put(pdev); \ 1461 unlock: \ 1462 device_unlock(dev); \ 1463 \ 1464 return ret ? ret : count; \ 1465 } \ 1466 static DEVICE_ATTR_RW(resource##n##_resize) 1467 1468 pci_dev_resource_resize_attr(0); 1469 pci_dev_resource_resize_attr(1); 1470 pci_dev_resource_resize_attr(2); 1471 pci_dev_resource_resize_attr(3); 1472 pci_dev_resource_resize_attr(4); 1473 pci_dev_resource_resize_attr(5); 1474 1475 static struct attribute *resource_resize_attrs[] = { 1476 &dev_attr_resource0_resize.attr, 1477 &dev_attr_resource1_resize.attr, 1478 &dev_attr_resource2_resize.attr, 1479 &dev_attr_resource3_resize.attr, 1480 &dev_attr_resource4_resize.attr, 1481 &dev_attr_resource5_resize.attr, 1482 NULL, 1483 }; 1484 1485 static umode_t resource_resize_is_visible(struct kobject *kobj, 1486 struct attribute *a, int n) 1487 { 1488 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1489 1490 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode; 1491 } 1492 1493 static const struct attribute_group pci_dev_resource_resize_group = { 1494 .attrs = resource_resize_attrs, 1495 .is_visible = resource_resize_is_visible, 1496 }; 1497 1498 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1499 { 1500 if (!sysfs_initialized) 1501 return -EACCES; 1502 1503 return pci_create_resource_files(pdev); 1504 } 1505 1506 /** 1507 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1508 * @pdev: device whose entries we should free 1509 * 1510 * Cleanup when @pdev is removed from sysfs. 1511 */ 1512 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1513 { 1514 if (!sysfs_initialized) 1515 return; 1516 1517 pci_remove_resource_files(pdev); 1518 } 1519 1520 static int __init pci_sysfs_init(void) 1521 { 1522 struct pci_dev *pdev = NULL; 1523 struct pci_bus *pbus = NULL; 1524 int retval; 1525 1526 sysfs_initialized = 1; 1527 for_each_pci_dev(pdev) { 1528 retval = pci_create_sysfs_dev_files(pdev); 1529 if (retval) { 1530 pci_dev_put(pdev); 1531 return retval; 1532 } 1533 } 1534 1535 while ((pbus = pci_find_next_bus(pbus))) 1536 pci_create_legacy_files(pbus); 1537 1538 return 0; 1539 } 1540 late_initcall(pci_sysfs_init); 1541 1542 static struct attribute *pci_dev_dev_attrs[] = { 1543 &dev_attr_boot_vga.attr, 1544 NULL, 1545 }; 1546 1547 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1548 struct attribute *a, int n) 1549 { 1550 struct device *dev = kobj_to_dev(kobj); 1551 struct pci_dev *pdev = to_pci_dev(dev); 1552 1553 if (a == &dev_attr_boot_vga.attr) 1554 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1555 return 0; 1556 1557 return a->mode; 1558 } 1559 1560 static struct attribute *pci_dev_hp_attrs[] = { 1561 &dev_attr_remove.attr, 1562 &dev_attr_dev_rescan.attr, 1563 NULL, 1564 }; 1565 1566 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1567 struct attribute *a, int n) 1568 { 1569 struct device *dev = kobj_to_dev(kobj); 1570 struct pci_dev *pdev = to_pci_dev(dev); 1571 1572 if (pdev->is_virtfn) 1573 return 0; 1574 1575 return a->mode; 1576 } 1577 1578 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1579 struct attribute *a, int n) 1580 { 1581 struct device *dev = kobj_to_dev(kobj); 1582 struct pci_dev *pdev = to_pci_dev(dev); 1583 1584 if (pci_is_bridge(pdev)) 1585 return a->mode; 1586 1587 return 0; 1588 } 1589 1590 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1591 struct attribute *a, int n) 1592 { 1593 struct device *dev = kobj_to_dev(kobj); 1594 struct pci_dev *pdev = to_pci_dev(dev); 1595 1596 if (pci_is_pcie(pdev)) 1597 return a->mode; 1598 1599 return 0; 1600 } 1601 1602 static const struct attribute_group pci_dev_group = { 1603 .attrs = pci_dev_attrs, 1604 }; 1605 1606 const struct attribute_group *pci_dev_groups[] = { 1607 &pci_dev_group, 1608 &pci_dev_config_attr_group, 1609 &pci_dev_rom_attr_group, 1610 &pci_dev_reset_attr_group, 1611 &pci_dev_reset_method_attr_group, 1612 &pci_dev_vpd_attr_group, 1613 #ifdef CONFIG_DMI 1614 &pci_dev_smbios_attr_group, 1615 #endif 1616 #ifdef CONFIG_ACPI 1617 &pci_dev_acpi_attr_group, 1618 #endif 1619 &pci_dev_resource_resize_group, 1620 NULL, 1621 }; 1622 1623 static const struct attribute_group pci_dev_hp_attr_group = { 1624 .attrs = pci_dev_hp_attrs, 1625 .is_visible = pci_dev_hp_attrs_are_visible, 1626 }; 1627 1628 static const struct attribute_group pci_dev_attr_group = { 1629 .attrs = pci_dev_dev_attrs, 1630 .is_visible = pci_dev_attrs_are_visible, 1631 }; 1632 1633 static const struct attribute_group pci_bridge_attr_group = { 1634 .attrs = pci_bridge_attrs, 1635 .is_visible = pci_bridge_attrs_are_visible, 1636 }; 1637 1638 static const struct attribute_group pcie_dev_attr_group = { 1639 .attrs = pcie_dev_attrs, 1640 .is_visible = pcie_dev_attrs_are_visible, 1641 }; 1642 1643 static const struct attribute_group *pci_dev_attr_groups[] = { 1644 &pci_dev_attr_group, 1645 &pci_dev_hp_attr_group, 1646 #ifdef CONFIG_PCI_IOV 1647 &sriov_pf_dev_attr_group, 1648 &sriov_vf_dev_attr_group, 1649 #endif 1650 &pci_bridge_attr_group, 1651 &pcie_dev_attr_group, 1652 #ifdef CONFIG_PCIEAER 1653 &aer_stats_attr_group, 1654 #endif 1655 #ifdef CONFIG_PCIEASPM 1656 &aspm_ctrl_attr_group, 1657 #endif 1658 NULL, 1659 }; 1660 1661 const struct device_type pci_dev_type = { 1662 .groups = pci_dev_attr_groups, 1663 }; 1664