1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/pci/pci-sysfs.c 4 * 5 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 6 * (C) Copyright 2002-2004 IBM Corp. 7 * (C) Copyright 2003 Matthew Wilcox 8 * (C) Copyright 2003 Hewlett-Packard 9 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 10 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 11 * 12 * File attributes for PCI devices 13 * 14 * Modeled after usb's driverfs.c 15 * 16 */ 17 18 19 #include <linux/kernel.h> 20 #include <linux/sched.h> 21 #include <linux/pci.h> 22 #include <linux/stat.h> 23 #include <linux/export.h> 24 #include <linux/topology.h> 25 #include <linux/mm.h> 26 #include <linux/fs.h> 27 #include <linux/capability.h> 28 #include <linux/security.h> 29 #include <linux/pci-aspm.h> 30 #include <linux/slab.h> 31 #include <linux/vgaarb.h> 32 #include <linux/pm_runtime.h> 33 #include <linux/of.h> 34 #include "pci.h" 35 36 static int sysfs_initialized; /* = 0 */ 37 38 /* show configuration fields */ 39 #define pci_config_attr(field, format_string) \ 40 static ssize_t \ 41 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 42 { \ 43 struct pci_dev *pdev; \ 44 \ 45 pdev = to_pci_dev(dev); \ 46 return sprintf(buf, format_string, pdev->field); \ 47 } \ 48 static DEVICE_ATTR_RO(field) 49 50 pci_config_attr(vendor, "0x%04x\n"); 51 pci_config_attr(device, "0x%04x\n"); 52 pci_config_attr(subsystem_vendor, "0x%04x\n"); 53 pci_config_attr(subsystem_device, "0x%04x\n"); 54 pci_config_attr(revision, "0x%02x\n"); 55 pci_config_attr(class, "0x%06x\n"); 56 pci_config_attr(irq, "%u\n"); 57 58 static ssize_t broken_parity_status_show(struct device *dev, 59 struct device_attribute *attr, 60 char *buf) 61 { 62 struct pci_dev *pdev = to_pci_dev(dev); 63 return sprintf(buf, "%u\n", pdev->broken_parity_status); 64 } 65 66 static ssize_t broken_parity_status_store(struct device *dev, 67 struct device_attribute *attr, 68 const char *buf, size_t count) 69 { 70 struct pci_dev *pdev = to_pci_dev(dev); 71 unsigned long val; 72 73 if (kstrtoul(buf, 0, &val) < 0) 74 return -EINVAL; 75 76 pdev->broken_parity_status = !!val; 77 78 return count; 79 } 80 static DEVICE_ATTR_RW(broken_parity_status); 81 82 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 83 struct device_attribute *attr, char *buf) 84 { 85 const struct cpumask *mask; 86 87 #ifdef CONFIG_NUMA 88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 89 cpumask_of_node(dev_to_node(dev)); 90 #else 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 92 #endif 93 return cpumap_print_to_pagebuf(list, buf, mask); 94 } 95 96 static ssize_t local_cpus_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 return pci_dev_show_local_cpu(dev, false, attr, buf); 100 } 101 static DEVICE_ATTR_RO(local_cpus); 102 103 static ssize_t local_cpulist_show(struct device *dev, 104 struct device_attribute *attr, char *buf) 105 { 106 return pci_dev_show_local_cpu(dev, true, attr, buf); 107 } 108 static DEVICE_ATTR_RO(local_cpulist); 109 110 /* 111 * PCI Bus Class Devices 112 */ 113 static ssize_t cpuaffinity_show(struct device *dev, 114 struct device_attribute *attr, char *buf) 115 { 116 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 117 118 return cpumap_print_to_pagebuf(false, buf, cpumask); 119 } 120 static DEVICE_ATTR_RO(cpuaffinity); 121 122 static ssize_t cpulistaffinity_show(struct device *dev, 123 struct device_attribute *attr, char *buf) 124 { 125 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 127 return cpumap_print_to_pagebuf(true, buf, cpumask); 128 } 129 static DEVICE_ATTR_RO(cpulistaffinity); 130 131 /* show resources */ 132 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 133 char *buf) 134 { 135 struct pci_dev *pci_dev = to_pci_dev(dev); 136 char *str = buf; 137 int i; 138 int max; 139 resource_size_t start, end; 140 141 if (pci_dev->subordinate) 142 max = DEVICE_COUNT_RESOURCE; 143 else 144 max = PCI_BRIDGE_RESOURCES; 145 146 for (i = 0; i < max; i++) { 147 struct resource *res = &pci_dev->resource[i]; 148 pci_resource_to_user(pci_dev, i, res, &start, &end); 149 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 150 (unsigned long long)start, 151 (unsigned long long)end, 152 (unsigned long long)res->flags); 153 } 154 return (str - buf); 155 } 156 static DEVICE_ATTR_RO(resource); 157 158 static ssize_t max_link_speed_show(struct device *dev, 159 struct device_attribute *attr, char *buf) 160 { 161 struct pci_dev *pdev = to_pci_dev(dev); 162 163 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev))); 164 } 165 static DEVICE_ATTR_RO(max_link_speed); 166 167 static ssize_t max_link_width_show(struct device *dev, 168 struct device_attribute *attr, char *buf) 169 { 170 struct pci_dev *pci_dev = to_pci_dev(dev); 171 u32 linkcap; 172 int err; 173 174 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 175 if (err) 176 return -EINVAL; 177 178 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4); 179 } 180 static DEVICE_ATTR_RO(max_link_width); 181 182 static ssize_t current_link_speed_show(struct device *dev, 183 struct device_attribute *attr, char *buf) 184 { 185 struct pci_dev *pci_dev = to_pci_dev(dev); 186 u16 linkstat; 187 int err; 188 const char *speed; 189 190 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 191 if (err) 192 return -EINVAL; 193 194 switch (linkstat & PCI_EXP_LNKSTA_CLS) { 195 case PCI_EXP_LNKSTA_CLS_16_0GB: 196 speed = "16 GT/s"; 197 break; 198 case PCI_EXP_LNKSTA_CLS_8_0GB: 199 speed = "8 GT/s"; 200 break; 201 case PCI_EXP_LNKSTA_CLS_5_0GB: 202 speed = "5 GT/s"; 203 break; 204 case PCI_EXP_LNKSTA_CLS_2_5GB: 205 speed = "2.5 GT/s"; 206 break; 207 default: 208 speed = "Unknown speed"; 209 } 210 211 return sprintf(buf, "%s\n", speed); 212 } 213 static DEVICE_ATTR_RO(current_link_speed); 214 215 static ssize_t current_link_width_show(struct device *dev, 216 struct device_attribute *attr, char *buf) 217 { 218 struct pci_dev *pci_dev = to_pci_dev(dev); 219 u16 linkstat; 220 int err; 221 222 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 223 if (err) 224 return -EINVAL; 225 226 return sprintf(buf, "%u\n", 227 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 228 } 229 static DEVICE_ATTR_RO(current_link_width); 230 231 static ssize_t secondary_bus_number_show(struct device *dev, 232 struct device_attribute *attr, 233 char *buf) 234 { 235 struct pci_dev *pci_dev = to_pci_dev(dev); 236 u8 sec_bus; 237 int err; 238 239 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 240 if (err) 241 return -EINVAL; 242 243 return sprintf(buf, "%u\n", sec_bus); 244 } 245 static DEVICE_ATTR_RO(secondary_bus_number); 246 247 static ssize_t subordinate_bus_number_show(struct device *dev, 248 struct device_attribute *attr, 249 char *buf) 250 { 251 struct pci_dev *pci_dev = to_pci_dev(dev); 252 u8 sub_bus; 253 int err; 254 255 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 256 if (err) 257 return -EINVAL; 258 259 return sprintf(buf, "%u\n", sub_bus); 260 } 261 static DEVICE_ATTR_RO(subordinate_bus_number); 262 263 static ssize_t ari_enabled_show(struct device *dev, 264 struct device_attribute *attr, 265 char *buf) 266 { 267 struct pci_dev *pci_dev = to_pci_dev(dev); 268 269 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 270 } 271 static DEVICE_ATTR_RO(ari_enabled); 272 273 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 274 char *buf) 275 { 276 struct pci_dev *pci_dev = to_pci_dev(dev); 277 278 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 279 pci_dev->vendor, pci_dev->device, 280 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 281 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 282 (u8)(pci_dev->class)); 283 } 284 static DEVICE_ATTR_RO(modalias); 285 286 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 287 const char *buf, size_t count) 288 { 289 struct pci_dev *pdev = to_pci_dev(dev); 290 unsigned long val; 291 ssize_t result = kstrtoul(buf, 0, &val); 292 293 if (result < 0) 294 return result; 295 296 /* this can crash the machine when done on the "wrong" device */ 297 if (!capable(CAP_SYS_ADMIN)) 298 return -EPERM; 299 300 if (!val) { 301 if (pci_is_enabled(pdev)) 302 pci_disable_device(pdev); 303 else 304 result = -EIO; 305 } else 306 result = pci_enable_device(pdev); 307 308 return result < 0 ? result : count; 309 } 310 311 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 312 char *buf) 313 { 314 struct pci_dev *pdev; 315 316 pdev = to_pci_dev(dev); 317 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 318 } 319 static DEVICE_ATTR_RW(enable); 320 321 #ifdef CONFIG_NUMA 322 static ssize_t numa_node_store(struct device *dev, 323 struct device_attribute *attr, const char *buf, 324 size_t count) 325 { 326 struct pci_dev *pdev = to_pci_dev(dev); 327 int node, ret; 328 329 if (!capable(CAP_SYS_ADMIN)) 330 return -EPERM; 331 332 ret = kstrtoint(buf, 0, &node); 333 if (ret) 334 return ret; 335 336 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 337 return -EINVAL; 338 339 if (node != NUMA_NO_NODE && !node_online(node)) 340 return -EINVAL; 341 342 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 343 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 344 node); 345 346 dev->numa_node = node; 347 return count; 348 } 349 350 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 351 char *buf) 352 { 353 return sprintf(buf, "%d\n", dev->numa_node); 354 } 355 static DEVICE_ATTR_RW(numa_node); 356 #endif 357 358 static ssize_t dma_mask_bits_show(struct device *dev, 359 struct device_attribute *attr, char *buf) 360 { 361 struct pci_dev *pdev = to_pci_dev(dev); 362 363 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 364 } 365 static DEVICE_ATTR_RO(dma_mask_bits); 366 367 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 368 struct device_attribute *attr, 369 char *buf) 370 { 371 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 372 } 373 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 374 375 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 376 char *buf) 377 { 378 struct pci_dev *pdev = to_pci_dev(dev); 379 struct pci_bus *subordinate = pdev->subordinate; 380 381 return sprintf(buf, "%u\n", subordinate ? 382 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 383 : !pdev->no_msi); 384 } 385 386 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 387 const char *buf, size_t count) 388 { 389 struct pci_dev *pdev = to_pci_dev(dev); 390 struct pci_bus *subordinate = pdev->subordinate; 391 unsigned long val; 392 393 if (kstrtoul(buf, 0, &val) < 0) 394 return -EINVAL; 395 396 if (!capable(CAP_SYS_ADMIN)) 397 return -EPERM; 398 399 /* 400 * "no_msi" and "bus_flags" only affect what happens when a driver 401 * requests MSI or MSI-X. They don't affect any drivers that have 402 * already requested MSI or MSI-X. 403 */ 404 if (!subordinate) { 405 pdev->no_msi = !val; 406 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 407 val ? "allowed" : "disallowed"); 408 return count; 409 } 410 411 if (val) 412 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 413 else 414 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 415 416 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 417 val ? "allowed" : "disallowed"); 418 return count; 419 } 420 static DEVICE_ATTR_RW(msi_bus); 421 422 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 423 size_t count) 424 { 425 unsigned long val; 426 struct pci_bus *b = NULL; 427 428 if (kstrtoul(buf, 0, &val) < 0) 429 return -EINVAL; 430 431 if (val) { 432 pci_lock_rescan_remove(); 433 while ((b = pci_find_next_bus(b)) != NULL) 434 pci_rescan_bus(b); 435 pci_unlock_rescan_remove(); 436 } 437 return count; 438 } 439 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 440 441 static struct attribute *pci_bus_attrs[] = { 442 &bus_attr_rescan.attr, 443 NULL, 444 }; 445 446 static const struct attribute_group pci_bus_group = { 447 .attrs = pci_bus_attrs, 448 }; 449 450 const struct attribute_group *pci_bus_groups[] = { 451 &pci_bus_group, 452 NULL, 453 }; 454 455 static ssize_t dev_rescan_store(struct device *dev, 456 struct device_attribute *attr, const char *buf, 457 size_t count) 458 { 459 unsigned long val; 460 struct pci_dev *pdev = to_pci_dev(dev); 461 462 if (kstrtoul(buf, 0, &val) < 0) 463 return -EINVAL; 464 465 if (val) { 466 pci_lock_rescan_remove(); 467 pci_rescan_bus(pdev->bus); 468 pci_unlock_rescan_remove(); 469 } 470 return count; 471 } 472 static struct device_attribute dev_rescan_attr = __ATTR(rescan, 473 (S_IWUSR|S_IWGRP), 474 NULL, dev_rescan_store); 475 476 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 477 const char *buf, size_t count) 478 { 479 unsigned long val; 480 481 if (kstrtoul(buf, 0, &val) < 0) 482 return -EINVAL; 483 484 if (val && device_remove_file_self(dev, attr)) 485 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 486 return count; 487 } 488 static struct device_attribute dev_remove_attr = __ATTR(remove, 489 (S_IWUSR|S_IWGRP), 490 NULL, remove_store); 491 492 static ssize_t dev_bus_rescan_store(struct device *dev, 493 struct device_attribute *attr, 494 const char *buf, size_t count) 495 { 496 unsigned long val; 497 struct pci_bus *bus = to_pci_bus(dev); 498 499 if (kstrtoul(buf, 0, &val) < 0) 500 return -EINVAL; 501 502 if (val) { 503 pci_lock_rescan_remove(); 504 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 505 pci_rescan_bus_bridge_resize(bus->self); 506 else 507 pci_rescan_bus(bus); 508 pci_unlock_rescan_remove(); 509 } 510 return count; 511 } 512 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 513 514 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 515 static ssize_t d3cold_allowed_store(struct device *dev, 516 struct device_attribute *attr, 517 const char *buf, size_t count) 518 { 519 struct pci_dev *pdev = to_pci_dev(dev); 520 unsigned long val; 521 522 if (kstrtoul(buf, 0, &val) < 0) 523 return -EINVAL; 524 525 pdev->d3cold_allowed = !!val; 526 if (pdev->d3cold_allowed) 527 pci_d3cold_enable(pdev); 528 else 529 pci_d3cold_disable(pdev); 530 531 pm_runtime_resume(dev); 532 533 return count; 534 } 535 536 static ssize_t d3cold_allowed_show(struct device *dev, 537 struct device_attribute *attr, char *buf) 538 { 539 struct pci_dev *pdev = to_pci_dev(dev); 540 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 541 } 542 static DEVICE_ATTR_RW(d3cold_allowed); 543 #endif 544 545 #ifdef CONFIG_OF 546 static ssize_t devspec_show(struct device *dev, 547 struct device_attribute *attr, char *buf) 548 { 549 struct pci_dev *pdev = to_pci_dev(dev); 550 struct device_node *np = pci_device_to_OF_node(pdev); 551 552 if (np == NULL) 553 return 0; 554 return sprintf(buf, "%pOF", np); 555 } 556 static DEVICE_ATTR_RO(devspec); 557 #endif 558 559 #ifdef CONFIG_PCI_IOV 560 static ssize_t sriov_totalvfs_show(struct device *dev, 561 struct device_attribute *attr, 562 char *buf) 563 { 564 struct pci_dev *pdev = to_pci_dev(dev); 565 566 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 567 } 568 569 570 static ssize_t sriov_numvfs_show(struct device *dev, 571 struct device_attribute *attr, 572 char *buf) 573 { 574 struct pci_dev *pdev = to_pci_dev(dev); 575 576 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 577 } 578 579 /* 580 * num_vfs > 0; number of VFs to enable 581 * num_vfs = 0; disable all VFs 582 * 583 * Note: SRIOV spec doesn't allow partial VF 584 * disable, so it's all or none. 585 */ 586 static ssize_t sriov_numvfs_store(struct device *dev, 587 struct device_attribute *attr, 588 const char *buf, size_t count) 589 { 590 struct pci_dev *pdev = to_pci_dev(dev); 591 int ret; 592 u16 num_vfs; 593 594 ret = kstrtou16(buf, 0, &num_vfs); 595 if (ret < 0) 596 return ret; 597 598 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 599 return -ERANGE; 600 601 device_lock(&pdev->dev); 602 603 if (num_vfs == pdev->sriov->num_VFs) 604 goto exit; 605 606 /* is PF driver loaded w/callback */ 607 if (!pdev->driver || !pdev->driver->sriov_configure) { 608 pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n"); 609 ret = -ENOENT; 610 goto exit; 611 } 612 613 if (num_vfs == 0) { 614 /* disable VFs */ 615 ret = pdev->driver->sriov_configure(pdev, 0); 616 goto exit; 617 } 618 619 /* enable VFs */ 620 if (pdev->sriov->num_VFs) { 621 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n", 622 pdev->sriov->num_VFs, num_vfs); 623 ret = -EBUSY; 624 goto exit; 625 } 626 627 ret = pdev->driver->sriov_configure(pdev, num_vfs); 628 if (ret < 0) 629 goto exit; 630 631 if (ret != num_vfs) 632 pci_warn(pdev, "%d VFs requested; only %d enabled\n", 633 num_vfs, ret); 634 635 exit: 636 device_unlock(&pdev->dev); 637 638 if (ret < 0) 639 return ret; 640 641 return count; 642 } 643 644 static ssize_t sriov_offset_show(struct device *dev, 645 struct device_attribute *attr, 646 char *buf) 647 { 648 struct pci_dev *pdev = to_pci_dev(dev); 649 650 return sprintf(buf, "%u\n", pdev->sriov->offset); 651 } 652 653 static ssize_t sriov_stride_show(struct device *dev, 654 struct device_attribute *attr, 655 char *buf) 656 { 657 struct pci_dev *pdev = to_pci_dev(dev); 658 659 return sprintf(buf, "%u\n", pdev->sriov->stride); 660 } 661 662 static ssize_t sriov_vf_device_show(struct device *dev, 663 struct device_attribute *attr, 664 char *buf) 665 { 666 struct pci_dev *pdev = to_pci_dev(dev); 667 668 return sprintf(buf, "%x\n", pdev->sriov->vf_device); 669 } 670 671 static ssize_t sriov_drivers_autoprobe_show(struct device *dev, 672 struct device_attribute *attr, 673 char *buf) 674 { 675 struct pci_dev *pdev = to_pci_dev(dev); 676 677 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); 678 } 679 680 static ssize_t sriov_drivers_autoprobe_store(struct device *dev, 681 struct device_attribute *attr, 682 const char *buf, size_t count) 683 { 684 struct pci_dev *pdev = to_pci_dev(dev); 685 bool drivers_autoprobe; 686 687 if (kstrtobool(buf, &drivers_autoprobe) < 0) 688 return -EINVAL; 689 690 pdev->sriov->drivers_autoprobe = drivers_autoprobe; 691 692 return count; 693 } 694 695 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 696 static struct device_attribute sriov_numvfs_attr = 697 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 698 sriov_numvfs_show, sriov_numvfs_store); 699 static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset); 700 static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride); 701 static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device); 702 static struct device_attribute sriov_drivers_autoprobe_attr = 703 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP), 704 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store); 705 #endif /* CONFIG_PCI_IOV */ 706 707 static ssize_t driver_override_store(struct device *dev, 708 struct device_attribute *attr, 709 const char *buf, size_t count) 710 { 711 struct pci_dev *pdev = to_pci_dev(dev); 712 char *driver_override, *old, *cp; 713 714 /* We need to keep extra room for a newline */ 715 if (count >= (PAGE_SIZE - 1)) 716 return -EINVAL; 717 718 driver_override = kstrndup(buf, count, GFP_KERNEL); 719 if (!driver_override) 720 return -ENOMEM; 721 722 cp = strchr(driver_override, '\n'); 723 if (cp) 724 *cp = '\0'; 725 726 device_lock(dev); 727 old = pdev->driver_override; 728 if (strlen(driver_override)) { 729 pdev->driver_override = driver_override; 730 } else { 731 kfree(driver_override); 732 pdev->driver_override = NULL; 733 } 734 device_unlock(dev); 735 736 kfree(old); 737 738 return count; 739 } 740 741 static ssize_t driver_override_show(struct device *dev, 742 struct device_attribute *attr, char *buf) 743 { 744 struct pci_dev *pdev = to_pci_dev(dev); 745 ssize_t len; 746 747 device_lock(dev); 748 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 749 device_unlock(dev); 750 return len; 751 } 752 static DEVICE_ATTR_RW(driver_override); 753 754 static struct attribute *pci_dev_attrs[] = { 755 &dev_attr_resource.attr, 756 &dev_attr_vendor.attr, 757 &dev_attr_device.attr, 758 &dev_attr_subsystem_vendor.attr, 759 &dev_attr_subsystem_device.attr, 760 &dev_attr_revision.attr, 761 &dev_attr_class.attr, 762 &dev_attr_irq.attr, 763 &dev_attr_local_cpus.attr, 764 &dev_attr_local_cpulist.attr, 765 &dev_attr_modalias.attr, 766 #ifdef CONFIG_NUMA 767 &dev_attr_numa_node.attr, 768 #endif 769 &dev_attr_dma_mask_bits.attr, 770 &dev_attr_consistent_dma_mask_bits.attr, 771 &dev_attr_enable.attr, 772 &dev_attr_broken_parity_status.attr, 773 &dev_attr_msi_bus.attr, 774 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 775 &dev_attr_d3cold_allowed.attr, 776 #endif 777 #ifdef CONFIG_OF 778 &dev_attr_devspec.attr, 779 #endif 780 &dev_attr_driver_override.attr, 781 &dev_attr_ari_enabled.attr, 782 NULL, 783 }; 784 785 static struct attribute *pci_bridge_attrs[] = { 786 &dev_attr_subordinate_bus_number.attr, 787 &dev_attr_secondary_bus_number.attr, 788 NULL, 789 }; 790 791 static struct attribute *pcie_dev_attrs[] = { 792 &dev_attr_current_link_speed.attr, 793 &dev_attr_current_link_width.attr, 794 &dev_attr_max_link_width.attr, 795 &dev_attr_max_link_speed.attr, 796 NULL, 797 }; 798 799 static struct attribute *pcibus_attrs[] = { 800 &dev_attr_rescan.attr, 801 &dev_attr_cpuaffinity.attr, 802 &dev_attr_cpulistaffinity.attr, 803 NULL, 804 }; 805 806 static const struct attribute_group pcibus_group = { 807 .attrs = pcibus_attrs, 808 }; 809 810 const struct attribute_group *pcibus_groups[] = { 811 &pcibus_group, 812 NULL, 813 }; 814 815 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 816 char *buf) 817 { 818 struct pci_dev *pdev = to_pci_dev(dev); 819 struct pci_dev *vga_dev = vga_default_device(); 820 821 if (vga_dev) 822 return sprintf(buf, "%u\n", (pdev == vga_dev)); 823 824 return sprintf(buf, "%u\n", 825 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 826 IORESOURCE_ROM_SHADOW)); 827 } 828 static struct device_attribute vga_attr = __ATTR_RO(boot_vga); 829 830 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 831 struct bin_attribute *bin_attr, char *buf, 832 loff_t off, size_t count) 833 { 834 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 835 unsigned int size = 64; 836 loff_t init_off = off; 837 u8 *data = (u8 *) buf; 838 839 /* Several chips lock up trying to read undefined config space */ 840 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 841 size = dev->cfg_size; 842 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 843 size = 128; 844 845 if (off > size) 846 return 0; 847 if (off + count > size) { 848 size -= off; 849 count = size; 850 } else { 851 size = count; 852 } 853 854 pci_config_pm_runtime_get(dev); 855 856 if ((off & 1) && size) { 857 u8 val; 858 pci_user_read_config_byte(dev, off, &val); 859 data[off - init_off] = val; 860 off++; 861 size--; 862 } 863 864 if ((off & 3) && size > 2) { 865 u16 val; 866 pci_user_read_config_word(dev, off, &val); 867 data[off - init_off] = val & 0xff; 868 data[off - init_off + 1] = (val >> 8) & 0xff; 869 off += 2; 870 size -= 2; 871 } 872 873 while (size > 3) { 874 u32 val; 875 pci_user_read_config_dword(dev, off, &val); 876 data[off - init_off] = val & 0xff; 877 data[off - init_off + 1] = (val >> 8) & 0xff; 878 data[off - init_off + 2] = (val >> 16) & 0xff; 879 data[off - init_off + 3] = (val >> 24) & 0xff; 880 off += 4; 881 size -= 4; 882 } 883 884 if (size >= 2) { 885 u16 val; 886 pci_user_read_config_word(dev, off, &val); 887 data[off - init_off] = val & 0xff; 888 data[off - init_off + 1] = (val >> 8) & 0xff; 889 off += 2; 890 size -= 2; 891 } 892 893 if (size > 0) { 894 u8 val; 895 pci_user_read_config_byte(dev, off, &val); 896 data[off - init_off] = val; 897 off++; 898 --size; 899 } 900 901 pci_config_pm_runtime_put(dev); 902 903 return count; 904 } 905 906 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 907 struct bin_attribute *bin_attr, char *buf, 908 loff_t off, size_t count) 909 { 910 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 911 unsigned int size = count; 912 loff_t init_off = off; 913 u8 *data = (u8 *) buf; 914 915 if (off > dev->cfg_size) 916 return 0; 917 if (off + count > dev->cfg_size) { 918 size = dev->cfg_size - off; 919 count = size; 920 } 921 922 pci_config_pm_runtime_get(dev); 923 924 if ((off & 1) && size) { 925 pci_user_write_config_byte(dev, off, data[off - init_off]); 926 off++; 927 size--; 928 } 929 930 if ((off & 3) && size > 2) { 931 u16 val = data[off - init_off]; 932 val |= (u16) data[off - init_off + 1] << 8; 933 pci_user_write_config_word(dev, off, val); 934 off += 2; 935 size -= 2; 936 } 937 938 while (size > 3) { 939 u32 val = data[off - init_off]; 940 val |= (u32) data[off - init_off + 1] << 8; 941 val |= (u32) data[off - init_off + 2] << 16; 942 val |= (u32) data[off - init_off + 3] << 24; 943 pci_user_write_config_dword(dev, off, val); 944 off += 4; 945 size -= 4; 946 } 947 948 if (size >= 2) { 949 u16 val = data[off - init_off]; 950 val |= (u16) data[off - init_off + 1] << 8; 951 pci_user_write_config_word(dev, off, val); 952 off += 2; 953 size -= 2; 954 } 955 956 if (size) { 957 pci_user_write_config_byte(dev, off, data[off - init_off]); 958 off++; 959 --size; 960 } 961 962 pci_config_pm_runtime_put(dev); 963 964 return count; 965 } 966 967 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj, 968 struct bin_attribute *bin_attr, char *buf, 969 loff_t off, size_t count) 970 { 971 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 972 973 if (bin_attr->size > 0) { 974 if (off > bin_attr->size) 975 count = 0; 976 else if (count > bin_attr->size - off) 977 count = bin_attr->size - off; 978 } 979 980 return pci_read_vpd(dev, off, count, buf); 981 } 982 983 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj, 984 struct bin_attribute *bin_attr, char *buf, 985 loff_t off, size_t count) 986 { 987 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 988 989 if (bin_attr->size > 0) { 990 if (off > bin_attr->size) 991 count = 0; 992 else if (count > bin_attr->size - off) 993 count = bin_attr->size - off; 994 } 995 996 return pci_write_vpd(dev, off, count, buf); 997 } 998 999 #ifdef HAVE_PCI_LEGACY 1000 /** 1001 * pci_read_legacy_io - read byte(s) from legacy I/O port space 1002 * @filp: open sysfs file 1003 * @kobj: kobject corresponding to file to read from 1004 * @bin_attr: struct bin_attribute for this file 1005 * @buf: buffer to store results 1006 * @off: offset into legacy I/O port space 1007 * @count: number of bytes to read 1008 * 1009 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1010 * callback routine (pci_legacy_read). 1011 */ 1012 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 1013 struct bin_attribute *bin_attr, char *buf, 1014 loff_t off, size_t count) 1015 { 1016 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1017 1018 /* Only support 1, 2 or 4 byte accesses */ 1019 if (count != 1 && count != 2 && count != 4) 1020 return -EINVAL; 1021 1022 return pci_legacy_read(bus, off, (u32 *)buf, count); 1023 } 1024 1025 /** 1026 * pci_write_legacy_io - write byte(s) to legacy I/O port space 1027 * @filp: open sysfs file 1028 * @kobj: kobject corresponding to file to read from 1029 * @bin_attr: struct bin_attribute for this file 1030 * @buf: buffer containing value to be written 1031 * @off: offset into legacy I/O port space 1032 * @count: number of bytes to write 1033 * 1034 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1035 * callback routine (pci_legacy_write). 1036 */ 1037 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 1038 struct bin_attribute *bin_attr, char *buf, 1039 loff_t off, size_t count) 1040 { 1041 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1042 1043 /* Only support 1, 2 or 4 byte accesses */ 1044 if (count != 1 && count != 2 && count != 4) 1045 return -EINVAL; 1046 1047 return pci_legacy_write(bus, off, *(u32 *)buf, count); 1048 } 1049 1050 /** 1051 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 1052 * @filp: open sysfs file 1053 * @kobj: kobject corresponding to device to be mapped 1054 * @attr: struct bin_attribute for this file 1055 * @vma: struct vm_area_struct passed to mmap 1056 * 1057 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 1058 * legacy memory space (first meg of bus space) into application virtual 1059 * memory space. 1060 */ 1061 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 1062 struct bin_attribute *attr, 1063 struct vm_area_struct *vma) 1064 { 1065 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1066 1067 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 1068 } 1069 1070 /** 1071 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 1072 * @filp: open sysfs file 1073 * @kobj: kobject corresponding to device to be mapped 1074 * @attr: struct bin_attribute for this file 1075 * @vma: struct vm_area_struct passed to mmap 1076 * 1077 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 1078 * legacy IO space (first meg of bus space) into application virtual 1079 * memory space. Returns -ENOSYS if the operation isn't supported 1080 */ 1081 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 1082 struct bin_attribute *attr, 1083 struct vm_area_struct *vma) 1084 { 1085 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1086 1087 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 1088 } 1089 1090 /** 1091 * pci_adjust_legacy_attr - adjustment of legacy file attributes 1092 * @b: bus to create files under 1093 * @mmap_type: I/O port or memory 1094 * 1095 * Stub implementation. Can be overridden by arch if necessary. 1096 */ 1097 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 1098 enum pci_mmap_state mmap_type) 1099 { 1100 } 1101 1102 /** 1103 * pci_create_legacy_files - create legacy I/O port and memory files 1104 * @b: bus to create files under 1105 * 1106 * Some platforms allow access to legacy I/O port and ISA memory space on 1107 * a per-bus basis. This routine creates the files and ties them into 1108 * their associated read, write and mmap files from pci-sysfs.c 1109 * 1110 * On error unwind, but don't propagate the error to the caller 1111 * as it is ok to set up the PCI bus without these files. 1112 */ 1113 void pci_create_legacy_files(struct pci_bus *b) 1114 { 1115 int error; 1116 1117 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 1118 GFP_ATOMIC); 1119 if (!b->legacy_io) 1120 goto kzalloc_err; 1121 1122 sysfs_bin_attr_init(b->legacy_io); 1123 b->legacy_io->attr.name = "legacy_io"; 1124 b->legacy_io->size = 0xffff; 1125 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 1126 b->legacy_io->read = pci_read_legacy_io; 1127 b->legacy_io->write = pci_write_legacy_io; 1128 b->legacy_io->mmap = pci_mmap_legacy_io; 1129 pci_adjust_legacy_attr(b, pci_mmap_io); 1130 error = device_create_bin_file(&b->dev, b->legacy_io); 1131 if (error) 1132 goto legacy_io_err; 1133 1134 /* Allocated above after the legacy_io struct */ 1135 b->legacy_mem = b->legacy_io + 1; 1136 sysfs_bin_attr_init(b->legacy_mem); 1137 b->legacy_mem->attr.name = "legacy_mem"; 1138 b->legacy_mem->size = 1024*1024; 1139 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 1140 b->legacy_mem->mmap = pci_mmap_legacy_mem; 1141 pci_adjust_legacy_attr(b, pci_mmap_mem); 1142 error = device_create_bin_file(&b->dev, b->legacy_mem); 1143 if (error) 1144 goto legacy_mem_err; 1145 1146 return; 1147 1148 legacy_mem_err: 1149 device_remove_bin_file(&b->dev, b->legacy_io); 1150 legacy_io_err: 1151 kfree(b->legacy_io); 1152 b->legacy_io = NULL; 1153 kzalloc_err: 1154 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n"); 1155 return; 1156 } 1157 1158 void pci_remove_legacy_files(struct pci_bus *b) 1159 { 1160 if (b->legacy_io) { 1161 device_remove_bin_file(&b->dev, b->legacy_io); 1162 device_remove_bin_file(&b->dev, b->legacy_mem); 1163 kfree(b->legacy_io); /* both are allocated here */ 1164 } 1165 } 1166 #endif /* HAVE_PCI_LEGACY */ 1167 1168 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1169 1170 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1171 enum pci_mmap_api mmap_api) 1172 { 1173 unsigned long nr, start, size; 1174 resource_size_t pci_start = 0, pci_end; 1175 1176 if (pci_resource_len(pdev, resno) == 0) 1177 return 0; 1178 nr = vma_pages(vma); 1179 start = vma->vm_pgoff; 1180 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1181 if (mmap_api == PCI_MMAP_PROCFS) { 1182 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1183 &pci_start, &pci_end); 1184 pci_start >>= PAGE_SHIFT; 1185 } 1186 if (start >= pci_start && start < pci_start + size && 1187 start + nr <= pci_start + size) 1188 return 1; 1189 return 0; 1190 } 1191 1192 /** 1193 * pci_mmap_resource - map a PCI resource into user memory space 1194 * @kobj: kobject for mapping 1195 * @attr: struct bin_attribute for the file being mapped 1196 * @vma: struct vm_area_struct passed into the mmap 1197 * @write_combine: 1 for write_combine mapping 1198 * 1199 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1200 */ 1201 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1202 struct vm_area_struct *vma, int write_combine) 1203 { 1204 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1205 int bar = (unsigned long)attr->private; 1206 enum pci_mmap_state mmap_type; 1207 struct resource *res = &pdev->resource[bar]; 1208 1209 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1210 return -EINVAL; 1211 1212 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1213 return -EINVAL; 1214 1215 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1216 1217 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1218 } 1219 1220 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1221 struct bin_attribute *attr, 1222 struct vm_area_struct *vma) 1223 { 1224 return pci_mmap_resource(kobj, attr, vma, 0); 1225 } 1226 1227 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1228 struct bin_attribute *attr, 1229 struct vm_area_struct *vma) 1230 { 1231 return pci_mmap_resource(kobj, attr, vma, 1); 1232 } 1233 1234 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1235 struct bin_attribute *attr, char *buf, 1236 loff_t off, size_t count, bool write) 1237 { 1238 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1239 int bar = (unsigned long)attr->private; 1240 unsigned long port = off; 1241 1242 port += pci_resource_start(pdev, bar); 1243 1244 if (port > pci_resource_end(pdev, bar)) 1245 return 0; 1246 1247 if (port + count - 1 > pci_resource_end(pdev, bar)) 1248 return -EINVAL; 1249 1250 switch (count) { 1251 case 1: 1252 if (write) 1253 outb(*(u8 *)buf, port); 1254 else 1255 *(u8 *)buf = inb(port); 1256 return 1; 1257 case 2: 1258 if (write) 1259 outw(*(u16 *)buf, port); 1260 else 1261 *(u16 *)buf = inw(port); 1262 return 2; 1263 case 4: 1264 if (write) 1265 outl(*(u32 *)buf, port); 1266 else 1267 *(u32 *)buf = inl(port); 1268 return 4; 1269 } 1270 return -EINVAL; 1271 } 1272 1273 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1274 struct bin_attribute *attr, char *buf, 1275 loff_t off, size_t count) 1276 { 1277 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1278 } 1279 1280 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1281 struct bin_attribute *attr, char *buf, 1282 loff_t off, size_t count) 1283 { 1284 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1285 } 1286 1287 /** 1288 * pci_remove_resource_files - cleanup resource files 1289 * @pdev: dev to cleanup 1290 * 1291 * If we created resource files for @pdev, remove them from sysfs and 1292 * free their resources. 1293 */ 1294 static void pci_remove_resource_files(struct pci_dev *pdev) 1295 { 1296 int i; 1297 1298 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1299 struct bin_attribute *res_attr; 1300 1301 res_attr = pdev->res_attr[i]; 1302 if (res_attr) { 1303 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1304 kfree(res_attr); 1305 } 1306 1307 res_attr = pdev->res_attr_wc[i]; 1308 if (res_attr) { 1309 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1310 kfree(res_attr); 1311 } 1312 } 1313 } 1314 1315 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1316 { 1317 /* allocate attribute structure, piggyback attribute name */ 1318 int name_len = write_combine ? 13 : 10; 1319 struct bin_attribute *res_attr; 1320 char *res_attr_name; 1321 int retval; 1322 1323 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1324 if (!res_attr) 1325 return -ENOMEM; 1326 1327 res_attr_name = (char *)(res_attr + 1); 1328 1329 sysfs_bin_attr_init(res_attr); 1330 if (write_combine) { 1331 pdev->res_attr_wc[num] = res_attr; 1332 sprintf(res_attr_name, "resource%d_wc", num); 1333 res_attr->mmap = pci_mmap_resource_wc; 1334 } else { 1335 pdev->res_attr[num] = res_attr; 1336 sprintf(res_attr_name, "resource%d", num); 1337 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1338 res_attr->read = pci_read_resource_io; 1339 res_attr->write = pci_write_resource_io; 1340 if (arch_can_pci_mmap_io()) 1341 res_attr->mmap = pci_mmap_resource_uc; 1342 } else { 1343 res_attr->mmap = pci_mmap_resource_uc; 1344 } 1345 } 1346 res_attr->attr.name = res_attr_name; 1347 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1348 res_attr->size = pci_resource_len(pdev, num); 1349 res_attr->private = (void *)(unsigned long)num; 1350 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1351 if (retval) 1352 kfree(res_attr); 1353 1354 return retval; 1355 } 1356 1357 /** 1358 * pci_create_resource_files - create resource files in sysfs for @dev 1359 * @pdev: dev in question 1360 * 1361 * Walk the resources in @pdev creating files for each resource available. 1362 */ 1363 static int pci_create_resource_files(struct pci_dev *pdev) 1364 { 1365 int i; 1366 int retval; 1367 1368 /* Expose the PCI resources from this device as files */ 1369 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1370 1371 /* skip empty resources */ 1372 if (!pci_resource_len(pdev, i)) 1373 continue; 1374 1375 retval = pci_create_attr(pdev, i, 0); 1376 /* for prefetchable resources, create a WC mappable file */ 1377 if (!retval && arch_can_pci_mmap_wc() && 1378 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1379 retval = pci_create_attr(pdev, i, 1); 1380 if (retval) { 1381 pci_remove_resource_files(pdev); 1382 return retval; 1383 } 1384 } 1385 return 0; 1386 } 1387 #else /* !HAVE_PCI_MMAP */ 1388 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1389 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1390 #endif /* HAVE_PCI_MMAP */ 1391 1392 /** 1393 * pci_write_rom - used to enable access to the PCI ROM display 1394 * @filp: sysfs file 1395 * @kobj: kernel object handle 1396 * @bin_attr: struct bin_attribute for this file 1397 * @buf: user input 1398 * @off: file offset 1399 * @count: number of byte in input 1400 * 1401 * writing anything except 0 enables it 1402 */ 1403 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1404 struct bin_attribute *bin_attr, char *buf, 1405 loff_t off, size_t count) 1406 { 1407 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1408 1409 if ((off == 0) && (*buf == '0') && (count == 2)) 1410 pdev->rom_attr_enabled = 0; 1411 else 1412 pdev->rom_attr_enabled = 1; 1413 1414 return count; 1415 } 1416 1417 /** 1418 * pci_read_rom - read a PCI ROM 1419 * @filp: sysfs file 1420 * @kobj: kernel object handle 1421 * @bin_attr: struct bin_attribute for this file 1422 * @buf: where to put the data we read from the ROM 1423 * @off: file offset 1424 * @count: number of bytes to read 1425 * 1426 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1427 * device corresponding to @kobj. 1428 */ 1429 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1430 struct bin_attribute *bin_attr, char *buf, 1431 loff_t off, size_t count) 1432 { 1433 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1434 void __iomem *rom; 1435 size_t size; 1436 1437 if (!pdev->rom_attr_enabled) 1438 return -EINVAL; 1439 1440 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1441 if (!rom || !size) 1442 return -EIO; 1443 1444 if (off >= size) 1445 count = 0; 1446 else { 1447 if (off + count > size) 1448 count = size - off; 1449 1450 memcpy_fromio(buf, rom + off, count); 1451 } 1452 pci_unmap_rom(pdev, rom); 1453 1454 return count; 1455 } 1456 1457 static const struct bin_attribute pci_config_attr = { 1458 .attr = { 1459 .name = "config", 1460 .mode = S_IRUGO | S_IWUSR, 1461 }, 1462 .size = PCI_CFG_SPACE_SIZE, 1463 .read = pci_read_config, 1464 .write = pci_write_config, 1465 }; 1466 1467 static const struct bin_attribute pcie_config_attr = { 1468 .attr = { 1469 .name = "config", 1470 .mode = S_IRUGO | S_IWUSR, 1471 }, 1472 .size = PCI_CFG_SPACE_EXP_SIZE, 1473 .read = pci_read_config, 1474 .write = pci_write_config, 1475 }; 1476 1477 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1478 const char *buf, size_t count) 1479 { 1480 struct pci_dev *pdev = to_pci_dev(dev); 1481 unsigned long val; 1482 ssize_t result = kstrtoul(buf, 0, &val); 1483 1484 if (result < 0) 1485 return result; 1486 1487 if (val != 1) 1488 return -EINVAL; 1489 1490 result = pci_reset_function(pdev); 1491 if (result < 0) 1492 return result; 1493 1494 return count; 1495 } 1496 1497 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1498 1499 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1500 { 1501 int retval; 1502 struct bin_attribute *attr; 1503 1504 /* If the device has VPD, try to expose it in sysfs. */ 1505 if (dev->vpd) { 1506 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1507 if (!attr) 1508 return -ENOMEM; 1509 1510 sysfs_bin_attr_init(attr); 1511 attr->size = 0; 1512 attr->attr.name = "vpd"; 1513 attr->attr.mode = S_IRUSR | S_IWUSR; 1514 attr->read = read_vpd_attr; 1515 attr->write = write_vpd_attr; 1516 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1517 if (retval) { 1518 kfree(attr); 1519 return retval; 1520 } 1521 dev->vpd->attr = attr; 1522 } 1523 1524 /* Active State Power Management */ 1525 pcie_aspm_create_sysfs_dev_files(dev); 1526 1527 if (!pci_probe_reset_function(dev)) { 1528 retval = device_create_file(&dev->dev, &reset_attr); 1529 if (retval) 1530 goto error; 1531 dev->reset_fn = 1; 1532 } 1533 return 0; 1534 1535 error: 1536 pcie_aspm_remove_sysfs_dev_files(dev); 1537 if (dev->vpd && dev->vpd->attr) { 1538 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1539 kfree(dev->vpd->attr); 1540 } 1541 1542 return retval; 1543 } 1544 1545 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1546 { 1547 int retval; 1548 int rom_size; 1549 struct bin_attribute *attr; 1550 1551 if (!sysfs_initialized) 1552 return -EACCES; 1553 1554 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1555 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1556 else 1557 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1558 if (retval) 1559 goto err; 1560 1561 retval = pci_create_resource_files(pdev); 1562 if (retval) 1563 goto err_config_file; 1564 1565 /* If the device has a ROM, try to expose it in sysfs. */ 1566 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1567 if (rom_size) { 1568 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1569 if (!attr) { 1570 retval = -ENOMEM; 1571 goto err_resource_files; 1572 } 1573 sysfs_bin_attr_init(attr); 1574 attr->size = rom_size; 1575 attr->attr.name = "rom"; 1576 attr->attr.mode = S_IRUSR | S_IWUSR; 1577 attr->read = pci_read_rom; 1578 attr->write = pci_write_rom; 1579 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1580 if (retval) { 1581 kfree(attr); 1582 goto err_resource_files; 1583 } 1584 pdev->rom_attr = attr; 1585 } 1586 1587 /* add sysfs entries for various capabilities */ 1588 retval = pci_create_capabilities_sysfs(pdev); 1589 if (retval) 1590 goto err_rom_file; 1591 1592 pci_create_firmware_label_files(pdev); 1593 1594 return 0; 1595 1596 err_rom_file: 1597 if (pdev->rom_attr) { 1598 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1599 kfree(pdev->rom_attr); 1600 pdev->rom_attr = NULL; 1601 } 1602 err_resource_files: 1603 pci_remove_resource_files(pdev); 1604 err_config_file: 1605 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1606 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1607 else 1608 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1609 err: 1610 return retval; 1611 } 1612 1613 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1614 { 1615 if (dev->vpd && dev->vpd->attr) { 1616 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1617 kfree(dev->vpd->attr); 1618 } 1619 1620 pcie_aspm_remove_sysfs_dev_files(dev); 1621 if (dev->reset_fn) { 1622 device_remove_file(&dev->dev, &reset_attr); 1623 dev->reset_fn = 0; 1624 } 1625 } 1626 1627 /** 1628 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1629 * @pdev: device whose entries we should free 1630 * 1631 * Cleanup when @pdev is removed from sysfs. 1632 */ 1633 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1634 { 1635 if (!sysfs_initialized) 1636 return; 1637 1638 pci_remove_capabilities_sysfs(pdev); 1639 1640 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1641 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1642 else 1643 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1644 1645 pci_remove_resource_files(pdev); 1646 1647 if (pdev->rom_attr) { 1648 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1649 kfree(pdev->rom_attr); 1650 pdev->rom_attr = NULL; 1651 } 1652 1653 pci_remove_firmware_label_files(pdev); 1654 } 1655 1656 static int __init pci_sysfs_init(void) 1657 { 1658 struct pci_dev *pdev = NULL; 1659 int retval; 1660 1661 sysfs_initialized = 1; 1662 for_each_pci_dev(pdev) { 1663 retval = pci_create_sysfs_dev_files(pdev); 1664 if (retval) { 1665 pci_dev_put(pdev); 1666 return retval; 1667 } 1668 } 1669 1670 return 0; 1671 } 1672 late_initcall(pci_sysfs_init); 1673 1674 static struct attribute *pci_dev_dev_attrs[] = { 1675 &vga_attr.attr, 1676 NULL, 1677 }; 1678 1679 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1680 struct attribute *a, int n) 1681 { 1682 struct device *dev = kobj_to_dev(kobj); 1683 struct pci_dev *pdev = to_pci_dev(dev); 1684 1685 if (a == &vga_attr.attr) 1686 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1687 return 0; 1688 1689 return a->mode; 1690 } 1691 1692 static struct attribute *pci_dev_hp_attrs[] = { 1693 &dev_remove_attr.attr, 1694 &dev_rescan_attr.attr, 1695 NULL, 1696 }; 1697 1698 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1699 struct attribute *a, int n) 1700 { 1701 struct device *dev = kobj_to_dev(kobj); 1702 struct pci_dev *pdev = to_pci_dev(dev); 1703 1704 if (pdev->is_virtfn) 1705 return 0; 1706 1707 return a->mode; 1708 } 1709 1710 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1711 struct attribute *a, int n) 1712 { 1713 struct device *dev = kobj_to_dev(kobj); 1714 struct pci_dev *pdev = to_pci_dev(dev); 1715 1716 if (pci_is_bridge(pdev)) 1717 return a->mode; 1718 1719 return 0; 1720 } 1721 1722 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1723 struct attribute *a, int n) 1724 { 1725 struct device *dev = kobj_to_dev(kobj); 1726 struct pci_dev *pdev = to_pci_dev(dev); 1727 1728 if (pci_is_pcie(pdev)) 1729 return a->mode; 1730 1731 return 0; 1732 } 1733 1734 static const struct attribute_group pci_dev_group = { 1735 .attrs = pci_dev_attrs, 1736 }; 1737 1738 const struct attribute_group *pci_dev_groups[] = { 1739 &pci_dev_group, 1740 NULL, 1741 }; 1742 1743 static const struct attribute_group pci_bridge_group = { 1744 .attrs = pci_bridge_attrs, 1745 }; 1746 1747 const struct attribute_group *pci_bridge_groups[] = { 1748 &pci_bridge_group, 1749 NULL, 1750 }; 1751 1752 static const struct attribute_group pcie_dev_group = { 1753 .attrs = pcie_dev_attrs, 1754 }; 1755 1756 const struct attribute_group *pcie_dev_groups[] = { 1757 &pcie_dev_group, 1758 NULL, 1759 }; 1760 1761 static const struct attribute_group pci_dev_hp_attr_group = { 1762 .attrs = pci_dev_hp_attrs, 1763 .is_visible = pci_dev_hp_attrs_are_visible, 1764 }; 1765 1766 #ifdef CONFIG_PCI_IOV 1767 static struct attribute *sriov_dev_attrs[] = { 1768 &sriov_totalvfs_attr.attr, 1769 &sriov_numvfs_attr.attr, 1770 &sriov_offset_attr.attr, 1771 &sriov_stride_attr.attr, 1772 &sriov_vf_device_attr.attr, 1773 &sriov_drivers_autoprobe_attr.attr, 1774 NULL, 1775 }; 1776 1777 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1778 struct attribute *a, int n) 1779 { 1780 struct device *dev = kobj_to_dev(kobj); 1781 1782 if (!dev_is_pf(dev)) 1783 return 0; 1784 1785 return a->mode; 1786 } 1787 1788 static const struct attribute_group sriov_dev_attr_group = { 1789 .attrs = sriov_dev_attrs, 1790 .is_visible = sriov_attrs_are_visible, 1791 }; 1792 #endif /* CONFIG_PCI_IOV */ 1793 1794 static const struct attribute_group pci_dev_attr_group = { 1795 .attrs = pci_dev_dev_attrs, 1796 .is_visible = pci_dev_attrs_are_visible, 1797 }; 1798 1799 static const struct attribute_group pci_bridge_attr_group = { 1800 .attrs = pci_bridge_attrs, 1801 .is_visible = pci_bridge_attrs_are_visible, 1802 }; 1803 1804 static const struct attribute_group pcie_dev_attr_group = { 1805 .attrs = pcie_dev_attrs, 1806 .is_visible = pcie_dev_attrs_are_visible, 1807 }; 1808 1809 static const struct attribute_group *pci_dev_attr_groups[] = { 1810 &pci_dev_attr_group, 1811 &pci_dev_hp_attr_group, 1812 #ifdef CONFIG_PCI_IOV 1813 &sriov_dev_attr_group, 1814 #endif 1815 &pci_bridge_attr_group, 1816 &pcie_dev_attr_group, 1817 NULL, 1818 }; 1819 1820 const struct device_type pci_dev_type = { 1821 .groups = pci_dev_attr_groups, 1822 }; 1823