1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/of.h> 33 #include "pci.h" 34 35 static int sysfs_initialized; /* = 0 */ 36 37 /* show configuration fields */ 38 #define pci_config_attr(field, format_string) \ 39 static ssize_t \ 40 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 41 { \ 42 struct pci_dev *pdev; \ 43 \ 44 pdev = to_pci_dev(dev); \ 45 return sprintf(buf, format_string, pdev->field); \ 46 } \ 47 static DEVICE_ATTR_RO(field) 48 49 pci_config_attr(vendor, "0x%04x\n"); 50 pci_config_attr(device, "0x%04x\n"); 51 pci_config_attr(subsystem_vendor, "0x%04x\n"); 52 pci_config_attr(subsystem_device, "0x%04x\n"); 53 pci_config_attr(revision, "0x%02x\n"); 54 pci_config_attr(class, "0x%06x\n"); 55 pci_config_attr(irq, "%u\n"); 56 57 static ssize_t broken_parity_status_show(struct device *dev, 58 struct device_attribute *attr, 59 char *buf) 60 { 61 struct pci_dev *pdev = to_pci_dev(dev); 62 return sprintf(buf, "%u\n", pdev->broken_parity_status); 63 } 64 65 static ssize_t broken_parity_status_store(struct device *dev, 66 struct device_attribute *attr, 67 const char *buf, size_t count) 68 { 69 struct pci_dev *pdev = to_pci_dev(dev); 70 unsigned long val; 71 72 if (kstrtoul(buf, 0, &val) < 0) 73 return -EINVAL; 74 75 pdev->broken_parity_status = !!val; 76 77 return count; 78 } 79 static DEVICE_ATTR_RW(broken_parity_status); 80 81 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 82 struct device_attribute *attr, char *buf) 83 { 84 const struct cpumask *mask; 85 86 #ifdef CONFIG_NUMA 87 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 88 cpumask_of_node(dev_to_node(dev)); 89 #else 90 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 91 #endif 92 return cpumap_print_to_pagebuf(list, buf, mask); 93 } 94 95 static ssize_t local_cpus_show(struct device *dev, 96 struct device_attribute *attr, char *buf) 97 { 98 return pci_dev_show_local_cpu(dev, false, attr, buf); 99 } 100 static DEVICE_ATTR_RO(local_cpus); 101 102 static ssize_t local_cpulist_show(struct device *dev, 103 struct device_attribute *attr, char *buf) 104 { 105 return pci_dev_show_local_cpu(dev, true, attr, buf); 106 } 107 static DEVICE_ATTR_RO(local_cpulist); 108 109 /* 110 * PCI Bus Class Devices 111 */ 112 static ssize_t cpuaffinity_show(struct device *dev, 113 struct device_attribute *attr, char *buf) 114 { 115 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 116 117 return cpumap_print_to_pagebuf(false, buf, cpumask); 118 } 119 static DEVICE_ATTR_RO(cpuaffinity); 120 121 static ssize_t cpulistaffinity_show(struct device *dev, 122 struct device_attribute *attr, char *buf) 123 { 124 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 125 126 return cpumap_print_to_pagebuf(true, buf, cpumask); 127 } 128 static DEVICE_ATTR_RO(cpulistaffinity); 129 130 /* show resources */ 131 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 132 char *buf) 133 { 134 struct pci_dev *pci_dev = to_pci_dev(dev); 135 char *str = buf; 136 int i; 137 int max; 138 resource_size_t start, end; 139 140 if (pci_dev->subordinate) 141 max = DEVICE_COUNT_RESOURCE; 142 else 143 max = PCI_BRIDGE_RESOURCES; 144 145 for (i = 0; i < max; i++) { 146 struct resource *res = &pci_dev->resource[i]; 147 pci_resource_to_user(pci_dev, i, res, &start, &end); 148 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 149 (unsigned long long)start, 150 (unsigned long long)end, 151 (unsigned long long)res->flags); 152 } 153 return (str - buf); 154 } 155 static DEVICE_ATTR_RO(resource); 156 157 static ssize_t max_link_speed_show(struct device *dev, 158 struct device_attribute *attr, char *buf) 159 { 160 struct pci_dev *pci_dev = to_pci_dev(dev); 161 u32 linkcap; 162 int err; 163 const char *speed; 164 165 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 166 if (err) 167 return -EINVAL; 168 169 switch (linkcap & PCI_EXP_LNKCAP_SLS) { 170 case PCI_EXP_LNKCAP_SLS_8_0GB: 171 speed = "8 GT/s"; 172 break; 173 case PCI_EXP_LNKCAP_SLS_5_0GB: 174 speed = "5 GT/s"; 175 break; 176 case PCI_EXP_LNKCAP_SLS_2_5GB: 177 speed = "2.5 GT/s"; 178 break; 179 default: 180 speed = "Unknown speed"; 181 } 182 183 return sprintf(buf, "%s\n", speed); 184 } 185 static DEVICE_ATTR_RO(max_link_speed); 186 187 static ssize_t max_link_width_show(struct device *dev, 188 struct device_attribute *attr, char *buf) 189 { 190 struct pci_dev *pci_dev = to_pci_dev(dev); 191 u32 linkcap; 192 int err; 193 194 err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); 195 if (err) 196 return -EINVAL; 197 198 return sprintf(buf, "%u\n", (linkcap & PCI_EXP_LNKCAP_MLW) >> 4); 199 } 200 static DEVICE_ATTR_RO(max_link_width); 201 202 static ssize_t current_link_speed_show(struct device *dev, 203 struct device_attribute *attr, char *buf) 204 { 205 struct pci_dev *pci_dev = to_pci_dev(dev); 206 u16 linkstat; 207 int err; 208 const char *speed; 209 210 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 211 if (err) 212 return -EINVAL; 213 214 switch (linkstat & PCI_EXP_LNKSTA_CLS) { 215 case PCI_EXP_LNKSTA_CLS_8_0GB: 216 speed = "8 GT/s"; 217 break; 218 case PCI_EXP_LNKSTA_CLS_5_0GB: 219 speed = "5 GT/s"; 220 break; 221 case PCI_EXP_LNKSTA_CLS_2_5GB: 222 speed = "2.5 GT/s"; 223 break; 224 default: 225 speed = "Unknown speed"; 226 } 227 228 return sprintf(buf, "%s\n", speed); 229 } 230 static DEVICE_ATTR_RO(current_link_speed); 231 232 static ssize_t current_link_width_show(struct device *dev, 233 struct device_attribute *attr, char *buf) 234 { 235 struct pci_dev *pci_dev = to_pci_dev(dev); 236 u16 linkstat; 237 int err; 238 239 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 240 if (err) 241 return -EINVAL; 242 243 return sprintf(buf, "%u\n", 244 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 245 } 246 static DEVICE_ATTR_RO(current_link_width); 247 248 static ssize_t secondary_bus_number_show(struct device *dev, 249 struct device_attribute *attr, 250 char *buf) 251 { 252 struct pci_dev *pci_dev = to_pci_dev(dev); 253 u8 sec_bus; 254 int err; 255 256 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 257 if (err) 258 return -EINVAL; 259 260 return sprintf(buf, "%u\n", sec_bus); 261 } 262 static DEVICE_ATTR_RO(secondary_bus_number); 263 264 static ssize_t subordinate_bus_number_show(struct device *dev, 265 struct device_attribute *attr, 266 char *buf) 267 { 268 struct pci_dev *pci_dev = to_pci_dev(dev); 269 u8 sub_bus; 270 int err; 271 272 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 273 if (err) 274 return -EINVAL; 275 276 return sprintf(buf, "%u\n", sub_bus); 277 } 278 static DEVICE_ATTR_RO(subordinate_bus_number); 279 280 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 281 char *buf) 282 { 283 struct pci_dev *pci_dev = to_pci_dev(dev); 284 285 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 286 pci_dev->vendor, pci_dev->device, 287 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 288 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 289 (u8)(pci_dev->class)); 290 } 291 static DEVICE_ATTR_RO(modalias); 292 293 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 294 const char *buf, size_t count) 295 { 296 struct pci_dev *pdev = to_pci_dev(dev); 297 unsigned long val; 298 ssize_t result = kstrtoul(buf, 0, &val); 299 300 if (result < 0) 301 return result; 302 303 /* this can crash the machine when done on the "wrong" device */ 304 if (!capable(CAP_SYS_ADMIN)) 305 return -EPERM; 306 307 if (!val) { 308 if (pci_is_enabled(pdev)) 309 pci_disable_device(pdev); 310 else 311 result = -EIO; 312 } else 313 result = pci_enable_device(pdev); 314 315 return result < 0 ? result : count; 316 } 317 318 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 319 char *buf) 320 { 321 struct pci_dev *pdev; 322 323 pdev = to_pci_dev(dev); 324 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 325 } 326 static DEVICE_ATTR_RW(enable); 327 328 #ifdef CONFIG_NUMA 329 static ssize_t numa_node_store(struct device *dev, 330 struct device_attribute *attr, const char *buf, 331 size_t count) 332 { 333 struct pci_dev *pdev = to_pci_dev(dev); 334 int node, ret; 335 336 if (!capable(CAP_SYS_ADMIN)) 337 return -EPERM; 338 339 ret = kstrtoint(buf, 0, &node); 340 if (ret) 341 return ret; 342 343 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 344 return -EINVAL; 345 346 if (node != NUMA_NO_NODE && !node_online(node)) 347 return -EINVAL; 348 349 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 350 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 351 node); 352 353 dev->numa_node = node; 354 return count; 355 } 356 357 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 358 char *buf) 359 { 360 return sprintf(buf, "%d\n", dev->numa_node); 361 } 362 static DEVICE_ATTR_RW(numa_node); 363 #endif 364 365 static ssize_t dma_mask_bits_show(struct device *dev, 366 struct device_attribute *attr, char *buf) 367 { 368 struct pci_dev *pdev = to_pci_dev(dev); 369 370 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 371 } 372 static DEVICE_ATTR_RO(dma_mask_bits); 373 374 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 375 struct device_attribute *attr, 376 char *buf) 377 { 378 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 379 } 380 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 381 382 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 383 char *buf) 384 { 385 struct pci_dev *pdev = to_pci_dev(dev); 386 struct pci_bus *subordinate = pdev->subordinate; 387 388 return sprintf(buf, "%u\n", subordinate ? 389 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 390 : !pdev->no_msi); 391 } 392 393 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 394 const char *buf, size_t count) 395 { 396 struct pci_dev *pdev = to_pci_dev(dev); 397 struct pci_bus *subordinate = pdev->subordinate; 398 unsigned long val; 399 400 if (kstrtoul(buf, 0, &val) < 0) 401 return -EINVAL; 402 403 if (!capable(CAP_SYS_ADMIN)) 404 return -EPERM; 405 406 /* 407 * "no_msi" and "bus_flags" only affect what happens when a driver 408 * requests MSI or MSI-X. They don't affect any drivers that have 409 * already requested MSI or MSI-X. 410 */ 411 if (!subordinate) { 412 pdev->no_msi = !val; 413 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n", 414 val ? "allowed" : "disallowed"); 415 return count; 416 } 417 418 if (val) 419 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 420 else 421 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 422 423 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 424 val ? "allowed" : "disallowed"); 425 return count; 426 } 427 static DEVICE_ATTR_RW(msi_bus); 428 429 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 430 size_t count) 431 { 432 unsigned long val; 433 struct pci_bus *b = NULL; 434 435 if (kstrtoul(buf, 0, &val) < 0) 436 return -EINVAL; 437 438 if (val) { 439 pci_lock_rescan_remove(); 440 while ((b = pci_find_next_bus(b)) != NULL) 441 pci_rescan_bus(b); 442 pci_unlock_rescan_remove(); 443 } 444 return count; 445 } 446 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 447 448 static struct attribute *pci_bus_attrs[] = { 449 &bus_attr_rescan.attr, 450 NULL, 451 }; 452 453 static const struct attribute_group pci_bus_group = { 454 .attrs = pci_bus_attrs, 455 }; 456 457 const struct attribute_group *pci_bus_groups[] = { 458 &pci_bus_group, 459 NULL, 460 }; 461 462 static ssize_t dev_rescan_store(struct device *dev, 463 struct device_attribute *attr, const char *buf, 464 size_t count) 465 { 466 unsigned long val; 467 struct pci_dev *pdev = to_pci_dev(dev); 468 469 if (kstrtoul(buf, 0, &val) < 0) 470 return -EINVAL; 471 472 if (val) { 473 pci_lock_rescan_remove(); 474 pci_rescan_bus(pdev->bus); 475 pci_unlock_rescan_remove(); 476 } 477 return count; 478 } 479 static struct device_attribute dev_rescan_attr = __ATTR(rescan, 480 (S_IWUSR|S_IWGRP), 481 NULL, dev_rescan_store); 482 483 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 484 const char *buf, size_t count) 485 { 486 unsigned long val; 487 488 if (kstrtoul(buf, 0, &val) < 0) 489 return -EINVAL; 490 491 if (val && device_remove_file_self(dev, attr)) 492 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 493 return count; 494 } 495 static struct device_attribute dev_remove_attr = __ATTR(remove, 496 (S_IWUSR|S_IWGRP), 497 NULL, remove_store); 498 499 static ssize_t dev_bus_rescan_store(struct device *dev, 500 struct device_attribute *attr, 501 const char *buf, size_t count) 502 { 503 unsigned long val; 504 struct pci_bus *bus = to_pci_bus(dev); 505 506 if (kstrtoul(buf, 0, &val) < 0) 507 return -EINVAL; 508 509 if (val) { 510 pci_lock_rescan_remove(); 511 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 512 pci_rescan_bus_bridge_resize(bus->self); 513 else 514 pci_rescan_bus(bus); 515 pci_unlock_rescan_remove(); 516 } 517 return count; 518 } 519 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 520 521 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 522 static ssize_t d3cold_allowed_store(struct device *dev, 523 struct device_attribute *attr, 524 const char *buf, size_t count) 525 { 526 struct pci_dev *pdev = to_pci_dev(dev); 527 unsigned long val; 528 529 if (kstrtoul(buf, 0, &val) < 0) 530 return -EINVAL; 531 532 pdev->d3cold_allowed = !!val; 533 if (pdev->d3cold_allowed) 534 pci_d3cold_enable(pdev); 535 else 536 pci_d3cold_disable(pdev); 537 538 pm_runtime_resume(dev); 539 540 return count; 541 } 542 543 static ssize_t d3cold_allowed_show(struct device *dev, 544 struct device_attribute *attr, char *buf) 545 { 546 struct pci_dev *pdev = to_pci_dev(dev); 547 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 548 } 549 static DEVICE_ATTR_RW(d3cold_allowed); 550 #endif 551 552 #ifdef CONFIG_OF 553 static ssize_t devspec_show(struct device *dev, 554 struct device_attribute *attr, char *buf) 555 { 556 struct pci_dev *pdev = to_pci_dev(dev); 557 struct device_node *np = pci_device_to_OF_node(pdev); 558 559 if (np == NULL) 560 return 0; 561 return sprintf(buf, "%pOF", np); 562 } 563 static DEVICE_ATTR_RO(devspec); 564 #endif 565 566 #ifdef CONFIG_PCI_IOV 567 static ssize_t sriov_totalvfs_show(struct device *dev, 568 struct device_attribute *attr, 569 char *buf) 570 { 571 struct pci_dev *pdev = to_pci_dev(dev); 572 573 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 574 } 575 576 577 static ssize_t sriov_numvfs_show(struct device *dev, 578 struct device_attribute *attr, 579 char *buf) 580 { 581 struct pci_dev *pdev = to_pci_dev(dev); 582 583 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 584 } 585 586 /* 587 * num_vfs > 0; number of VFs to enable 588 * num_vfs = 0; disable all VFs 589 * 590 * Note: SRIOV spec doesn't allow partial VF 591 * disable, so it's all or none. 592 */ 593 static ssize_t sriov_numvfs_store(struct device *dev, 594 struct device_attribute *attr, 595 const char *buf, size_t count) 596 { 597 struct pci_dev *pdev = to_pci_dev(dev); 598 int ret; 599 u16 num_vfs; 600 601 ret = kstrtou16(buf, 0, &num_vfs); 602 if (ret < 0) 603 return ret; 604 605 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 606 return -ERANGE; 607 608 device_lock(&pdev->dev); 609 610 if (num_vfs == pdev->sriov->num_VFs) 611 goto exit; 612 613 /* is PF driver loaded w/callback */ 614 if (!pdev->driver || !pdev->driver->sriov_configure) { 615 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); 616 ret = -ENOENT; 617 goto exit; 618 } 619 620 if (num_vfs == 0) { 621 /* disable VFs */ 622 ret = pdev->driver->sriov_configure(pdev, 0); 623 goto exit; 624 } 625 626 /* enable VFs */ 627 if (pdev->sriov->num_VFs) { 628 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", 629 pdev->sriov->num_VFs, num_vfs); 630 ret = -EBUSY; 631 goto exit; 632 } 633 634 ret = pdev->driver->sriov_configure(pdev, num_vfs); 635 if (ret < 0) 636 goto exit; 637 638 if (ret != num_vfs) 639 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", 640 num_vfs, ret); 641 642 exit: 643 device_unlock(&pdev->dev); 644 645 if (ret < 0) 646 return ret; 647 648 return count; 649 } 650 651 static ssize_t sriov_drivers_autoprobe_show(struct device *dev, 652 struct device_attribute *attr, 653 char *buf) 654 { 655 struct pci_dev *pdev = to_pci_dev(dev); 656 657 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe); 658 } 659 660 static ssize_t sriov_drivers_autoprobe_store(struct device *dev, 661 struct device_attribute *attr, 662 const char *buf, size_t count) 663 { 664 struct pci_dev *pdev = to_pci_dev(dev); 665 bool drivers_autoprobe; 666 667 if (kstrtobool(buf, &drivers_autoprobe) < 0) 668 return -EINVAL; 669 670 pdev->sriov->drivers_autoprobe = drivers_autoprobe; 671 672 return count; 673 } 674 675 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 676 static struct device_attribute sriov_numvfs_attr = 677 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 678 sriov_numvfs_show, sriov_numvfs_store); 679 static struct device_attribute sriov_drivers_autoprobe_attr = 680 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP), 681 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store); 682 #endif /* CONFIG_PCI_IOV */ 683 684 static ssize_t driver_override_store(struct device *dev, 685 struct device_attribute *attr, 686 const char *buf, size_t count) 687 { 688 struct pci_dev *pdev = to_pci_dev(dev); 689 char *driver_override, *old, *cp; 690 691 /* We need to keep extra room for a newline */ 692 if (count >= (PAGE_SIZE - 1)) 693 return -EINVAL; 694 695 driver_override = kstrndup(buf, count, GFP_KERNEL); 696 if (!driver_override) 697 return -ENOMEM; 698 699 cp = strchr(driver_override, '\n'); 700 if (cp) 701 *cp = '\0'; 702 703 device_lock(dev); 704 old = pdev->driver_override; 705 if (strlen(driver_override)) { 706 pdev->driver_override = driver_override; 707 } else { 708 kfree(driver_override); 709 pdev->driver_override = NULL; 710 } 711 device_unlock(dev); 712 713 kfree(old); 714 715 return count; 716 } 717 718 static ssize_t driver_override_show(struct device *dev, 719 struct device_attribute *attr, char *buf) 720 { 721 struct pci_dev *pdev = to_pci_dev(dev); 722 ssize_t len; 723 724 device_lock(dev); 725 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 726 device_unlock(dev); 727 return len; 728 } 729 static DEVICE_ATTR_RW(driver_override); 730 731 static struct attribute *pci_dev_attrs[] = { 732 &dev_attr_resource.attr, 733 &dev_attr_vendor.attr, 734 &dev_attr_device.attr, 735 &dev_attr_subsystem_vendor.attr, 736 &dev_attr_subsystem_device.attr, 737 &dev_attr_revision.attr, 738 &dev_attr_class.attr, 739 &dev_attr_irq.attr, 740 &dev_attr_local_cpus.attr, 741 &dev_attr_local_cpulist.attr, 742 &dev_attr_modalias.attr, 743 #ifdef CONFIG_NUMA 744 &dev_attr_numa_node.attr, 745 #endif 746 &dev_attr_dma_mask_bits.attr, 747 &dev_attr_consistent_dma_mask_bits.attr, 748 &dev_attr_enable.attr, 749 &dev_attr_broken_parity_status.attr, 750 &dev_attr_msi_bus.attr, 751 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 752 &dev_attr_d3cold_allowed.attr, 753 #endif 754 #ifdef CONFIG_OF 755 &dev_attr_devspec.attr, 756 #endif 757 &dev_attr_driver_override.attr, 758 NULL, 759 }; 760 761 static struct attribute *pci_bridge_attrs[] = { 762 &dev_attr_subordinate_bus_number.attr, 763 &dev_attr_secondary_bus_number.attr, 764 NULL, 765 }; 766 767 static struct attribute *pcie_dev_attrs[] = { 768 &dev_attr_current_link_speed.attr, 769 &dev_attr_current_link_width.attr, 770 &dev_attr_max_link_width.attr, 771 &dev_attr_max_link_speed.attr, 772 NULL, 773 }; 774 775 static struct attribute *pcibus_attrs[] = { 776 &dev_attr_rescan.attr, 777 &dev_attr_cpuaffinity.attr, 778 &dev_attr_cpulistaffinity.attr, 779 NULL, 780 }; 781 782 static const struct attribute_group pcibus_group = { 783 .attrs = pcibus_attrs, 784 }; 785 786 const struct attribute_group *pcibus_groups[] = { 787 &pcibus_group, 788 NULL, 789 }; 790 791 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 792 char *buf) 793 { 794 struct pci_dev *pdev = to_pci_dev(dev); 795 struct pci_dev *vga_dev = vga_default_device(); 796 797 if (vga_dev) 798 return sprintf(buf, "%u\n", (pdev == vga_dev)); 799 800 return sprintf(buf, "%u\n", 801 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 802 IORESOURCE_ROM_SHADOW)); 803 } 804 static struct device_attribute vga_attr = __ATTR_RO(boot_vga); 805 806 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 807 struct bin_attribute *bin_attr, char *buf, 808 loff_t off, size_t count) 809 { 810 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 811 unsigned int size = 64; 812 loff_t init_off = off; 813 u8 *data = (u8 *) buf; 814 815 /* Several chips lock up trying to read undefined config space */ 816 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 817 size = dev->cfg_size; 818 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 819 size = 128; 820 821 if (off > size) 822 return 0; 823 if (off + count > size) { 824 size -= off; 825 count = size; 826 } else { 827 size = count; 828 } 829 830 pci_config_pm_runtime_get(dev); 831 832 if ((off & 1) && size) { 833 u8 val; 834 pci_user_read_config_byte(dev, off, &val); 835 data[off - init_off] = val; 836 off++; 837 size--; 838 } 839 840 if ((off & 3) && size > 2) { 841 u16 val; 842 pci_user_read_config_word(dev, off, &val); 843 data[off - init_off] = val & 0xff; 844 data[off - init_off + 1] = (val >> 8) & 0xff; 845 off += 2; 846 size -= 2; 847 } 848 849 while (size > 3) { 850 u32 val; 851 pci_user_read_config_dword(dev, off, &val); 852 data[off - init_off] = val & 0xff; 853 data[off - init_off + 1] = (val >> 8) & 0xff; 854 data[off - init_off + 2] = (val >> 16) & 0xff; 855 data[off - init_off + 3] = (val >> 24) & 0xff; 856 off += 4; 857 size -= 4; 858 } 859 860 if (size >= 2) { 861 u16 val; 862 pci_user_read_config_word(dev, off, &val); 863 data[off - init_off] = val & 0xff; 864 data[off - init_off + 1] = (val >> 8) & 0xff; 865 off += 2; 866 size -= 2; 867 } 868 869 if (size > 0) { 870 u8 val; 871 pci_user_read_config_byte(dev, off, &val); 872 data[off - init_off] = val; 873 off++; 874 --size; 875 } 876 877 pci_config_pm_runtime_put(dev); 878 879 return count; 880 } 881 882 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 883 struct bin_attribute *bin_attr, char *buf, 884 loff_t off, size_t count) 885 { 886 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 887 unsigned int size = count; 888 loff_t init_off = off; 889 u8 *data = (u8 *) buf; 890 891 if (off > dev->cfg_size) 892 return 0; 893 if (off + count > dev->cfg_size) { 894 size = dev->cfg_size - off; 895 count = size; 896 } 897 898 pci_config_pm_runtime_get(dev); 899 900 if ((off & 1) && size) { 901 pci_user_write_config_byte(dev, off, data[off - init_off]); 902 off++; 903 size--; 904 } 905 906 if ((off & 3) && size > 2) { 907 u16 val = data[off - init_off]; 908 val |= (u16) data[off - init_off + 1] << 8; 909 pci_user_write_config_word(dev, off, val); 910 off += 2; 911 size -= 2; 912 } 913 914 while (size > 3) { 915 u32 val = data[off - init_off]; 916 val |= (u32) data[off - init_off + 1] << 8; 917 val |= (u32) data[off - init_off + 2] << 16; 918 val |= (u32) data[off - init_off + 3] << 24; 919 pci_user_write_config_dword(dev, off, val); 920 off += 4; 921 size -= 4; 922 } 923 924 if (size >= 2) { 925 u16 val = data[off - init_off]; 926 val |= (u16) data[off - init_off + 1] << 8; 927 pci_user_write_config_word(dev, off, val); 928 off += 2; 929 size -= 2; 930 } 931 932 if (size) { 933 pci_user_write_config_byte(dev, off, data[off - init_off]); 934 off++; 935 --size; 936 } 937 938 pci_config_pm_runtime_put(dev); 939 940 return count; 941 } 942 943 static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj, 944 struct bin_attribute *bin_attr, char *buf, 945 loff_t off, size_t count) 946 { 947 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 948 949 if (bin_attr->size > 0) { 950 if (off > bin_attr->size) 951 count = 0; 952 else if (count > bin_attr->size - off) 953 count = bin_attr->size - off; 954 } 955 956 return pci_read_vpd(dev, off, count, buf); 957 } 958 959 static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj, 960 struct bin_attribute *bin_attr, char *buf, 961 loff_t off, size_t count) 962 { 963 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 964 965 if (bin_attr->size > 0) { 966 if (off > bin_attr->size) 967 count = 0; 968 else if (count > bin_attr->size - off) 969 count = bin_attr->size - off; 970 } 971 972 return pci_write_vpd(dev, off, count, buf); 973 } 974 975 #ifdef HAVE_PCI_LEGACY 976 /** 977 * pci_read_legacy_io - read byte(s) from legacy I/O port space 978 * @filp: open sysfs file 979 * @kobj: kobject corresponding to file to read from 980 * @bin_attr: struct bin_attribute for this file 981 * @buf: buffer to store results 982 * @off: offset into legacy I/O port space 983 * @count: number of bytes to read 984 * 985 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 986 * callback routine (pci_legacy_read). 987 */ 988 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 989 struct bin_attribute *bin_attr, char *buf, 990 loff_t off, size_t count) 991 { 992 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 993 994 /* Only support 1, 2 or 4 byte accesses */ 995 if (count != 1 && count != 2 && count != 4) 996 return -EINVAL; 997 998 return pci_legacy_read(bus, off, (u32 *)buf, count); 999 } 1000 1001 /** 1002 * pci_write_legacy_io - write byte(s) to legacy I/O port space 1003 * @filp: open sysfs file 1004 * @kobj: kobject corresponding to file to read from 1005 * @bin_attr: struct bin_attribute for this file 1006 * @buf: buffer containing value to be written 1007 * @off: offset into legacy I/O port space 1008 * @count: number of bytes to write 1009 * 1010 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 1011 * callback routine (pci_legacy_write). 1012 */ 1013 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 1014 struct bin_attribute *bin_attr, char *buf, 1015 loff_t off, size_t count) 1016 { 1017 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1018 1019 /* Only support 1, 2 or 4 byte accesses */ 1020 if (count != 1 && count != 2 && count != 4) 1021 return -EINVAL; 1022 1023 return pci_legacy_write(bus, off, *(u32 *)buf, count); 1024 } 1025 1026 /** 1027 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 1028 * @filp: open sysfs file 1029 * @kobj: kobject corresponding to device to be mapped 1030 * @attr: struct bin_attribute for this file 1031 * @vma: struct vm_area_struct passed to mmap 1032 * 1033 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 1034 * legacy memory space (first meg of bus space) into application virtual 1035 * memory space. 1036 */ 1037 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 1038 struct bin_attribute *attr, 1039 struct vm_area_struct *vma) 1040 { 1041 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1042 1043 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 1044 } 1045 1046 /** 1047 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 1048 * @filp: open sysfs file 1049 * @kobj: kobject corresponding to device to be mapped 1050 * @attr: struct bin_attribute for this file 1051 * @vma: struct vm_area_struct passed to mmap 1052 * 1053 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 1054 * legacy IO space (first meg of bus space) into application virtual 1055 * memory space. Returns -ENOSYS if the operation isn't supported 1056 */ 1057 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 1058 struct bin_attribute *attr, 1059 struct vm_area_struct *vma) 1060 { 1061 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 1062 1063 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 1064 } 1065 1066 /** 1067 * pci_adjust_legacy_attr - adjustment of legacy file attributes 1068 * @b: bus to create files under 1069 * @mmap_type: I/O port or memory 1070 * 1071 * Stub implementation. Can be overridden by arch if necessary. 1072 */ 1073 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 1074 enum pci_mmap_state mmap_type) 1075 { 1076 } 1077 1078 /** 1079 * pci_create_legacy_files - create legacy I/O port and memory files 1080 * @b: bus to create files under 1081 * 1082 * Some platforms allow access to legacy I/O port and ISA memory space on 1083 * a per-bus basis. This routine creates the files and ties them into 1084 * their associated read, write and mmap files from pci-sysfs.c 1085 * 1086 * On error unwind, but don't propagate the error to the caller 1087 * as it is ok to set up the PCI bus without these files. 1088 */ 1089 void pci_create_legacy_files(struct pci_bus *b) 1090 { 1091 int error; 1092 1093 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 1094 GFP_ATOMIC); 1095 if (!b->legacy_io) 1096 goto kzalloc_err; 1097 1098 sysfs_bin_attr_init(b->legacy_io); 1099 b->legacy_io->attr.name = "legacy_io"; 1100 b->legacy_io->size = 0xffff; 1101 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 1102 b->legacy_io->read = pci_read_legacy_io; 1103 b->legacy_io->write = pci_write_legacy_io; 1104 b->legacy_io->mmap = pci_mmap_legacy_io; 1105 pci_adjust_legacy_attr(b, pci_mmap_io); 1106 error = device_create_bin_file(&b->dev, b->legacy_io); 1107 if (error) 1108 goto legacy_io_err; 1109 1110 /* Allocated above after the legacy_io struct */ 1111 b->legacy_mem = b->legacy_io + 1; 1112 sysfs_bin_attr_init(b->legacy_mem); 1113 b->legacy_mem->attr.name = "legacy_mem"; 1114 b->legacy_mem->size = 1024*1024; 1115 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 1116 b->legacy_mem->mmap = pci_mmap_legacy_mem; 1117 pci_adjust_legacy_attr(b, pci_mmap_mem); 1118 error = device_create_bin_file(&b->dev, b->legacy_mem); 1119 if (error) 1120 goto legacy_mem_err; 1121 1122 return; 1123 1124 legacy_mem_err: 1125 device_remove_bin_file(&b->dev, b->legacy_io); 1126 legacy_io_err: 1127 kfree(b->legacy_io); 1128 b->legacy_io = NULL; 1129 kzalloc_err: 1130 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n"); 1131 return; 1132 } 1133 1134 void pci_remove_legacy_files(struct pci_bus *b) 1135 { 1136 if (b->legacy_io) { 1137 device_remove_bin_file(&b->dev, b->legacy_io); 1138 device_remove_bin_file(&b->dev, b->legacy_mem); 1139 kfree(b->legacy_io); /* both are allocated here */ 1140 } 1141 } 1142 #endif /* HAVE_PCI_LEGACY */ 1143 1144 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1145 1146 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 1147 enum pci_mmap_api mmap_api) 1148 { 1149 unsigned long nr, start, size; 1150 resource_size_t pci_start = 0, pci_end; 1151 1152 if (pci_resource_len(pdev, resno) == 0) 1153 return 0; 1154 nr = vma_pages(vma); 1155 start = vma->vm_pgoff; 1156 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 1157 if (mmap_api == PCI_MMAP_PROCFS) { 1158 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 1159 &pci_start, &pci_end); 1160 pci_start >>= PAGE_SHIFT; 1161 } 1162 if (start >= pci_start && start < pci_start + size && 1163 start + nr <= pci_start + size) 1164 return 1; 1165 return 0; 1166 } 1167 1168 /** 1169 * pci_mmap_resource - map a PCI resource into user memory space 1170 * @kobj: kobject for mapping 1171 * @attr: struct bin_attribute for the file being mapped 1172 * @vma: struct vm_area_struct passed into the mmap 1173 * @write_combine: 1 for write_combine mapping 1174 * 1175 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1176 */ 1177 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1178 struct vm_area_struct *vma, int write_combine) 1179 { 1180 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1181 int bar = (unsigned long)attr->private; 1182 enum pci_mmap_state mmap_type; 1183 struct resource *res = &pdev->resource[bar]; 1184 1185 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1186 return -EINVAL; 1187 1188 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) { 1189 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 1190 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 1191 pci_name(pdev), bar, 1192 (u64)pci_resource_start(pdev, bar), 1193 (u64)pci_resource_len(pdev, bar)); 1194 return -EINVAL; 1195 } 1196 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1197 1198 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1199 } 1200 1201 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1202 struct bin_attribute *attr, 1203 struct vm_area_struct *vma) 1204 { 1205 return pci_mmap_resource(kobj, attr, vma, 0); 1206 } 1207 1208 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1209 struct bin_attribute *attr, 1210 struct vm_area_struct *vma) 1211 { 1212 return pci_mmap_resource(kobj, attr, vma, 1); 1213 } 1214 1215 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1216 struct bin_attribute *attr, char *buf, 1217 loff_t off, size_t count, bool write) 1218 { 1219 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1220 int bar = (unsigned long)attr->private; 1221 unsigned long port = off; 1222 1223 port += pci_resource_start(pdev, bar); 1224 1225 if (port > pci_resource_end(pdev, bar)) 1226 return 0; 1227 1228 if (port + count - 1 > pci_resource_end(pdev, bar)) 1229 return -EINVAL; 1230 1231 switch (count) { 1232 case 1: 1233 if (write) 1234 outb(*(u8 *)buf, port); 1235 else 1236 *(u8 *)buf = inb(port); 1237 return 1; 1238 case 2: 1239 if (write) 1240 outw(*(u16 *)buf, port); 1241 else 1242 *(u16 *)buf = inw(port); 1243 return 2; 1244 case 4: 1245 if (write) 1246 outl(*(u32 *)buf, port); 1247 else 1248 *(u32 *)buf = inl(port); 1249 return 4; 1250 } 1251 return -EINVAL; 1252 } 1253 1254 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1255 struct bin_attribute *attr, char *buf, 1256 loff_t off, size_t count) 1257 { 1258 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1259 } 1260 1261 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1262 struct bin_attribute *attr, char *buf, 1263 loff_t off, size_t count) 1264 { 1265 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1266 } 1267 1268 /** 1269 * pci_remove_resource_files - cleanup resource files 1270 * @pdev: dev to cleanup 1271 * 1272 * If we created resource files for @pdev, remove them from sysfs and 1273 * free their resources. 1274 */ 1275 static void pci_remove_resource_files(struct pci_dev *pdev) 1276 { 1277 int i; 1278 1279 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1280 struct bin_attribute *res_attr; 1281 1282 res_attr = pdev->res_attr[i]; 1283 if (res_attr) { 1284 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1285 kfree(res_attr); 1286 } 1287 1288 res_attr = pdev->res_attr_wc[i]; 1289 if (res_attr) { 1290 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1291 kfree(res_attr); 1292 } 1293 } 1294 } 1295 1296 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1297 { 1298 /* allocate attribute structure, piggyback attribute name */ 1299 int name_len = write_combine ? 13 : 10; 1300 struct bin_attribute *res_attr; 1301 char *res_attr_name; 1302 int retval; 1303 1304 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1305 if (!res_attr) 1306 return -ENOMEM; 1307 1308 res_attr_name = (char *)(res_attr + 1); 1309 1310 sysfs_bin_attr_init(res_attr); 1311 if (write_combine) { 1312 pdev->res_attr_wc[num] = res_attr; 1313 sprintf(res_attr_name, "resource%d_wc", num); 1314 res_attr->mmap = pci_mmap_resource_wc; 1315 } else { 1316 pdev->res_attr[num] = res_attr; 1317 sprintf(res_attr_name, "resource%d", num); 1318 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1319 res_attr->read = pci_read_resource_io; 1320 res_attr->write = pci_write_resource_io; 1321 if (arch_can_pci_mmap_io()) 1322 res_attr->mmap = pci_mmap_resource_uc; 1323 } else { 1324 res_attr->mmap = pci_mmap_resource_uc; 1325 } 1326 } 1327 res_attr->attr.name = res_attr_name; 1328 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1329 res_attr->size = pci_resource_len(pdev, num); 1330 res_attr->private = (void *)(unsigned long)num; 1331 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1332 if (retval) 1333 kfree(res_attr); 1334 1335 return retval; 1336 } 1337 1338 /** 1339 * pci_create_resource_files - create resource files in sysfs for @dev 1340 * @pdev: dev in question 1341 * 1342 * Walk the resources in @pdev creating files for each resource available. 1343 */ 1344 static int pci_create_resource_files(struct pci_dev *pdev) 1345 { 1346 int i; 1347 int retval; 1348 1349 /* Expose the PCI resources from this device as files */ 1350 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1351 1352 /* skip empty resources */ 1353 if (!pci_resource_len(pdev, i)) 1354 continue; 1355 1356 retval = pci_create_attr(pdev, i, 0); 1357 /* for prefetchable resources, create a WC mappable file */ 1358 if (!retval && arch_can_pci_mmap_wc() && 1359 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1360 retval = pci_create_attr(pdev, i, 1); 1361 if (retval) { 1362 pci_remove_resource_files(pdev); 1363 return retval; 1364 } 1365 } 1366 return 0; 1367 } 1368 #else /* !HAVE_PCI_MMAP */ 1369 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1370 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1371 #endif /* HAVE_PCI_MMAP */ 1372 1373 /** 1374 * pci_write_rom - used to enable access to the PCI ROM display 1375 * @filp: sysfs file 1376 * @kobj: kernel object handle 1377 * @bin_attr: struct bin_attribute for this file 1378 * @buf: user input 1379 * @off: file offset 1380 * @count: number of byte in input 1381 * 1382 * writing anything except 0 enables it 1383 */ 1384 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1385 struct bin_attribute *bin_attr, char *buf, 1386 loff_t off, size_t count) 1387 { 1388 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1389 1390 if ((off == 0) && (*buf == '0') && (count == 2)) 1391 pdev->rom_attr_enabled = 0; 1392 else 1393 pdev->rom_attr_enabled = 1; 1394 1395 return count; 1396 } 1397 1398 /** 1399 * pci_read_rom - read a PCI ROM 1400 * @filp: sysfs file 1401 * @kobj: kernel object handle 1402 * @bin_attr: struct bin_attribute for this file 1403 * @buf: where to put the data we read from the ROM 1404 * @off: file offset 1405 * @count: number of bytes to read 1406 * 1407 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1408 * device corresponding to @kobj. 1409 */ 1410 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1411 struct bin_attribute *bin_attr, char *buf, 1412 loff_t off, size_t count) 1413 { 1414 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1415 void __iomem *rom; 1416 size_t size; 1417 1418 if (!pdev->rom_attr_enabled) 1419 return -EINVAL; 1420 1421 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1422 if (!rom || !size) 1423 return -EIO; 1424 1425 if (off >= size) 1426 count = 0; 1427 else { 1428 if (off + count > size) 1429 count = size - off; 1430 1431 memcpy_fromio(buf, rom + off, count); 1432 } 1433 pci_unmap_rom(pdev, rom); 1434 1435 return count; 1436 } 1437 1438 static const struct bin_attribute pci_config_attr = { 1439 .attr = { 1440 .name = "config", 1441 .mode = S_IRUGO | S_IWUSR, 1442 }, 1443 .size = PCI_CFG_SPACE_SIZE, 1444 .read = pci_read_config, 1445 .write = pci_write_config, 1446 }; 1447 1448 static const struct bin_attribute pcie_config_attr = { 1449 .attr = { 1450 .name = "config", 1451 .mode = S_IRUGO | S_IWUSR, 1452 }, 1453 .size = PCI_CFG_SPACE_EXP_SIZE, 1454 .read = pci_read_config, 1455 .write = pci_write_config, 1456 }; 1457 1458 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1459 const char *buf, size_t count) 1460 { 1461 struct pci_dev *pdev = to_pci_dev(dev); 1462 unsigned long val; 1463 ssize_t result = kstrtoul(buf, 0, &val); 1464 1465 if (result < 0) 1466 return result; 1467 1468 if (val != 1) 1469 return -EINVAL; 1470 1471 result = pci_reset_function(pdev); 1472 if (result < 0) 1473 return result; 1474 1475 return count; 1476 } 1477 1478 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1479 1480 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1481 { 1482 int retval; 1483 struct bin_attribute *attr; 1484 1485 /* If the device has VPD, try to expose it in sysfs. */ 1486 if (dev->vpd) { 1487 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1488 if (!attr) 1489 return -ENOMEM; 1490 1491 sysfs_bin_attr_init(attr); 1492 attr->size = 0; 1493 attr->attr.name = "vpd"; 1494 attr->attr.mode = S_IRUSR | S_IWUSR; 1495 attr->read = read_vpd_attr; 1496 attr->write = write_vpd_attr; 1497 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1498 if (retval) { 1499 kfree(attr); 1500 return retval; 1501 } 1502 dev->vpd->attr = attr; 1503 } 1504 1505 /* Active State Power Management */ 1506 pcie_aspm_create_sysfs_dev_files(dev); 1507 1508 if (!pci_probe_reset_function(dev)) { 1509 retval = device_create_file(&dev->dev, &reset_attr); 1510 if (retval) 1511 goto error; 1512 dev->reset_fn = 1; 1513 } 1514 return 0; 1515 1516 error: 1517 pcie_aspm_remove_sysfs_dev_files(dev); 1518 if (dev->vpd && dev->vpd->attr) { 1519 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1520 kfree(dev->vpd->attr); 1521 } 1522 1523 return retval; 1524 } 1525 1526 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1527 { 1528 int retval; 1529 int rom_size; 1530 struct bin_attribute *attr; 1531 1532 if (!sysfs_initialized) 1533 return -EACCES; 1534 1535 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1536 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1537 else 1538 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1539 if (retval) 1540 goto err; 1541 1542 retval = pci_create_resource_files(pdev); 1543 if (retval) 1544 goto err_config_file; 1545 1546 /* If the device has a ROM, try to expose it in sysfs. */ 1547 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1548 if (rom_size) { 1549 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1550 if (!attr) { 1551 retval = -ENOMEM; 1552 goto err_resource_files; 1553 } 1554 sysfs_bin_attr_init(attr); 1555 attr->size = rom_size; 1556 attr->attr.name = "rom"; 1557 attr->attr.mode = S_IRUSR | S_IWUSR; 1558 attr->read = pci_read_rom; 1559 attr->write = pci_write_rom; 1560 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1561 if (retval) { 1562 kfree(attr); 1563 goto err_resource_files; 1564 } 1565 pdev->rom_attr = attr; 1566 } 1567 1568 /* add sysfs entries for various capabilities */ 1569 retval = pci_create_capabilities_sysfs(pdev); 1570 if (retval) 1571 goto err_rom_file; 1572 1573 pci_create_firmware_label_files(pdev); 1574 1575 return 0; 1576 1577 err_rom_file: 1578 if (pdev->rom_attr) { 1579 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1580 kfree(pdev->rom_attr); 1581 pdev->rom_attr = NULL; 1582 } 1583 err_resource_files: 1584 pci_remove_resource_files(pdev); 1585 err_config_file: 1586 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1587 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1588 else 1589 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1590 err: 1591 return retval; 1592 } 1593 1594 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1595 { 1596 if (dev->vpd && dev->vpd->attr) { 1597 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1598 kfree(dev->vpd->attr); 1599 } 1600 1601 pcie_aspm_remove_sysfs_dev_files(dev); 1602 if (dev->reset_fn) { 1603 device_remove_file(&dev->dev, &reset_attr); 1604 dev->reset_fn = 0; 1605 } 1606 } 1607 1608 /** 1609 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1610 * @pdev: device whose entries we should free 1611 * 1612 * Cleanup when @pdev is removed from sysfs. 1613 */ 1614 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1615 { 1616 if (!sysfs_initialized) 1617 return; 1618 1619 pci_remove_capabilities_sysfs(pdev); 1620 1621 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1622 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1623 else 1624 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1625 1626 pci_remove_resource_files(pdev); 1627 1628 if (pdev->rom_attr) { 1629 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1630 kfree(pdev->rom_attr); 1631 pdev->rom_attr = NULL; 1632 } 1633 1634 pci_remove_firmware_label_files(pdev); 1635 } 1636 1637 static int __init pci_sysfs_init(void) 1638 { 1639 struct pci_dev *pdev = NULL; 1640 int retval; 1641 1642 sysfs_initialized = 1; 1643 for_each_pci_dev(pdev) { 1644 retval = pci_create_sysfs_dev_files(pdev); 1645 if (retval) { 1646 pci_dev_put(pdev); 1647 return retval; 1648 } 1649 } 1650 1651 return 0; 1652 } 1653 late_initcall(pci_sysfs_init); 1654 1655 static struct attribute *pci_dev_dev_attrs[] = { 1656 &vga_attr.attr, 1657 NULL, 1658 }; 1659 1660 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1661 struct attribute *a, int n) 1662 { 1663 struct device *dev = kobj_to_dev(kobj); 1664 struct pci_dev *pdev = to_pci_dev(dev); 1665 1666 if (a == &vga_attr.attr) 1667 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1668 return 0; 1669 1670 return a->mode; 1671 } 1672 1673 static struct attribute *pci_dev_hp_attrs[] = { 1674 &dev_remove_attr.attr, 1675 &dev_rescan_attr.attr, 1676 NULL, 1677 }; 1678 1679 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1680 struct attribute *a, int n) 1681 { 1682 struct device *dev = kobj_to_dev(kobj); 1683 struct pci_dev *pdev = to_pci_dev(dev); 1684 1685 if (pdev->is_virtfn) 1686 return 0; 1687 1688 return a->mode; 1689 } 1690 1691 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1692 struct attribute *a, int n) 1693 { 1694 struct device *dev = kobj_to_dev(kobj); 1695 struct pci_dev *pdev = to_pci_dev(dev); 1696 1697 if (pci_is_bridge(pdev)) 1698 return a->mode; 1699 1700 return 0; 1701 } 1702 1703 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1704 struct attribute *a, int n) 1705 { 1706 struct device *dev = kobj_to_dev(kobj); 1707 struct pci_dev *pdev = to_pci_dev(dev); 1708 1709 if (pci_is_pcie(pdev)) 1710 return a->mode; 1711 1712 return 0; 1713 } 1714 1715 static const struct attribute_group pci_dev_group = { 1716 .attrs = pci_dev_attrs, 1717 }; 1718 1719 const struct attribute_group *pci_dev_groups[] = { 1720 &pci_dev_group, 1721 NULL, 1722 }; 1723 1724 static const struct attribute_group pci_bridge_group = { 1725 .attrs = pci_bridge_attrs, 1726 }; 1727 1728 const struct attribute_group *pci_bridge_groups[] = { 1729 &pci_bridge_group, 1730 NULL, 1731 }; 1732 1733 static const struct attribute_group pcie_dev_group = { 1734 .attrs = pcie_dev_attrs, 1735 }; 1736 1737 const struct attribute_group *pcie_dev_groups[] = { 1738 &pcie_dev_group, 1739 NULL, 1740 }; 1741 1742 static const struct attribute_group pci_dev_hp_attr_group = { 1743 .attrs = pci_dev_hp_attrs, 1744 .is_visible = pci_dev_hp_attrs_are_visible, 1745 }; 1746 1747 #ifdef CONFIG_PCI_IOV 1748 static struct attribute *sriov_dev_attrs[] = { 1749 &sriov_totalvfs_attr.attr, 1750 &sriov_numvfs_attr.attr, 1751 &sriov_drivers_autoprobe_attr.attr, 1752 NULL, 1753 }; 1754 1755 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1756 struct attribute *a, int n) 1757 { 1758 struct device *dev = kobj_to_dev(kobj); 1759 1760 if (!dev_is_pf(dev)) 1761 return 0; 1762 1763 return a->mode; 1764 } 1765 1766 static const struct attribute_group sriov_dev_attr_group = { 1767 .attrs = sriov_dev_attrs, 1768 .is_visible = sriov_attrs_are_visible, 1769 }; 1770 #endif /* CONFIG_PCI_IOV */ 1771 1772 static const struct attribute_group pci_dev_attr_group = { 1773 .attrs = pci_dev_dev_attrs, 1774 .is_visible = pci_dev_attrs_are_visible, 1775 }; 1776 1777 static const struct attribute_group pci_bridge_attr_group = { 1778 .attrs = pci_bridge_attrs, 1779 .is_visible = pci_bridge_attrs_are_visible, 1780 }; 1781 1782 static const struct attribute_group pcie_dev_attr_group = { 1783 .attrs = pcie_dev_attrs, 1784 .is_visible = pcie_dev_attrs_are_visible, 1785 }; 1786 1787 static const struct attribute_group *pci_dev_attr_groups[] = { 1788 &pci_dev_attr_group, 1789 &pci_dev_hp_attr_group, 1790 #ifdef CONFIG_PCI_IOV 1791 &sriov_dev_attr_group, 1792 #endif 1793 &pci_bridge_attr_group, 1794 &pcie_dev_attr_group, 1795 NULL, 1796 }; 1797 1798 struct device_type pci_dev_type = { 1799 .groups = pci_dev_attr_groups, 1800 }; 1801