1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } 46 47 pci_config_attr(vendor, "0x%04x\n"); 48 pci_config_attr(device, "0x%04x\n"); 49 pci_config_attr(subsystem_vendor, "0x%04x\n"); 50 pci_config_attr(subsystem_device, "0x%04x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf (buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (kstrtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 77 static ssize_t local_cpus_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 const struct cpumask *mask; 81 int len; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 90 buf[len++] = '\n'; 91 buf[len] = '\0'; 92 return len; 93 } 94 95 96 static ssize_t local_cpulist_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 const struct cpumask *mask; 100 int len; 101 102 #ifdef CONFIG_NUMA 103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 104 cpumask_of_node(dev_to_node(dev)); 105 #else 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 107 #endif 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 109 buf[len++] = '\n'; 110 buf[len] = '\0'; 111 return len; 112 } 113 114 /* 115 * PCI Bus Class Devices 116 */ 117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 118 int type, 119 struct device_attribute *attr, 120 char *buf) 121 { 122 int ret; 123 const struct cpumask *cpumask; 124 125 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 ret = type ? 127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 129 buf[ret++] = '\n'; 130 buf[ret] = '\0'; 131 return ret; 132 } 133 134 static ssize_t cpuaffinity_show(struct device *dev, 135 struct device_attribute *attr, char *buf) 136 { 137 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 138 } 139 static DEVICE_ATTR_RO(cpuaffinity); 140 141 static ssize_t cpulistaffinity_show(struct device *dev, 142 struct device_attribute *attr, char *buf) 143 { 144 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 145 } 146 static DEVICE_ATTR_RO(cpulistaffinity); 147 148 /* show resources */ 149 static ssize_t 150 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 151 { 152 struct pci_dev * pci_dev = to_pci_dev(dev); 153 char * str = buf; 154 int i; 155 int max; 156 resource_size_t start, end; 157 158 if (pci_dev->subordinate) 159 max = DEVICE_COUNT_RESOURCE; 160 else 161 max = PCI_BRIDGE_RESOURCES; 162 163 for (i = 0; i < max; i++) { 164 struct resource *res = &pci_dev->resource[i]; 165 pci_resource_to_user(pci_dev, i, res, &start, &end); 166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 167 (unsigned long long)start, 168 (unsigned long long)end, 169 (unsigned long long)res->flags); 170 } 171 return (str - buf); 172 } 173 174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 179 pci_dev->vendor, pci_dev->device, 180 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 182 (u8)(pci_dev->class)); 183 } 184 185 static ssize_t is_enabled_store(struct device *dev, 186 struct device_attribute *attr, const char *buf, 187 size_t count) 188 { 189 struct pci_dev *pdev = to_pci_dev(dev); 190 unsigned long val; 191 ssize_t result = kstrtoul(buf, 0, &val); 192 193 if (result < 0) 194 return result; 195 196 /* this can crash the machine when done on the "wrong" device */ 197 if (!capable(CAP_SYS_ADMIN)) 198 return -EPERM; 199 200 if (!val) { 201 if (pci_is_enabled(pdev)) 202 pci_disable_device(pdev); 203 else 204 result = -EIO; 205 } else 206 result = pci_enable_device(pdev); 207 208 return result < 0 ? result : count; 209 } 210 211 static ssize_t is_enabled_show(struct device *dev, 212 struct device_attribute *attr, char *buf) 213 { 214 struct pci_dev *pdev; 215 216 pdev = to_pci_dev (dev); 217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 218 } 219 220 #ifdef CONFIG_NUMA 221 static ssize_t 222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 223 { 224 return sprintf (buf, "%d\n", dev->numa_node); 225 } 226 #endif 227 228 static ssize_t 229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 230 { 231 struct pci_dev *pdev = to_pci_dev(dev); 232 233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 234 } 235 236 static ssize_t 237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 238 char *buf) 239 { 240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 241 } 242 243 static ssize_t 244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 245 { 246 struct pci_dev *pdev = to_pci_dev(dev); 247 248 if (!pdev->subordinate) 249 return 0; 250 251 return sprintf (buf, "%u\n", 252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 253 } 254 255 static ssize_t 256 msi_bus_store(struct device *dev, struct device_attribute *attr, 257 const char *buf, size_t count) 258 { 259 struct pci_dev *pdev = to_pci_dev(dev); 260 unsigned long val; 261 262 if (kstrtoul(buf, 0, &val) < 0) 263 return -EINVAL; 264 265 /* bad things may happen if the no_msi flag is changed 266 * while some drivers are loaded */ 267 if (!capable(CAP_SYS_ADMIN)) 268 return -EPERM; 269 270 /* Maybe pci devices without subordinate busses shouldn't even have this 271 * attribute in the first place? */ 272 if (!pdev->subordinate) 273 return count; 274 275 /* Is the flag going to change, or keep the value it already had? */ 276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 277 !!val) { 278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 279 280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 281 " bad things could happen\n", val ? "" : " not"); 282 } 283 284 return count; 285 } 286 287 static DEFINE_MUTEX(pci_remove_rescan_mutex); 288 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 289 size_t count) 290 { 291 unsigned long val; 292 struct pci_bus *b = NULL; 293 294 if (kstrtoul(buf, 0, &val) < 0) 295 return -EINVAL; 296 297 if (val) { 298 mutex_lock(&pci_remove_rescan_mutex); 299 while ((b = pci_find_next_bus(b)) != NULL) 300 pci_rescan_bus(b); 301 mutex_unlock(&pci_remove_rescan_mutex); 302 } 303 return count; 304 } 305 static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); 306 307 struct attribute *pci_bus_attrs[] = { 308 &bus_attr_rescan.attr, 309 NULL, 310 }; 311 312 static const struct attribute_group pci_bus_group = { 313 .attrs = pci_bus_attrs, 314 }; 315 316 const struct attribute_group *pci_bus_groups[] = { 317 &pci_bus_group, 318 NULL, 319 }; 320 321 static ssize_t 322 dev_rescan_store(struct device *dev, struct device_attribute *attr, 323 const char *buf, size_t count) 324 { 325 unsigned long val; 326 struct pci_dev *pdev = to_pci_dev(dev); 327 328 if (kstrtoul(buf, 0, &val) < 0) 329 return -EINVAL; 330 331 if (val) { 332 mutex_lock(&pci_remove_rescan_mutex); 333 pci_rescan_bus(pdev->bus); 334 mutex_unlock(&pci_remove_rescan_mutex); 335 } 336 return count; 337 } 338 struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP), 339 NULL, dev_rescan_store); 340 341 static void remove_callback(struct device *dev) 342 { 343 struct pci_dev *pdev = to_pci_dev(dev); 344 345 mutex_lock(&pci_remove_rescan_mutex); 346 pci_stop_and_remove_bus_device(pdev); 347 mutex_unlock(&pci_remove_rescan_mutex); 348 } 349 350 static ssize_t 351 remove_store(struct device *dev, struct device_attribute *dummy, 352 const char *buf, size_t count) 353 { 354 int ret = 0; 355 unsigned long val; 356 357 if (kstrtoul(buf, 0, &val) < 0) 358 return -EINVAL; 359 360 /* An attribute cannot be unregistered by one of its own methods, 361 * so we have to use this roundabout approach. 362 */ 363 if (val) 364 ret = device_schedule_callback(dev, remove_callback); 365 if (ret) 366 count = ret; 367 return count; 368 } 369 struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP), 370 NULL, remove_store); 371 372 static ssize_t 373 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 374 const char *buf, size_t count) 375 { 376 unsigned long val; 377 struct pci_bus *bus = to_pci_bus(dev); 378 379 if (kstrtoul(buf, 0, &val) < 0) 380 return -EINVAL; 381 382 if (val) { 383 mutex_lock(&pci_remove_rescan_mutex); 384 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 385 pci_rescan_bus_bridge_resize(bus->self); 386 else 387 pci_rescan_bus(bus); 388 mutex_unlock(&pci_remove_rescan_mutex); 389 } 390 return count; 391 } 392 static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); 393 394 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 395 static ssize_t d3cold_allowed_store(struct device *dev, 396 struct device_attribute *attr, 397 const char *buf, size_t count) 398 { 399 struct pci_dev *pdev = to_pci_dev(dev); 400 unsigned long val; 401 402 if (kstrtoul(buf, 0, &val) < 0) 403 return -EINVAL; 404 405 pdev->d3cold_allowed = !!val; 406 pm_runtime_resume(dev); 407 408 return count; 409 } 410 411 static ssize_t d3cold_allowed_show(struct device *dev, 412 struct device_attribute *attr, char *buf) 413 { 414 struct pci_dev *pdev = to_pci_dev(dev); 415 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 416 } 417 #endif 418 419 #ifdef CONFIG_PCI_IOV 420 static ssize_t sriov_totalvfs_show(struct device *dev, 421 struct device_attribute *attr, 422 char *buf) 423 { 424 struct pci_dev *pdev = to_pci_dev(dev); 425 426 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 427 } 428 429 430 static ssize_t sriov_numvfs_show(struct device *dev, 431 struct device_attribute *attr, 432 char *buf) 433 { 434 struct pci_dev *pdev = to_pci_dev(dev); 435 436 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 437 } 438 439 /* 440 * num_vfs > 0; number of VFs to enable 441 * num_vfs = 0; disable all VFs 442 * 443 * Note: SRIOV spec doesn't allow partial VF 444 * disable, so it's all or none. 445 */ 446 static ssize_t sriov_numvfs_store(struct device *dev, 447 struct device_attribute *attr, 448 const char *buf, size_t count) 449 { 450 struct pci_dev *pdev = to_pci_dev(dev); 451 int ret; 452 u16 num_vfs; 453 454 ret = kstrtou16(buf, 0, &num_vfs); 455 if (ret < 0) 456 return ret; 457 458 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 459 return -ERANGE; 460 461 if (num_vfs == pdev->sriov->num_VFs) 462 return count; /* no change */ 463 464 /* is PF driver loaded w/callback */ 465 if (!pdev->driver || !pdev->driver->sriov_configure) { 466 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); 467 return -ENOSYS; 468 } 469 470 if (num_vfs == 0) { 471 /* disable VFs */ 472 ret = pdev->driver->sriov_configure(pdev, 0); 473 if (ret < 0) 474 return ret; 475 return count; 476 } 477 478 /* enable VFs */ 479 if (pdev->sriov->num_VFs) { 480 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", 481 pdev->sriov->num_VFs, num_vfs); 482 return -EBUSY; 483 } 484 485 ret = pdev->driver->sriov_configure(pdev, num_vfs); 486 if (ret < 0) 487 return ret; 488 489 if (ret != num_vfs) 490 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", 491 num_vfs, ret); 492 493 return count; 494 } 495 496 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 497 static struct device_attribute sriov_numvfs_attr = 498 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 499 sriov_numvfs_show, sriov_numvfs_store); 500 #endif /* CONFIG_PCI_IOV */ 501 502 struct device_attribute pci_dev_attrs[] = { 503 __ATTR_RO(resource), 504 __ATTR_RO(vendor), 505 __ATTR_RO(device), 506 __ATTR_RO(subsystem_vendor), 507 __ATTR_RO(subsystem_device), 508 __ATTR_RO(class), 509 __ATTR_RO(irq), 510 __ATTR_RO(local_cpus), 511 __ATTR_RO(local_cpulist), 512 __ATTR_RO(modalias), 513 #ifdef CONFIG_NUMA 514 __ATTR_RO(numa_node), 515 #endif 516 __ATTR_RO(dma_mask_bits), 517 __ATTR_RO(consistent_dma_mask_bits), 518 __ATTR(enable, 0600, is_enabled_show, is_enabled_store), 519 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 520 broken_parity_status_show,broken_parity_status_store), 521 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 522 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 523 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 524 #endif 525 __ATTR_NULL, 526 }; 527 528 static struct attribute *pcibus_attrs[] = { 529 &dev_attr_rescan.attr, 530 &dev_attr_cpuaffinity.attr, 531 &dev_attr_cpulistaffinity.attr, 532 NULL, 533 }; 534 535 static const struct attribute_group pcibus_group = { 536 .attrs = pcibus_attrs, 537 }; 538 539 const struct attribute_group *pcibus_groups[] = { 540 &pcibus_group, 541 NULL, 542 }; 543 544 static ssize_t 545 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 546 { 547 struct pci_dev *pdev = to_pci_dev(dev); 548 struct pci_dev *vga_dev = vga_default_device(); 549 550 if (vga_dev) 551 return sprintf(buf, "%u\n", (pdev == vga_dev)); 552 553 return sprintf(buf, "%u\n", 554 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 555 IORESOURCE_ROM_SHADOW)); 556 } 557 struct device_attribute vga_attr = __ATTR_RO(boot_vga); 558 559 static ssize_t 560 pci_read_config(struct file *filp, struct kobject *kobj, 561 struct bin_attribute *bin_attr, 562 char *buf, loff_t off, size_t count) 563 { 564 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 565 unsigned int size = 64; 566 loff_t init_off = off; 567 u8 *data = (u8*) buf; 568 569 /* Several chips lock up trying to read undefined config space */ 570 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 571 size = dev->cfg_size; 572 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 573 size = 128; 574 } 575 576 if (off > size) 577 return 0; 578 if (off + count > size) { 579 size -= off; 580 count = size; 581 } else { 582 size = count; 583 } 584 585 pci_config_pm_runtime_get(dev); 586 587 if ((off & 1) && size) { 588 u8 val; 589 pci_user_read_config_byte(dev, off, &val); 590 data[off - init_off] = val; 591 off++; 592 size--; 593 } 594 595 if ((off & 3) && size > 2) { 596 u16 val; 597 pci_user_read_config_word(dev, off, &val); 598 data[off - init_off] = val & 0xff; 599 data[off - init_off + 1] = (val >> 8) & 0xff; 600 off += 2; 601 size -= 2; 602 } 603 604 while (size > 3) { 605 u32 val; 606 pci_user_read_config_dword(dev, off, &val); 607 data[off - init_off] = val & 0xff; 608 data[off - init_off + 1] = (val >> 8) & 0xff; 609 data[off - init_off + 2] = (val >> 16) & 0xff; 610 data[off - init_off + 3] = (val >> 24) & 0xff; 611 off += 4; 612 size -= 4; 613 } 614 615 if (size >= 2) { 616 u16 val; 617 pci_user_read_config_word(dev, off, &val); 618 data[off - init_off] = val & 0xff; 619 data[off - init_off + 1] = (val >> 8) & 0xff; 620 off += 2; 621 size -= 2; 622 } 623 624 if (size > 0) { 625 u8 val; 626 pci_user_read_config_byte(dev, off, &val); 627 data[off - init_off] = val; 628 off++; 629 --size; 630 } 631 632 pci_config_pm_runtime_put(dev); 633 634 return count; 635 } 636 637 static ssize_t 638 pci_write_config(struct file* filp, struct kobject *kobj, 639 struct bin_attribute *bin_attr, 640 char *buf, loff_t off, size_t count) 641 { 642 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 643 unsigned int size = count; 644 loff_t init_off = off; 645 u8 *data = (u8*) buf; 646 647 if (off > dev->cfg_size) 648 return 0; 649 if (off + count > dev->cfg_size) { 650 size = dev->cfg_size - off; 651 count = size; 652 } 653 654 pci_config_pm_runtime_get(dev); 655 656 if ((off & 1) && size) { 657 pci_user_write_config_byte(dev, off, data[off - init_off]); 658 off++; 659 size--; 660 } 661 662 if ((off & 3) && size > 2) { 663 u16 val = data[off - init_off]; 664 val |= (u16) data[off - init_off + 1] << 8; 665 pci_user_write_config_word(dev, off, val); 666 off += 2; 667 size -= 2; 668 } 669 670 while (size > 3) { 671 u32 val = data[off - init_off]; 672 val |= (u32) data[off - init_off + 1] << 8; 673 val |= (u32) data[off - init_off + 2] << 16; 674 val |= (u32) data[off - init_off + 3] << 24; 675 pci_user_write_config_dword(dev, off, val); 676 off += 4; 677 size -= 4; 678 } 679 680 if (size >= 2) { 681 u16 val = data[off - init_off]; 682 val |= (u16) data[off - init_off + 1] << 8; 683 pci_user_write_config_word(dev, off, val); 684 off += 2; 685 size -= 2; 686 } 687 688 if (size) { 689 pci_user_write_config_byte(dev, off, data[off - init_off]); 690 off++; 691 --size; 692 } 693 694 pci_config_pm_runtime_put(dev); 695 696 return count; 697 } 698 699 static ssize_t 700 read_vpd_attr(struct file *filp, struct kobject *kobj, 701 struct bin_attribute *bin_attr, 702 char *buf, loff_t off, size_t count) 703 { 704 struct pci_dev *dev = 705 to_pci_dev(container_of(kobj, struct device, kobj)); 706 707 if (off > bin_attr->size) 708 count = 0; 709 else if (count > bin_attr->size - off) 710 count = bin_attr->size - off; 711 712 return pci_read_vpd(dev, off, count, buf); 713 } 714 715 static ssize_t 716 write_vpd_attr(struct file *filp, struct kobject *kobj, 717 struct bin_attribute *bin_attr, 718 char *buf, loff_t off, size_t count) 719 { 720 struct pci_dev *dev = 721 to_pci_dev(container_of(kobj, struct device, kobj)); 722 723 if (off > bin_attr->size) 724 count = 0; 725 else if (count > bin_attr->size - off) 726 count = bin_attr->size - off; 727 728 return pci_write_vpd(dev, off, count, buf); 729 } 730 731 #ifdef HAVE_PCI_LEGACY 732 /** 733 * pci_read_legacy_io - read byte(s) from legacy I/O port space 734 * @filp: open sysfs file 735 * @kobj: kobject corresponding to file to read from 736 * @bin_attr: struct bin_attribute for this file 737 * @buf: buffer to store results 738 * @off: offset into legacy I/O port space 739 * @count: number of bytes to read 740 * 741 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 742 * callback routine (pci_legacy_read). 743 */ 744 static ssize_t 745 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 746 struct bin_attribute *bin_attr, 747 char *buf, loff_t off, size_t count) 748 { 749 struct pci_bus *bus = to_pci_bus(container_of(kobj, 750 struct device, 751 kobj)); 752 753 /* Only support 1, 2 or 4 byte accesses */ 754 if (count != 1 && count != 2 && count != 4) 755 return -EINVAL; 756 757 return pci_legacy_read(bus, off, (u32 *)buf, count); 758 } 759 760 /** 761 * pci_write_legacy_io - write byte(s) to legacy I/O port space 762 * @filp: open sysfs file 763 * @kobj: kobject corresponding to file to read from 764 * @bin_attr: struct bin_attribute for this file 765 * @buf: buffer containing value to be written 766 * @off: offset into legacy I/O port space 767 * @count: number of bytes to write 768 * 769 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 770 * callback routine (pci_legacy_write). 771 */ 772 static ssize_t 773 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 774 struct bin_attribute *bin_attr, 775 char *buf, loff_t off, size_t count) 776 { 777 struct pci_bus *bus = to_pci_bus(container_of(kobj, 778 struct device, 779 kobj)); 780 /* Only support 1, 2 or 4 byte accesses */ 781 if (count != 1 && count != 2 && count != 4) 782 return -EINVAL; 783 784 return pci_legacy_write(bus, off, *(u32 *)buf, count); 785 } 786 787 /** 788 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 789 * @filp: open sysfs file 790 * @kobj: kobject corresponding to device to be mapped 791 * @attr: struct bin_attribute for this file 792 * @vma: struct vm_area_struct passed to mmap 793 * 794 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 795 * legacy memory space (first meg of bus space) into application virtual 796 * memory space. 797 */ 798 static int 799 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 800 struct bin_attribute *attr, 801 struct vm_area_struct *vma) 802 { 803 struct pci_bus *bus = to_pci_bus(container_of(kobj, 804 struct device, 805 kobj)); 806 807 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 808 } 809 810 /** 811 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 812 * @filp: open sysfs file 813 * @kobj: kobject corresponding to device to be mapped 814 * @attr: struct bin_attribute for this file 815 * @vma: struct vm_area_struct passed to mmap 816 * 817 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 818 * legacy IO space (first meg of bus space) into application virtual 819 * memory space. Returns -ENOSYS if the operation isn't supported 820 */ 821 static int 822 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 823 struct bin_attribute *attr, 824 struct vm_area_struct *vma) 825 { 826 struct pci_bus *bus = to_pci_bus(container_of(kobj, 827 struct device, 828 kobj)); 829 830 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 831 } 832 833 /** 834 * pci_adjust_legacy_attr - adjustment of legacy file attributes 835 * @b: bus to create files under 836 * @mmap_type: I/O port or memory 837 * 838 * Stub implementation. Can be overridden by arch if necessary. 839 */ 840 void __weak 841 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 842 { 843 return; 844 } 845 846 /** 847 * pci_create_legacy_files - create legacy I/O port and memory files 848 * @b: bus to create files under 849 * 850 * Some platforms allow access to legacy I/O port and ISA memory space on 851 * a per-bus basis. This routine creates the files and ties them into 852 * their associated read, write and mmap files from pci-sysfs.c 853 * 854 * On error unwind, but don't propagate the error to the caller 855 * as it is ok to set up the PCI bus without these files. 856 */ 857 void pci_create_legacy_files(struct pci_bus *b) 858 { 859 int error; 860 861 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 862 GFP_ATOMIC); 863 if (!b->legacy_io) 864 goto kzalloc_err; 865 866 sysfs_bin_attr_init(b->legacy_io); 867 b->legacy_io->attr.name = "legacy_io"; 868 b->legacy_io->size = 0xffff; 869 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 870 b->legacy_io->read = pci_read_legacy_io; 871 b->legacy_io->write = pci_write_legacy_io; 872 b->legacy_io->mmap = pci_mmap_legacy_io; 873 pci_adjust_legacy_attr(b, pci_mmap_io); 874 error = device_create_bin_file(&b->dev, b->legacy_io); 875 if (error) 876 goto legacy_io_err; 877 878 /* Allocated above after the legacy_io struct */ 879 b->legacy_mem = b->legacy_io + 1; 880 sysfs_bin_attr_init(b->legacy_mem); 881 b->legacy_mem->attr.name = "legacy_mem"; 882 b->legacy_mem->size = 1024*1024; 883 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 884 b->legacy_mem->mmap = pci_mmap_legacy_mem; 885 pci_adjust_legacy_attr(b, pci_mmap_mem); 886 error = device_create_bin_file(&b->dev, b->legacy_mem); 887 if (error) 888 goto legacy_mem_err; 889 890 return; 891 892 legacy_mem_err: 893 device_remove_bin_file(&b->dev, b->legacy_io); 894 legacy_io_err: 895 kfree(b->legacy_io); 896 b->legacy_io = NULL; 897 kzalloc_err: 898 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 899 "and ISA memory resources to sysfs\n"); 900 return; 901 } 902 903 void pci_remove_legacy_files(struct pci_bus *b) 904 { 905 if (b->legacy_io) { 906 device_remove_bin_file(&b->dev, b->legacy_io); 907 device_remove_bin_file(&b->dev, b->legacy_mem); 908 kfree(b->legacy_io); /* both are allocated here */ 909 } 910 } 911 #endif /* HAVE_PCI_LEGACY */ 912 913 #ifdef HAVE_PCI_MMAP 914 915 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 916 enum pci_mmap_api mmap_api) 917 { 918 unsigned long nr, start, size, pci_start; 919 920 if (pci_resource_len(pdev, resno) == 0) 921 return 0; 922 nr = vma_pages(vma); 923 start = vma->vm_pgoff; 924 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 925 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 926 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 927 if (start >= pci_start && start < pci_start + size && 928 start + nr <= pci_start + size) 929 return 1; 930 return 0; 931 } 932 933 /** 934 * pci_mmap_resource - map a PCI resource into user memory space 935 * @kobj: kobject for mapping 936 * @attr: struct bin_attribute for the file being mapped 937 * @vma: struct vm_area_struct passed into the mmap 938 * @write_combine: 1 for write_combine mapping 939 * 940 * Use the regular PCI mapping routines to map a PCI resource into userspace. 941 */ 942 static int 943 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 944 struct vm_area_struct *vma, int write_combine) 945 { 946 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 947 struct device, kobj)); 948 struct resource *res = attr->private; 949 enum pci_mmap_state mmap_type; 950 resource_size_t start, end; 951 int i; 952 953 for (i = 0; i < PCI_ROM_RESOURCE; i++) 954 if (res == &pdev->resource[i]) 955 break; 956 if (i >= PCI_ROM_RESOURCE) 957 return -ENODEV; 958 959 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 960 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 961 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 962 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 963 pci_name(pdev), i, 964 (u64)pci_resource_start(pdev, i), 965 (u64)pci_resource_len(pdev, i)); 966 return -EINVAL; 967 } 968 969 /* pci_mmap_page_range() expects the same kind of entry as coming 970 * from /proc/bus/pci/ which is a "user visible" value. If this is 971 * different from the resource itself, arch will do necessary fixup. 972 */ 973 pci_resource_to_user(pdev, i, res, &start, &end); 974 vma->vm_pgoff += start >> PAGE_SHIFT; 975 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 976 977 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 978 return -EINVAL; 979 980 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 981 } 982 983 static int 984 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 985 struct bin_attribute *attr, 986 struct vm_area_struct *vma) 987 { 988 return pci_mmap_resource(kobj, attr, vma, 0); 989 } 990 991 static int 992 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 993 struct bin_attribute *attr, 994 struct vm_area_struct *vma) 995 { 996 return pci_mmap_resource(kobj, attr, vma, 1); 997 } 998 999 static ssize_t 1000 pci_resource_io(struct file *filp, struct kobject *kobj, 1001 struct bin_attribute *attr, char *buf, 1002 loff_t off, size_t count, bool write) 1003 { 1004 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 1005 struct device, kobj)); 1006 struct resource *res = attr->private; 1007 unsigned long port = off; 1008 int i; 1009 1010 for (i = 0; i < PCI_ROM_RESOURCE; i++) 1011 if (res == &pdev->resource[i]) 1012 break; 1013 if (i >= PCI_ROM_RESOURCE) 1014 return -ENODEV; 1015 1016 port += pci_resource_start(pdev, i); 1017 1018 if (port > pci_resource_end(pdev, i)) 1019 return 0; 1020 1021 if (port + count - 1 > pci_resource_end(pdev, i)) 1022 return -EINVAL; 1023 1024 switch (count) { 1025 case 1: 1026 if (write) 1027 outb(*(u8 *)buf, port); 1028 else 1029 *(u8 *)buf = inb(port); 1030 return 1; 1031 case 2: 1032 if (write) 1033 outw(*(u16 *)buf, port); 1034 else 1035 *(u16 *)buf = inw(port); 1036 return 2; 1037 case 4: 1038 if (write) 1039 outl(*(u32 *)buf, port); 1040 else 1041 *(u32 *)buf = inl(port); 1042 return 4; 1043 } 1044 return -EINVAL; 1045 } 1046 1047 static ssize_t 1048 pci_read_resource_io(struct file *filp, struct kobject *kobj, 1049 struct bin_attribute *attr, char *buf, 1050 loff_t off, size_t count) 1051 { 1052 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1053 } 1054 1055 static ssize_t 1056 pci_write_resource_io(struct file *filp, struct kobject *kobj, 1057 struct bin_attribute *attr, char *buf, 1058 loff_t off, size_t count) 1059 { 1060 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1061 } 1062 1063 /** 1064 * pci_remove_resource_files - cleanup resource files 1065 * @pdev: dev to cleanup 1066 * 1067 * If we created resource files for @pdev, remove them from sysfs and 1068 * free their resources. 1069 */ 1070 static void 1071 pci_remove_resource_files(struct pci_dev *pdev) 1072 { 1073 int i; 1074 1075 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1076 struct bin_attribute *res_attr; 1077 1078 res_attr = pdev->res_attr[i]; 1079 if (res_attr) { 1080 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1081 kfree(res_attr); 1082 } 1083 1084 res_attr = pdev->res_attr_wc[i]; 1085 if (res_attr) { 1086 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1087 kfree(res_attr); 1088 } 1089 } 1090 } 1091 1092 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1093 { 1094 /* allocate attribute structure, piggyback attribute name */ 1095 int name_len = write_combine ? 13 : 10; 1096 struct bin_attribute *res_attr; 1097 int retval; 1098 1099 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1100 if (res_attr) { 1101 char *res_attr_name = (char *)(res_attr + 1); 1102 1103 sysfs_bin_attr_init(res_attr); 1104 if (write_combine) { 1105 pdev->res_attr_wc[num] = res_attr; 1106 sprintf(res_attr_name, "resource%d_wc", num); 1107 res_attr->mmap = pci_mmap_resource_wc; 1108 } else { 1109 pdev->res_attr[num] = res_attr; 1110 sprintf(res_attr_name, "resource%d", num); 1111 res_attr->mmap = pci_mmap_resource_uc; 1112 } 1113 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1114 res_attr->read = pci_read_resource_io; 1115 res_attr->write = pci_write_resource_io; 1116 } 1117 res_attr->attr.name = res_attr_name; 1118 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1119 res_attr->size = pci_resource_len(pdev, num); 1120 res_attr->private = &pdev->resource[num]; 1121 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1122 } else 1123 retval = -ENOMEM; 1124 1125 return retval; 1126 } 1127 1128 /** 1129 * pci_create_resource_files - create resource files in sysfs for @dev 1130 * @pdev: dev in question 1131 * 1132 * Walk the resources in @pdev creating files for each resource available. 1133 */ 1134 static int pci_create_resource_files(struct pci_dev *pdev) 1135 { 1136 int i; 1137 int retval; 1138 1139 /* Expose the PCI resources from this device as files */ 1140 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1141 1142 /* skip empty resources */ 1143 if (!pci_resource_len(pdev, i)) 1144 continue; 1145 1146 retval = pci_create_attr(pdev, i, 0); 1147 /* for prefetchable resources, create a WC mappable file */ 1148 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1149 retval = pci_create_attr(pdev, i, 1); 1150 1151 if (retval) { 1152 pci_remove_resource_files(pdev); 1153 return retval; 1154 } 1155 } 1156 return 0; 1157 } 1158 #else /* !HAVE_PCI_MMAP */ 1159 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1160 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1161 #endif /* HAVE_PCI_MMAP */ 1162 1163 /** 1164 * pci_write_rom - used to enable access to the PCI ROM display 1165 * @filp: sysfs file 1166 * @kobj: kernel object handle 1167 * @bin_attr: struct bin_attribute for this file 1168 * @buf: user input 1169 * @off: file offset 1170 * @count: number of byte in input 1171 * 1172 * writing anything except 0 enables it 1173 */ 1174 static ssize_t 1175 pci_write_rom(struct file *filp, struct kobject *kobj, 1176 struct bin_attribute *bin_attr, 1177 char *buf, loff_t off, size_t count) 1178 { 1179 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1180 1181 if ((off == 0) && (*buf == '0') && (count == 2)) 1182 pdev->rom_attr_enabled = 0; 1183 else 1184 pdev->rom_attr_enabled = 1; 1185 1186 return count; 1187 } 1188 1189 /** 1190 * pci_read_rom - read a PCI ROM 1191 * @filp: sysfs file 1192 * @kobj: kernel object handle 1193 * @bin_attr: struct bin_attribute for this file 1194 * @buf: where to put the data we read from the ROM 1195 * @off: file offset 1196 * @count: number of bytes to read 1197 * 1198 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1199 * device corresponding to @kobj. 1200 */ 1201 static ssize_t 1202 pci_read_rom(struct file *filp, struct kobject *kobj, 1203 struct bin_attribute *bin_attr, 1204 char *buf, loff_t off, size_t count) 1205 { 1206 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1207 void __iomem *rom; 1208 size_t size; 1209 1210 if (!pdev->rom_attr_enabled) 1211 return -EINVAL; 1212 1213 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1214 if (!rom || !size) 1215 return -EIO; 1216 1217 if (off >= size) 1218 count = 0; 1219 else { 1220 if (off + count > size) 1221 count = size - off; 1222 1223 memcpy_fromio(buf, rom + off, count); 1224 } 1225 pci_unmap_rom(pdev, rom); 1226 1227 return count; 1228 } 1229 1230 static struct bin_attribute pci_config_attr = { 1231 .attr = { 1232 .name = "config", 1233 .mode = S_IRUGO | S_IWUSR, 1234 }, 1235 .size = PCI_CFG_SPACE_SIZE, 1236 .read = pci_read_config, 1237 .write = pci_write_config, 1238 }; 1239 1240 static struct bin_attribute pcie_config_attr = { 1241 .attr = { 1242 .name = "config", 1243 .mode = S_IRUGO | S_IWUSR, 1244 }, 1245 .size = PCI_CFG_SPACE_EXP_SIZE, 1246 .read = pci_read_config, 1247 .write = pci_write_config, 1248 }; 1249 1250 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1251 { 1252 return 0; 1253 } 1254 1255 static ssize_t reset_store(struct device *dev, 1256 struct device_attribute *attr, const char *buf, 1257 size_t count) 1258 { 1259 struct pci_dev *pdev = to_pci_dev(dev); 1260 unsigned long val; 1261 ssize_t result = kstrtoul(buf, 0, &val); 1262 1263 if (result < 0) 1264 return result; 1265 1266 if (val != 1) 1267 return -EINVAL; 1268 1269 result = pci_reset_function(pdev); 1270 if (result < 0) 1271 return result; 1272 1273 return count; 1274 } 1275 1276 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1277 1278 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1279 { 1280 int retval; 1281 struct bin_attribute *attr; 1282 1283 /* If the device has VPD, try to expose it in sysfs. */ 1284 if (dev->vpd) { 1285 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1286 if (!attr) 1287 return -ENOMEM; 1288 1289 sysfs_bin_attr_init(attr); 1290 attr->size = dev->vpd->len; 1291 attr->attr.name = "vpd"; 1292 attr->attr.mode = S_IRUSR | S_IWUSR; 1293 attr->read = read_vpd_attr; 1294 attr->write = write_vpd_attr; 1295 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1296 if (retval) { 1297 kfree(attr); 1298 return retval; 1299 } 1300 dev->vpd->attr = attr; 1301 } 1302 1303 /* Active State Power Management */ 1304 pcie_aspm_create_sysfs_dev_files(dev); 1305 1306 if (!pci_probe_reset_function(dev)) { 1307 retval = device_create_file(&dev->dev, &reset_attr); 1308 if (retval) 1309 goto error; 1310 dev->reset_fn = 1; 1311 } 1312 return 0; 1313 1314 error: 1315 pcie_aspm_remove_sysfs_dev_files(dev); 1316 if (dev->vpd && dev->vpd->attr) { 1317 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1318 kfree(dev->vpd->attr); 1319 } 1320 1321 return retval; 1322 } 1323 1324 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1325 { 1326 int retval; 1327 int rom_size = 0; 1328 struct bin_attribute *attr; 1329 1330 if (!sysfs_initialized) 1331 return -EACCES; 1332 1333 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1334 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1335 else 1336 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1337 if (retval) 1338 goto err; 1339 1340 retval = pci_create_resource_files(pdev); 1341 if (retval) 1342 goto err_config_file; 1343 1344 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1345 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1346 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1347 rom_size = 0x20000; 1348 1349 /* If the device has a ROM, try to expose it in sysfs. */ 1350 if (rom_size) { 1351 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1352 if (!attr) { 1353 retval = -ENOMEM; 1354 goto err_resource_files; 1355 } 1356 sysfs_bin_attr_init(attr); 1357 attr->size = rom_size; 1358 attr->attr.name = "rom"; 1359 attr->attr.mode = S_IRUSR | S_IWUSR; 1360 attr->read = pci_read_rom; 1361 attr->write = pci_write_rom; 1362 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1363 if (retval) { 1364 kfree(attr); 1365 goto err_resource_files; 1366 } 1367 pdev->rom_attr = attr; 1368 } 1369 1370 /* add platform-specific attributes */ 1371 retval = pcibios_add_platform_entries(pdev); 1372 if (retval) 1373 goto err_rom_file; 1374 1375 /* add sysfs entries for various capabilities */ 1376 retval = pci_create_capabilities_sysfs(pdev); 1377 if (retval) 1378 goto err_rom_file; 1379 1380 pci_create_firmware_label_files(pdev); 1381 1382 return 0; 1383 1384 err_rom_file: 1385 if (rom_size) { 1386 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1387 kfree(pdev->rom_attr); 1388 pdev->rom_attr = NULL; 1389 } 1390 err_resource_files: 1391 pci_remove_resource_files(pdev); 1392 err_config_file: 1393 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1394 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1395 else 1396 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1397 err: 1398 return retval; 1399 } 1400 1401 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1402 { 1403 if (dev->vpd && dev->vpd->attr) { 1404 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1405 kfree(dev->vpd->attr); 1406 } 1407 1408 pcie_aspm_remove_sysfs_dev_files(dev); 1409 if (dev->reset_fn) { 1410 device_remove_file(&dev->dev, &reset_attr); 1411 dev->reset_fn = 0; 1412 } 1413 } 1414 1415 /** 1416 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1417 * @pdev: device whose entries we should free 1418 * 1419 * Cleanup when @pdev is removed from sysfs. 1420 */ 1421 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1422 { 1423 int rom_size = 0; 1424 1425 if (!sysfs_initialized) 1426 return; 1427 1428 pci_remove_capabilities_sysfs(pdev); 1429 1430 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1431 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1432 else 1433 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1434 1435 pci_remove_resource_files(pdev); 1436 1437 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1438 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1439 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1440 rom_size = 0x20000; 1441 1442 if (rom_size && pdev->rom_attr) { 1443 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1444 kfree(pdev->rom_attr); 1445 } 1446 1447 pci_remove_firmware_label_files(pdev); 1448 1449 } 1450 1451 static int __init pci_sysfs_init(void) 1452 { 1453 struct pci_dev *pdev = NULL; 1454 int retval; 1455 1456 sysfs_initialized = 1; 1457 for_each_pci_dev(pdev) { 1458 retval = pci_create_sysfs_dev_files(pdev); 1459 if (retval) { 1460 pci_dev_put(pdev); 1461 return retval; 1462 } 1463 } 1464 1465 return 0; 1466 } 1467 1468 late_initcall(pci_sysfs_init); 1469 1470 static struct attribute *pci_dev_dev_attrs[] = { 1471 &vga_attr.attr, 1472 NULL, 1473 }; 1474 1475 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1476 struct attribute *a, int n) 1477 { 1478 struct device *dev = container_of(kobj, struct device, kobj); 1479 struct pci_dev *pdev = to_pci_dev(dev); 1480 1481 if (a == &vga_attr.attr) 1482 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1483 return 0; 1484 1485 return a->mode; 1486 } 1487 1488 static struct attribute *pci_dev_hp_attrs[] = { 1489 &dev_remove_attr.attr, 1490 &dev_rescan_attr.attr, 1491 NULL, 1492 }; 1493 1494 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1495 struct attribute *a, int n) 1496 { 1497 struct device *dev = container_of(kobj, struct device, kobj); 1498 struct pci_dev *pdev = to_pci_dev(dev); 1499 1500 if (pdev->is_virtfn) 1501 return 0; 1502 1503 return a->mode; 1504 } 1505 1506 static struct attribute_group pci_dev_hp_attr_group = { 1507 .attrs = pci_dev_hp_attrs, 1508 .is_visible = pci_dev_hp_attrs_are_visible, 1509 }; 1510 1511 #ifdef CONFIG_PCI_IOV 1512 static struct attribute *sriov_dev_attrs[] = { 1513 &sriov_totalvfs_attr.attr, 1514 &sriov_numvfs_attr.attr, 1515 NULL, 1516 }; 1517 1518 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1519 struct attribute *a, int n) 1520 { 1521 struct device *dev = container_of(kobj, struct device, kobj); 1522 1523 if (!dev_is_pf(dev)) 1524 return 0; 1525 1526 return a->mode; 1527 } 1528 1529 static struct attribute_group sriov_dev_attr_group = { 1530 .attrs = sriov_dev_attrs, 1531 .is_visible = sriov_attrs_are_visible, 1532 }; 1533 #endif /* CONFIG_PCI_IOV */ 1534 1535 static struct attribute_group pci_dev_attr_group = { 1536 .attrs = pci_dev_dev_attrs, 1537 .is_visible = pci_dev_attrs_are_visible, 1538 }; 1539 1540 static const struct attribute_group *pci_dev_attr_groups[] = { 1541 &pci_dev_attr_group, 1542 &pci_dev_hp_attr_group, 1543 #ifdef CONFIG_PCI_IOV 1544 &sriov_dev_attr_group, 1545 #endif 1546 NULL, 1547 }; 1548 1549 struct device_type pci_dev_type = { 1550 .groups = pci_dev_attr_groups, 1551 }; 1552