1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/of.h> 30 #include "pci.h" 31 32 static int sysfs_initialized; /* = 0 */ 33 34 /* show configuration fields */ 35 #define pci_config_attr(field, format_string) \ 36 static ssize_t \ 37 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 38 { \ 39 struct pci_dev *pdev; \ 40 \ 41 pdev = to_pci_dev(dev); \ 42 return sprintf(buf, format_string, pdev->field); \ 43 } \ 44 static DEVICE_ATTR_RO(field) 45 46 pci_config_attr(vendor, "0x%04x\n"); 47 pci_config_attr(device, "0x%04x\n"); 48 pci_config_attr(subsystem_vendor, "0x%04x\n"); 49 pci_config_attr(subsystem_device, "0x%04x\n"); 50 pci_config_attr(revision, "0x%02x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf(buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (kstrtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 static DEVICE_ATTR_RW(broken_parity_status); 77 78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 79 struct device_attribute *attr, char *buf) 80 { 81 const struct cpumask *mask; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 return cpumap_print_to_pagebuf(list, buf, mask); 90 } 91 92 static ssize_t local_cpus_show(struct device *dev, 93 struct device_attribute *attr, char *buf) 94 { 95 return pci_dev_show_local_cpu(dev, false, attr, buf); 96 } 97 static DEVICE_ATTR_RO(local_cpus); 98 99 static ssize_t local_cpulist_show(struct device *dev, 100 struct device_attribute *attr, char *buf) 101 { 102 return pci_dev_show_local_cpu(dev, true, attr, buf); 103 } 104 static DEVICE_ATTR_RO(local_cpulist); 105 106 /* 107 * PCI Bus Class Devices 108 */ 109 static ssize_t cpuaffinity_show(struct device *dev, 110 struct device_attribute *attr, char *buf) 111 { 112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 113 114 return cpumap_print_to_pagebuf(false, buf, cpumask); 115 } 116 static DEVICE_ATTR_RO(cpuaffinity); 117 118 static ssize_t cpulistaffinity_show(struct device *dev, 119 struct device_attribute *attr, char *buf) 120 { 121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 122 123 return cpumap_print_to_pagebuf(true, buf, cpumask); 124 } 125 static DEVICE_ATTR_RO(cpulistaffinity); 126 127 /* show resources */ 128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 129 char *buf) 130 { 131 struct pci_dev *pci_dev = to_pci_dev(dev); 132 char *str = buf; 133 int i; 134 int max; 135 resource_size_t start, end; 136 137 if (pci_dev->subordinate) 138 max = DEVICE_COUNT_RESOURCE; 139 else 140 max = PCI_BRIDGE_RESOURCES; 141 142 for (i = 0; i < max; i++) { 143 struct resource *res = &pci_dev->resource[i]; 144 pci_resource_to_user(pci_dev, i, res, &start, &end); 145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n", 146 (unsigned long long)start, 147 (unsigned long long)end, 148 (unsigned long long)res->flags); 149 } 150 return (str - buf); 151 } 152 static DEVICE_ATTR_RO(resource); 153 154 static ssize_t max_link_speed_show(struct device *dev, 155 struct device_attribute *attr, char *buf) 156 { 157 struct pci_dev *pdev = to_pci_dev(dev); 158 159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev))); 160 } 161 static DEVICE_ATTR_RO(max_link_speed); 162 163 static ssize_t max_link_width_show(struct device *dev, 164 struct device_attribute *attr, char *buf) 165 { 166 struct pci_dev *pdev = to_pci_dev(dev); 167 168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev)); 169 } 170 static DEVICE_ATTR_RO(max_link_width); 171 172 static ssize_t current_link_speed_show(struct device *dev, 173 struct device_attribute *attr, char *buf) 174 { 175 struct pci_dev *pci_dev = to_pci_dev(dev); 176 u16 linkstat; 177 int err; 178 const char *speed; 179 180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 181 if (err) 182 return -EINVAL; 183 184 switch (linkstat & PCI_EXP_LNKSTA_CLS) { 185 case PCI_EXP_LNKSTA_CLS_32_0GB: 186 speed = "32 GT/s"; 187 break; 188 case PCI_EXP_LNKSTA_CLS_16_0GB: 189 speed = "16 GT/s"; 190 break; 191 case PCI_EXP_LNKSTA_CLS_8_0GB: 192 speed = "8 GT/s"; 193 break; 194 case PCI_EXP_LNKSTA_CLS_5_0GB: 195 speed = "5 GT/s"; 196 break; 197 case PCI_EXP_LNKSTA_CLS_2_5GB: 198 speed = "2.5 GT/s"; 199 break; 200 default: 201 speed = "Unknown speed"; 202 } 203 204 return sprintf(buf, "%s\n", speed); 205 } 206 static DEVICE_ATTR_RO(current_link_speed); 207 208 static ssize_t current_link_width_show(struct device *dev, 209 struct device_attribute *attr, char *buf) 210 { 211 struct pci_dev *pci_dev = to_pci_dev(dev); 212 u16 linkstat; 213 int err; 214 215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 216 if (err) 217 return -EINVAL; 218 219 return sprintf(buf, "%u\n", 220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); 221 } 222 static DEVICE_ATTR_RO(current_link_width); 223 224 static ssize_t secondary_bus_number_show(struct device *dev, 225 struct device_attribute *attr, 226 char *buf) 227 { 228 struct pci_dev *pci_dev = to_pci_dev(dev); 229 u8 sec_bus; 230 int err; 231 232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 233 if (err) 234 return -EINVAL; 235 236 return sprintf(buf, "%u\n", sec_bus); 237 } 238 static DEVICE_ATTR_RO(secondary_bus_number); 239 240 static ssize_t subordinate_bus_number_show(struct device *dev, 241 struct device_attribute *attr, 242 char *buf) 243 { 244 struct pci_dev *pci_dev = to_pci_dev(dev); 245 u8 sub_bus; 246 int err; 247 248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 249 if (err) 250 return -EINVAL; 251 252 return sprintf(buf, "%u\n", sub_bus); 253 } 254 static DEVICE_ATTR_RO(subordinate_bus_number); 255 256 static ssize_t ari_enabled_show(struct device *dev, 257 struct device_attribute *attr, 258 char *buf) 259 { 260 struct pci_dev *pci_dev = to_pci_dev(dev); 261 262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 263 } 264 static DEVICE_ATTR_RO(ari_enabled); 265 266 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 267 char *buf) 268 { 269 struct pci_dev *pci_dev = to_pci_dev(dev); 270 271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 272 pci_dev->vendor, pci_dev->device, 273 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 275 (u8)(pci_dev->class)); 276 } 277 static DEVICE_ATTR_RO(modalias); 278 279 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 280 const char *buf, size_t count) 281 { 282 struct pci_dev *pdev = to_pci_dev(dev); 283 unsigned long val; 284 ssize_t result = kstrtoul(buf, 0, &val); 285 286 if (result < 0) 287 return result; 288 289 /* this can crash the machine when done on the "wrong" device */ 290 if (!capable(CAP_SYS_ADMIN)) 291 return -EPERM; 292 293 device_lock(dev); 294 if (dev->driver) 295 result = -EBUSY; 296 else if (val) 297 result = pci_enable_device(pdev); 298 else if (pci_is_enabled(pdev)) 299 pci_disable_device(pdev); 300 else 301 result = -EIO; 302 device_unlock(dev); 303 304 return result < 0 ? result : count; 305 } 306 307 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 308 char *buf) 309 { 310 struct pci_dev *pdev; 311 312 pdev = to_pci_dev(dev); 313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 314 } 315 static DEVICE_ATTR_RW(enable); 316 317 #ifdef CONFIG_NUMA 318 static ssize_t numa_node_store(struct device *dev, 319 struct device_attribute *attr, const char *buf, 320 size_t count) 321 { 322 struct pci_dev *pdev = to_pci_dev(dev); 323 int node, ret; 324 325 if (!capable(CAP_SYS_ADMIN)) 326 return -EPERM; 327 328 ret = kstrtoint(buf, 0, &node); 329 if (ret) 330 return ret; 331 332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 333 return -EINVAL; 334 335 if (node != NUMA_NO_NODE && !node_online(node)) 336 return -EINVAL; 337 338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 340 node); 341 342 dev->numa_node = node; 343 return count; 344 } 345 346 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 347 char *buf) 348 { 349 return sprintf(buf, "%d\n", dev->numa_node); 350 } 351 static DEVICE_ATTR_RW(numa_node); 352 #endif 353 354 static ssize_t dma_mask_bits_show(struct device *dev, 355 struct device_attribute *attr, char *buf) 356 { 357 struct pci_dev *pdev = to_pci_dev(dev); 358 359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask)); 360 } 361 static DEVICE_ATTR_RO(dma_mask_bits); 362 363 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 364 struct device_attribute *attr, 365 char *buf) 366 { 367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask)); 368 } 369 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 370 371 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 372 char *buf) 373 { 374 struct pci_dev *pdev = to_pci_dev(dev); 375 struct pci_bus *subordinate = pdev->subordinate; 376 377 return sprintf(buf, "%u\n", subordinate ? 378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 379 : !pdev->no_msi); 380 } 381 382 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 383 const char *buf, size_t count) 384 { 385 struct pci_dev *pdev = to_pci_dev(dev); 386 struct pci_bus *subordinate = pdev->subordinate; 387 unsigned long val; 388 389 if (kstrtoul(buf, 0, &val) < 0) 390 return -EINVAL; 391 392 if (!capable(CAP_SYS_ADMIN)) 393 return -EPERM; 394 395 /* 396 * "no_msi" and "bus_flags" only affect what happens when a driver 397 * requests MSI or MSI-X. They don't affect any drivers that have 398 * already requested MSI or MSI-X. 399 */ 400 if (!subordinate) { 401 pdev->no_msi = !val; 402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 403 val ? "allowed" : "disallowed"); 404 return count; 405 } 406 407 if (val) 408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 409 else 410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 411 412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 413 val ? "allowed" : "disallowed"); 414 return count; 415 } 416 static DEVICE_ATTR_RW(msi_bus); 417 418 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count) 419 { 420 unsigned long val; 421 struct pci_bus *b = NULL; 422 423 if (kstrtoul(buf, 0, &val) < 0) 424 return -EINVAL; 425 426 if (val) { 427 pci_lock_rescan_remove(); 428 while ((b = pci_find_next_bus(b)) != NULL) 429 pci_rescan_bus(b); 430 pci_unlock_rescan_remove(); 431 } 432 return count; 433 } 434 static BUS_ATTR_WO(rescan); 435 436 static struct attribute *pci_bus_attrs[] = { 437 &bus_attr_rescan.attr, 438 NULL, 439 }; 440 441 static const struct attribute_group pci_bus_group = { 442 .attrs = pci_bus_attrs, 443 }; 444 445 const struct attribute_group *pci_bus_groups[] = { 446 &pci_bus_group, 447 NULL, 448 }; 449 450 static ssize_t dev_rescan_store(struct device *dev, 451 struct device_attribute *attr, const char *buf, 452 size_t count) 453 { 454 unsigned long val; 455 struct pci_dev *pdev = to_pci_dev(dev); 456 457 if (kstrtoul(buf, 0, &val) < 0) 458 return -EINVAL; 459 460 if (val) { 461 pci_lock_rescan_remove(); 462 pci_rescan_bus(pdev->bus); 463 pci_unlock_rescan_remove(); 464 } 465 return count; 466 } 467 static DEVICE_ATTR_WO(dev_rescan); 468 469 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 470 const char *buf, size_t count) 471 { 472 unsigned long val; 473 474 if (kstrtoul(buf, 0, &val) < 0) 475 return -EINVAL; 476 477 if (val && device_remove_file_self(dev, attr)) 478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 479 return count; 480 } 481 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 482 remove_store); 483 484 static ssize_t bus_rescan_store(struct device *dev, 485 struct device_attribute *attr, 486 const char *buf, size_t count) 487 { 488 unsigned long val; 489 struct pci_bus *bus = to_pci_bus(dev); 490 491 if (kstrtoul(buf, 0, &val) < 0) 492 return -EINVAL; 493 494 if (val) { 495 pci_lock_rescan_remove(); 496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 497 pci_rescan_bus_bridge_resize(bus->self); 498 else 499 pci_rescan_bus(bus); 500 pci_unlock_rescan_remove(); 501 } 502 return count; 503 } 504 static DEVICE_ATTR_WO(bus_rescan); 505 506 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 507 static ssize_t d3cold_allowed_store(struct device *dev, 508 struct device_attribute *attr, 509 const char *buf, size_t count) 510 { 511 struct pci_dev *pdev = to_pci_dev(dev); 512 unsigned long val; 513 514 if (kstrtoul(buf, 0, &val) < 0) 515 return -EINVAL; 516 517 pdev->d3cold_allowed = !!val; 518 if (pdev->d3cold_allowed) 519 pci_d3cold_enable(pdev); 520 else 521 pci_d3cold_disable(pdev); 522 523 pm_runtime_resume(dev); 524 525 return count; 526 } 527 528 static ssize_t d3cold_allowed_show(struct device *dev, 529 struct device_attribute *attr, char *buf) 530 { 531 struct pci_dev *pdev = to_pci_dev(dev); 532 return sprintf(buf, "%u\n", pdev->d3cold_allowed); 533 } 534 static DEVICE_ATTR_RW(d3cold_allowed); 535 #endif 536 537 #ifdef CONFIG_OF 538 static ssize_t devspec_show(struct device *dev, 539 struct device_attribute *attr, char *buf) 540 { 541 struct pci_dev *pdev = to_pci_dev(dev); 542 struct device_node *np = pci_device_to_OF_node(pdev); 543 544 if (np == NULL) 545 return 0; 546 return sprintf(buf, "%pOF", np); 547 } 548 static DEVICE_ATTR_RO(devspec); 549 #endif 550 551 static ssize_t driver_override_store(struct device *dev, 552 struct device_attribute *attr, 553 const char *buf, size_t count) 554 { 555 struct pci_dev *pdev = to_pci_dev(dev); 556 char *driver_override, *old, *cp; 557 558 /* We need to keep extra room for a newline */ 559 if (count >= (PAGE_SIZE - 1)) 560 return -EINVAL; 561 562 driver_override = kstrndup(buf, count, GFP_KERNEL); 563 if (!driver_override) 564 return -ENOMEM; 565 566 cp = strchr(driver_override, '\n'); 567 if (cp) 568 *cp = '\0'; 569 570 device_lock(dev); 571 old = pdev->driver_override; 572 if (strlen(driver_override)) { 573 pdev->driver_override = driver_override; 574 } else { 575 kfree(driver_override); 576 pdev->driver_override = NULL; 577 } 578 device_unlock(dev); 579 580 kfree(old); 581 582 return count; 583 } 584 585 static ssize_t driver_override_show(struct device *dev, 586 struct device_attribute *attr, char *buf) 587 { 588 struct pci_dev *pdev = to_pci_dev(dev); 589 ssize_t len; 590 591 device_lock(dev); 592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override); 593 device_unlock(dev); 594 return len; 595 } 596 static DEVICE_ATTR_RW(driver_override); 597 598 static struct attribute *pci_dev_attrs[] = { 599 &dev_attr_resource.attr, 600 &dev_attr_vendor.attr, 601 &dev_attr_device.attr, 602 &dev_attr_subsystem_vendor.attr, 603 &dev_attr_subsystem_device.attr, 604 &dev_attr_revision.attr, 605 &dev_attr_class.attr, 606 &dev_attr_irq.attr, 607 &dev_attr_local_cpus.attr, 608 &dev_attr_local_cpulist.attr, 609 &dev_attr_modalias.attr, 610 #ifdef CONFIG_NUMA 611 &dev_attr_numa_node.attr, 612 #endif 613 &dev_attr_dma_mask_bits.attr, 614 &dev_attr_consistent_dma_mask_bits.attr, 615 &dev_attr_enable.attr, 616 &dev_attr_broken_parity_status.attr, 617 &dev_attr_msi_bus.attr, 618 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 619 &dev_attr_d3cold_allowed.attr, 620 #endif 621 #ifdef CONFIG_OF 622 &dev_attr_devspec.attr, 623 #endif 624 &dev_attr_driver_override.attr, 625 &dev_attr_ari_enabled.attr, 626 NULL, 627 }; 628 629 static struct attribute *pci_bridge_attrs[] = { 630 &dev_attr_subordinate_bus_number.attr, 631 &dev_attr_secondary_bus_number.attr, 632 NULL, 633 }; 634 635 static struct attribute *pcie_dev_attrs[] = { 636 &dev_attr_current_link_speed.attr, 637 &dev_attr_current_link_width.attr, 638 &dev_attr_max_link_width.attr, 639 &dev_attr_max_link_speed.attr, 640 NULL, 641 }; 642 643 static struct attribute *pcibus_attrs[] = { 644 &dev_attr_bus_rescan.attr, 645 &dev_attr_cpuaffinity.attr, 646 &dev_attr_cpulistaffinity.attr, 647 NULL, 648 }; 649 650 static const struct attribute_group pcibus_group = { 651 .attrs = pcibus_attrs, 652 }; 653 654 const struct attribute_group *pcibus_groups[] = { 655 &pcibus_group, 656 NULL, 657 }; 658 659 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 660 char *buf) 661 { 662 struct pci_dev *pdev = to_pci_dev(dev); 663 struct pci_dev *vga_dev = vga_default_device(); 664 665 if (vga_dev) 666 return sprintf(buf, "%u\n", (pdev == vga_dev)); 667 668 return sprintf(buf, "%u\n", 669 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 670 IORESOURCE_ROM_SHADOW)); 671 } 672 static DEVICE_ATTR_RO(boot_vga); 673 674 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 675 struct bin_attribute *bin_attr, char *buf, 676 loff_t off, size_t count) 677 { 678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 679 unsigned int size = 64; 680 loff_t init_off = off; 681 u8 *data = (u8 *) buf; 682 683 /* Several chips lock up trying to read undefined config space */ 684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 685 size = dev->cfg_size; 686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 687 size = 128; 688 689 if (off > size) 690 return 0; 691 if (off + count > size) { 692 size -= off; 693 count = size; 694 } else { 695 size = count; 696 } 697 698 pci_config_pm_runtime_get(dev); 699 700 if ((off & 1) && size) { 701 u8 val; 702 pci_user_read_config_byte(dev, off, &val); 703 data[off - init_off] = val; 704 off++; 705 size--; 706 } 707 708 if ((off & 3) && size > 2) { 709 u16 val; 710 pci_user_read_config_word(dev, off, &val); 711 data[off - init_off] = val & 0xff; 712 data[off - init_off + 1] = (val >> 8) & 0xff; 713 off += 2; 714 size -= 2; 715 } 716 717 while (size > 3) { 718 u32 val; 719 pci_user_read_config_dword(dev, off, &val); 720 data[off - init_off] = val & 0xff; 721 data[off - init_off + 1] = (val >> 8) & 0xff; 722 data[off - init_off + 2] = (val >> 16) & 0xff; 723 data[off - init_off + 3] = (val >> 24) & 0xff; 724 off += 4; 725 size -= 4; 726 } 727 728 if (size >= 2) { 729 u16 val; 730 pci_user_read_config_word(dev, off, &val); 731 data[off - init_off] = val & 0xff; 732 data[off - init_off + 1] = (val >> 8) & 0xff; 733 off += 2; 734 size -= 2; 735 } 736 737 if (size > 0) { 738 u8 val; 739 pci_user_read_config_byte(dev, off, &val); 740 data[off - init_off] = val; 741 off++; 742 --size; 743 } 744 745 pci_config_pm_runtime_put(dev); 746 747 return count; 748 } 749 750 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 751 struct bin_attribute *bin_attr, char *buf, 752 loff_t off, size_t count) 753 { 754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 755 unsigned int size = count; 756 loff_t init_off = off; 757 u8 *data = (u8 *) buf; 758 759 if (off > dev->cfg_size) 760 return 0; 761 if (off + count > dev->cfg_size) { 762 size = dev->cfg_size - off; 763 count = size; 764 } 765 766 pci_config_pm_runtime_get(dev); 767 768 if ((off & 1) && size) { 769 pci_user_write_config_byte(dev, off, data[off - init_off]); 770 off++; 771 size--; 772 } 773 774 if ((off & 3) && size > 2) { 775 u16 val = data[off - init_off]; 776 val |= (u16) data[off - init_off + 1] << 8; 777 pci_user_write_config_word(dev, off, val); 778 off += 2; 779 size -= 2; 780 } 781 782 while (size > 3) { 783 u32 val = data[off - init_off]; 784 val |= (u32) data[off - init_off + 1] << 8; 785 val |= (u32) data[off - init_off + 2] << 16; 786 val |= (u32) data[off - init_off + 3] << 24; 787 pci_user_write_config_dword(dev, off, val); 788 off += 4; 789 size -= 4; 790 } 791 792 if (size >= 2) { 793 u16 val = data[off - init_off]; 794 val |= (u16) data[off - init_off + 1] << 8; 795 pci_user_write_config_word(dev, off, val); 796 off += 2; 797 size -= 2; 798 } 799 800 if (size) { 801 pci_user_write_config_byte(dev, off, data[off - init_off]); 802 off++; 803 --size; 804 } 805 806 pci_config_pm_runtime_put(dev); 807 808 return count; 809 } 810 811 #ifdef HAVE_PCI_LEGACY 812 /** 813 * pci_read_legacy_io - read byte(s) from legacy I/O port space 814 * @filp: open sysfs file 815 * @kobj: kobject corresponding to file to read from 816 * @bin_attr: struct bin_attribute for this file 817 * @buf: buffer to store results 818 * @off: offset into legacy I/O port space 819 * @count: number of bytes to read 820 * 821 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 822 * callback routine (pci_legacy_read). 823 */ 824 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 825 struct bin_attribute *bin_attr, char *buf, 826 loff_t off, size_t count) 827 { 828 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 829 830 /* Only support 1, 2 or 4 byte accesses */ 831 if (count != 1 && count != 2 && count != 4) 832 return -EINVAL; 833 834 return pci_legacy_read(bus, off, (u32 *)buf, count); 835 } 836 837 /** 838 * pci_write_legacy_io - write byte(s) to legacy I/O port space 839 * @filp: open sysfs file 840 * @kobj: kobject corresponding to file to read from 841 * @bin_attr: struct bin_attribute for this file 842 * @buf: buffer containing value to be written 843 * @off: offset into legacy I/O port space 844 * @count: number of bytes to write 845 * 846 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 847 * callback routine (pci_legacy_write). 848 */ 849 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 850 struct bin_attribute *bin_attr, char *buf, 851 loff_t off, size_t count) 852 { 853 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 854 855 /* Only support 1, 2 or 4 byte accesses */ 856 if (count != 1 && count != 2 && count != 4) 857 return -EINVAL; 858 859 return pci_legacy_write(bus, off, *(u32 *)buf, count); 860 } 861 862 /** 863 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 864 * @filp: open sysfs file 865 * @kobj: kobject corresponding to device to be mapped 866 * @attr: struct bin_attribute for this file 867 * @vma: struct vm_area_struct passed to mmap 868 * 869 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 870 * legacy memory space (first meg of bus space) into application virtual 871 * memory space. 872 */ 873 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 874 struct bin_attribute *attr, 875 struct vm_area_struct *vma) 876 { 877 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 878 879 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 880 } 881 882 /** 883 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 884 * @filp: open sysfs file 885 * @kobj: kobject corresponding to device to be mapped 886 * @attr: struct bin_attribute for this file 887 * @vma: struct vm_area_struct passed to mmap 888 * 889 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 890 * legacy IO space (first meg of bus space) into application virtual 891 * memory space. Returns -ENOSYS if the operation isn't supported 892 */ 893 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 894 struct bin_attribute *attr, 895 struct vm_area_struct *vma) 896 { 897 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 898 899 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 900 } 901 902 /** 903 * pci_adjust_legacy_attr - adjustment of legacy file attributes 904 * @b: bus to create files under 905 * @mmap_type: I/O port or memory 906 * 907 * Stub implementation. Can be overridden by arch if necessary. 908 */ 909 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 910 enum pci_mmap_state mmap_type) 911 { 912 } 913 914 /** 915 * pci_create_legacy_files - create legacy I/O port and memory files 916 * @b: bus to create files under 917 * 918 * Some platforms allow access to legacy I/O port and ISA memory space on 919 * a per-bus basis. This routine creates the files and ties them into 920 * their associated read, write and mmap files from pci-sysfs.c 921 * 922 * On error unwind, but don't propagate the error to the caller 923 * as it is ok to set up the PCI bus without these files. 924 */ 925 void pci_create_legacy_files(struct pci_bus *b) 926 { 927 int error; 928 929 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 930 GFP_ATOMIC); 931 if (!b->legacy_io) 932 goto kzalloc_err; 933 934 sysfs_bin_attr_init(b->legacy_io); 935 b->legacy_io->attr.name = "legacy_io"; 936 b->legacy_io->size = 0xffff; 937 b->legacy_io->attr.mode = 0600; 938 b->legacy_io->read = pci_read_legacy_io; 939 b->legacy_io->write = pci_write_legacy_io; 940 b->legacy_io->mmap = pci_mmap_legacy_io; 941 pci_adjust_legacy_attr(b, pci_mmap_io); 942 error = device_create_bin_file(&b->dev, b->legacy_io); 943 if (error) 944 goto legacy_io_err; 945 946 /* Allocated above after the legacy_io struct */ 947 b->legacy_mem = b->legacy_io + 1; 948 sysfs_bin_attr_init(b->legacy_mem); 949 b->legacy_mem->attr.name = "legacy_mem"; 950 b->legacy_mem->size = 1024*1024; 951 b->legacy_mem->attr.mode = 0600; 952 b->legacy_mem->mmap = pci_mmap_legacy_mem; 953 pci_adjust_legacy_attr(b, pci_mmap_mem); 954 error = device_create_bin_file(&b->dev, b->legacy_mem); 955 if (error) 956 goto legacy_mem_err; 957 958 return; 959 960 legacy_mem_err: 961 device_remove_bin_file(&b->dev, b->legacy_io); 962 legacy_io_err: 963 kfree(b->legacy_io); 964 b->legacy_io = NULL; 965 kzalloc_err: 966 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 967 } 968 969 void pci_remove_legacy_files(struct pci_bus *b) 970 { 971 if (b->legacy_io) { 972 device_remove_bin_file(&b->dev, b->legacy_io); 973 device_remove_bin_file(&b->dev, b->legacy_mem); 974 kfree(b->legacy_io); /* both are allocated here */ 975 } 976 } 977 #endif /* HAVE_PCI_LEGACY */ 978 979 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 980 981 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 982 enum pci_mmap_api mmap_api) 983 { 984 unsigned long nr, start, size; 985 resource_size_t pci_start = 0, pci_end; 986 987 if (pci_resource_len(pdev, resno) == 0) 988 return 0; 989 nr = vma_pages(vma); 990 start = vma->vm_pgoff; 991 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 992 if (mmap_api == PCI_MMAP_PROCFS) { 993 pci_resource_to_user(pdev, resno, &pdev->resource[resno], 994 &pci_start, &pci_end); 995 pci_start >>= PAGE_SHIFT; 996 } 997 if (start >= pci_start && start < pci_start + size && 998 start + nr <= pci_start + size) 999 return 1; 1000 return 0; 1001 } 1002 1003 /** 1004 * pci_mmap_resource - map a PCI resource into user memory space 1005 * @kobj: kobject for mapping 1006 * @attr: struct bin_attribute for the file being mapped 1007 * @vma: struct vm_area_struct passed into the mmap 1008 * @write_combine: 1 for write_combine mapping 1009 * 1010 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1011 */ 1012 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1013 struct vm_area_struct *vma, int write_combine) 1014 { 1015 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1016 int bar = (unsigned long)attr->private; 1017 enum pci_mmap_state mmap_type; 1018 struct resource *res = &pdev->resource[bar]; 1019 1020 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1021 return -EINVAL; 1022 1023 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1024 return -EINVAL; 1025 1026 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1027 1028 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1029 } 1030 1031 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1032 struct bin_attribute *attr, 1033 struct vm_area_struct *vma) 1034 { 1035 return pci_mmap_resource(kobj, attr, vma, 0); 1036 } 1037 1038 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1039 struct bin_attribute *attr, 1040 struct vm_area_struct *vma) 1041 { 1042 return pci_mmap_resource(kobj, attr, vma, 1); 1043 } 1044 1045 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1046 struct bin_attribute *attr, char *buf, 1047 loff_t off, size_t count, bool write) 1048 { 1049 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1050 int bar = (unsigned long)attr->private; 1051 unsigned long port = off; 1052 1053 port += pci_resource_start(pdev, bar); 1054 1055 if (port > pci_resource_end(pdev, bar)) 1056 return 0; 1057 1058 if (port + count - 1 > pci_resource_end(pdev, bar)) 1059 return -EINVAL; 1060 1061 switch (count) { 1062 case 1: 1063 if (write) 1064 outb(*(u8 *)buf, port); 1065 else 1066 *(u8 *)buf = inb(port); 1067 return 1; 1068 case 2: 1069 if (write) 1070 outw(*(u16 *)buf, port); 1071 else 1072 *(u16 *)buf = inw(port); 1073 return 2; 1074 case 4: 1075 if (write) 1076 outl(*(u32 *)buf, port); 1077 else 1078 *(u32 *)buf = inl(port); 1079 return 4; 1080 } 1081 return -EINVAL; 1082 } 1083 1084 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1085 struct bin_attribute *attr, char *buf, 1086 loff_t off, size_t count) 1087 { 1088 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1089 } 1090 1091 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1092 struct bin_attribute *attr, char *buf, 1093 loff_t off, size_t count) 1094 { 1095 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1096 } 1097 1098 /** 1099 * pci_remove_resource_files - cleanup resource files 1100 * @pdev: dev to cleanup 1101 * 1102 * If we created resource files for @pdev, remove them from sysfs and 1103 * free their resources. 1104 */ 1105 static void pci_remove_resource_files(struct pci_dev *pdev) 1106 { 1107 int i; 1108 1109 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1110 struct bin_attribute *res_attr; 1111 1112 res_attr = pdev->res_attr[i]; 1113 if (res_attr) { 1114 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1115 kfree(res_attr); 1116 } 1117 1118 res_attr = pdev->res_attr_wc[i]; 1119 if (res_attr) { 1120 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1121 kfree(res_attr); 1122 } 1123 } 1124 } 1125 1126 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1127 { 1128 /* allocate attribute structure, piggyback attribute name */ 1129 int name_len = write_combine ? 13 : 10; 1130 struct bin_attribute *res_attr; 1131 char *res_attr_name; 1132 int retval; 1133 1134 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1135 if (!res_attr) 1136 return -ENOMEM; 1137 1138 res_attr_name = (char *)(res_attr + 1); 1139 1140 sysfs_bin_attr_init(res_attr); 1141 if (write_combine) { 1142 pdev->res_attr_wc[num] = res_attr; 1143 sprintf(res_attr_name, "resource%d_wc", num); 1144 res_attr->mmap = pci_mmap_resource_wc; 1145 } else { 1146 pdev->res_attr[num] = res_attr; 1147 sprintf(res_attr_name, "resource%d", num); 1148 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1149 res_attr->read = pci_read_resource_io; 1150 res_attr->write = pci_write_resource_io; 1151 if (arch_can_pci_mmap_io()) 1152 res_attr->mmap = pci_mmap_resource_uc; 1153 } else { 1154 res_attr->mmap = pci_mmap_resource_uc; 1155 } 1156 } 1157 res_attr->attr.name = res_attr_name; 1158 res_attr->attr.mode = 0600; 1159 res_attr->size = pci_resource_len(pdev, num); 1160 res_attr->private = (void *)(unsigned long)num; 1161 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1162 if (retval) 1163 kfree(res_attr); 1164 1165 return retval; 1166 } 1167 1168 /** 1169 * pci_create_resource_files - create resource files in sysfs for @dev 1170 * @pdev: dev in question 1171 * 1172 * Walk the resources in @pdev creating files for each resource available. 1173 */ 1174 static int pci_create_resource_files(struct pci_dev *pdev) 1175 { 1176 int i; 1177 int retval; 1178 1179 /* Expose the PCI resources from this device as files */ 1180 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1181 1182 /* skip empty resources */ 1183 if (!pci_resource_len(pdev, i)) 1184 continue; 1185 1186 retval = pci_create_attr(pdev, i, 0); 1187 /* for prefetchable resources, create a WC mappable file */ 1188 if (!retval && arch_can_pci_mmap_wc() && 1189 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1190 retval = pci_create_attr(pdev, i, 1); 1191 if (retval) { 1192 pci_remove_resource_files(pdev); 1193 return retval; 1194 } 1195 } 1196 return 0; 1197 } 1198 #else /* !HAVE_PCI_MMAP */ 1199 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1200 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1201 #endif /* HAVE_PCI_MMAP */ 1202 1203 /** 1204 * pci_write_rom - used to enable access to the PCI ROM display 1205 * @filp: sysfs file 1206 * @kobj: kernel object handle 1207 * @bin_attr: struct bin_attribute for this file 1208 * @buf: user input 1209 * @off: file offset 1210 * @count: number of byte in input 1211 * 1212 * writing anything except 0 enables it 1213 */ 1214 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1215 struct bin_attribute *bin_attr, char *buf, 1216 loff_t off, size_t count) 1217 { 1218 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1219 1220 if ((off == 0) && (*buf == '0') && (count == 2)) 1221 pdev->rom_attr_enabled = 0; 1222 else 1223 pdev->rom_attr_enabled = 1; 1224 1225 return count; 1226 } 1227 1228 /** 1229 * pci_read_rom - read a PCI ROM 1230 * @filp: sysfs file 1231 * @kobj: kernel object handle 1232 * @bin_attr: struct bin_attribute for this file 1233 * @buf: where to put the data we read from the ROM 1234 * @off: file offset 1235 * @count: number of bytes to read 1236 * 1237 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1238 * device corresponding to @kobj. 1239 */ 1240 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1241 struct bin_attribute *bin_attr, char *buf, 1242 loff_t off, size_t count) 1243 { 1244 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1245 void __iomem *rom; 1246 size_t size; 1247 1248 if (!pdev->rom_attr_enabled) 1249 return -EINVAL; 1250 1251 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1252 if (!rom || !size) 1253 return -EIO; 1254 1255 if (off >= size) 1256 count = 0; 1257 else { 1258 if (off + count > size) 1259 count = size - off; 1260 1261 memcpy_fromio(buf, rom + off, count); 1262 } 1263 pci_unmap_rom(pdev, rom); 1264 1265 return count; 1266 } 1267 1268 static const struct bin_attribute pci_config_attr = { 1269 .attr = { 1270 .name = "config", 1271 .mode = 0644, 1272 }, 1273 .size = PCI_CFG_SPACE_SIZE, 1274 .read = pci_read_config, 1275 .write = pci_write_config, 1276 }; 1277 1278 static const struct bin_attribute pcie_config_attr = { 1279 .attr = { 1280 .name = "config", 1281 .mode = 0644, 1282 }, 1283 .size = PCI_CFG_SPACE_EXP_SIZE, 1284 .read = pci_read_config, 1285 .write = pci_write_config, 1286 }; 1287 1288 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1289 const char *buf, size_t count) 1290 { 1291 struct pci_dev *pdev = to_pci_dev(dev); 1292 unsigned long val; 1293 ssize_t result = kstrtoul(buf, 0, &val); 1294 1295 if (result < 0) 1296 return result; 1297 1298 if (val != 1) 1299 return -EINVAL; 1300 1301 pm_runtime_get_sync(dev); 1302 result = pci_reset_function(pdev); 1303 pm_runtime_put(dev); 1304 if (result < 0) 1305 return result; 1306 1307 return count; 1308 } 1309 1310 static DEVICE_ATTR(reset, 0200, NULL, reset_store); 1311 1312 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1313 { 1314 int retval; 1315 1316 pcie_vpd_create_sysfs_dev_files(dev); 1317 pcie_aspm_create_sysfs_dev_files(dev); 1318 1319 if (dev->reset_fn) { 1320 retval = device_create_file(&dev->dev, &dev_attr_reset); 1321 if (retval) 1322 goto error; 1323 } 1324 return 0; 1325 1326 error: 1327 pcie_aspm_remove_sysfs_dev_files(dev); 1328 pcie_vpd_remove_sysfs_dev_files(dev); 1329 return retval; 1330 } 1331 1332 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1333 { 1334 int retval; 1335 int rom_size; 1336 struct bin_attribute *attr; 1337 1338 if (!sysfs_initialized) 1339 return -EACCES; 1340 1341 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1342 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1343 else 1344 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1345 if (retval) 1346 goto err; 1347 1348 retval = pci_create_resource_files(pdev); 1349 if (retval) 1350 goto err_config_file; 1351 1352 /* If the device has a ROM, try to expose it in sysfs. */ 1353 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1354 if (rom_size) { 1355 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1356 if (!attr) { 1357 retval = -ENOMEM; 1358 goto err_resource_files; 1359 } 1360 sysfs_bin_attr_init(attr); 1361 attr->size = rom_size; 1362 attr->attr.name = "rom"; 1363 attr->attr.mode = 0600; 1364 attr->read = pci_read_rom; 1365 attr->write = pci_write_rom; 1366 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1367 if (retval) { 1368 kfree(attr); 1369 goto err_resource_files; 1370 } 1371 pdev->rom_attr = attr; 1372 } 1373 1374 /* add sysfs entries for various capabilities */ 1375 retval = pci_create_capabilities_sysfs(pdev); 1376 if (retval) 1377 goto err_rom_file; 1378 1379 pci_create_firmware_label_files(pdev); 1380 1381 return 0; 1382 1383 err_rom_file: 1384 if (pdev->rom_attr) { 1385 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1386 kfree(pdev->rom_attr); 1387 pdev->rom_attr = NULL; 1388 } 1389 err_resource_files: 1390 pci_remove_resource_files(pdev); 1391 err_config_file: 1392 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1393 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1394 else 1395 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1396 err: 1397 return retval; 1398 } 1399 1400 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1401 { 1402 pcie_vpd_remove_sysfs_dev_files(dev); 1403 pcie_aspm_remove_sysfs_dev_files(dev); 1404 if (dev->reset_fn) { 1405 device_remove_file(&dev->dev, &dev_attr_reset); 1406 dev->reset_fn = 0; 1407 } 1408 } 1409 1410 /** 1411 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1412 * @pdev: device whose entries we should free 1413 * 1414 * Cleanup when @pdev is removed from sysfs. 1415 */ 1416 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1417 { 1418 if (!sysfs_initialized) 1419 return; 1420 1421 pci_remove_capabilities_sysfs(pdev); 1422 1423 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 1424 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1425 else 1426 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1427 1428 pci_remove_resource_files(pdev); 1429 1430 if (pdev->rom_attr) { 1431 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1432 kfree(pdev->rom_attr); 1433 pdev->rom_attr = NULL; 1434 } 1435 1436 pci_remove_firmware_label_files(pdev); 1437 } 1438 1439 static int __init pci_sysfs_init(void) 1440 { 1441 struct pci_dev *pdev = NULL; 1442 int retval; 1443 1444 sysfs_initialized = 1; 1445 for_each_pci_dev(pdev) { 1446 retval = pci_create_sysfs_dev_files(pdev); 1447 if (retval) { 1448 pci_dev_put(pdev); 1449 return retval; 1450 } 1451 } 1452 1453 return 0; 1454 } 1455 late_initcall(pci_sysfs_init); 1456 1457 static struct attribute *pci_dev_dev_attrs[] = { 1458 &dev_attr_boot_vga.attr, 1459 NULL, 1460 }; 1461 1462 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1463 struct attribute *a, int n) 1464 { 1465 struct device *dev = kobj_to_dev(kobj); 1466 struct pci_dev *pdev = to_pci_dev(dev); 1467 1468 if (a == &dev_attr_boot_vga.attr) 1469 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1470 return 0; 1471 1472 return a->mode; 1473 } 1474 1475 static struct attribute *pci_dev_hp_attrs[] = { 1476 &dev_attr_remove.attr, 1477 &dev_attr_dev_rescan.attr, 1478 NULL, 1479 }; 1480 1481 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1482 struct attribute *a, int n) 1483 { 1484 struct device *dev = kobj_to_dev(kobj); 1485 struct pci_dev *pdev = to_pci_dev(dev); 1486 1487 if (pdev->is_virtfn) 1488 return 0; 1489 1490 return a->mode; 1491 } 1492 1493 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1494 struct attribute *a, int n) 1495 { 1496 struct device *dev = kobj_to_dev(kobj); 1497 struct pci_dev *pdev = to_pci_dev(dev); 1498 1499 if (pci_is_bridge(pdev)) 1500 return a->mode; 1501 1502 return 0; 1503 } 1504 1505 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1506 struct attribute *a, int n) 1507 { 1508 struct device *dev = kobj_to_dev(kobj); 1509 struct pci_dev *pdev = to_pci_dev(dev); 1510 1511 if (pci_is_pcie(pdev)) 1512 return a->mode; 1513 1514 return 0; 1515 } 1516 1517 static const struct attribute_group pci_dev_group = { 1518 .attrs = pci_dev_attrs, 1519 }; 1520 1521 const struct attribute_group *pci_dev_groups[] = { 1522 &pci_dev_group, 1523 NULL, 1524 }; 1525 1526 static const struct attribute_group pci_bridge_group = { 1527 .attrs = pci_bridge_attrs, 1528 }; 1529 1530 const struct attribute_group *pci_bridge_groups[] = { 1531 &pci_bridge_group, 1532 NULL, 1533 }; 1534 1535 static const struct attribute_group pcie_dev_group = { 1536 .attrs = pcie_dev_attrs, 1537 }; 1538 1539 const struct attribute_group *pcie_dev_groups[] = { 1540 &pcie_dev_group, 1541 NULL, 1542 }; 1543 1544 static const struct attribute_group pci_dev_hp_attr_group = { 1545 .attrs = pci_dev_hp_attrs, 1546 .is_visible = pci_dev_hp_attrs_are_visible, 1547 }; 1548 1549 static const struct attribute_group pci_dev_attr_group = { 1550 .attrs = pci_dev_dev_attrs, 1551 .is_visible = pci_dev_attrs_are_visible, 1552 }; 1553 1554 static const struct attribute_group pci_bridge_attr_group = { 1555 .attrs = pci_bridge_attrs, 1556 .is_visible = pci_bridge_attrs_are_visible, 1557 }; 1558 1559 static const struct attribute_group pcie_dev_attr_group = { 1560 .attrs = pcie_dev_attrs, 1561 .is_visible = pcie_dev_attrs_are_visible, 1562 }; 1563 1564 static const struct attribute_group *pci_dev_attr_groups[] = { 1565 &pci_dev_attr_group, 1566 &pci_dev_hp_attr_group, 1567 #ifdef CONFIG_PCI_IOV 1568 &sriov_dev_attr_group, 1569 #endif 1570 &pci_bridge_attr_group, 1571 &pcie_dev_attr_group, 1572 #ifdef CONFIG_PCIEAER 1573 &aer_stats_attr_group, 1574 #endif 1575 NULL, 1576 }; 1577 1578 const struct device_type pci_dev_type = { 1579 .groups = pci_dev_attr_groups, 1580 }; 1581