1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * drivers/pci/iov.c 4 * 5 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> 6 * 7 * PCI Express I/O Virtualization (IOV) support. 8 * Single Root IOV 1.0 9 * Address Translation Service 1.0 10 */ 11 12 #include <linux/pci.h> 13 #include <linux/slab.h> 14 #include <linux/mutex.h> 15 #include <linux/export.h> 16 #include <linux/string.h> 17 #include <linux/delay.h> 18 #include <linux/pci-ats.h> 19 #include "pci.h" 20 21 #define VIRTFN_ID_LEN 16 22 23 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) 24 { 25 if (!dev->is_physfn) 26 return -EINVAL; 27 return dev->bus->number + ((dev->devfn + dev->sriov->offset + 28 dev->sriov->stride * vf_id) >> 8); 29 } 30 31 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) 32 { 33 if (!dev->is_physfn) 34 return -EINVAL; 35 return (dev->devfn + dev->sriov->offset + 36 dev->sriov->stride * vf_id) & 0xff; 37 } 38 39 /* 40 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may 41 * change when NumVFs changes. 42 * 43 * Update iov->offset and iov->stride when NumVFs is written. 44 */ 45 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) 46 { 47 struct pci_sriov *iov = dev->sriov; 48 49 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); 50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); 51 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); 52 } 53 54 /* 55 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride 56 * determine how many additional bus numbers will be consumed by VFs. 57 * 58 * Iterate over all valid NumVFs, validate offset and stride, and calculate 59 * the maximum number of bus numbers that could ever be required. 60 */ 61 static int compute_max_vf_buses(struct pci_dev *dev) 62 { 63 struct pci_sriov *iov = dev->sriov; 64 int nr_virtfn, busnr, rc = 0; 65 66 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { 67 pci_iov_set_numvfs(dev, nr_virtfn); 68 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { 69 rc = -EIO; 70 goto out; 71 } 72 73 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); 74 if (busnr > iov->max_VF_buses) 75 iov->max_VF_buses = busnr; 76 } 77 78 out: 79 pci_iov_set_numvfs(dev, 0); 80 return rc; 81 } 82 83 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) 84 { 85 struct pci_bus *child; 86 87 if (bus->number == busnr) 88 return bus; 89 90 child = pci_find_bus(pci_domain_nr(bus), busnr); 91 if (child) 92 return child; 93 94 child = pci_add_new_bus(bus, NULL, busnr); 95 if (!child) 96 return NULL; 97 98 pci_bus_insert_busn_res(child, busnr, busnr); 99 100 return child; 101 } 102 103 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) 104 { 105 if (physbus != virtbus && list_empty(&virtbus->devices)) 106 pci_remove_bus(virtbus); 107 } 108 109 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) 110 { 111 if (!dev->is_physfn) 112 return 0; 113 114 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; 115 } 116 117 int pci_iov_add_virtfn(struct pci_dev *dev, int id) 118 { 119 int i; 120 int rc = -ENOMEM; 121 u64 size; 122 char buf[VIRTFN_ID_LEN]; 123 struct pci_dev *virtfn; 124 struct resource *res; 125 struct pci_sriov *iov = dev->sriov; 126 struct pci_bus *bus; 127 128 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); 129 if (!bus) 130 goto failed; 131 132 virtfn = pci_alloc_dev(bus); 133 if (!virtfn) 134 goto failed0; 135 136 virtfn->devfn = pci_iov_virtfn_devfn(dev, id); 137 virtfn->vendor = dev->vendor; 138 virtfn->device = iov->vf_device; 139 rc = pci_setup_device(virtfn); 140 if (rc) 141 goto failed0; 142 143 virtfn->dev.parent = dev->dev.parent; 144 virtfn->physfn = pci_dev_get(dev); 145 virtfn->is_virtfn = 1; 146 virtfn->multifunction = 0; 147 148 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 149 res = &dev->resource[i + PCI_IOV_RESOURCES]; 150 if (!res->parent) 151 continue; 152 virtfn->resource[i].name = pci_name(virtfn); 153 virtfn->resource[i].flags = res->flags; 154 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); 155 virtfn->resource[i].start = res->start + size * id; 156 virtfn->resource[i].end = virtfn->resource[i].start + size - 1; 157 rc = request_resource(res, &virtfn->resource[i]); 158 BUG_ON(rc); 159 } 160 161 pci_device_add(virtfn, virtfn->bus); 162 163 sprintf(buf, "virtfn%u", id); 164 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); 165 if (rc) 166 goto failed1; 167 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); 168 if (rc) 169 goto failed2; 170 171 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); 172 173 pci_bus_add_device(virtfn); 174 175 return 0; 176 177 failed2: 178 sysfs_remove_link(&dev->dev.kobj, buf); 179 failed1: 180 pci_dev_put(dev); 181 pci_stop_and_remove_bus_device(virtfn); 182 failed0: 183 virtfn_remove_bus(dev->bus, bus); 184 failed: 185 186 return rc; 187 } 188 189 void pci_iov_remove_virtfn(struct pci_dev *dev, int id) 190 { 191 char buf[VIRTFN_ID_LEN]; 192 struct pci_dev *virtfn; 193 194 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), 195 pci_iov_virtfn_bus(dev, id), 196 pci_iov_virtfn_devfn(dev, id)); 197 if (!virtfn) 198 return; 199 200 sprintf(buf, "virtfn%u", id); 201 sysfs_remove_link(&dev->dev.kobj, buf); 202 /* 203 * pci_stop_dev() could have been called for this virtfn already, 204 * so the directory for the virtfn may have been removed before. 205 * Double check to avoid spurious sysfs warnings. 206 */ 207 if (virtfn->dev.kobj.sd) 208 sysfs_remove_link(&virtfn->dev.kobj, "physfn"); 209 210 pci_stop_and_remove_bus_device(virtfn); 211 virtfn_remove_bus(dev->bus, virtfn->bus); 212 213 /* balance pci_get_domain_bus_and_slot() */ 214 pci_dev_put(virtfn); 215 pci_dev_put(dev); 216 } 217 218 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) 219 { 220 return 0; 221 } 222 223 int __weak pcibios_sriov_disable(struct pci_dev *pdev) 224 { 225 return 0; 226 } 227 228 static int sriov_enable(struct pci_dev *dev, int nr_virtfn) 229 { 230 int rc; 231 int i; 232 int nres; 233 u16 initial; 234 struct resource *res; 235 struct pci_dev *pdev; 236 struct pci_sriov *iov = dev->sriov; 237 int bars = 0; 238 int bus; 239 240 if (!nr_virtfn) 241 return 0; 242 243 if (iov->num_VFs) 244 return -EINVAL; 245 246 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); 247 if (initial > iov->total_VFs || 248 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) 249 return -EIO; 250 251 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || 252 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) 253 return -EINVAL; 254 255 nres = 0; 256 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 257 bars |= (1 << (i + PCI_IOV_RESOURCES)); 258 res = &dev->resource[i + PCI_IOV_RESOURCES]; 259 if (res->parent) 260 nres++; 261 } 262 if (nres != iov->nres) { 263 pci_err(dev, "not enough MMIO resources for SR-IOV\n"); 264 return -ENOMEM; 265 } 266 267 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); 268 if (bus > dev->bus->busn_res.end) { 269 pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", 270 nr_virtfn, bus, &dev->bus->busn_res); 271 return -ENOMEM; 272 } 273 274 if (pci_enable_resources(dev, bars)) { 275 pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); 276 return -ENOMEM; 277 } 278 279 if (iov->link != dev->devfn) { 280 pdev = pci_get_slot(dev->bus, iov->link); 281 if (!pdev) 282 return -ENODEV; 283 284 if (!pdev->is_physfn) { 285 pci_dev_put(pdev); 286 return -ENOSYS; 287 } 288 289 rc = sysfs_create_link(&dev->dev.kobj, 290 &pdev->dev.kobj, "dep_link"); 291 pci_dev_put(pdev); 292 if (rc) 293 return rc; 294 } 295 296 iov->initial_VFs = initial; 297 if (nr_virtfn < initial) 298 initial = nr_virtfn; 299 300 rc = pcibios_sriov_enable(dev, initial); 301 if (rc) { 302 pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); 303 goto err_pcibios; 304 } 305 306 pci_iov_set_numvfs(dev, nr_virtfn); 307 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; 308 pci_cfg_access_lock(dev); 309 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 310 msleep(100); 311 pci_cfg_access_unlock(dev); 312 313 for (i = 0; i < initial; i++) { 314 rc = pci_iov_add_virtfn(dev, i); 315 if (rc) 316 goto failed; 317 } 318 319 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); 320 iov->num_VFs = nr_virtfn; 321 322 return 0; 323 324 failed: 325 while (i--) 326 pci_iov_remove_virtfn(dev, i); 327 328 err_pcibios: 329 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 330 pci_cfg_access_lock(dev); 331 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 332 ssleep(1); 333 pci_cfg_access_unlock(dev); 334 335 pcibios_sriov_disable(dev); 336 337 if (iov->link != dev->devfn) 338 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 339 340 pci_iov_set_numvfs(dev, 0); 341 return rc; 342 } 343 344 static void sriov_disable(struct pci_dev *dev) 345 { 346 int i; 347 struct pci_sriov *iov = dev->sriov; 348 349 if (!iov->num_VFs) 350 return; 351 352 for (i = 0; i < iov->num_VFs; i++) 353 pci_iov_remove_virtfn(dev, i); 354 355 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 356 pci_cfg_access_lock(dev); 357 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 358 ssleep(1); 359 pci_cfg_access_unlock(dev); 360 361 pcibios_sriov_disable(dev); 362 363 if (iov->link != dev->devfn) 364 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 365 366 iov->num_VFs = 0; 367 pci_iov_set_numvfs(dev, 0); 368 } 369 370 static int sriov_init(struct pci_dev *dev, int pos) 371 { 372 int i, bar64; 373 int rc; 374 int nres; 375 u32 pgsz; 376 u16 ctrl, total; 377 struct pci_sriov *iov; 378 struct resource *res; 379 struct pci_dev *pdev; 380 381 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); 382 if (ctrl & PCI_SRIOV_CTRL_VFE) { 383 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); 384 ssleep(1); 385 } 386 387 ctrl = 0; 388 list_for_each_entry(pdev, &dev->bus->devices, bus_list) 389 if (pdev->is_physfn) 390 goto found; 391 392 pdev = NULL; 393 if (pci_ari_enabled(dev->bus)) 394 ctrl |= PCI_SRIOV_CTRL_ARI; 395 396 found: 397 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); 398 399 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); 400 if (!total) 401 return 0; 402 403 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); 404 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; 405 pgsz &= ~((1 << i) - 1); 406 if (!pgsz) 407 return -EIO; 408 409 pgsz &= ~(pgsz - 1); 410 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); 411 412 iov = kzalloc(sizeof(*iov), GFP_KERNEL); 413 if (!iov) 414 return -ENOMEM; 415 416 nres = 0; 417 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 418 res = &dev->resource[i + PCI_IOV_RESOURCES]; 419 /* 420 * If it is already FIXED, don't change it, something 421 * (perhaps EA or header fixups) wants it this way. 422 */ 423 if (res->flags & IORESOURCE_PCI_FIXED) 424 bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; 425 else 426 bar64 = __pci_read_base(dev, pci_bar_unknown, res, 427 pos + PCI_SRIOV_BAR + i * 4); 428 if (!res->flags) 429 continue; 430 if (resource_size(res) & (PAGE_SIZE - 1)) { 431 rc = -EIO; 432 goto failed; 433 } 434 iov->barsz[i] = resource_size(res); 435 res->end = res->start + resource_size(res) * total - 1; 436 pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", 437 i, res, i, total); 438 i += bar64; 439 nres++; 440 } 441 442 iov->pos = pos; 443 iov->nres = nres; 444 iov->ctrl = ctrl; 445 iov->total_VFs = total; 446 pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); 447 iov->pgsz = pgsz; 448 iov->self = dev; 449 iov->drivers_autoprobe = true; 450 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); 451 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); 452 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) 453 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); 454 455 if (pdev) 456 iov->dev = pci_dev_get(pdev); 457 else 458 iov->dev = dev; 459 460 dev->sriov = iov; 461 dev->is_physfn = 1; 462 rc = compute_max_vf_buses(dev); 463 if (rc) 464 goto fail_max_buses; 465 466 return 0; 467 468 fail_max_buses: 469 dev->sriov = NULL; 470 dev->is_physfn = 0; 471 failed: 472 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 473 res = &dev->resource[i + PCI_IOV_RESOURCES]; 474 res->flags = 0; 475 } 476 477 kfree(iov); 478 return rc; 479 } 480 481 static void sriov_release(struct pci_dev *dev) 482 { 483 BUG_ON(dev->sriov->num_VFs); 484 485 if (dev != dev->sriov->dev) 486 pci_dev_put(dev->sriov->dev); 487 488 kfree(dev->sriov); 489 dev->sriov = NULL; 490 } 491 492 static void sriov_restore_state(struct pci_dev *dev) 493 { 494 int i; 495 u16 ctrl; 496 struct pci_sriov *iov = dev->sriov; 497 498 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); 499 if (ctrl & PCI_SRIOV_CTRL_VFE) 500 return; 501 502 /* 503 * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because 504 * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. 505 */ 506 ctrl &= ~PCI_SRIOV_CTRL_ARI; 507 ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; 508 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); 509 510 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) 511 pci_update_resource(dev, i); 512 513 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); 514 pci_iov_set_numvfs(dev, iov->num_VFs); 515 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 516 if (iov->ctrl & PCI_SRIOV_CTRL_VFE) 517 msleep(100); 518 } 519 520 /** 521 * pci_iov_init - initialize the IOV capability 522 * @dev: the PCI device 523 * 524 * Returns 0 on success, or negative on failure. 525 */ 526 int pci_iov_init(struct pci_dev *dev) 527 { 528 int pos; 529 530 if (!pci_is_pcie(dev)) 531 return -ENODEV; 532 533 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); 534 if (pos) 535 return sriov_init(dev, pos); 536 537 return -ENODEV; 538 } 539 540 /** 541 * pci_iov_release - release resources used by the IOV capability 542 * @dev: the PCI device 543 */ 544 void pci_iov_release(struct pci_dev *dev) 545 { 546 if (dev->is_physfn) 547 sriov_release(dev); 548 } 549 550 /** 551 * pci_iov_update_resource - update a VF BAR 552 * @dev: the PCI device 553 * @resno: the resource number 554 * 555 * Update a VF BAR in the SR-IOV capability of a PF. 556 */ 557 void pci_iov_update_resource(struct pci_dev *dev, int resno) 558 { 559 struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; 560 struct resource *res = dev->resource + resno; 561 int vf_bar = resno - PCI_IOV_RESOURCES; 562 struct pci_bus_region region; 563 u16 cmd; 564 u32 new; 565 int reg; 566 567 /* 568 * The generic pci_restore_bars() path calls this for all devices, 569 * including VFs and non-SR-IOV devices. If this is not a PF, we 570 * have nothing to do. 571 */ 572 if (!iov) 573 return; 574 575 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); 576 if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { 577 dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", 578 vf_bar, res); 579 return; 580 } 581 582 /* 583 * Ignore unimplemented BARs, unused resource slots for 64-bit 584 * BARs, and non-movable resources, e.g., those described via 585 * Enhanced Allocation. 586 */ 587 if (!res->flags) 588 return; 589 590 if (res->flags & IORESOURCE_UNSET) 591 return; 592 593 if (res->flags & IORESOURCE_PCI_FIXED) 594 return; 595 596 pcibios_resource_to_bus(dev->bus, ®ion, res); 597 new = region.start; 598 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; 599 600 reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; 601 pci_write_config_dword(dev, reg, new); 602 if (res->flags & IORESOURCE_MEM_64) { 603 new = region.start >> 16 >> 16; 604 pci_write_config_dword(dev, reg + 4, new); 605 } 606 } 607 608 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, 609 int resno) 610 { 611 return pci_iov_resource_size(dev, resno); 612 } 613 614 /** 615 * pci_sriov_resource_alignment - get resource alignment for VF BAR 616 * @dev: the PCI device 617 * @resno: the resource number 618 * 619 * Returns the alignment of the VF BAR found in the SR-IOV capability. 620 * This is not the same as the resource size which is defined as 621 * the VF BAR size multiplied by the number of VFs. The alignment 622 * is just the VF BAR size. 623 */ 624 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) 625 { 626 return pcibios_iov_resource_alignment(dev, resno); 627 } 628 629 /** 630 * pci_restore_iov_state - restore the state of the IOV capability 631 * @dev: the PCI device 632 */ 633 void pci_restore_iov_state(struct pci_dev *dev) 634 { 635 if (dev->is_physfn) 636 sriov_restore_state(dev); 637 } 638 639 /** 640 * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs 641 * @dev: the PCI device 642 * @auto_probe: set VF drivers auto probe flag 643 */ 644 void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) 645 { 646 if (dev->is_physfn) 647 dev->sriov->drivers_autoprobe = auto_probe; 648 } 649 650 /** 651 * pci_iov_bus_range - find bus range used by Virtual Function 652 * @bus: the PCI bus 653 * 654 * Returns max number of buses (exclude current one) used by Virtual 655 * Functions. 656 */ 657 int pci_iov_bus_range(struct pci_bus *bus) 658 { 659 int max = 0; 660 struct pci_dev *dev; 661 662 list_for_each_entry(dev, &bus->devices, bus_list) { 663 if (!dev->is_physfn) 664 continue; 665 if (dev->sriov->max_VF_buses > max) 666 max = dev->sriov->max_VF_buses; 667 } 668 669 return max ? max - bus->number : 0; 670 } 671 672 /** 673 * pci_enable_sriov - enable the SR-IOV capability 674 * @dev: the PCI device 675 * @nr_virtfn: number of virtual functions to enable 676 * 677 * Returns 0 on success, or negative on failure. 678 */ 679 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 680 { 681 might_sleep(); 682 683 if (!dev->is_physfn) 684 return -ENOSYS; 685 686 return sriov_enable(dev, nr_virtfn); 687 } 688 EXPORT_SYMBOL_GPL(pci_enable_sriov); 689 690 /** 691 * pci_disable_sriov - disable the SR-IOV capability 692 * @dev: the PCI device 693 */ 694 void pci_disable_sriov(struct pci_dev *dev) 695 { 696 might_sleep(); 697 698 if (!dev->is_physfn) 699 return; 700 701 sriov_disable(dev); 702 } 703 EXPORT_SYMBOL_GPL(pci_disable_sriov); 704 705 /** 706 * pci_num_vf - return number of VFs associated with a PF device_release_driver 707 * @dev: the PCI device 708 * 709 * Returns number of VFs, or 0 if SR-IOV is not enabled. 710 */ 711 int pci_num_vf(struct pci_dev *dev) 712 { 713 if (!dev->is_physfn) 714 return 0; 715 716 return dev->sriov->num_VFs; 717 } 718 EXPORT_SYMBOL_GPL(pci_num_vf); 719 720 /** 721 * pci_vfs_assigned - returns number of VFs are assigned to a guest 722 * @dev: the PCI device 723 * 724 * Returns number of VFs belonging to this device that are assigned to a guest. 725 * If device is not a physical function returns 0. 726 */ 727 int pci_vfs_assigned(struct pci_dev *dev) 728 { 729 struct pci_dev *vfdev; 730 unsigned int vfs_assigned = 0; 731 unsigned short dev_id; 732 733 /* only search if we are a PF */ 734 if (!dev->is_physfn) 735 return 0; 736 737 /* 738 * determine the device ID for the VFs, the vendor ID will be the 739 * same as the PF so there is no need to check for that one 740 */ 741 dev_id = dev->sriov->vf_device; 742 743 /* loop through all the VFs to see if we own any that are assigned */ 744 vfdev = pci_get_device(dev->vendor, dev_id, NULL); 745 while (vfdev) { 746 /* 747 * It is considered assigned if it is a virtual function with 748 * our dev as the physical function and the assigned bit is set 749 */ 750 if (vfdev->is_virtfn && (vfdev->physfn == dev) && 751 pci_is_dev_assigned(vfdev)) 752 vfs_assigned++; 753 754 vfdev = pci_get_device(dev->vendor, dev_id, vfdev); 755 } 756 757 return vfs_assigned; 758 } 759 EXPORT_SYMBOL_GPL(pci_vfs_assigned); 760 761 /** 762 * pci_sriov_set_totalvfs -- reduce the TotalVFs available 763 * @dev: the PCI PF device 764 * @numvfs: number that should be used for TotalVFs supported 765 * 766 * Should be called from PF driver's probe routine with 767 * device's mutex held. 768 * 769 * Returns 0 if PF is an SRIOV-capable device and 770 * value of numvfs valid. If not a PF return -ENOSYS; 771 * if numvfs is invalid return -EINVAL; 772 * if VFs already enabled, return -EBUSY. 773 */ 774 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) 775 { 776 if (!dev->is_physfn) 777 return -ENOSYS; 778 if (numvfs > dev->sriov->total_VFs) 779 return -EINVAL; 780 781 /* Shouldn't change if VFs already enabled */ 782 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) 783 return -EBUSY; 784 else 785 dev->sriov->driver_max_VFs = numvfs; 786 787 return 0; 788 } 789 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); 790 791 /** 792 * pci_sriov_get_totalvfs -- get total VFs supported on this device 793 * @dev: the PCI PF device 794 * 795 * For a PCIe device with SRIOV support, return the PCIe 796 * SRIOV capability value of TotalVFs or the value of driver_max_VFs 797 * if the driver reduced it. Otherwise 0. 798 */ 799 int pci_sriov_get_totalvfs(struct pci_dev *dev) 800 { 801 if (!dev->is_physfn) 802 return 0; 803 804 if (dev->sriov->driver_max_VFs) 805 return dev->sriov->driver_max_VFs; 806 807 return dev->sriov->total_VFs; 808 } 809 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); 810