xref: /openbmc/linux/drivers/pci/iov.c (revision ca481398)
1 /*
2  * drivers/pci/iov.c
3  *
4  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5  *
6  * PCI Express I/O Virtualization (IOV) support.
7  *   Single Root IOV 1.0
8  *   Address Translation Service 1.0
9  */
10 
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/mutex.h>
14 #include <linux/export.h>
15 #include <linux/string.h>
16 #include <linux/delay.h>
17 #include <linux/pci-ats.h>
18 #include "pci.h"
19 
20 #define VIRTFN_ID_LEN	16
21 
22 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
23 {
24 	if (!dev->is_physfn)
25 		return -EINVAL;
26 	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
27 				    dev->sriov->stride * vf_id) >> 8);
28 }
29 
30 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
31 {
32 	if (!dev->is_physfn)
33 		return -EINVAL;
34 	return (dev->devfn + dev->sriov->offset +
35 		dev->sriov->stride * vf_id) & 0xff;
36 }
37 
38 /*
39  * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40  * change when NumVFs changes.
41  *
42  * Update iov->offset and iov->stride when NumVFs is written.
43  */
44 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45 {
46 	struct pci_sriov *iov = dev->sriov;
47 
48 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51 }
52 
53 /*
54  * The PF consumes one bus number.  NumVFs, First VF Offset, and VF Stride
55  * determine how many additional bus numbers will be consumed by VFs.
56  *
57  * Iterate over all valid NumVFs, validate offset and stride, and calculate
58  * the maximum number of bus numbers that could ever be required.
59  */
60 static int compute_max_vf_buses(struct pci_dev *dev)
61 {
62 	struct pci_sriov *iov = dev->sriov;
63 	int nr_virtfn, busnr, rc = 0;
64 
65 	for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
66 		pci_iov_set_numvfs(dev, nr_virtfn);
67 		if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
68 			rc = -EIO;
69 			goto out;
70 		}
71 
72 		busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
73 		if (busnr > iov->max_VF_buses)
74 			iov->max_VF_buses = busnr;
75 	}
76 
77 out:
78 	pci_iov_set_numvfs(dev, 0);
79 	return rc;
80 }
81 
82 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
83 {
84 	struct pci_bus *child;
85 
86 	if (bus->number == busnr)
87 		return bus;
88 
89 	child = pci_find_bus(pci_domain_nr(bus), busnr);
90 	if (child)
91 		return child;
92 
93 	child = pci_add_new_bus(bus, NULL, busnr);
94 	if (!child)
95 		return NULL;
96 
97 	pci_bus_insert_busn_res(child, busnr, busnr);
98 
99 	return child;
100 }
101 
102 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
103 {
104 	if (physbus != virtbus && list_empty(&virtbus->devices))
105 		pci_remove_bus(virtbus);
106 }
107 
108 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
109 {
110 	if (!dev->is_physfn)
111 		return 0;
112 
113 	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
114 }
115 
116 int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
117 {
118 	int i;
119 	int rc = -ENOMEM;
120 	u64 size;
121 	char buf[VIRTFN_ID_LEN];
122 	struct pci_dev *virtfn;
123 	struct resource *res;
124 	struct pci_sriov *iov = dev->sriov;
125 	struct pci_bus *bus;
126 
127 	bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
128 	if (!bus)
129 		goto failed;
130 
131 	virtfn = pci_alloc_dev(bus);
132 	if (!virtfn)
133 		goto failed0;
134 
135 	virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
136 	virtfn->vendor = dev->vendor;
137 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
138 	rc = pci_setup_device(virtfn);
139 	if (rc)
140 		goto failed0;
141 
142 	virtfn->dev.parent = dev->dev.parent;
143 	virtfn->physfn = pci_dev_get(dev);
144 	virtfn->is_virtfn = 1;
145 	virtfn->multifunction = 0;
146 
147 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
148 		res = &dev->resource[i + PCI_IOV_RESOURCES];
149 		if (!res->parent)
150 			continue;
151 		virtfn->resource[i].name = pci_name(virtfn);
152 		virtfn->resource[i].flags = res->flags;
153 		size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
154 		virtfn->resource[i].start = res->start + size * id;
155 		virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
156 		rc = request_resource(res, &virtfn->resource[i]);
157 		BUG_ON(rc);
158 	}
159 
160 	if (reset)
161 		__pci_reset_function(virtfn);
162 
163 	pci_device_add(virtfn, virtfn->bus);
164 
165 	pci_bus_add_device(virtfn);
166 	sprintf(buf, "virtfn%u", id);
167 	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
168 	if (rc)
169 		goto failed1;
170 	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
171 	if (rc)
172 		goto failed2;
173 
174 	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
175 
176 	return 0;
177 
178 failed2:
179 	sysfs_remove_link(&dev->dev.kobj, buf);
180 failed1:
181 	pci_dev_put(dev);
182 	pci_stop_and_remove_bus_device(virtfn);
183 failed0:
184 	virtfn_remove_bus(dev->bus, bus);
185 failed:
186 
187 	return rc;
188 }
189 
190 void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
191 {
192 	char buf[VIRTFN_ID_LEN];
193 	struct pci_dev *virtfn;
194 
195 	virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
196 					     pci_iov_virtfn_bus(dev, id),
197 					     pci_iov_virtfn_devfn(dev, id));
198 	if (!virtfn)
199 		return;
200 
201 	if (reset) {
202 		device_release_driver(&virtfn->dev);
203 		__pci_reset_function(virtfn);
204 	}
205 
206 	sprintf(buf, "virtfn%u", id);
207 	sysfs_remove_link(&dev->dev.kobj, buf);
208 	/*
209 	 * pci_stop_dev() could have been called for this virtfn already,
210 	 * so the directory for the virtfn may have been removed before.
211 	 * Double check to avoid spurious sysfs warnings.
212 	 */
213 	if (virtfn->dev.kobj.sd)
214 		sysfs_remove_link(&virtfn->dev.kobj, "physfn");
215 
216 	pci_stop_and_remove_bus_device(virtfn);
217 	virtfn_remove_bus(dev->bus, virtfn->bus);
218 
219 	/* balance pci_get_domain_bus_and_slot() */
220 	pci_dev_put(virtfn);
221 	pci_dev_put(dev);
222 }
223 
224 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
225 {
226 	return 0;
227 }
228 
229 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
230 {
231 	return 0;
232 }
233 
234 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
235 {
236 	int rc;
237 	int i;
238 	int nres;
239 	u16 initial;
240 	struct resource *res;
241 	struct pci_dev *pdev;
242 	struct pci_sriov *iov = dev->sriov;
243 	int bars = 0;
244 	int bus;
245 
246 	if (!nr_virtfn)
247 		return 0;
248 
249 	if (iov->num_VFs)
250 		return -EINVAL;
251 
252 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
253 	if (initial > iov->total_VFs ||
254 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
255 		return -EIO;
256 
257 	if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
258 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
259 		return -EINVAL;
260 
261 	nres = 0;
262 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
263 		bars |= (1 << (i + PCI_IOV_RESOURCES));
264 		res = &dev->resource[i + PCI_IOV_RESOURCES];
265 		if (res->parent)
266 			nres++;
267 	}
268 	if (nres != iov->nres) {
269 		dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 		return -ENOMEM;
271 	}
272 
273 	bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
274 	if (bus > dev->bus->busn_res.end) {
275 		dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
276 			nr_virtfn, bus, &dev->bus->busn_res);
277 		return -ENOMEM;
278 	}
279 
280 	if (pci_enable_resources(dev, bars)) {
281 		dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
282 		return -ENOMEM;
283 	}
284 
285 	if (iov->link != dev->devfn) {
286 		pdev = pci_get_slot(dev->bus, iov->link);
287 		if (!pdev)
288 			return -ENODEV;
289 
290 		if (!pdev->is_physfn) {
291 			pci_dev_put(pdev);
292 			return -ENOSYS;
293 		}
294 
295 		rc = sysfs_create_link(&dev->dev.kobj,
296 					&pdev->dev.kobj, "dep_link");
297 		pci_dev_put(pdev);
298 		if (rc)
299 			return rc;
300 	}
301 
302 	iov->initial_VFs = initial;
303 	if (nr_virtfn < initial)
304 		initial = nr_virtfn;
305 
306 	rc = pcibios_sriov_enable(dev, initial);
307 	if (rc) {
308 		dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
309 		goto err_pcibios;
310 	}
311 
312 	pci_iov_set_numvfs(dev, nr_virtfn);
313 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
314 	pci_cfg_access_lock(dev);
315 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
316 	msleep(100);
317 	pci_cfg_access_unlock(dev);
318 
319 	for (i = 0; i < initial; i++) {
320 		rc = pci_iov_add_virtfn(dev, i, 0);
321 		if (rc)
322 			goto failed;
323 	}
324 
325 	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
326 	iov->num_VFs = nr_virtfn;
327 
328 	return 0;
329 
330 failed:
331 	while (i--)
332 		pci_iov_remove_virtfn(dev, i, 0);
333 
334 err_pcibios:
335 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
336 	pci_cfg_access_lock(dev);
337 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
338 	ssleep(1);
339 	pci_cfg_access_unlock(dev);
340 
341 	pcibios_sriov_disable(dev);
342 
343 	if (iov->link != dev->devfn)
344 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
345 
346 	pci_iov_set_numvfs(dev, 0);
347 	return rc;
348 }
349 
350 static void sriov_disable(struct pci_dev *dev)
351 {
352 	int i;
353 	struct pci_sriov *iov = dev->sriov;
354 
355 	if (!iov->num_VFs)
356 		return;
357 
358 	for (i = 0; i < iov->num_VFs; i++)
359 		pci_iov_remove_virtfn(dev, i, 0);
360 
361 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
362 	pci_cfg_access_lock(dev);
363 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
364 	ssleep(1);
365 	pci_cfg_access_unlock(dev);
366 
367 	pcibios_sriov_disable(dev);
368 
369 	if (iov->link != dev->devfn)
370 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
371 
372 	iov->num_VFs = 0;
373 	pci_iov_set_numvfs(dev, 0);
374 }
375 
376 static int sriov_init(struct pci_dev *dev, int pos)
377 {
378 	int i, bar64;
379 	int rc;
380 	int nres;
381 	u32 pgsz;
382 	u16 ctrl, total;
383 	struct pci_sriov *iov;
384 	struct resource *res;
385 	struct pci_dev *pdev;
386 
387 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
388 	if (ctrl & PCI_SRIOV_CTRL_VFE) {
389 		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
390 		ssleep(1);
391 	}
392 
393 	ctrl = 0;
394 	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
395 		if (pdev->is_physfn)
396 			goto found;
397 
398 	pdev = NULL;
399 	if (pci_ari_enabled(dev->bus))
400 		ctrl |= PCI_SRIOV_CTRL_ARI;
401 
402 found:
403 	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
404 
405 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
406 	if (!total)
407 		return 0;
408 
409 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
410 	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
411 	pgsz &= ~((1 << i) - 1);
412 	if (!pgsz)
413 		return -EIO;
414 
415 	pgsz &= ~(pgsz - 1);
416 	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
417 
418 	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
419 	if (!iov)
420 		return -ENOMEM;
421 
422 	nres = 0;
423 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
424 		res = &dev->resource[i + PCI_IOV_RESOURCES];
425 		/*
426 		 * If it is already FIXED, don't change it, something
427 		 * (perhaps EA or header fixups) wants it this way.
428 		 */
429 		if (res->flags & IORESOURCE_PCI_FIXED)
430 			bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
431 		else
432 			bar64 = __pci_read_base(dev, pci_bar_unknown, res,
433 						pos + PCI_SRIOV_BAR + i * 4);
434 		if (!res->flags)
435 			continue;
436 		if (resource_size(res) & (PAGE_SIZE - 1)) {
437 			rc = -EIO;
438 			goto failed;
439 		}
440 		iov->barsz[i] = resource_size(res);
441 		res->end = res->start + resource_size(res) * total - 1;
442 		dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
443 			 i, res, i, total);
444 		i += bar64;
445 		nres++;
446 	}
447 
448 	iov->pos = pos;
449 	iov->nres = nres;
450 	iov->ctrl = ctrl;
451 	iov->total_VFs = total;
452 	iov->pgsz = pgsz;
453 	iov->self = dev;
454 	iov->drivers_autoprobe = true;
455 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
456 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
457 	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
458 		iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
459 
460 	if (pdev)
461 		iov->dev = pci_dev_get(pdev);
462 	else
463 		iov->dev = dev;
464 
465 	dev->sriov = iov;
466 	dev->is_physfn = 1;
467 	rc = compute_max_vf_buses(dev);
468 	if (rc)
469 		goto fail_max_buses;
470 
471 	return 0;
472 
473 fail_max_buses:
474 	dev->sriov = NULL;
475 	dev->is_physfn = 0;
476 failed:
477 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
478 		res = &dev->resource[i + PCI_IOV_RESOURCES];
479 		res->flags = 0;
480 	}
481 
482 	kfree(iov);
483 	return rc;
484 }
485 
486 static void sriov_release(struct pci_dev *dev)
487 {
488 	BUG_ON(dev->sriov->num_VFs);
489 
490 	if (dev != dev->sriov->dev)
491 		pci_dev_put(dev->sriov->dev);
492 
493 	kfree(dev->sriov);
494 	dev->sriov = NULL;
495 }
496 
497 static void sriov_restore_state(struct pci_dev *dev)
498 {
499 	int i;
500 	u16 ctrl;
501 	struct pci_sriov *iov = dev->sriov;
502 
503 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
504 	if (ctrl & PCI_SRIOV_CTRL_VFE)
505 		return;
506 
507 	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
508 		pci_update_resource(dev, i);
509 
510 	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
511 	pci_iov_set_numvfs(dev, iov->num_VFs);
512 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
513 	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
514 		msleep(100);
515 }
516 
517 /**
518  * pci_iov_init - initialize the IOV capability
519  * @dev: the PCI device
520  *
521  * Returns 0 on success, or negative on failure.
522  */
523 int pci_iov_init(struct pci_dev *dev)
524 {
525 	int pos;
526 
527 	if (!pci_is_pcie(dev))
528 		return -ENODEV;
529 
530 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
531 	if (pos)
532 		return sriov_init(dev, pos);
533 
534 	return -ENODEV;
535 }
536 
537 /**
538  * pci_iov_release - release resources used by the IOV capability
539  * @dev: the PCI device
540  */
541 void pci_iov_release(struct pci_dev *dev)
542 {
543 	if (dev->is_physfn)
544 		sriov_release(dev);
545 }
546 
547 /**
548  * pci_iov_update_resource - update a VF BAR
549  * @dev: the PCI device
550  * @resno: the resource number
551  *
552  * Update a VF BAR in the SR-IOV capability of a PF.
553  */
554 void pci_iov_update_resource(struct pci_dev *dev, int resno)
555 {
556 	struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
557 	struct resource *res = dev->resource + resno;
558 	int vf_bar = resno - PCI_IOV_RESOURCES;
559 	struct pci_bus_region region;
560 	u16 cmd;
561 	u32 new;
562 	int reg;
563 
564 	/*
565 	 * The generic pci_restore_bars() path calls this for all devices,
566 	 * including VFs and non-SR-IOV devices.  If this is not a PF, we
567 	 * have nothing to do.
568 	 */
569 	if (!iov)
570 		return;
571 
572 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
573 	if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
574 		dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
575 			 vf_bar, res);
576 		return;
577 	}
578 
579 	/*
580 	 * Ignore unimplemented BARs, unused resource slots for 64-bit
581 	 * BARs, and non-movable resources, e.g., those described via
582 	 * Enhanced Allocation.
583 	 */
584 	if (!res->flags)
585 		return;
586 
587 	if (res->flags & IORESOURCE_UNSET)
588 		return;
589 
590 	if (res->flags & IORESOURCE_PCI_FIXED)
591 		return;
592 
593 	pcibios_resource_to_bus(dev->bus, &region, res);
594 	new = region.start;
595 	new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
596 
597 	reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
598 	pci_write_config_dword(dev, reg, new);
599 	if (res->flags & IORESOURCE_MEM_64) {
600 		new = region.start >> 16 >> 16;
601 		pci_write_config_dword(dev, reg + 4, new);
602 	}
603 }
604 
605 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
606 						      int resno)
607 {
608 	return pci_iov_resource_size(dev, resno);
609 }
610 
611 /**
612  * pci_sriov_resource_alignment - get resource alignment for VF BAR
613  * @dev: the PCI device
614  * @resno: the resource number
615  *
616  * Returns the alignment of the VF BAR found in the SR-IOV capability.
617  * This is not the same as the resource size which is defined as
618  * the VF BAR size multiplied by the number of VFs.  The alignment
619  * is just the VF BAR size.
620  */
621 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
622 {
623 	return pcibios_iov_resource_alignment(dev, resno);
624 }
625 
626 /**
627  * pci_restore_iov_state - restore the state of the IOV capability
628  * @dev: the PCI device
629  */
630 void pci_restore_iov_state(struct pci_dev *dev)
631 {
632 	if (dev->is_physfn)
633 		sriov_restore_state(dev);
634 }
635 
636 /**
637  * pci_iov_bus_range - find bus range used by Virtual Function
638  * @bus: the PCI bus
639  *
640  * Returns max number of buses (exclude current one) used by Virtual
641  * Functions.
642  */
643 int pci_iov_bus_range(struct pci_bus *bus)
644 {
645 	int max = 0;
646 	struct pci_dev *dev;
647 
648 	list_for_each_entry(dev, &bus->devices, bus_list) {
649 		if (!dev->is_physfn)
650 			continue;
651 		if (dev->sriov->max_VF_buses > max)
652 			max = dev->sriov->max_VF_buses;
653 	}
654 
655 	return max ? max - bus->number : 0;
656 }
657 
658 /**
659  * pci_enable_sriov - enable the SR-IOV capability
660  * @dev: the PCI device
661  * @nr_virtfn: number of virtual functions to enable
662  *
663  * Returns 0 on success, or negative on failure.
664  */
665 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
666 {
667 	might_sleep();
668 
669 	if (!dev->is_physfn)
670 		return -ENOSYS;
671 
672 	return sriov_enable(dev, nr_virtfn);
673 }
674 EXPORT_SYMBOL_GPL(pci_enable_sriov);
675 
676 /**
677  * pci_disable_sriov - disable the SR-IOV capability
678  * @dev: the PCI device
679  */
680 void pci_disable_sriov(struct pci_dev *dev)
681 {
682 	might_sleep();
683 
684 	if (!dev->is_physfn)
685 		return;
686 
687 	sriov_disable(dev);
688 }
689 EXPORT_SYMBOL_GPL(pci_disable_sriov);
690 
691 /**
692  * pci_num_vf - return number of VFs associated with a PF device_release_driver
693  * @dev: the PCI device
694  *
695  * Returns number of VFs, or 0 if SR-IOV is not enabled.
696  */
697 int pci_num_vf(struct pci_dev *dev)
698 {
699 	if (!dev->is_physfn)
700 		return 0;
701 
702 	return dev->sriov->num_VFs;
703 }
704 EXPORT_SYMBOL_GPL(pci_num_vf);
705 
706 /**
707  * pci_vfs_assigned - returns number of VFs are assigned to a guest
708  * @dev: the PCI device
709  *
710  * Returns number of VFs belonging to this device that are assigned to a guest.
711  * If device is not a physical function returns 0.
712  */
713 int pci_vfs_assigned(struct pci_dev *dev)
714 {
715 	struct pci_dev *vfdev;
716 	unsigned int vfs_assigned = 0;
717 	unsigned short dev_id;
718 
719 	/* only search if we are a PF */
720 	if (!dev->is_physfn)
721 		return 0;
722 
723 	/*
724 	 * determine the device ID for the VFs, the vendor ID will be the
725 	 * same as the PF so there is no need to check for that one
726 	 */
727 	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
728 
729 	/* loop through all the VFs to see if we own any that are assigned */
730 	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
731 	while (vfdev) {
732 		/*
733 		 * It is considered assigned if it is a virtual function with
734 		 * our dev as the physical function and the assigned bit is set
735 		 */
736 		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
737 			pci_is_dev_assigned(vfdev))
738 			vfs_assigned++;
739 
740 		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
741 	}
742 
743 	return vfs_assigned;
744 }
745 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
746 
747 /**
748  * pci_sriov_set_totalvfs -- reduce the TotalVFs available
749  * @dev: the PCI PF device
750  * @numvfs: number that should be used for TotalVFs supported
751  *
752  * Should be called from PF driver's probe routine with
753  * device's mutex held.
754  *
755  * Returns 0 if PF is an SRIOV-capable device and
756  * value of numvfs valid. If not a PF return -ENOSYS;
757  * if numvfs is invalid return -EINVAL;
758  * if VFs already enabled, return -EBUSY.
759  */
760 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
761 {
762 	if (!dev->is_physfn)
763 		return -ENOSYS;
764 	if (numvfs > dev->sriov->total_VFs)
765 		return -EINVAL;
766 
767 	/* Shouldn't change if VFs already enabled */
768 	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
769 		return -EBUSY;
770 	else
771 		dev->sriov->driver_max_VFs = numvfs;
772 
773 	return 0;
774 }
775 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
776 
777 /**
778  * pci_sriov_get_totalvfs -- get total VFs supported on this device
779  * @dev: the PCI PF device
780  *
781  * For a PCIe device with SRIOV support, return the PCIe
782  * SRIOV capability value of TotalVFs or the value of driver_max_VFs
783  * if the driver reduced it.  Otherwise 0.
784  */
785 int pci_sriov_get_totalvfs(struct pci_dev *dev)
786 {
787 	if (!dev->is_physfn)
788 		return 0;
789 
790 	if (dev->sriov->driver_max_VFs)
791 		return dev->sriov->driver_max_VFs;
792 
793 	return dev->sriov->total_VFs;
794 }
795 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
796