1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * PCI Express I/O Virtualization (IOV) support 4 * Single Root IOV 1.0 5 * Address Translation Service 1.0 6 * 7 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> 8 */ 9 10 #include <linux/pci.h> 11 #include <linux/slab.h> 12 #include <linux/mutex.h> 13 #include <linux/export.h> 14 #include <linux/string.h> 15 #include <linux/delay.h> 16 #include "pci.h" 17 18 #define VIRTFN_ID_LEN 16 19 20 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) 21 { 22 if (!dev->is_physfn) 23 return -EINVAL; 24 return dev->bus->number + ((dev->devfn + dev->sriov->offset + 25 dev->sriov->stride * vf_id) >> 8); 26 } 27 28 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) 29 { 30 if (!dev->is_physfn) 31 return -EINVAL; 32 return (dev->devfn + dev->sriov->offset + 33 dev->sriov->stride * vf_id) & 0xff; 34 } 35 36 /* 37 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may 38 * change when NumVFs changes. 39 * 40 * Update iov->offset and iov->stride when NumVFs is written. 41 */ 42 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) 43 { 44 struct pci_sriov *iov = dev->sriov; 45 46 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); 47 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); 48 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); 49 } 50 51 /* 52 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride 53 * determine how many additional bus numbers will be consumed by VFs. 54 * 55 * Iterate over all valid NumVFs, validate offset and stride, and calculate 56 * the maximum number of bus numbers that could ever be required. 57 */ 58 static int compute_max_vf_buses(struct pci_dev *dev) 59 { 60 struct pci_sriov *iov = dev->sriov; 61 int nr_virtfn, busnr, rc = 0; 62 63 for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { 64 pci_iov_set_numvfs(dev, nr_virtfn); 65 if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { 66 rc = -EIO; 67 goto out; 68 } 69 70 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); 71 if (busnr > iov->max_VF_buses) 72 iov->max_VF_buses = busnr; 73 } 74 75 out: 76 pci_iov_set_numvfs(dev, 0); 77 return rc; 78 } 79 80 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) 81 { 82 struct pci_bus *child; 83 84 if (bus->number == busnr) 85 return bus; 86 87 child = pci_find_bus(pci_domain_nr(bus), busnr); 88 if (child) 89 return child; 90 91 child = pci_add_new_bus(bus, NULL, busnr); 92 if (!child) 93 return NULL; 94 95 pci_bus_insert_busn_res(child, busnr, busnr); 96 97 return child; 98 } 99 100 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) 101 { 102 if (physbus != virtbus && list_empty(&virtbus->devices)) 103 pci_remove_bus(virtbus); 104 } 105 106 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) 107 { 108 if (!dev->is_physfn) 109 return 0; 110 111 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; 112 } 113 114 static void pci_read_vf_config_common(struct pci_dev *virtfn) 115 { 116 struct pci_dev *physfn = virtfn->physfn; 117 118 /* 119 * Some config registers are the same across all associated VFs. 120 * Read them once from VF0 so we can skip reading them from the 121 * other VFs. 122 * 123 * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to 124 * have the same Revision ID and Subsystem ID, but we assume they 125 * do. 126 */ 127 pci_read_config_dword(virtfn, PCI_CLASS_REVISION, 128 &physfn->sriov->class); 129 pci_read_config_byte(virtfn, PCI_HEADER_TYPE, 130 &physfn->sriov->hdr_type); 131 pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID, 132 &physfn->sriov->subsystem_vendor); 133 pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID, 134 &physfn->sriov->subsystem_device); 135 136 physfn->sriov->cfg_size = pci_cfg_space_size(virtfn); 137 } 138 139 int pci_iov_add_virtfn(struct pci_dev *dev, int id) 140 { 141 int i; 142 int rc = -ENOMEM; 143 u64 size; 144 char buf[VIRTFN_ID_LEN]; 145 struct pci_dev *virtfn; 146 struct resource *res; 147 struct pci_sriov *iov = dev->sriov; 148 struct pci_bus *bus; 149 150 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); 151 if (!bus) 152 goto failed; 153 154 virtfn = pci_alloc_dev(bus); 155 if (!virtfn) 156 goto failed0; 157 158 virtfn->devfn = pci_iov_virtfn_devfn(dev, id); 159 virtfn->vendor = dev->vendor; 160 virtfn->device = iov->vf_device; 161 virtfn->is_virtfn = 1; 162 virtfn->physfn = pci_dev_get(dev); 163 164 if (id == 0) 165 pci_read_vf_config_common(virtfn); 166 167 rc = pci_setup_device(virtfn); 168 if (rc) 169 goto failed1; 170 171 virtfn->dev.parent = dev->dev.parent; 172 virtfn->multifunction = 0; 173 174 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 175 res = &dev->resource[i + PCI_IOV_RESOURCES]; 176 if (!res->parent) 177 continue; 178 virtfn->resource[i].name = pci_name(virtfn); 179 virtfn->resource[i].flags = res->flags; 180 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); 181 virtfn->resource[i].start = res->start + size * id; 182 virtfn->resource[i].end = virtfn->resource[i].start + size - 1; 183 rc = request_resource(res, &virtfn->resource[i]); 184 BUG_ON(rc); 185 } 186 187 pci_device_add(virtfn, virtfn->bus); 188 189 sprintf(buf, "virtfn%u", id); 190 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); 191 if (rc) 192 goto failed2; 193 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); 194 if (rc) 195 goto failed3; 196 197 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); 198 199 pci_bus_add_device(virtfn); 200 201 return 0; 202 203 failed3: 204 sysfs_remove_link(&dev->dev.kobj, buf); 205 failed2: 206 pci_stop_and_remove_bus_device(virtfn); 207 failed1: 208 pci_dev_put(dev); 209 failed0: 210 virtfn_remove_bus(dev->bus, bus); 211 failed: 212 213 return rc; 214 } 215 216 void pci_iov_remove_virtfn(struct pci_dev *dev, int id) 217 { 218 char buf[VIRTFN_ID_LEN]; 219 struct pci_dev *virtfn; 220 221 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), 222 pci_iov_virtfn_bus(dev, id), 223 pci_iov_virtfn_devfn(dev, id)); 224 if (!virtfn) 225 return; 226 227 sprintf(buf, "virtfn%u", id); 228 sysfs_remove_link(&dev->dev.kobj, buf); 229 /* 230 * pci_stop_dev() could have been called for this virtfn already, 231 * so the directory for the virtfn may have been removed before. 232 * Double check to avoid spurious sysfs warnings. 233 */ 234 if (virtfn->dev.kobj.sd) 235 sysfs_remove_link(&virtfn->dev.kobj, "physfn"); 236 237 pci_stop_and_remove_bus_device(virtfn); 238 virtfn_remove_bus(dev->bus, virtfn->bus); 239 240 /* balance pci_get_domain_bus_and_slot() */ 241 pci_dev_put(virtfn); 242 pci_dev_put(dev); 243 } 244 245 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) 246 { 247 return 0; 248 } 249 250 int __weak pcibios_sriov_disable(struct pci_dev *pdev) 251 { 252 return 0; 253 } 254 255 static int sriov_add_vfs(struct pci_dev *dev, u16 num_vfs) 256 { 257 unsigned int i; 258 int rc; 259 260 if (dev->no_vf_scan) 261 return 0; 262 263 for (i = 0; i < num_vfs; i++) { 264 rc = pci_iov_add_virtfn(dev, i); 265 if (rc) 266 goto failed; 267 } 268 return 0; 269 failed: 270 while (i--) 271 pci_iov_remove_virtfn(dev, i); 272 273 return rc; 274 } 275 276 static int sriov_enable(struct pci_dev *dev, int nr_virtfn) 277 { 278 int rc; 279 int i; 280 int nres; 281 u16 initial; 282 struct resource *res; 283 struct pci_dev *pdev; 284 struct pci_sriov *iov = dev->sriov; 285 int bars = 0; 286 int bus; 287 288 if (!nr_virtfn) 289 return 0; 290 291 if (iov->num_VFs) 292 return -EINVAL; 293 294 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); 295 if (initial > iov->total_VFs || 296 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) 297 return -EIO; 298 299 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || 300 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) 301 return -EINVAL; 302 303 nres = 0; 304 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 305 bars |= (1 << (i + PCI_IOV_RESOURCES)); 306 res = &dev->resource[i + PCI_IOV_RESOURCES]; 307 if (res->parent) 308 nres++; 309 } 310 if (nres != iov->nres) { 311 pci_err(dev, "not enough MMIO resources for SR-IOV\n"); 312 return -ENOMEM; 313 } 314 315 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); 316 if (bus > dev->bus->busn_res.end) { 317 pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", 318 nr_virtfn, bus, &dev->bus->busn_res); 319 return -ENOMEM; 320 } 321 322 if (pci_enable_resources(dev, bars)) { 323 pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); 324 return -ENOMEM; 325 } 326 327 if (iov->link != dev->devfn) { 328 pdev = pci_get_slot(dev->bus, iov->link); 329 if (!pdev) 330 return -ENODEV; 331 332 if (!pdev->is_physfn) { 333 pci_dev_put(pdev); 334 return -ENOSYS; 335 } 336 337 rc = sysfs_create_link(&dev->dev.kobj, 338 &pdev->dev.kobj, "dep_link"); 339 pci_dev_put(pdev); 340 if (rc) 341 return rc; 342 } 343 344 iov->initial_VFs = initial; 345 if (nr_virtfn < initial) 346 initial = nr_virtfn; 347 348 rc = pcibios_sriov_enable(dev, initial); 349 if (rc) { 350 pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); 351 goto err_pcibios; 352 } 353 354 pci_iov_set_numvfs(dev, nr_virtfn); 355 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; 356 pci_cfg_access_lock(dev); 357 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 358 msleep(100); 359 pci_cfg_access_unlock(dev); 360 361 rc = sriov_add_vfs(dev, initial); 362 if (rc) 363 goto err_pcibios; 364 365 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); 366 iov->num_VFs = nr_virtfn; 367 368 return 0; 369 370 err_pcibios: 371 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 372 pci_cfg_access_lock(dev); 373 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 374 ssleep(1); 375 pci_cfg_access_unlock(dev); 376 377 pcibios_sriov_disable(dev); 378 379 if (iov->link != dev->devfn) 380 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 381 382 pci_iov_set_numvfs(dev, 0); 383 return rc; 384 } 385 386 static void sriov_del_vfs(struct pci_dev *dev) 387 { 388 struct pci_sriov *iov = dev->sriov; 389 int i; 390 391 if (dev->no_vf_scan) 392 return; 393 394 for (i = 0; i < iov->num_VFs; i++) 395 pci_iov_remove_virtfn(dev, i); 396 } 397 398 static void sriov_disable(struct pci_dev *dev) 399 { 400 struct pci_sriov *iov = dev->sriov; 401 402 if (!iov->num_VFs) 403 return; 404 405 sriov_del_vfs(dev); 406 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); 407 pci_cfg_access_lock(dev); 408 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 409 ssleep(1); 410 pci_cfg_access_unlock(dev); 411 412 pcibios_sriov_disable(dev); 413 414 if (iov->link != dev->devfn) 415 sysfs_remove_link(&dev->dev.kobj, "dep_link"); 416 417 iov->num_VFs = 0; 418 pci_iov_set_numvfs(dev, 0); 419 } 420 421 static int sriov_init(struct pci_dev *dev, int pos) 422 { 423 int i, bar64; 424 int rc; 425 int nres; 426 u32 pgsz; 427 u16 ctrl, total; 428 struct pci_sriov *iov; 429 struct resource *res; 430 struct pci_dev *pdev; 431 432 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); 433 if (ctrl & PCI_SRIOV_CTRL_VFE) { 434 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); 435 ssleep(1); 436 } 437 438 ctrl = 0; 439 list_for_each_entry(pdev, &dev->bus->devices, bus_list) 440 if (pdev->is_physfn) 441 goto found; 442 443 pdev = NULL; 444 if (pci_ari_enabled(dev->bus)) 445 ctrl |= PCI_SRIOV_CTRL_ARI; 446 447 found: 448 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); 449 450 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); 451 if (!total) 452 return 0; 453 454 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); 455 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; 456 pgsz &= ~((1 << i) - 1); 457 if (!pgsz) 458 return -EIO; 459 460 pgsz &= ~(pgsz - 1); 461 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); 462 463 iov = kzalloc(sizeof(*iov), GFP_KERNEL); 464 if (!iov) 465 return -ENOMEM; 466 467 nres = 0; 468 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 469 res = &dev->resource[i + PCI_IOV_RESOURCES]; 470 /* 471 * If it is already FIXED, don't change it, something 472 * (perhaps EA or header fixups) wants it this way. 473 */ 474 if (res->flags & IORESOURCE_PCI_FIXED) 475 bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; 476 else 477 bar64 = __pci_read_base(dev, pci_bar_unknown, res, 478 pos + PCI_SRIOV_BAR + i * 4); 479 if (!res->flags) 480 continue; 481 if (resource_size(res) & (PAGE_SIZE - 1)) { 482 rc = -EIO; 483 goto failed; 484 } 485 iov->barsz[i] = resource_size(res); 486 res->end = res->start + resource_size(res) * total - 1; 487 pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", 488 i, res, i, total); 489 i += bar64; 490 nres++; 491 } 492 493 iov->pos = pos; 494 iov->nres = nres; 495 iov->ctrl = ctrl; 496 iov->total_VFs = total; 497 iov->driver_max_VFs = total; 498 pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); 499 iov->pgsz = pgsz; 500 iov->self = dev; 501 iov->drivers_autoprobe = true; 502 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); 503 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); 504 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) 505 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); 506 507 if (pdev) 508 iov->dev = pci_dev_get(pdev); 509 else 510 iov->dev = dev; 511 512 dev->sriov = iov; 513 dev->is_physfn = 1; 514 rc = compute_max_vf_buses(dev); 515 if (rc) 516 goto fail_max_buses; 517 518 return 0; 519 520 fail_max_buses: 521 dev->sriov = NULL; 522 dev->is_physfn = 0; 523 failed: 524 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { 525 res = &dev->resource[i + PCI_IOV_RESOURCES]; 526 res->flags = 0; 527 } 528 529 kfree(iov); 530 return rc; 531 } 532 533 static void sriov_release(struct pci_dev *dev) 534 { 535 BUG_ON(dev->sriov->num_VFs); 536 537 if (dev != dev->sriov->dev) 538 pci_dev_put(dev->sriov->dev); 539 540 kfree(dev->sriov); 541 dev->sriov = NULL; 542 } 543 544 static void sriov_restore_state(struct pci_dev *dev) 545 { 546 int i; 547 u16 ctrl; 548 struct pci_sriov *iov = dev->sriov; 549 550 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); 551 if (ctrl & PCI_SRIOV_CTRL_VFE) 552 return; 553 554 /* 555 * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because 556 * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. 557 */ 558 ctrl &= ~PCI_SRIOV_CTRL_ARI; 559 ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; 560 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); 561 562 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) 563 pci_update_resource(dev, i); 564 565 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); 566 pci_iov_set_numvfs(dev, iov->num_VFs); 567 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); 568 if (iov->ctrl & PCI_SRIOV_CTRL_VFE) 569 msleep(100); 570 } 571 572 /** 573 * pci_iov_init - initialize the IOV capability 574 * @dev: the PCI device 575 * 576 * Returns 0 on success, or negative on failure. 577 */ 578 int pci_iov_init(struct pci_dev *dev) 579 { 580 int pos; 581 582 if (!pci_is_pcie(dev)) 583 return -ENODEV; 584 585 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); 586 if (pos) 587 return sriov_init(dev, pos); 588 589 return -ENODEV; 590 } 591 592 /** 593 * pci_iov_release - release resources used by the IOV capability 594 * @dev: the PCI device 595 */ 596 void pci_iov_release(struct pci_dev *dev) 597 { 598 if (dev->is_physfn) 599 sriov_release(dev); 600 } 601 602 /** 603 * pci_iov_remove - clean up SR-IOV state after PF driver is detached 604 * @dev: the PCI device 605 */ 606 void pci_iov_remove(struct pci_dev *dev) 607 { 608 struct pci_sriov *iov = dev->sriov; 609 610 if (!dev->is_physfn) 611 return; 612 613 iov->driver_max_VFs = iov->total_VFs; 614 if (iov->num_VFs) 615 pci_warn(dev, "driver left SR-IOV enabled after remove\n"); 616 } 617 618 /** 619 * pci_iov_update_resource - update a VF BAR 620 * @dev: the PCI device 621 * @resno: the resource number 622 * 623 * Update a VF BAR in the SR-IOV capability of a PF. 624 */ 625 void pci_iov_update_resource(struct pci_dev *dev, int resno) 626 { 627 struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; 628 struct resource *res = dev->resource + resno; 629 int vf_bar = resno - PCI_IOV_RESOURCES; 630 struct pci_bus_region region; 631 u16 cmd; 632 u32 new; 633 int reg; 634 635 /* 636 * The generic pci_restore_bars() path calls this for all devices, 637 * including VFs and non-SR-IOV devices. If this is not a PF, we 638 * have nothing to do. 639 */ 640 if (!iov) 641 return; 642 643 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); 644 if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { 645 dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", 646 vf_bar, res); 647 return; 648 } 649 650 /* 651 * Ignore unimplemented BARs, unused resource slots for 64-bit 652 * BARs, and non-movable resources, e.g., those described via 653 * Enhanced Allocation. 654 */ 655 if (!res->flags) 656 return; 657 658 if (res->flags & IORESOURCE_UNSET) 659 return; 660 661 if (res->flags & IORESOURCE_PCI_FIXED) 662 return; 663 664 pcibios_resource_to_bus(dev->bus, ®ion, res); 665 new = region.start; 666 new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; 667 668 reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; 669 pci_write_config_dword(dev, reg, new); 670 if (res->flags & IORESOURCE_MEM_64) { 671 new = region.start >> 16 >> 16; 672 pci_write_config_dword(dev, reg + 4, new); 673 } 674 } 675 676 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, 677 int resno) 678 { 679 return pci_iov_resource_size(dev, resno); 680 } 681 682 /** 683 * pci_sriov_resource_alignment - get resource alignment for VF BAR 684 * @dev: the PCI device 685 * @resno: the resource number 686 * 687 * Returns the alignment of the VF BAR found in the SR-IOV capability. 688 * This is not the same as the resource size which is defined as 689 * the VF BAR size multiplied by the number of VFs. The alignment 690 * is just the VF BAR size. 691 */ 692 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) 693 { 694 return pcibios_iov_resource_alignment(dev, resno); 695 } 696 697 /** 698 * pci_restore_iov_state - restore the state of the IOV capability 699 * @dev: the PCI device 700 */ 701 void pci_restore_iov_state(struct pci_dev *dev) 702 { 703 if (dev->is_physfn) 704 sriov_restore_state(dev); 705 } 706 707 /** 708 * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs 709 * @dev: the PCI device 710 * @auto_probe: set VF drivers auto probe flag 711 */ 712 void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) 713 { 714 if (dev->is_physfn) 715 dev->sriov->drivers_autoprobe = auto_probe; 716 } 717 718 /** 719 * pci_iov_bus_range - find bus range used by Virtual Function 720 * @bus: the PCI bus 721 * 722 * Returns max number of buses (exclude current one) used by Virtual 723 * Functions. 724 */ 725 int pci_iov_bus_range(struct pci_bus *bus) 726 { 727 int max = 0; 728 struct pci_dev *dev; 729 730 list_for_each_entry(dev, &bus->devices, bus_list) { 731 if (!dev->is_physfn) 732 continue; 733 if (dev->sriov->max_VF_buses > max) 734 max = dev->sriov->max_VF_buses; 735 } 736 737 return max ? max - bus->number : 0; 738 } 739 740 /** 741 * pci_enable_sriov - enable the SR-IOV capability 742 * @dev: the PCI device 743 * @nr_virtfn: number of virtual functions to enable 744 * 745 * Returns 0 on success, or negative on failure. 746 */ 747 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 748 { 749 might_sleep(); 750 751 if (!dev->is_physfn) 752 return -ENOSYS; 753 754 return sriov_enable(dev, nr_virtfn); 755 } 756 EXPORT_SYMBOL_GPL(pci_enable_sriov); 757 758 /** 759 * pci_disable_sriov - disable the SR-IOV capability 760 * @dev: the PCI device 761 */ 762 void pci_disable_sriov(struct pci_dev *dev) 763 { 764 might_sleep(); 765 766 if (!dev->is_physfn) 767 return; 768 769 sriov_disable(dev); 770 } 771 EXPORT_SYMBOL_GPL(pci_disable_sriov); 772 773 /** 774 * pci_num_vf - return number of VFs associated with a PF device_release_driver 775 * @dev: the PCI device 776 * 777 * Returns number of VFs, or 0 if SR-IOV is not enabled. 778 */ 779 int pci_num_vf(struct pci_dev *dev) 780 { 781 if (!dev->is_physfn) 782 return 0; 783 784 return dev->sriov->num_VFs; 785 } 786 EXPORT_SYMBOL_GPL(pci_num_vf); 787 788 /** 789 * pci_vfs_assigned - returns number of VFs are assigned to a guest 790 * @dev: the PCI device 791 * 792 * Returns number of VFs belonging to this device that are assigned to a guest. 793 * If device is not a physical function returns 0. 794 */ 795 int pci_vfs_assigned(struct pci_dev *dev) 796 { 797 struct pci_dev *vfdev; 798 unsigned int vfs_assigned = 0; 799 unsigned short dev_id; 800 801 /* only search if we are a PF */ 802 if (!dev->is_physfn) 803 return 0; 804 805 /* 806 * determine the device ID for the VFs, the vendor ID will be the 807 * same as the PF so there is no need to check for that one 808 */ 809 dev_id = dev->sriov->vf_device; 810 811 /* loop through all the VFs to see if we own any that are assigned */ 812 vfdev = pci_get_device(dev->vendor, dev_id, NULL); 813 while (vfdev) { 814 /* 815 * It is considered assigned if it is a virtual function with 816 * our dev as the physical function and the assigned bit is set 817 */ 818 if (vfdev->is_virtfn && (vfdev->physfn == dev) && 819 pci_is_dev_assigned(vfdev)) 820 vfs_assigned++; 821 822 vfdev = pci_get_device(dev->vendor, dev_id, vfdev); 823 } 824 825 return vfs_assigned; 826 } 827 EXPORT_SYMBOL_GPL(pci_vfs_assigned); 828 829 /** 830 * pci_sriov_set_totalvfs -- reduce the TotalVFs available 831 * @dev: the PCI PF device 832 * @numvfs: number that should be used for TotalVFs supported 833 * 834 * Should be called from PF driver's probe routine with 835 * device's mutex held. 836 * 837 * Returns 0 if PF is an SRIOV-capable device and 838 * value of numvfs valid. If not a PF return -ENOSYS; 839 * if numvfs is invalid return -EINVAL; 840 * if VFs already enabled, return -EBUSY. 841 */ 842 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) 843 { 844 if (!dev->is_physfn) 845 return -ENOSYS; 846 847 if (numvfs > dev->sriov->total_VFs) 848 return -EINVAL; 849 850 /* Shouldn't change if VFs already enabled */ 851 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) 852 return -EBUSY; 853 854 dev->sriov->driver_max_VFs = numvfs; 855 return 0; 856 } 857 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); 858 859 /** 860 * pci_sriov_get_totalvfs -- get total VFs supported on this device 861 * @dev: the PCI PF device 862 * 863 * For a PCIe device with SRIOV support, return the PCIe 864 * SRIOV capability value of TotalVFs or the value of driver_max_VFs 865 * if the driver reduced it. Otherwise 0. 866 */ 867 int pci_sriov_get_totalvfs(struct pci_dev *dev) 868 { 869 if (!dev->is_physfn) 870 return 0; 871 872 return dev->sriov->driver_max_VFs; 873 } 874 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); 875 876 /** 877 * pci_sriov_configure_simple - helper to configure SR-IOV 878 * @dev: the PCI device 879 * @nr_virtfn: number of virtual functions to enable, 0 to disable 880 * 881 * Enable or disable SR-IOV for devices that don't require any PF setup 882 * before enabling SR-IOV. Return value is negative on error, or number of 883 * VFs allocated on success. 884 */ 885 int pci_sriov_configure_simple(struct pci_dev *dev, int nr_virtfn) 886 { 887 int rc; 888 889 might_sleep(); 890 891 if (!dev->is_physfn) 892 return -ENODEV; 893 894 if (pci_vfs_assigned(dev)) { 895 pci_warn(dev, "Cannot modify SR-IOV while VFs are assigned\n"); 896 return -EPERM; 897 } 898 899 if (nr_virtfn == 0) { 900 sriov_disable(dev); 901 return 0; 902 } 903 904 rc = sriov_enable(dev, nr_virtfn); 905 if (rc < 0) 906 return rc; 907 908 return nr_virtfn; 909 } 910 EXPORT_SYMBOL_GPL(pci_sriov_configure_simple); 911