xref: /openbmc/linux/drivers/pci/iov.c (revision 174cd4b1)
1 /*
2  * drivers/pci/iov.c
3  *
4  * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5  *
6  * PCI Express I/O Virtualization (IOV) support.
7  *   Single Root IOV 1.0
8  *   Address Translation Service 1.0
9  */
10 
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/mutex.h>
14 #include <linux/export.h>
15 #include <linux/string.h>
16 #include <linux/delay.h>
17 #include <linux/pci-ats.h>
18 #include "pci.h"
19 
20 #define VIRTFN_ID_LEN	16
21 
22 int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
23 {
24 	if (!dev->is_physfn)
25 		return -EINVAL;
26 	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
27 				    dev->sriov->stride * vf_id) >> 8);
28 }
29 
30 int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
31 {
32 	if (!dev->is_physfn)
33 		return -EINVAL;
34 	return (dev->devfn + dev->sriov->offset +
35 		dev->sriov->stride * vf_id) & 0xff;
36 }
37 
38 /*
39  * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
40  * change when NumVFs changes.
41  *
42  * Update iov->offset and iov->stride when NumVFs is written.
43  */
44 static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
45 {
46 	struct pci_sriov *iov = dev->sriov;
47 
48 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
49 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
50 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
51 }
52 
53 /*
54  * The PF consumes one bus number.  NumVFs, First VF Offset, and VF Stride
55  * determine how many additional bus numbers will be consumed by VFs.
56  *
57  * Iterate over all valid NumVFs, validate offset and stride, and calculate
58  * the maximum number of bus numbers that could ever be required.
59  */
60 static int compute_max_vf_buses(struct pci_dev *dev)
61 {
62 	struct pci_sriov *iov = dev->sriov;
63 	int nr_virtfn, busnr, rc = 0;
64 
65 	for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
66 		pci_iov_set_numvfs(dev, nr_virtfn);
67 		if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
68 			rc = -EIO;
69 			goto out;
70 		}
71 
72 		busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
73 		if (busnr > iov->max_VF_buses)
74 			iov->max_VF_buses = busnr;
75 	}
76 
77 out:
78 	pci_iov_set_numvfs(dev, 0);
79 	return rc;
80 }
81 
82 static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
83 {
84 	struct pci_bus *child;
85 
86 	if (bus->number == busnr)
87 		return bus;
88 
89 	child = pci_find_bus(pci_domain_nr(bus), busnr);
90 	if (child)
91 		return child;
92 
93 	child = pci_add_new_bus(bus, NULL, busnr);
94 	if (!child)
95 		return NULL;
96 
97 	pci_bus_insert_busn_res(child, busnr, busnr);
98 
99 	return child;
100 }
101 
102 static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
103 {
104 	if (physbus != virtbus && list_empty(&virtbus->devices))
105 		pci_remove_bus(virtbus);
106 }
107 
108 resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
109 {
110 	if (!dev->is_physfn)
111 		return 0;
112 
113 	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
114 }
115 
116 int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
117 {
118 	int i;
119 	int rc = -ENOMEM;
120 	u64 size;
121 	char buf[VIRTFN_ID_LEN];
122 	struct pci_dev *virtfn;
123 	struct resource *res;
124 	struct pci_sriov *iov = dev->sriov;
125 	struct pci_bus *bus;
126 
127 	bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
128 	if (!bus)
129 		goto failed;
130 
131 	virtfn = pci_alloc_dev(bus);
132 	if (!virtfn)
133 		goto failed0;
134 
135 	virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
136 	virtfn->vendor = dev->vendor;
137 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
138 	rc = pci_setup_device(virtfn);
139 	if (rc)
140 		goto failed0;
141 
142 	virtfn->dev.parent = dev->dev.parent;
143 	virtfn->physfn = pci_dev_get(dev);
144 	virtfn->is_virtfn = 1;
145 	virtfn->multifunction = 0;
146 
147 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
148 		res = &dev->resource[i + PCI_IOV_RESOURCES];
149 		if (!res->parent)
150 			continue;
151 		virtfn->resource[i].name = pci_name(virtfn);
152 		virtfn->resource[i].flags = res->flags;
153 		size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
154 		virtfn->resource[i].start = res->start + size * id;
155 		virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
156 		rc = request_resource(res, &virtfn->resource[i]);
157 		BUG_ON(rc);
158 	}
159 
160 	if (reset)
161 		__pci_reset_function(virtfn);
162 
163 	pci_device_add(virtfn, virtfn->bus);
164 
165 	pci_bus_add_device(virtfn);
166 	sprintf(buf, "virtfn%u", id);
167 	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
168 	if (rc)
169 		goto failed1;
170 	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
171 	if (rc)
172 		goto failed2;
173 
174 	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
175 
176 	return 0;
177 
178 failed2:
179 	sysfs_remove_link(&dev->dev.kobj, buf);
180 failed1:
181 	pci_dev_put(dev);
182 	pci_stop_and_remove_bus_device(virtfn);
183 failed0:
184 	virtfn_remove_bus(dev->bus, bus);
185 failed:
186 
187 	return rc;
188 }
189 
190 void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
191 {
192 	char buf[VIRTFN_ID_LEN];
193 	struct pci_dev *virtfn;
194 
195 	virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
196 					     pci_iov_virtfn_bus(dev, id),
197 					     pci_iov_virtfn_devfn(dev, id));
198 	if (!virtfn)
199 		return;
200 
201 	if (reset) {
202 		device_release_driver(&virtfn->dev);
203 		__pci_reset_function(virtfn);
204 	}
205 
206 	sprintf(buf, "virtfn%u", id);
207 	sysfs_remove_link(&dev->dev.kobj, buf);
208 	/*
209 	 * pci_stop_dev() could have been called for this virtfn already,
210 	 * so the directory for the virtfn may have been removed before.
211 	 * Double check to avoid spurious sysfs warnings.
212 	 */
213 	if (virtfn->dev.kobj.sd)
214 		sysfs_remove_link(&virtfn->dev.kobj, "physfn");
215 
216 	pci_stop_and_remove_bus_device(virtfn);
217 	virtfn_remove_bus(dev->bus, virtfn->bus);
218 
219 	/* balance pci_get_domain_bus_and_slot() */
220 	pci_dev_put(virtfn);
221 	pci_dev_put(dev);
222 }
223 
224 int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
225 {
226 	return 0;
227 }
228 
229 int __weak pcibios_sriov_disable(struct pci_dev *pdev)
230 {
231 	return 0;
232 }
233 
234 static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
235 {
236 	int rc;
237 	int i;
238 	int nres;
239 	u16 initial;
240 	struct resource *res;
241 	struct pci_dev *pdev;
242 	struct pci_sriov *iov = dev->sriov;
243 	int bars = 0;
244 	int bus;
245 
246 	if (!nr_virtfn)
247 		return 0;
248 
249 	if (iov->num_VFs)
250 		return -EINVAL;
251 
252 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
253 	if (initial > iov->total_VFs ||
254 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
255 		return -EIO;
256 
257 	if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
258 	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
259 		return -EINVAL;
260 
261 	nres = 0;
262 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
263 		bars |= (1 << (i + PCI_IOV_RESOURCES));
264 		res = &dev->resource[i + PCI_IOV_RESOURCES];
265 		if (res->parent)
266 			nres++;
267 	}
268 	if (nres != iov->nres) {
269 		dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
270 		return -ENOMEM;
271 	}
272 
273 	bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
274 	if (bus > dev->bus->busn_res.end) {
275 		dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
276 			nr_virtfn, bus, &dev->bus->busn_res);
277 		return -ENOMEM;
278 	}
279 
280 	if (pci_enable_resources(dev, bars)) {
281 		dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
282 		return -ENOMEM;
283 	}
284 
285 	if (iov->link != dev->devfn) {
286 		pdev = pci_get_slot(dev->bus, iov->link);
287 		if (!pdev)
288 			return -ENODEV;
289 
290 		if (!pdev->is_physfn) {
291 			pci_dev_put(pdev);
292 			return -ENOSYS;
293 		}
294 
295 		rc = sysfs_create_link(&dev->dev.kobj,
296 					&pdev->dev.kobj, "dep_link");
297 		pci_dev_put(pdev);
298 		if (rc)
299 			return rc;
300 	}
301 
302 	iov->initial_VFs = initial;
303 	if (nr_virtfn < initial)
304 		initial = nr_virtfn;
305 
306 	rc = pcibios_sriov_enable(dev, initial);
307 	if (rc) {
308 		dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
309 		goto err_pcibios;
310 	}
311 
312 	pci_iov_set_numvfs(dev, nr_virtfn);
313 	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
314 	pci_cfg_access_lock(dev);
315 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
316 	msleep(100);
317 	pci_cfg_access_unlock(dev);
318 
319 	for (i = 0; i < initial; i++) {
320 		rc = pci_iov_add_virtfn(dev, i, 0);
321 		if (rc)
322 			goto failed;
323 	}
324 
325 	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
326 	iov->num_VFs = nr_virtfn;
327 
328 	return 0;
329 
330 failed:
331 	while (i--)
332 		pci_iov_remove_virtfn(dev, i, 0);
333 
334 	pcibios_sriov_disable(dev);
335 err_pcibios:
336 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
337 	pci_cfg_access_lock(dev);
338 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
339 	ssleep(1);
340 	pci_cfg_access_unlock(dev);
341 
342 	if (iov->link != dev->devfn)
343 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
344 
345 	pci_iov_set_numvfs(dev, 0);
346 	return rc;
347 }
348 
349 static void sriov_disable(struct pci_dev *dev)
350 {
351 	int i;
352 	struct pci_sriov *iov = dev->sriov;
353 
354 	if (!iov->num_VFs)
355 		return;
356 
357 	for (i = 0; i < iov->num_VFs; i++)
358 		pci_iov_remove_virtfn(dev, i, 0);
359 
360 	pcibios_sriov_disable(dev);
361 
362 	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
363 	pci_cfg_access_lock(dev);
364 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
365 	ssleep(1);
366 	pci_cfg_access_unlock(dev);
367 
368 	if (iov->link != dev->devfn)
369 		sysfs_remove_link(&dev->dev.kobj, "dep_link");
370 
371 	iov->num_VFs = 0;
372 	pci_iov_set_numvfs(dev, 0);
373 }
374 
375 static int sriov_init(struct pci_dev *dev, int pos)
376 {
377 	int i, bar64;
378 	int rc;
379 	int nres;
380 	u32 pgsz;
381 	u16 ctrl, total;
382 	struct pci_sriov *iov;
383 	struct resource *res;
384 	struct pci_dev *pdev;
385 
386 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
387 	if (ctrl & PCI_SRIOV_CTRL_VFE) {
388 		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
389 		ssleep(1);
390 	}
391 
392 	ctrl = 0;
393 	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
394 		if (pdev->is_physfn)
395 			goto found;
396 
397 	pdev = NULL;
398 	if (pci_ari_enabled(dev->bus))
399 		ctrl |= PCI_SRIOV_CTRL_ARI;
400 
401 found:
402 	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
403 
404 	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
405 	if (!total)
406 		return 0;
407 
408 	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
409 	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
410 	pgsz &= ~((1 << i) - 1);
411 	if (!pgsz)
412 		return -EIO;
413 
414 	pgsz &= ~(pgsz - 1);
415 	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
416 
417 	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
418 	if (!iov)
419 		return -ENOMEM;
420 
421 	nres = 0;
422 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
423 		res = &dev->resource[i + PCI_IOV_RESOURCES];
424 		/*
425 		 * If it is already FIXED, don't change it, something
426 		 * (perhaps EA or header fixups) wants it this way.
427 		 */
428 		if (res->flags & IORESOURCE_PCI_FIXED)
429 			bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
430 		else
431 			bar64 = __pci_read_base(dev, pci_bar_unknown, res,
432 						pos + PCI_SRIOV_BAR + i * 4);
433 		if (!res->flags)
434 			continue;
435 		if (resource_size(res) & (PAGE_SIZE - 1)) {
436 			rc = -EIO;
437 			goto failed;
438 		}
439 		iov->barsz[i] = resource_size(res);
440 		res->end = res->start + resource_size(res) * total - 1;
441 		dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
442 			 i, res, i, total);
443 		i += bar64;
444 		nres++;
445 	}
446 
447 	iov->pos = pos;
448 	iov->nres = nres;
449 	iov->ctrl = ctrl;
450 	iov->total_VFs = total;
451 	iov->pgsz = pgsz;
452 	iov->self = dev;
453 	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
454 	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
455 	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
456 		iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
457 
458 	if (pdev)
459 		iov->dev = pci_dev_get(pdev);
460 	else
461 		iov->dev = dev;
462 
463 	mutex_init(&iov->lock);
464 
465 	dev->sriov = iov;
466 	dev->is_physfn = 1;
467 	rc = compute_max_vf_buses(dev);
468 	if (rc)
469 		goto fail_max_buses;
470 
471 	return 0;
472 
473 fail_max_buses:
474 	dev->sriov = NULL;
475 	dev->is_physfn = 0;
476 failed:
477 	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
478 		res = &dev->resource[i + PCI_IOV_RESOURCES];
479 		res->flags = 0;
480 	}
481 
482 	kfree(iov);
483 	return rc;
484 }
485 
486 static void sriov_release(struct pci_dev *dev)
487 {
488 	BUG_ON(dev->sriov->num_VFs);
489 
490 	if (dev != dev->sriov->dev)
491 		pci_dev_put(dev->sriov->dev);
492 
493 	mutex_destroy(&dev->sriov->lock);
494 
495 	kfree(dev->sriov);
496 	dev->sriov = NULL;
497 }
498 
499 static void sriov_restore_state(struct pci_dev *dev)
500 {
501 	int i;
502 	u16 ctrl;
503 	struct pci_sriov *iov = dev->sriov;
504 
505 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
506 	if (ctrl & PCI_SRIOV_CTRL_VFE)
507 		return;
508 
509 	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
510 		pci_update_resource(dev, i);
511 
512 	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
513 	pci_iov_set_numvfs(dev, iov->num_VFs);
514 	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
515 	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
516 		msleep(100);
517 }
518 
519 /**
520  * pci_iov_init - initialize the IOV capability
521  * @dev: the PCI device
522  *
523  * Returns 0 on success, or negative on failure.
524  */
525 int pci_iov_init(struct pci_dev *dev)
526 {
527 	int pos;
528 
529 	if (!pci_is_pcie(dev))
530 		return -ENODEV;
531 
532 	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
533 	if (pos)
534 		return sriov_init(dev, pos);
535 
536 	return -ENODEV;
537 }
538 
539 /**
540  * pci_iov_release - release resources used by the IOV capability
541  * @dev: the PCI device
542  */
543 void pci_iov_release(struct pci_dev *dev)
544 {
545 	if (dev->is_physfn)
546 		sriov_release(dev);
547 }
548 
549 /**
550  * pci_iov_update_resource - update a VF BAR
551  * @dev: the PCI device
552  * @resno: the resource number
553  *
554  * Update a VF BAR in the SR-IOV capability of a PF.
555  */
556 void pci_iov_update_resource(struct pci_dev *dev, int resno)
557 {
558 	struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
559 	struct resource *res = dev->resource + resno;
560 	int vf_bar = resno - PCI_IOV_RESOURCES;
561 	struct pci_bus_region region;
562 	u16 cmd;
563 	u32 new;
564 	int reg;
565 
566 	/*
567 	 * The generic pci_restore_bars() path calls this for all devices,
568 	 * including VFs and non-SR-IOV devices.  If this is not a PF, we
569 	 * have nothing to do.
570 	 */
571 	if (!iov)
572 		return;
573 
574 	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
575 	if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
576 		dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
577 			 vf_bar, res);
578 		return;
579 	}
580 
581 	/*
582 	 * Ignore unimplemented BARs, unused resource slots for 64-bit
583 	 * BARs, and non-movable resources, e.g., those described via
584 	 * Enhanced Allocation.
585 	 */
586 	if (!res->flags)
587 		return;
588 
589 	if (res->flags & IORESOURCE_UNSET)
590 		return;
591 
592 	if (res->flags & IORESOURCE_PCI_FIXED)
593 		return;
594 
595 	pcibios_resource_to_bus(dev->bus, &region, res);
596 	new = region.start;
597 	new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
598 
599 	reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
600 	pci_write_config_dword(dev, reg, new);
601 	if (res->flags & IORESOURCE_MEM_64) {
602 		new = region.start >> 16 >> 16;
603 		pci_write_config_dword(dev, reg + 4, new);
604 	}
605 }
606 
607 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
608 						      int resno)
609 {
610 	return pci_iov_resource_size(dev, resno);
611 }
612 
613 /**
614  * pci_sriov_resource_alignment - get resource alignment for VF BAR
615  * @dev: the PCI device
616  * @resno: the resource number
617  *
618  * Returns the alignment of the VF BAR found in the SR-IOV capability.
619  * This is not the same as the resource size which is defined as
620  * the VF BAR size multiplied by the number of VFs.  The alignment
621  * is just the VF BAR size.
622  */
623 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
624 {
625 	return pcibios_iov_resource_alignment(dev, resno);
626 }
627 
628 /**
629  * pci_restore_iov_state - restore the state of the IOV capability
630  * @dev: the PCI device
631  */
632 void pci_restore_iov_state(struct pci_dev *dev)
633 {
634 	if (dev->is_physfn)
635 		sriov_restore_state(dev);
636 }
637 
638 /**
639  * pci_iov_bus_range - find bus range used by Virtual Function
640  * @bus: the PCI bus
641  *
642  * Returns max number of buses (exclude current one) used by Virtual
643  * Functions.
644  */
645 int pci_iov_bus_range(struct pci_bus *bus)
646 {
647 	int max = 0;
648 	struct pci_dev *dev;
649 
650 	list_for_each_entry(dev, &bus->devices, bus_list) {
651 		if (!dev->is_physfn)
652 			continue;
653 		if (dev->sriov->max_VF_buses > max)
654 			max = dev->sriov->max_VF_buses;
655 	}
656 
657 	return max ? max - bus->number : 0;
658 }
659 
660 /**
661  * pci_enable_sriov - enable the SR-IOV capability
662  * @dev: the PCI device
663  * @nr_virtfn: number of virtual functions to enable
664  *
665  * Returns 0 on success, or negative on failure.
666  */
667 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
668 {
669 	might_sleep();
670 
671 	if (!dev->is_physfn)
672 		return -ENOSYS;
673 
674 	return sriov_enable(dev, nr_virtfn);
675 }
676 EXPORT_SYMBOL_GPL(pci_enable_sriov);
677 
678 /**
679  * pci_disable_sriov - disable the SR-IOV capability
680  * @dev: the PCI device
681  */
682 void pci_disable_sriov(struct pci_dev *dev)
683 {
684 	might_sleep();
685 
686 	if (!dev->is_physfn)
687 		return;
688 
689 	sriov_disable(dev);
690 }
691 EXPORT_SYMBOL_GPL(pci_disable_sriov);
692 
693 /**
694  * pci_num_vf - return number of VFs associated with a PF device_release_driver
695  * @dev: the PCI device
696  *
697  * Returns number of VFs, or 0 if SR-IOV is not enabled.
698  */
699 int pci_num_vf(struct pci_dev *dev)
700 {
701 	if (!dev->is_physfn)
702 		return 0;
703 
704 	return dev->sriov->num_VFs;
705 }
706 EXPORT_SYMBOL_GPL(pci_num_vf);
707 
708 /**
709  * pci_vfs_assigned - returns number of VFs are assigned to a guest
710  * @dev: the PCI device
711  *
712  * Returns number of VFs belonging to this device that are assigned to a guest.
713  * If device is not a physical function returns 0.
714  */
715 int pci_vfs_assigned(struct pci_dev *dev)
716 {
717 	struct pci_dev *vfdev;
718 	unsigned int vfs_assigned = 0;
719 	unsigned short dev_id;
720 
721 	/* only search if we are a PF */
722 	if (!dev->is_physfn)
723 		return 0;
724 
725 	/*
726 	 * determine the device ID for the VFs, the vendor ID will be the
727 	 * same as the PF so there is no need to check for that one
728 	 */
729 	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
730 
731 	/* loop through all the VFs to see if we own any that are assigned */
732 	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
733 	while (vfdev) {
734 		/*
735 		 * It is considered assigned if it is a virtual function with
736 		 * our dev as the physical function and the assigned bit is set
737 		 */
738 		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
739 			pci_is_dev_assigned(vfdev))
740 			vfs_assigned++;
741 
742 		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
743 	}
744 
745 	return vfs_assigned;
746 }
747 EXPORT_SYMBOL_GPL(pci_vfs_assigned);
748 
749 /**
750  * pci_sriov_set_totalvfs -- reduce the TotalVFs available
751  * @dev: the PCI PF device
752  * @numvfs: number that should be used for TotalVFs supported
753  *
754  * Should be called from PF driver's probe routine with
755  * device's mutex held.
756  *
757  * Returns 0 if PF is an SRIOV-capable device and
758  * value of numvfs valid. If not a PF return -ENOSYS;
759  * if numvfs is invalid return -EINVAL;
760  * if VFs already enabled, return -EBUSY.
761  */
762 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
763 {
764 	if (!dev->is_physfn)
765 		return -ENOSYS;
766 	if (numvfs > dev->sriov->total_VFs)
767 		return -EINVAL;
768 
769 	/* Shouldn't change if VFs already enabled */
770 	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
771 		return -EBUSY;
772 	else
773 		dev->sriov->driver_max_VFs = numvfs;
774 
775 	return 0;
776 }
777 EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
778 
779 /**
780  * pci_sriov_get_totalvfs -- get total VFs supported on this device
781  * @dev: the PCI PF device
782  *
783  * For a PCIe device with SRIOV support, return the PCIe
784  * SRIOV capability value of TotalVFs or the value of driver_max_VFs
785  * if the driver reduced it.  Otherwise 0.
786  */
787 int pci_sriov_get_totalvfs(struct pci_dev *dev)
788 {
789 	if (!dev->is_physfn)
790 		return 0;
791 
792 	if (dev->sriov->driver_max_VFs)
793 		return dev->sriov->driver_max_VFs;
794 
795 	return dev->sriov->total_VFs;
796 }
797 EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
798