1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * PCI Express Hot Plug Controller Driver 4 * 5 * Copyright (C) 1995,2001 Compaq Computer Corporation 6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 7 * Copyright (C) 2001 IBM Corp. 8 * Copyright (C) 2003-2004 Intel Corporation 9 * 10 * All rights reserved. 11 * 12 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> 13 * 14 */ 15 #ifndef _PCIEHP_H 16 #define _PCIEHP_H 17 18 #include <linux/types.h> 19 #include <linux/pci.h> 20 #include <linux/pci_hotplug.h> 21 #include <linux/delay.h> 22 #include <linux/mutex.h> 23 #include <linux/rwsem.h> 24 #include <linux/workqueue.h> 25 26 #include "../pcie/portdrv.h" 27 28 #define MY_NAME "pciehp" 29 30 extern bool pciehp_poll_mode; 31 extern int pciehp_poll_time; 32 extern bool pciehp_debug; 33 34 #define dbg(format, arg...) \ 35 do { \ 36 if (pciehp_debug) \ 37 printk(KERN_DEBUG "%s: " format, MY_NAME, ## arg); \ 38 } while (0) 39 #define err(format, arg...) \ 40 printk(KERN_ERR "%s: " format, MY_NAME, ## arg) 41 #define info(format, arg...) \ 42 printk(KERN_INFO "%s: " format, MY_NAME, ## arg) 43 #define warn(format, arg...) \ 44 printk(KERN_WARNING "%s: " format, MY_NAME, ## arg) 45 46 #define ctrl_dbg(ctrl, format, arg...) \ 47 do { \ 48 if (pciehp_debug) \ 49 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \ 50 format, ## arg); \ 51 } while (0) 52 #define ctrl_err(ctrl, format, arg...) \ 53 dev_err(&ctrl->pcie->device, format, ## arg) 54 #define ctrl_info(ctrl, format, arg...) \ 55 dev_info(&ctrl->pcie->device, format, ## arg) 56 #define ctrl_warn(ctrl, format, arg...) \ 57 dev_warn(&ctrl->pcie->device, format, ## arg) 58 59 #define SLOT_NAME_SIZE 10 60 61 /** 62 * struct controller - PCIe hotplug controller 63 * @pcie: pointer to the controller's PCIe port service device 64 * @slot_cap: cached copy of the Slot Capabilities register 65 * @slot_ctrl: cached copy of the Slot Control register 66 * @ctrl_lock: serializes writes to the Slot Control register 67 * @cmd_started: jiffies when the Slot Control register was last written; 68 * the next write is allowed 1 second later, absent a Command Completed 69 * interrupt (PCIe r4.0, sec 6.7.3.2) 70 * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler 71 * on reception of a Command Completed event 72 * @queue: wait queue to wake up on reception of a Command Completed event, 73 * used for synchronous writes to the Slot Control register 74 * @pending_events: used by the IRQ handler to save events retrieved from the 75 * Slot Status register for later consumption by the IRQ thread 76 * @notification_enabled: whether the IRQ was requested successfully 77 * @power_fault_detected: whether a power fault was detected by the hardware 78 * that has not yet been cleared by the user 79 * @poll_thread: thread to poll for slot events if no IRQ is available, 80 * enabled with pciehp_poll_mode module parameter 81 * @state: current state machine position 82 * @state_lock: protects reads and writes of @state; 83 * protects scheduling, execution and cancellation of @button_work 84 * @button_work: work item to turn the slot on or off after 5 seconds 85 * in response to an Attention Button press 86 * @hotplug_slot: structure registered with the PCI hotplug core 87 * @reset_lock: prevents access to the Data Link Layer Link Active bit in the 88 * Link Status register and to the Presence Detect State bit in the Slot 89 * Status register during a slot reset which may cause them to flap 90 * @request_result: result of last user request submitted to the IRQ thread 91 * @requester: wait queue to wake up on completion of user request, 92 * used for synchronous slot enable/disable request via sysfs 93 * 94 * PCIe hotplug has a 1:1 relationship between controller and slot, hence 95 * unlike other drivers, the two aren't represented by separate structures. 96 */ 97 struct controller { 98 struct pcie_device *pcie; 99 100 u32 slot_cap; /* capabilities and quirks */ 101 102 u16 slot_ctrl; /* control register access */ 103 struct mutex ctrl_lock; 104 unsigned long cmd_started; 105 unsigned int cmd_busy:1; 106 wait_queue_head_t queue; 107 108 atomic_t pending_events; /* event handling */ 109 unsigned int notification_enabled:1; 110 unsigned int power_fault_detected; 111 struct task_struct *poll_thread; 112 113 u8 state; /* state machine */ 114 struct mutex state_lock; 115 struct delayed_work button_work; 116 117 struct hotplug_slot hotplug_slot; /* hotplug core interface */ 118 struct rw_semaphore reset_lock; 119 int request_result; 120 wait_queue_head_t requester; 121 }; 122 123 /** 124 * DOC: Slot state 125 * 126 * @OFF_STATE: slot is powered off, no subordinate devices are enumerated 127 * @BLINKINGON_STATE: slot will be powered on after the 5 second delay, 128 * green led is blinking 129 * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay, 130 * green led is blinking 131 * @POWERON_STATE: slot is currently powering on 132 * @POWEROFF_STATE: slot is currently powering off 133 * @ON_STATE: slot is powered on, subordinate devices have been enumerated 134 */ 135 #define OFF_STATE 0 136 #define BLINKINGON_STATE 1 137 #define BLINKINGOFF_STATE 2 138 #define POWERON_STATE 3 139 #define POWEROFF_STATE 4 140 #define ON_STATE 5 141 142 /** 143 * DOC: Flags to request an action from the IRQ thread 144 * 145 * These are stored together with events read from the Slot Status register, 146 * hence must be greater than its 16-bit width. 147 * 148 * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or 149 * an Attention Button press after the 5 second delay 150 * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the 151 * hotplug port was inaccessible when the interrupt occurred, requiring 152 * that the IRQ handler is rerun by the IRQ thread after it has made the 153 * hotplug port accessible by runtime resuming its parents to D0 154 */ 155 #define DISABLE_SLOT (1 << 16) 156 #define RERUN_ISR (1 << 17) 157 158 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP) 159 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP) 160 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP) 161 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP) 162 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP) 163 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS) 164 #define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP) 165 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS) 166 #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19) 167 168 void pciehp_request(struct controller *ctrl, int action); 169 void pciehp_handle_button_press(struct controller *ctrl); 170 void pciehp_handle_disable_request(struct controller *ctrl); 171 void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events); 172 int pciehp_configure_device(struct controller *ctrl); 173 void pciehp_unconfigure_device(struct controller *ctrl, bool presence); 174 void pciehp_queue_pushbutton_work(struct work_struct *work); 175 struct controller *pcie_init(struct pcie_device *dev); 176 int pcie_init_notification(struct controller *ctrl); 177 void pcie_shutdown_notification(struct controller *ctrl); 178 void pcie_clear_hotplug_events(struct controller *ctrl); 179 void pcie_enable_interrupt(struct controller *ctrl); 180 void pcie_disable_interrupt(struct controller *ctrl); 181 int pciehp_power_on_slot(struct controller *ctrl); 182 void pciehp_power_off_slot(struct controller *ctrl); 183 void pciehp_get_power_status(struct controller *ctrl, u8 *status); 184 185 void pciehp_set_attention_status(struct controller *ctrl, u8 status); 186 void pciehp_get_latch_status(struct controller *ctrl, u8 *status); 187 int pciehp_query_power_fault(struct controller *ctrl); 188 void pciehp_green_led_on(struct controller *ctrl); 189 void pciehp_green_led_off(struct controller *ctrl); 190 void pciehp_green_led_blink(struct controller *ctrl); 191 bool pciehp_card_present(struct controller *ctrl); 192 bool pciehp_card_present_or_link_active(struct controller *ctrl); 193 int pciehp_check_link_status(struct controller *ctrl); 194 bool pciehp_check_link_active(struct controller *ctrl); 195 void pciehp_release_ctrl(struct controller *ctrl); 196 197 int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot); 198 int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot); 199 int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe); 200 int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status); 201 int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status); 202 int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status); 203 204 static inline const char *slot_name(struct controller *ctrl) 205 { 206 return hotplug_slot_name(&ctrl->hotplug_slot); 207 } 208 209 static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot) 210 { 211 return container_of(hotplug_slot, struct controller, hotplug_slot); 212 } 213 214 #endif /* _PCIEHP_H */ 215