1 /* 2 * PCI Express Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 6 * Copyright (C) 2001 IBM Corp. 7 * Copyright (C) 2003-2004 Intel Corporation 8 * 9 * All rights reserved. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 19 * NON INFRINGEMENT. See the GNU General Public License for more 20 * details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> 27 * 28 */ 29 #ifndef _PCIEHP_H 30 #define _PCIEHP_H 31 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/pci_hotplug.h> 35 #include <linux/delay.h> 36 #include <linux/sched.h> /* signal_pending() */ 37 #include <linux/pcieport_if.h> 38 #include <linux/mutex.h> 39 40 #define MY_NAME "pciehp" 41 42 extern int pciehp_poll_mode; 43 extern int pciehp_poll_time; 44 extern int pciehp_debug; 45 extern int pciehp_force; 46 extern struct workqueue_struct *pciehp_wq; 47 48 #define dbg(format, arg...) \ 49 do { \ 50 if (pciehp_debug) \ 51 printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \ 52 } while (0) 53 #define err(format, arg...) \ 54 printk(KERN_ERR "%s: " format, MY_NAME , ## arg) 55 #define info(format, arg...) \ 56 printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 57 #define warn(format, arg...) \ 58 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 59 60 #define ctrl_dbg(ctrl, format, arg...) \ 61 do { \ 62 if (pciehp_debug) \ 63 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \ 64 format, ## arg); \ 65 } while (0) 66 #define ctrl_err(ctrl, format, arg...) \ 67 dev_err(&ctrl->pcie->device, format, ## arg) 68 #define ctrl_info(ctrl, format, arg...) \ 69 dev_info(&ctrl->pcie->device, format, ## arg) 70 #define ctrl_warn(ctrl, format, arg...) \ 71 dev_warn(&ctrl->pcie->device, format, ## arg) 72 73 #define SLOT_NAME_SIZE 10 74 struct slot { 75 u8 bus; 76 u8 device; 77 u8 state; 78 u8 hp_slot; 79 u32 number; 80 struct controller *ctrl; 81 struct hpc_ops *hpc_ops; 82 struct hotplug_slot *hotplug_slot; 83 struct list_head slot_list; 84 unsigned long last_emi_toggle; 85 struct delayed_work work; /* work for button event */ 86 struct mutex lock; 87 }; 88 89 struct event_info { 90 u32 event_type; 91 struct slot *p_slot; 92 struct work_struct work; 93 }; 94 95 struct controller { 96 struct mutex crit_sect; /* critical section mutex */ 97 struct mutex ctrl_lock; /* controller lock */ 98 int num_slots; /* Number of slots on ctlr */ 99 int slot_num_inc; /* 1 or -1 */ 100 struct pci_dev *pci_dev; 101 struct pcie_device *pcie; /* PCI Express port service */ 102 struct list_head slot_list; 103 struct hpc_ops *hpc_ops; 104 wait_queue_head_t queue; /* sleep & wake process */ 105 u8 slot_device_offset; 106 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ 107 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 108 u32 slot_cap; 109 u8 cap_base; 110 struct timer_list poll_timer; 111 unsigned int cmd_busy:1; 112 unsigned int no_cmd_complete:1; 113 unsigned int link_active_reporting:1; 114 unsigned int notification_enabled:1; 115 unsigned int power_fault_detected; 116 }; 117 118 #define INT_BUTTON_IGNORE 0 119 #define INT_PRESENCE_ON 1 120 #define INT_PRESENCE_OFF 2 121 #define INT_SWITCH_CLOSE 3 122 #define INT_SWITCH_OPEN 4 123 #define INT_POWER_FAULT 5 124 #define INT_POWER_FAULT_CLEAR 6 125 #define INT_BUTTON_PRESS 7 126 #define INT_BUTTON_RELEASE 8 127 #define INT_BUTTON_CANCEL 9 128 129 #define STATIC_STATE 0 130 #define BLINKINGON_STATE 1 131 #define BLINKINGOFF_STATE 2 132 #define POWERON_STATE 3 133 #define POWEROFF_STATE 4 134 135 /* Error messages */ 136 #define INTERLOCK_OPEN 0x00000002 137 #define ADD_NOT_SUPPORTED 0x00000003 138 #define CARD_FUNCTIONING 0x00000005 139 #define ADAPTER_NOT_SAME 0x00000006 140 #define NO_ADAPTER_PRESENT 0x00000009 141 #define NOT_ENOUGH_RESOURCES 0x0000000B 142 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C 143 #define WRONG_BUS_FREQUENCY 0x0000000D 144 #define POWER_FAILURE 0x0000000E 145 146 /* Field definitions in Slot Capabilities Register */ 147 #define ATTN_BUTTN_PRSN 0x00000001 148 #define PWR_CTRL_PRSN 0x00000002 149 #define MRL_SENS_PRSN 0x00000004 150 #define ATTN_LED_PRSN 0x00000008 151 #define PWR_LED_PRSN 0x00000010 152 #define HP_SUPR_RM_SUP 0x00000020 153 #define EMI_PRSN 0x00020000 154 #define NO_CMD_CMPL_SUP 0x00040000 155 156 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN) 157 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN) 158 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN) 159 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN) 160 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN) 161 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP) 162 #define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN) 163 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP) 164 165 extern int pciehp_sysfs_enable_slot(struct slot *slot); 166 extern int pciehp_sysfs_disable_slot(struct slot *slot); 167 extern u8 pciehp_handle_attention_button(struct slot *p_slot); 168 extern u8 pciehp_handle_switch_change(struct slot *p_slot); 169 extern u8 pciehp_handle_presence_change(struct slot *p_slot); 170 extern u8 pciehp_handle_power_fault(struct slot *p_slot); 171 extern int pciehp_configure_device(struct slot *p_slot); 172 extern int pciehp_unconfigure_device(struct slot *p_slot); 173 extern void pciehp_queue_pushbutton_work(struct work_struct *work); 174 struct controller *pcie_init(struct pcie_device *dev); 175 int pcie_init_notification(struct controller *ctrl); 176 int pciehp_enable_slot(struct slot *p_slot); 177 int pciehp_disable_slot(struct slot *p_slot); 178 int pcie_enable_notification(struct controller *ctrl); 179 180 static inline const char *slot_name(struct slot *slot) 181 { 182 return hotplug_slot_name(slot->hotplug_slot); 183 } 184 185 static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device) 186 { 187 struct slot *slot; 188 189 list_for_each_entry(slot, &ctrl->slot_list, slot_list) { 190 if (slot->device == device) 191 return slot; 192 } 193 194 ctrl_err(ctrl, "Slot (device=0x%02x) not found\n", device); 195 return NULL; 196 } 197 198 struct hpc_ops { 199 int (*power_on_slot)(struct slot *slot); 200 int (*power_off_slot)(struct slot *slot); 201 int (*get_power_status)(struct slot *slot, u8 *status); 202 int (*get_attention_status)(struct slot *slot, u8 *status); 203 int (*set_attention_status)(struct slot *slot, u8 status); 204 int (*get_latch_status)(struct slot *slot, u8 *status); 205 int (*get_adapter_status)(struct slot *slot, u8 *status); 206 int (*get_emi_status)(struct slot *slot, u8 *status); 207 int (*toggle_emi)(struct slot *slot); 208 int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 209 int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 210 int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val); 211 int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val); 212 int (*query_power_fault)(struct slot *slot); 213 void (*green_led_on)(struct slot *slot); 214 void (*green_led_off)(struct slot *slot); 215 void (*green_led_blink)(struct slot *slot); 216 void (*release_ctlr)(struct controller *ctrl); 217 int (*check_lnk_status)(struct controller *ctrl); 218 }; 219 220 #ifdef CONFIG_ACPI 221 #include <acpi/acpi.h> 222 #include <acpi/acpi_bus.h> 223 #include <linux/pci-acpi.h> 224 225 extern void __init pciehp_acpi_slot_detection_init(void); 226 extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev); 227 228 static inline void pciehp_firmware_init(void) 229 { 230 pciehp_acpi_slot_detection_init(); 231 } 232 233 static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev) 234 { 235 int retval; 236 u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | 237 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); 238 retval = acpi_get_hp_hw_control_from_firmware(dev, flags); 239 if (retval) 240 return retval; 241 return pciehp_acpi_slot_detection_check(dev); 242 } 243 244 static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev, 245 struct hotplug_params *hpp) 246 { 247 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev->bus, hpp))) 248 return -ENODEV; 249 return 0; 250 } 251 #else 252 #define pciehp_firmware_init() do {} while (0) 253 #define pciehp_get_hp_hw_control_from_firmware(dev) 0 254 #define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV) 255 #endif /* CONFIG_ACPI */ 256 #endif /* _PCIEHP_H */ 257