1 /* 2 * PCI Express Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 6 * Copyright (C) 2001 IBM Corp. 7 * Copyright (C) 2003-2004 Intel Corporation 8 * 9 * All rights reserved. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 19 * NON INFRINGEMENT. See the GNU General Public License for more 20 * details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> 27 * 28 */ 29 #ifndef _PCIEHP_H 30 #define _PCIEHP_H 31 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/pci_hotplug.h> 35 #include <linux/delay.h> 36 #include <linux/sched.h> /* signal_pending() */ 37 #include <linux/pcieport_if.h> 38 #include <linux/mutex.h> 39 40 #define MY_NAME "pciehp" 41 42 extern int pciehp_poll_mode; 43 extern int pciehp_poll_time; 44 extern int pciehp_debug; 45 extern int pciehp_force; 46 extern int pciehp_slot_with_bus; 47 extern struct workqueue_struct *pciehp_wq; 48 49 #define dbg(format, arg...) \ 50 do { \ 51 if (pciehp_debug) \ 52 printk("%s: " format, MY_NAME , ## arg); \ 53 } while (0) 54 #define err(format, arg...) \ 55 printk(KERN_ERR "%s: " format, MY_NAME , ## arg) 56 #define info(format, arg...) \ 57 printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 58 #define warn(format, arg...) \ 59 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 60 61 #define SLOT_NAME_SIZE 10 62 struct slot { 63 u8 bus; 64 u8 device; 65 u32 number; 66 u8 state; 67 struct timer_list task_event; 68 u8 hp_slot; 69 struct controller *ctrl; 70 struct hpc_ops *hpc_ops; 71 struct hotplug_slot *hotplug_slot; 72 struct list_head slot_list; 73 char name[SLOT_NAME_SIZE]; 74 unsigned long last_emi_toggle; 75 struct delayed_work work; /* work for button event */ 76 struct mutex lock; 77 }; 78 79 struct event_info { 80 u32 event_type; 81 struct slot *p_slot; 82 struct work_struct work; 83 }; 84 85 struct controller { 86 struct mutex crit_sect; /* critical section mutex */ 87 struct mutex ctrl_lock; /* controller lock */ 88 int num_slots; /* Number of slots on ctlr */ 89 int slot_num_inc; /* 1 or -1 */ 90 struct pci_dev *pci_dev; 91 struct list_head slot_list; 92 struct hpc_ops *hpc_ops; 93 wait_queue_head_t queue; /* sleep & wake process */ 94 u8 slot_device_offset; 95 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ 96 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 97 u32 slot_cap; 98 u8 cap_base; 99 struct timer_list poll_timer; 100 int cmd_busy; 101 unsigned int no_cmd_complete:1; 102 }; 103 104 #define INT_BUTTON_IGNORE 0 105 #define INT_PRESENCE_ON 1 106 #define INT_PRESENCE_OFF 2 107 #define INT_SWITCH_CLOSE 3 108 #define INT_SWITCH_OPEN 4 109 #define INT_POWER_FAULT 5 110 #define INT_POWER_FAULT_CLEAR 6 111 #define INT_BUTTON_PRESS 7 112 #define INT_BUTTON_RELEASE 8 113 #define INT_BUTTON_CANCEL 9 114 115 #define STATIC_STATE 0 116 #define BLINKINGON_STATE 1 117 #define BLINKINGOFF_STATE 2 118 #define POWERON_STATE 3 119 #define POWEROFF_STATE 4 120 121 /* Error messages */ 122 #define INTERLOCK_OPEN 0x00000002 123 #define ADD_NOT_SUPPORTED 0x00000003 124 #define CARD_FUNCTIONING 0x00000005 125 #define ADAPTER_NOT_SAME 0x00000006 126 #define NO_ADAPTER_PRESENT 0x00000009 127 #define NOT_ENOUGH_RESOURCES 0x0000000B 128 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C 129 #define WRONG_BUS_FREQUENCY 0x0000000D 130 #define POWER_FAILURE 0x0000000E 131 132 /* Field definitions in Slot Capabilities Register */ 133 #define ATTN_BUTTN_PRSN 0x00000001 134 #define PWR_CTRL_PRSN 0x00000002 135 #define MRL_SENS_PRSN 0x00000004 136 #define ATTN_LED_PRSN 0x00000008 137 #define PWR_LED_PRSN 0x00000010 138 #define HP_SUPR_RM_SUP 0x00000020 139 #define EMI_PRSN 0x00020000 140 #define NO_CMD_CMPL_SUP 0x00040000 141 142 #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN) 143 #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN) 144 #define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN) 145 #define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN) 146 #define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN) 147 #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP) 148 #define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN) 149 #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP) 150 151 extern int pciehp_sysfs_enable_slot(struct slot *slot); 152 extern int pciehp_sysfs_disable_slot(struct slot *slot); 153 extern u8 pciehp_handle_attention_button(struct slot *p_slot); 154 extern u8 pciehp_handle_switch_change(struct slot *p_slot); 155 extern u8 pciehp_handle_presence_change(struct slot *p_slot); 156 extern u8 pciehp_handle_power_fault(struct slot *p_slot); 157 extern int pciehp_configure_device(struct slot *p_slot); 158 extern int pciehp_unconfigure_device(struct slot *p_slot); 159 extern void pciehp_queue_pushbutton_work(struct work_struct *work); 160 struct controller *pcie_init(struct pcie_device *dev); 161 int pciehp_enable_slot(struct slot *p_slot); 162 int pciehp_disable_slot(struct slot *p_slot); 163 int pcie_enable_notification(struct controller *ctrl); 164 165 static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device) 166 { 167 struct slot *slot; 168 169 list_for_each_entry(slot, &ctrl->slot_list, slot_list) { 170 if (slot->device == device) 171 return slot; 172 } 173 174 err("%s: slot (device=0x%x) not found\n", __func__, device); 175 return NULL; 176 } 177 178 struct hpc_ops { 179 int (*power_on_slot)(struct slot *slot); 180 int (*power_off_slot)(struct slot *slot); 181 int (*get_power_status)(struct slot *slot, u8 *status); 182 int (*get_attention_status)(struct slot *slot, u8 *status); 183 int (*set_attention_status)(struct slot *slot, u8 status); 184 int (*get_latch_status)(struct slot *slot, u8 *status); 185 int (*get_adapter_status)(struct slot *slot, u8 *status); 186 int (*get_emi_status)(struct slot *slot, u8 *status); 187 int (*toggle_emi)(struct slot *slot); 188 int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 189 int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 190 int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val); 191 int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val); 192 int (*query_power_fault)(struct slot *slot); 193 void (*green_led_on)(struct slot *slot); 194 void (*green_led_off)(struct slot *slot); 195 void (*green_led_blink)(struct slot *slot); 196 void (*release_ctlr)(struct controller *ctrl); 197 int (*check_lnk_status)(struct controller *ctrl); 198 }; 199 200 #ifdef CONFIG_ACPI 201 #include <acpi/acpi.h> 202 #include <acpi/acpi_bus.h> 203 #include <acpi/actypes.h> 204 #include <linux/pci-acpi.h> 205 206 static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev) 207 { 208 u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL | 209 OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL); 210 return acpi_get_hp_hw_control_from_firmware(dev, flags); 211 } 212 213 static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev, 214 struct hotplug_params *hpp) 215 { 216 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev->bus, hpp))) 217 return -ENODEV; 218 return 0; 219 } 220 #else 221 #define pciehp_get_hp_hw_control_from_firmware(dev) 0 222 #define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV) 223 #endif /* CONFIG_ACPI */ 224 #endif /* _PCIEHP_H */ 225