1 /* 2 * PCI Express Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 6 * Copyright (C) 2001 IBM Corp. 7 * Copyright (C) 2003-2004 Intel Corporation 8 * 9 * All rights reserved. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 19 * NON INFRINGEMENT. See the GNU General Public License for more 20 * details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> 27 * 28 */ 29 #ifndef _PCIEHP_H 30 #define _PCIEHP_H 31 32 #include <linux/types.h> 33 #include <linux/pci.h> 34 #include <linux/pci_hotplug.h> 35 #include <linux/delay.h> 36 #include <linux/sched.h> /* signal_pending() */ 37 #include <linux/pcieport_if.h> 38 #include <linux/mutex.h> 39 40 #define MY_NAME "pciehp" 41 42 extern int pciehp_poll_mode; 43 extern int pciehp_poll_time; 44 extern int pciehp_debug; 45 extern int pciehp_force; 46 extern struct workqueue_struct *pciehp_wq; 47 48 #define dbg(format, arg...) \ 49 do { \ 50 if (pciehp_debug) \ 51 printk("%s: " format, MY_NAME , ## arg); \ 52 } while (0) 53 #define err(format, arg...) \ 54 printk(KERN_ERR "%s: " format, MY_NAME , ## arg) 55 #define info(format, arg...) \ 56 printk(KERN_INFO "%s: " format, MY_NAME , ## arg) 57 #define warn(format, arg...) \ 58 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg) 59 60 #define SLOT_NAME_SIZE 10 61 struct slot { 62 u8 bus; 63 u8 device; 64 u32 number; 65 u8 state; 66 struct timer_list task_event; 67 u8 hp_slot; 68 struct controller *ctrl; 69 struct hpc_ops *hpc_ops; 70 struct hotplug_slot *hotplug_slot; 71 struct list_head slot_list; 72 char name[SLOT_NAME_SIZE]; 73 unsigned long last_emi_toggle; 74 struct delayed_work work; /* work for button event */ 75 struct mutex lock; 76 }; 77 78 struct event_info { 79 u32 event_type; 80 struct slot *p_slot; 81 struct work_struct work; 82 }; 83 84 struct controller { 85 struct mutex crit_sect; /* critical section mutex */ 86 struct mutex ctrl_lock; /* controller lock */ 87 int num_slots; /* Number of slots on ctlr */ 88 int slot_num_inc; /* 1 or -1 */ 89 struct pci_dev *pci_dev; 90 struct list_head slot_list; 91 struct hpc_ops *hpc_ops; 92 wait_queue_head_t queue; /* sleep & wake process */ 93 u8 slot_device_offset; 94 u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */ 95 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 96 u8 ctrlcap; 97 u8 cap_base; 98 struct timer_list poll_timer; 99 volatile int cmd_busy; 100 spinlock_t lock; 101 }; 102 103 #define INT_BUTTON_IGNORE 0 104 #define INT_PRESENCE_ON 1 105 #define INT_PRESENCE_OFF 2 106 #define INT_SWITCH_CLOSE 3 107 #define INT_SWITCH_OPEN 4 108 #define INT_POWER_FAULT 5 109 #define INT_POWER_FAULT_CLEAR 6 110 #define INT_BUTTON_PRESS 7 111 #define INT_BUTTON_RELEASE 8 112 #define INT_BUTTON_CANCEL 9 113 114 #define STATIC_STATE 0 115 #define BLINKINGON_STATE 1 116 #define BLINKINGOFF_STATE 2 117 #define POWERON_STATE 3 118 #define POWEROFF_STATE 4 119 120 /* Error messages */ 121 #define INTERLOCK_OPEN 0x00000002 122 #define ADD_NOT_SUPPORTED 0x00000003 123 #define CARD_FUNCTIONING 0x00000005 124 #define ADAPTER_NOT_SAME 0x00000006 125 #define NO_ADAPTER_PRESENT 0x00000009 126 #define NOT_ENOUGH_RESOURCES 0x0000000B 127 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C 128 #define WRONG_BUS_FREQUENCY 0x0000000D 129 #define POWER_FAILURE 0x0000000E 130 131 /* Field definitions in Slot Capabilities Register */ 132 #define ATTN_BUTTN_PRSN 0x00000001 133 #define PWR_CTRL_PRSN 0x00000002 134 #define MRL_SENS_PRSN 0x00000004 135 #define ATTN_LED_PRSN 0x00000008 136 #define PWR_LED_PRSN 0x00000010 137 #define HP_SUPR_RM_SUP 0x00000020 138 #define EMI_PRSN 0x00020000 139 140 #define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN) 141 #define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN) 142 #define MRL_SENS(cap) (cap & MRL_SENS_PRSN) 143 #define ATTN_LED(cap) (cap & ATTN_LED_PRSN) 144 #define PWR_LED(cap) (cap & PWR_LED_PRSN) 145 #define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP) 146 #define EMI(cap) (cap & EMI_PRSN) 147 148 extern int pciehp_sysfs_enable_slot(struct slot *slot); 149 extern int pciehp_sysfs_disable_slot(struct slot *slot); 150 extern u8 pciehp_handle_attention_button(u8 hp_slot, struct controller *ctrl); 151 extern u8 pciehp_handle_switch_change(u8 hp_slot, struct controller *ctrl); 152 extern u8 pciehp_handle_presence_change(u8 hp_slot, struct controller *ctrl); 153 extern u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl); 154 extern int pciehp_configure_device(struct slot *p_slot); 155 extern int pciehp_unconfigure_device(struct slot *p_slot); 156 extern void pciehp_queue_pushbutton_work(struct work_struct *work); 157 int pcie_init(struct controller *ctrl, struct pcie_device *dev); 158 int pciehp_enable_slot(struct slot *p_slot); 159 int pciehp_disable_slot(struct slot *p_slot); 160 int pcie_init_hardware_part2(struct controller *ctrl, struct pcie_device *dev); 161 162 static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device) 163 { 164 struct slot *slot; 165 166 list_for_each_entry(slot, &ctrl->slot_list, slot_list) { 167 if (slot->device == device) 168 return slot; 169 } 170 171 err("%s: slot (device=0x%x) not found\n", __FUNCTION__, device); 172 return NULL; 173 } 174 175 struct hpc_ops { 176 int (*power_on_slot)(struct slot *slot); 177 int (*power_off_slot)(struct slot *slot); 178 int (*get_power_status)(struct slot *slot, u8 *status); 179 int (*get_attention_status)(struct slot *slot, u8 *status); 180 int (*set_attention_status)(struct slot *slot, u8 status); 181 int (*get_latch_status)(struct slot *slot, u8 *status); 182 int (*get_adapter_status)(struct slot *slot, u8 *status); 183 int (*get_emi_status)(struct slot *slot, u8 *status); 184 int (*toggle_emi)(struct slot *slot); 185 int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 186 int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed); 187 int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val); 188 int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val); 189 int (*query_power_fault)(struct slot *slot); 190 void (*green_led_on)(struct slot *slot); 191 void (*green_led_off)(struct slot *slot); 192 void (*green_led_blink)(struct slot *slot); 193 void (*release_ctlr)(struct controller *ctrl); 194 int (*check_lnk_status)(struct controller *ctrl); 195 }; 196 197 #ifdef CONFIG_ACPI 198 #include <acpi/acpi.h> 199 #include <acpi/acpi_bus.h> 200 #include <acpi/actypes.h> 201 #include <linux/pci-acpi.h> 202 203 #define pciehp_get_hp_hw_control_from_firmware(dev) \ 204 pciehp_acpi_get_hp_hw_control_from_firmware(dev) 205 static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev, 206 struct hotplug_params *hpp) 207 { 208 if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev->bus, hpp))) 209 return -ENODEV; 210 return 0; 211 } 212 #else 213 #define pciehp_get_hp_hw_control_from_firmware(dev) 0 214 #define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV) 215 #endif /* CONFIG_ACPI */ 216 #endif /* _PCIEHP_H */ 217