1 /* 2 * Compaq Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) 6 * Copyright (C) 2001 IBM Corp. 7 * 8 * All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 18 * NON INFRINGEMENT. See the GNU General Public License for more 19 * details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Send feedback to <greg@kroah.com> 26 * 27 */ 28 29 #include <linux/config.h> 30 #include <linux/module.h> 31 #include <linux/kernel.h> 32 #include <linux/types.h> 33 #include <linux/slab.h> 34 #include <linux/workqueue.h> 35 #include <linux/proc_fs.h> 36 #include <linux/pci.h> 37 #include "../pci.h" 38 #include "cpqphp.h" 39 #include "cpqphp_nvram.h" 40 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */ 41 42 43 u8 cpqhp_nic_irq; 44 u8 cpqhp_disk_irq; 45 46 static u16 unused_IRQ; 47 48 /* 49 * detect_HRT_floating_pointer 50 * 51 * find the Hot Plug Resource Table in the specified region of memory. 52 * 53 */ 54 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end) 55 { 56 void __iomem *fp; 57 void __iomem *endp; 58 u8 temp1, temp2, temp3, temp4; 59 int status = 0; 60 61 endp = (end - sizeof(struct hrt) + 1); 62 63 for (fp = begin; fp <= endp; fp += 16) { 64 temp1 = readb(fp + SIG0); 65 temp2 = readb(fp + SIG1); 66 temp3 = readb(fp + SIG2); 67 temp4 = readb(fp + SIG3); 68 if (temp1 == '$' && 69 temp2 == 'H' && 70 temp3 == 'R' && 71 temp4 == 'T') { 72 status = 1; 73 break; 74 } 75 } 76 77 if (!status) 78 fp = NULL; 79 80 dbg("Discovered Hotplug Resource Table at %p\n", fp); 81 return fp; 82 } 83 84 85 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func) 86 { 87 unsigned char bus; 88 struct pci_bus *child; 89 int num; 90 91 if (func->pci_dev == NULL) 92 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 93 94 /* No pci device, we need to create it then */ 95 if (func->pci_dev == NULL) { 96 dbg("INFO: pci_dev still null\n"); 97 98 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function)); 99 if (num) 100 pci_bus_add_devices(ctrl->pci_dev->bus); 101 102 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function)); 103 if (func->pci_dev == NULL) { 104 dbg("ERROR: pci_dev still null\n"); 105 return 0; 106 } 107 } 108 109 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 110 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus); 111 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus); 112 pci_do_scan_bus(child); 113 } 114 115 return 0; 116 } 117 118 119 int cpqhp_unconfigure_device(struct pci_func* func) 120 { 121 int j; 122 123 dbg("%s: bus/dev/func = %x/%x/%x\n", __FUNCTION__, func->bus, func->device, func->function); 124 125 for (j=0; j<8 ; j++) { 126 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j)); 127 if (temp) 128 pci_remove_bus_device(temp); 129 } 130 return 0; 131 } 132 133 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value) 134 { 135 u32 vendID = 0; 136 137 if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1) 138 return -1; 139 if (vendID == 0xffffffff) 140 return -1; 141 return pci_bus_read_config_dword (bus, devfn, offset, value); 142 } 143 144 145 /* 146 * cpqhp_set_irq 147 * 148 * @bus_num: bus number of PCI device 149 * @dev_num: device number of PCI device 150 * @slot: pointer to u8 where slot number will be returned 151 */ 152 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num) 153 { 154 int rc = 0; 155 156 if (cpqhp_legacy_mode) { 157 struct pci_dev *fakedev; 158 struct pci_bus *fakebus; 159 u16 temp_word; 160 161 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL); 162 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL); 163 if (!fakedev || !fakebus) { 164 kfree(fakedev); 165 kfree(fakebus); 166 return -ENOMEM; 167 } 168 169 fakedev->devfn = dev_num << 3; 170 fakedev->bus = fakebus; 171 fakebus->number = bus_num; 172 dbg("%s: dev %d, bus %d, pin %d, num %d\n", 173 __FUNCTION__, dev_num, bus_num, int_pin, irq_num); 174 rc = pcibios_set_irq_routing(fakedev, int_pin - 0x0a, irq_num); 175 kfree(fakedev); 176 kfree(fakebus); 177 dbg("%s: rc %d\n", __FUNCTION__, rc); 178 if (!rc) 179 return !rc; 180 181 // set the Edge Level Control Register (ELCR) 182 temp_word = inb(0x4d0); 183 temp_word |= inb(0x4d1) << 8; 184 185 temp_word |= 0x01 << irq_num; 186 187 // This should only be for x86 as it sets the Edge Level Control Register 188 outb((u8) (temp_word & 0xFF), 0x4d0); 189 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1); 190 rc = 0; 191 } 192 193 return rc; 194 } 195 196 197 /* 198 * WTF??? This function isn't in the code, yet a function calls it, but the 199 * compiler optimizes it away? strange. Here as a placeholder to keep the 200 * compiler happy. 201 */ 202 static int PCI_ScanBusNonBridge (u8 bus, u8 device) 203 { 204 return 0; 205 } 206 207 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num) 208 { 209 u16 tdevice; 210 u32 work; 211 u8 tbus; 212 213 ctrl->pci_bus->number = bus_num; 214 215 for (tdevice = 0; tdevice < 0xFF; tdevice++) { 216 //Scan for access first 217 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 218 continue; 219 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice); 220 //Yep we got one. Not a bridge ? 221 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) { 222 *dev_num = tdevice; 223 dbg("found it !\n"); 224 return 0; 225 } 226 } 227 for (tdevice = 0; tdevice < 0xFF; tdevice++) { 228 //Scan for access first 229 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 230 continue; 231 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice); 232 //Yep we got one. bridge ? 233 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 234 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus); 235 dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice); 236 if (PCI_ScanBusNonBridge(tbus, tdevice) == 0) 237 return 0; 238 } 239 } 240 241 return -1; 242 } 243 244 245 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge) 246 { 247 struct irq_routing_table *PCIIRQRoutingInfoLength; 248 long len; 249 long loop; 250 u32 work; 251 252 u8 tbus, tdevice, tslot; 253 254 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table(); 255 if (!PCIIRQRoutingInfoLength) 256 return -1; 257 258 len = (PCIIRQRoutingInfoLength->size - 259 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 260 // Make sure I got at least one entry 261 if (len == 0) { 262 if (PCIIRQRoutingInfoLength != NULL) 263 kfree(PCIIRQRoutingInfoLength ); 264 return -1; 265 } 266 267 for (loop = 0; loop < len; ++loop) { 268 tbus = PCIIRQRoutingInfoLength->slots[loop].bus; 269 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn; 270 tslot = PCIIRQRoutingInfoLength->slots[loop].slot; 271 272 if (tslot == slot) { 273 *bus_num = tbus; 274 *dev_num = tdevice; 275 ctrl->pci_bus->number = tbus; 276 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work); 277 if (!nobridge || (work == 0xffffffff)) { 278 if (PCIIRQRoutingInfoLength != NULL) 279 kfree(PCIIRQRoutingInfoLength ); 280 return 0; 281 } 282 283 dbg("bus_num %d devfn %d\n", *bus_num, *dev_num); 284 pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work); 285 dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS); 286 287 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 288 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus); 289 dbg("Scan bus for Non Bridge: bus %d\n", tbus); 290 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) { 291 *bus_num = tbus; 292 if (PCIIRQRoutingInfoLength != NULL) 293 kfree(PCIIRQRoutingInfoLength ); 294 return 0; 295 } 296 } else { 297 if (PCIIRQRoutingInfoLength != NULL) 298 kfree(PCIIRQRoutingInfoLength ); 299 return 0; 300 } 301 302 } 303 } 304 if (PCIIRQRoutingInfoLength != NULL) 305 kfree(PCIIRQRoutingInfoLength ); 306 return -1; 307 } 308 309 310 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot) 311 { 312 return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0); //plain (bridges allowed) 313 } 314 315 316 /* More PCI configuration routines; this time centered around hotplug controller */ 317 318 319 /* 320 * cpqhp_save_config 321 * 322 * Reads configuration for all slots in a PCI bus and saves info. 323 * 324 * Note: For non-hot plug busses, the slot # saved is the device # 325 * 326 * returns 0 if success 327 */ 328 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug) 329 { 330 long rc; 331 u8 class_code; 332 u8 header_type; 333 u32 ID; 334 u8 secondary_bus; 335 struct pci_func *new_slot; 336 int sub_bus; 337 int FirstSupported; 338 int LastSupported; 339 int max_functions; 340 int function; 341 u8 DevError; 342 int device = 0; 343 int cloop = 0; 344 int stop_it; 345 int index; 346 347 // Decide which slots are supported 348 349 if (is_hot_plug) { 350 //********************************* 351 // is_hot_plug is the slot mask 352 //********************************* 353 FirstSupported = is_hot_plug >> 4; 354 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1; 355 } else { 356 FirstSupported = 0; 357 LastSupported = 0x1F; 358 } 359 360 // Save PCI configuration space for all devices in supported slots 361 ctrl->pci_bus->number = busnumber; 362 for (device = FirstSupported; device <= LastSupported; device++) { 363 ID = 0xFFFFFFFF; 364 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID); 365 366 if (ID != 0xFFFFFFFF) { // device in slot 367 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code); 368 if (rc) 369 return rc; 370 371 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type); 372 if (rc) 373 return rc; 374 375 // If multi-function device, set max_functions to 8 376 if (header_type & 0x80) 377 max_functions = 8; 378 else 379 max_functions = 1; 380 381 function = 0; 382 383 do { 384 DevError = 0; 385 386 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // P-P Bridge 387 // Recurse the subordinate bus 388 // get the subordinate bus number 389 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus); 390 if (rc) { 391 return rc; 392 } else { 393 sub_bus = (int) secondary_bus; 394 395 // Save secondary bus cfg spc 396 // with this recursive call. 397 rc = cpqhp_save_config(ctrl, sub_bus, 0); 398 if (rc) 399 return rc; 400 ctrl->pci_bus->number = busnumber; 401 } 402 } 403 404 index = 0; 405 new_slot = cpqhp_slot_find(busnumber, device, index++); 406 while (new_slot && 407 (new_slot->function != (u8) function)) 408 new_slot = cpqhp_slot_find(busnumber, device, index++); 409 410 if (!new_slot) { 411 // Setup slot structure. 412 new_slot = cpqhp_slot_create(busnumber); 413 414 if (new_slot == NULL) 415 return(1); 416 } 417 418 new_slot->bus = (u8) busnumber; 419 new_slot->device = (u8) device; 420 new_slot->function = (u8) function; 421 new_slot->is_a_board = 1; 422 new_slot->switch_save = 0x10; 423 // In case of unsupported board 424 new_slot->status = DevError; 425 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function); 426 427 for (cloop = 0; cloop < 0x20; cloop++) { 428 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop])); 429 if (rc) 430 return rc; 431 } 432 433 function++; 434 435 stop_it = 0; 436 437 // this loop skips to the next present function 438 // reading in Class Code and Header type. 439 440 while ((function < max_functions)&&(!stop_it)) { 441 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID); 442 if (ID == 0xFFFFFFFF) { // nothing there. 443 function++; 444 } else { // Something there 445 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code); 446 if (rc) 447 return rc; 448 449 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type); 450 if (rc) 451 return rc; 452 453 stop_it++; 454 } 455 } 456 457 } while (function < max_functions); 458 } // End of IF (device in slot?) 459 else if (is_hot_plug) { 460 // Setup slot structure with entry for empty slot 461 new_slot = cpqhp_slot_create(busnumber); 462 463 if (new_slot == NULL) { 464 return(1); 465 } 466 467 new_slot->bus = (u8) busnumber; 468 new_slot->device = (u8) device; 469 new_slot->function = 0; 470 new_slot->is_a_board = 0; 471 new_slot->presence_save = 0; 472 new_slot->switch_save = 0; 473 } 474 } // End of FOR loop 475 476 return(0); 477 } 478 479 480 /* 481 * cpqhp_save_slot_config 482 * 483 * Saves configuration info for all PCI devices in a given slot 484 * including subordinate busses. 485 * 486 * returns 0 if success 487 */ 488 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot) 489 { 490 long rc; 491 u8 class_code; 492 u8 header_type; 493 u32 ID; 494 u8 secondary_bus; 495 int sub_bus; 496 int max_functions; 497 int function; 498 int cloop = 0; 499 int stop_it; 500 501 ID = 0xFFFFFFFF; 502 503 ctrl->pci_bus->number = new_slot->bus; 504 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID); 505 506 if (ID != 0xFFFFFFFF) { // device in slot 507 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code); 508 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type); 509 510 if (header_type & 0x80) // Multi-function device 511 max_functions = 8; 512 else 513 max_functions = 1; 514 515 function = 0; 516 517 do { 518 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 519 // Recurse the subordinate bus 520 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus); 521 522 sub_bus = (int) secondary_bus; 523 524 // Save the config headers for the secondary bus. 525 rc = cpqhp_save_config(ctrl, sub_bus, 0); 526 if (rc) 527 return(rc); 528 ctrl->pci_bus->number = new_slot->bus; 529 530 } // End of IF 531 532 new_slot->status = 0; 533 534 for (cloop = 0; cloop < 0x20; cloop++) { 535 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop])); 536 } 537 538 function++; 539 540 stop_it = 0; 541 542 // this loop skips to the next present function 543 // reading in the Class Code and the Header type. 544 545 while ((function < max_functions) && (!stop_it)) { 546 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID); 547 548 if (ID == 0xFFFFFFFF) { // nothing there. 549 function++; 550 } else { // Something there 551 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code); 552 553 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type); 554 555 stop_it++; 556 } 557 } 558 559 } while (function < max_functions); 560 } // End of IF (device in slot?) 561 else { 562 return 2; 563 } 564 565 return 0; 566 } 567 568 569 /* 570 * cpqhp_save_base_addr_length 571 * 572 * Saves the length of all base address registers for the 573 * specified slot. this is for hot plug REPLACE 574 * 575 * returns 0 if success 576 */ 577 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func) 578 { 579 u8 cloop; 580 u8 header_type; 581 u8 secondary_bus; 582 u8 type; 583 int sub_bus; 584 u32 temp_register; 585 u32 base; 586 u32 rc; 587 struct pci_func *next; 588 int index = 0; 589 struct pci_bus *pci_bus = ctrl->pci_bus; 590 unsigned int devfn; 591 592 func = cpqhp_slot_find(func->bus, func->device, index++); 593 594 while (func != NULL) { 595 pci_bus->number = func->bus; 596 devfn = PCI_DEVFN(func->device, func->function); 597 598 // Check for Bridge 599 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 600 601 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { 602 // PCI-PCI Bridge 603 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 604 605 sub_bus = (int) secondary_bus; 606 607 next = cpqhp_slot_list[sub_bus]; 608 609 while (next != NULL) { 610 rc = cpqhp_save_base_addr_length(ctrl, next); 611 if (rc) 612 return rc; 613 614 next = next->next; 615 } 616 pci_bus->number = func->bus; 617 618 //FIXME: this loop is duplicated in the non-bridge case. The two could be rolled together 619 // Figure out IO and memory base lengths 620 for (cloop = 0x10; cloop <= 0x14; cloop += 4) { 621 temp_register = 0xFFFFFFFF; 622 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 623 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 624 625 if (base) { // If this register is implemented 626 if (base & 0x01L) { 627 // IO base 628 // set base = amount of IO space requested 629 base = base & 0xFFFFFFFE; 630 base = (~base) + 1; 631 632 type = 1; 633 } else { 634 // memory base 635 base = base & 0xFFFFFFF0; 636 base = (~base) + 1; 637 638 type = 0; 639 } 640 } else { 641 base = 0x0L; 642 type = 0; 643 } 644 645 // Save information in slot structure 646 func->base_length[(cloop - 0x10) >> 2] = 647 base; 648 func->base_type[(cloop - 0x10) >> 2] = type; 649 650 } // End of base register loop 651 652 653 } else if ((header_type & 0x7F) == 0x00) { // PCI-PCI Bridge 654 // Figure out IO and memory base lengths 655 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 656 temp_register = 0xFFFFFFFF; 657 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 658 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 659 660 if (base) { // If this register is implemented 661 if (base & 0x01L) { 662 // IO base 663 // base = amount of IO space requested 664 base = base & 0xFFFFFFFE; 665 base = (~base) + 1; 666 667 type = 1; 668 } else { 669 // memory base 670 // base = amount of memory space requested 671 base = base & 0xFFFFFFF0; 672 base = (~base) + 1; 673 674 type = 0; 675 } 676 } else { 677 base = 0x0L; 678 type = 0; 679 } 680 681 // Save information in slot structure 682 func->base_length[(cloop - 0x10) >> 2] = base; 683 func->base_type[(cloop - 0x10) >> 2] = type; 684 685 } // End of base register loop 686 687 } else { // Some other unknown header type 688 } 689 690 // find the next device in this slot 691 func = cpqhp_slot_find(func->bus, func->device, index++); 692 } 693 694 return(0); 695 } 696 697 698 /* 699 * cpqhp_save_used_resources 700 * 701 * Stores used resource information for existing boards. this is 702 * for boards that were in the system when this driver was loaded. 703 * this function is for hot plug ADD 704 * 705 * returns 0 if success 706 */ 707 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func) 708 { 709 u8 cloop; 710 u8 header_type; 711 u8 secondary_bus; 712 u8 temp_byte; 713 u8 b_base; 714 u8 b_length; 715 u16 command; 716 u16 save_command; 717 u16 w_base; 718 u16 w_length; 719 u32 temp_register; 720 u32 save_base; 721 u32 base; 722 int index = 0; 723 struct pci_resource *mem_node; 724 struct pci_resource *p_mem_node; 725 struct pci_resource *io_node; 726 struct pci_resource *bus_node; 727 struct pci_bus *pci_bus = ctrl->pci_bus; 728 unsigned int devfn; 729 730 func = cpqhp_slot_find(func->bus, func->device, index++); 731 732 while ((func != NULL) && func->is_a_board) { 733 pci_bus->number = func->bus; 734 devfn = PCI_DEVFN(func->device, func->function); 735 736 // Save the command register 737 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command); 738 739 // disable card 740 command = 0x00; 741 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command); 742 743 // Check for Bridge 744 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 745 746 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 747 // Clear Bridge Control Register 748 command = 0x00; 749 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command); 750 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 751 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte); 752 753 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL); 754 if (!bus_node) 755 return -ENOMEM; 756 757 bus_node->base = secondary_bus; 758 bus_node->length = temp_byte - secondary_bus + 1; 759 760 bus_node->next = func->bus_head; 761 func->bus_head = bus_node; 762 763 // Save IO base and Limit registers 764 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base); 765 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length); 766 767 if ((b_base <= b_length) && (save_command & 0x01)) { 768 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL); 769 if (!io_node) 770 return -ENOMEM; 771 772 io_node->base = (b_base & 0xF0) << 8; 773 io_node->length = (b_length - b_base + 0x10) << 8; 774 775 io_node->next = func->io_head; 776 func->io_head = io_node; 777 } 778 779 // Save memory base and Limit registers 780 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base); 781 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length); 782 783 if ((w_base <= w_length) && (save_command & 0x02)) { 784 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL); 785 if (!mem_node) 786 return -ENOMEM; 787 788 mem_node->base = w_base << 16; 789 mem_node->length = (w_length - w_base + 0x10) << 16; 790 791 mem_node->next = func->mem_head; 792 func->mem_head = mem_node; 793 } 794 795 // Save prefetchable memory base and Limit registers 796 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base); 797 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length); 798 799 if ((w_base <= w_length) && (save_command & 0x02)) { 800 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL); 801 if (!p_mem_node) 802 return -ENOMEM; 803 804 p_mem_node->base = w_base << 16; 805 p_mem_node->length = (w_length - w_base + 0x10) << 16; 806 807 p_mem_node->next = func->p_mem_head; 808 func->p_mem_head = p_mem_node; 809 } 810 // Figure out IO and memory base lengths 811 for (cloop = 0x10; cloop <= 0x14; cloop += 4) { 812 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base); 813 814 temp_register = 0xFFFFFFFF; 815 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register); 816 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); 817 818 temp_register = base; 819 820 if (base) { // If this register is implemented 821 if (((base & 0x03L) == 0x01) 822 && (save_command & 0x01)) { 823 // IO base 824 // set temp_register = amount of IO space requested 825 temp_register = base & 0xFFFFFFFE; 826 temp_register = (~temp_register) + 1; 827 828 io_node = kmalloc(sizeof(*io_node), 829 GFP_KERNEL); 830 if (!io_node) 831 return -ENOMEM; 832 833 io_node->base = 834 save_base & (~0x03L); 835 io_node->length = temp_register; 836 837 io_node->next = func->io_head; 838 func->io_head = io_node; 839 } else 840 if (((base & 0x0BL) == 0x08) 841 && (save_command & 0x02)) { 842 // prefetchable memory base 843 temp_register = base & 0xFFFFFFF0; 844 temp_register = (~temp_register) + 1; 845 846 p_mem_node = kmalloc(sizeof(*p_mem_node), 847 GFP_KERNEL); 848 if (!p_mem_node) 849 return -ENOMEM; 850 851 p_mem_node->base = save_base & (~0x0FL); 852 p_mem_node->length = temp_register; 853 854 p_mem_node->next = func->p_mem_head; 855 func->p_mem_head = p_mem_node; 856 } else 857 if (((base & 0x0BL) == 0x00) 858 && (save_command & 0x02)) { 859 // prefetchable memory base 860 temp_register = base & 0xFFFFFFF0; 861 temp_register = (~temp_register) + 1; 862 863 mem_node = kmalloc(sizeof(*mem_node), 864 GFP_KERNEL); 865 if (!mem_node) 866 return -ENOMEM; 867 868 mem_node->base = save_base & (~0x0FL); 869 mem_node->length = temp_register; 870 871 mem_node->next = func->mem_head; 872 func->mem_head = mem_node; 873 } else 874 return(1); 875 } 876 } // End of base register loop 877 } else if ((header_type & 0x7F) == 0x00) { // Standard header 878 // Figure out IO and memory base lengths 879 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 880 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base); 881 882 temp_register = 0xFFFFFFFF; 883 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register); 884 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); 885 886 temp_register = base; 887 888 if (base) { // If this register is implemented 889 if (((base & 0x03L) == 0x01) 890 && (save_command & 0x01)) { 891 // IO base 892 // set temp_register = amount of IO space requested 893 temp_register = base & 0xFFFFFFFE; 894 temp_register = (~temp_register) + 1; 895 896 io_node = kmalloc(sizeof(*io_node), 897 GFP_KERNEL); 898 if (!io_node) 899 return -ENOMEM; 900 901 io_node->base = save_base & (~0x01L); 902 io_node->length = temp_register; 903 904 io_node->next = func->io_head; 905 func->io_head = io_node; 906 } else 907 if (((base & 0x0BL) == 0x08) 908 && (save_command & 0x02)) { 909 // prefetchable memory base 910 temp_register = base & 0xFFFFFFF0; 911 temp_register = (~temp_register) + 1; 912 913 p_mem_node = kmalloc(sizeof(*p_mem_node), 914 GFP_KERNEL); 915 if (!p_mem_node) 916 return -ENOMEM; 917 918 p_mem_node->base = save_base & (~0x0FL); 919 p_mem_node->length = temp_register; 920 921 p_mem_node->next = func->p_mem_head; 922 func->p_mem_head = p_mem_node; 923 } else 924 if (((base & 0x0BL) == 0x00) 925 && (save_command & 0x02)) { 926 // prefetchable memory base 927 temp_register = base & 0xFFFFFFF0; 928 temp_register = (~temp_register) + 1; 929 930 mem_node = kmalloc(sizeof(*mem_node), 931 GFP_KERNEL); 932 if (!mem_node) 933 return -ENOMEM; 934 935 mem_node->base = save_base & (~0x0FL); 936 mem_node->length = temp_register; 937 938 mem_node->next = func->mem_head; 939 func->mem_head = mem_node; 940 } else 941 return(1); 942 } 943 } // End of base register loop 944 } else { // Some other unknown header type 945 } 946 947 // find the next device in this slot 948 func = cpqhp_slot_find(func->bus, func->device, index++); 949 } 950 951 return(0); 952 } 953 954 955 /* 956 * cpqhp_configure_board 957 * 958 * Copies saved configuration information to one slot. 959 * this is called recursively for bridge devices. 960 * this is for hot plug REPLACE! 961 * 962 * returns 0 if success 963 */ 964 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func) 965 { 966 int cloop; 967 u8 header_type; 968 u8 secondary_bus; 969 int sub_bus; 970 struct pci_func *next; 971 u32 temp; 972 u32 rc; 973 int index = 0; 974 struct pci_bus *pci_bus = ctrl->pci_bus; 975 unsigned int devfn; 976 977 func = cpqhp_slot_find(func->bus, func->device, index++); 978 979 while (func != NULL) { 980 pci_bus->number = func->bus; 981 devfn = PCI_DEVFN(func->device, func->function); 982 983 // Start at the top of config space so that the control 984 // registers are programmed last 985 for (cloop = 0x3C; cloop > 0; cloop -= 4) { 986 pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]); 987 } 988 989 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 990 991 // If this is a bridge device, restore subordinate devices 992 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 993 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 994 995 sub_bus = (int) secondary_bus; 996 997 next = cpqhp_slot_list[sub_bus]; 998 999 while (next != NULL) { 1000 rc = cpqhp_configure_board(ctrl, next); 1001 if (rc) 1002 return rc; 1003 1004 next = next->next; 1005 } 1006 } else { 1007 1008 // Check all the base Address Registers to make sure 1009 // they are the same. If not, the board is different. 1010 1011 for (cloop = 16; cloop < 40; cloop += 4) { 1012 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp); 1013 1014 if (temp != func->config_space[cloop >> 2]) { 1015 dbg("Config space compare failure!!! offset = %x\n", cloop); 1016 dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function); 1017 dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]); 1018 return 1; 1019 } 1020 } 1021 } 1022 1023 func->configured = 1; 1024 1025 func = cpqhp_slot_find(func->bus, func->device, index++); 1026 } 1027 1028 return 0; 1029 } 1030 1031 1032 /* 1033 * cpqhp_valid_replace 1034 * 1035 * this function checks to see if a board is the same as the 1036 * one it is replacing. this check will detect if the device's 1037 * vendor or device id's are the same 1038 * 1039 * returns 0 if the board is the same nonzero otherwise 1040 */ 1041 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func) 1042 { 1043 u8 cloop; 1044 u8 header_type; 1045 u8 secondary_bus; 1046 u8 type; 1047 u32 temp_register = 0; 1048 u32 base; 1049 u32 rc; 1050 struct pci_func *next; 1051 int index = 0; 1052 struct pci_bus *pci_bus = ctrl->pci_bus; 1053 unsigned int devfn; 1054 1055 if (!func->is_a_board) 1056 return(ADD_NOT_SUPPORTED); 1057 1058 func = cpqhp_slot_find(func->bus, func->device, index++); 1059 1060 while (func != NULL) { 1061 pci_bus->number = func->bus; 1062 devfn = PCI_DEVFN(func->device, func->function); 1063 1064 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register); 1065 1066 // No adapter present 1067 if (temp_register == 0xFFFFFFFF) 1068 return(NO_ADAPTER_PRESENT); 1069 1070 if (temp_register != func->config_space[0]) 1071 return(ADAPTER_NOT_SAME); 1072 1073 // Check for same revision number and class code 1074 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register); 1075 1076 // Adapter not the same 1077 if (temp_register != func->config_space[0x08 >> 2]) 1078 return(ADAPTER_NOT_SAME); 1079 1080 // Check for Bridge 1081 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 1082 1083 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 1084 // In order to continue checking, we must program the 1085 // bus registers in the bridge to respond to accesses 1086 // for it's subordinate bus(es) 1087 1088 temp_register = func->config_space[0x18 >> 2]; 1089 pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register); 1090 1091 secondary_bus = (temp_register >> 8) & 0xFF; 1092 1093 next = cpqhp_slot_list[secondary_bus]; 1094 1095 while (next != NULL) { 1096 rc = cpqhp_valid_replace(ctrl, next); 1097 if (rc) 1098 return rc; 1099 1100 next = next->next; 1101 } 1102 1103 } 1104 // Check to see if it is a standard config header 1105 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) { 1106 // Check subsystem vendor and ID 1107 pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register); 1108 1109 if (temp_register != func->config_space[0x2C >> 2]) { 1110 // If it's a SMART-2 and the register isn't filled 1111 // in, ignore the difference because 1112 // they just have an old rev of the firmware 1113 1114 if (!((func->config_space[0] == 0xAE100E11) 1115 && (temp_register == 0x00L))) 1116 return(ADAPTER_NOT_SAME); 1117 } 1118 // Figure out IO and memory base lengths 1119 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 1120 temp_register = 0xFFFFFFFF; 1121 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 1122 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 1123 if (base) { // If this register is implemented 1124 if (base & 0x01L) { 1125 // IO base 1126 // set base = amount of IO space requested 1127 base = base & 0xFFFFFFFE; 1128 base = (~base) + 1; 1129 1130 type = 1; 1131 } else { 1132 // memory base 1133 base = base & 0xFFFFFFF0; 1134 base = (~base) + 1; 1135 1136 type = 0; 1137 } 1138 } else { 1139 base = 0x0L; 1140 type = 0; 1141 } 1142 1143 // Check information in slot structure 1144 if (func->base_length[(cloop - 0x10) >> 2] != base) 1145 return(ADAPTER_NOT_SAME); 1146 1147 if (func->base_type[(cloop - 0x10) >> 2] != type) 1148 return(ADAPTER_NOT_SAME); 1149 1150 } // End of base register loop 1151 1152 } // End of (type 0 config space) else 1153 else { 1154 // this is not a type 0 or 1 config space header so 1155 // we don't know how to do it 1156 return(DEVICE_TYPE_NOT_SUPPORTED); 1157 } 1158 1159 // Get the next function 1160 func = cpqhp_slot_find(func->bus, func->device, index++); 1161 } 1162 1163 1164 return 0; 1165 } 1166 1167 1168 /* 1169 * cpqhp_find_available_resources 1170 * 1171 * Finds available memory, IO, and IRQ resources for programming 1172 * devices which may be added to the system 1173 * this function is for hot plug ADD! 1174 * 1175 * returns 0 if success 1176 */ 1177 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start) 1178 { 1179 u8 temp; 1180 u8 populated_slot; 1181 u8 bridged_slot; 1182 void __iomem *one_slot; 1183 void __iomem *rom_resource_table; 1184 struct pci_func *func = NULL; 1185 int i = 10, index; 1186 u32 temp_dword, rc; 1187 struct pci_resource *mem_node; 1188 struct pci_resource *p_mem_node; 1189 struct pci_resource *io_node; 1190 struct pci_resource *bus_node; 1191 1192 rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff); 1193 dbg("rom_resource_table = %p\n", rom_resource_table); 1194 1195 if (rom_resource_table == NULL) { 1196 return -ENODEV; 1197 } 1198 // Sum all resources and setup resource maps 1199 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ); 1200 dbg("unused_IRQ = %x\n", unused_IRQ); 1201 1202 temp = 0; 1203 while (unused_IRQ) { 1204 if (unused_IRQ & 1) { 1205 cpqhp_disk_irq = temp; 1206 break; 1207 } 1208 unused_IRQ = unused_IRQ >> 1; 1209 temp++; 1210 } 1211 1212 dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq); 1213 unused_IRQ = unused_IRQ >> 1; 1214 temp++; 1215 1216 while (unused_IRQ) { 1217 if (unused_IRQ & 1) { 1218 cpqhp_nic_irq = temp; 1219 break; 1220 } 1221 unused_IRQ = unused_IRQ >> 1; 1222 temp++; 1223 } 1224 1225 dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq); 1226 unused_IRQ = readl(rom_resource_table + PCIIRQ); 1227 1228 temp = 0; 1229 1230 if (!cpqhp_nic_irq) { 1231 cpqhp_nic_irq = ctrl->cfgspc_irq; 1232 } 1233 1234 if (!cpqhp_disk_irq) { 1235 cpqhp_disk_irq = ctrl->cfgspc_irq; 1236 } 1237 1238 dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq); 1239 1240 rc = compaq_nvram_load(rom_start, ctrl); 1241 if (rc) 1242 return rc; 1243 1244 one_slot = rom_resource_table + sizeof (struct hrt); 1245 1246 i = readb(rom_resource_table + NUMBER_OF_ENTRIES); 1247 dbg("number_of_entries = %d\n", i); 1248 1249 if (!readb(one_slot + SECONDARY_BUS)) 1250 return 1; 1251 1252 dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n"); 1253 1254 while (i && readb(one_slot + SECONDARY_BUS)) { 1255 u8 dev_func = readb(one_slot + DEV_FUNC); 1256 u8 primary_bus = readb(one_slot + PRIMARY_BUS); 1257 u8 secondary_bus = readb(one_slot + SECONDARY_BUS); 1258 u8 max_bus = readb(one_slot + MAX_BUS); 1259 u16 io_base = readw(one_slot + IO_BASE); 1260 u16 io_length = readw(one_slot + IO_LENGTH); 1261 u16 mem_base = readw(one_slot + MEM_BASE); 1262 u16 mem_length = readw(one_slot + MEM_LENGTH); 1263 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE); 1264 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH); 1265 1266 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n", 1267 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length, 1268 primary_bus, secondary_bus, max_bus); 1269 1270 // If this entry isn't for our controller's bus, ignore it 1271 if (primary_bus != ctrl->bus) { 1272 i--; 1273 one_slot += sizeof (struct slot_rt); 1274 continue; 1275 } 1276 // find out if this entry is for an occupied slot 1277 ctrl->pci_bus->number = primary_bus; 1278 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword); 1279 dbg("temp_D_word = %x\n", temp_dword); 1280 1281 if (temp_dword != 0xFFFFFFFF) { 1282 index = 0; 1283 func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0); 1284 1285 while (func && (func->function != (dev_func & 0x07))) { 1286 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index); 1287 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++); 1288 } 1289 1290 // If we can't find a match, skip this table entry 1291 if (!func) { 1292 i--; 1293 one_slot += sizeof (struct slot_rt); 1294 continue; 1295 } 1296 // this may not work and shouldn't be used 1297 if (secondary_bus != primary_bus) 1298 bridged_slot = 1; 1299 else 1300 bridged_slot = 0; 1301 1302 populated_slot = 1; 1303 } else { 1304 populated_slot = 0; 1305 bridged_slot = 0; 1306 } 1307 1308 1309 // If we've got a valid IO base, use it 1310 1311 temp_dword = io_base + io_length; 1312 1313 if ((io_base) && (temp_dword < 0x10000)) { 1314 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL); 1315 if (!io_node) 1316 return -ENOMEM; 1317 1318 io_node->base = io_base; 1319 io_node->length = io_length; 1320 1321 dbg("found io_node(base, length) = %x, %x\n", 1322 io_node->base, io_node->length); 1323 dbg("populated slot =%d \n", populated_slot); 1324 if (!populated_slot) { 1325 io_node->next = ctrl->io_head; 1326 ctrl->io_head = io_node; 1327 } else { 1328 io_node->next = func->io_head; 1329 func->io_head = io_node; 1330 } 1331 } 1332 1333 // If we've got a valid memory base, use it 1334 temp_dword = mem_base + mem_length; 1335 if ((mem_base) && (temp_dword < 0x10000)) { 1336 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL); 1337 if (!mem_node) 1338 return -ENOMEM; 1339 1340 mem_node->base = mem_base << 16; 1341 1342 mem_node->length = mem_length << 16; 1343 1344 dbg("found mem_node(base, length) = %x, %x\n", 1345 mem_node->base, mem_node->length); 1346 dbg("populated slot =%d \n", populated_slot); 1347 if (!populated_slot) { 1348 mem_node->next = ctrl->mem_head; 1349 ctrl->mem_head = mem_node; 1350 } else { 1351 mem_node->next = func->mem_head; 1352 func->mem_head = mem_node; 1353 } 1354 } 1355 1356 // If we've got a valid prefetchable memory base, and 1357 // the base + length isn't greater than 0xFFFF 1358 temp_dword = pre_mem_base + pre_mem_length; 1359 if ((pre_mem_base) && (temp_dword < 0x10000)) { 1360 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL); 1361 if (!p_mem_node) 1362 return -ENOMEM; 1363 1364 p_mem_node->base = pre_mem_base << 16; 1365 1366 p_mem_node->length = pre_mem_length << 16; 1367 dbg("found p_mem_node(base, length) = %x, %x\n", 1368 p_mem_node->base, p_mem_node->length); 1369 dbg("populated slot =%d \n", populated_slot); 1370 1371 if (!populated_slot) { 1372 p_mem_node->next = ctrl->p_mem_head; 1373 ctrl->p_mem_head = p_mem_node; 1374 } else { 1375 p_mem_node->next = func->p_mem_head; 1376 func->p_mem_head = p_mem_node; 1377 } 1378 } 1379 1380 // If we've got a valid bus number, use it 1381 // The second condition is to ignore bus numbers on 1382 // populated slots that don't have PCI-PCI bridges 1383 if (secondary_bus && (secondary_bus != primary_bus)) { 1384 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL); 1385 if (!bus_node) 1386 return -ENOMEM; 1387 1388 bus_node->base = secondary_bus; 1389 bus_node->length = max_bus - secondary_bus + 1; 1390 dbg("found bus_node(base, length) = %x, %x\n", 1391 bus_node->base, bus_node->length); 1392 dbg("populated slot =%d \n", populated_slot); 1393 if (!populated_slot) { 1394 bus_node->next = ctrl->bus_head; 1395 ctrl->bus_head = bus_node; 1396 } else { 1397 bus_node->next = func->bus_head; 1398 func->bus_head = bus_node; 1399 } 1400 } 1401 1402 i--; 1403 one_slot += sizeof (struct slot_rt); 1404 } 1405 1406 // If all of the following fail, we don't have any resources for 1407 // hot plug add 1408 rc = 1; 1409 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head)); 1410 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head)); 1411 rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head)); 1412 rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head)); 1413 1414 return rc; 1415 } 1416 1417 1418 /* 1419 * cpqhp_return_board_resources 1420 * 1421 * this routine returns all resources allocated to a board to 1422 * the available pool. 1423 * 1424 * returns 0 if success 1425 */ 1426 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources) 1427 { 1428 int rc = 0; 1429 struct pci_resource *node; 1430 struct pci_resource *t_node; 1431 dbg("%s\n", __FUNCTION__); 1432 1433 if (!func) 1434 return 1; 1435 1436 node = func->io_head; 1437 func->io_head = NULL; 1438 while (node) { 1439 t_node = node->next; 1440 return_resource(&(resources->io_head), node); 1441 node = t_node; 1442 } 1443 1444 node = func->mem_head; 1445 func->mem_head = NULL; 1446 while (node) { 1447 t_node = node->next; 1448 return_resource(&(resources->mem_head), node); 1449 node = t_node; 1450 } 1451 1452 node = func->p_mem_head; 1453 func->p_mem_head = NULL; 1454 while (node) { 1455 t_node = node->next; 1456 return_resource(&(resources->p_mem_head), node); 1457 node = t_node; 1458 } 1459 1460 node = func->bus_head; 1461 func->bus_head = NULL; 1462 while (node) { 1463 t_node = node->next; 1464 return_resource(&(resources->bus_head), node); 1465 node = t_node; 1466 } 1467 1468 rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head)); 1469 rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head)); 1470 rc |= cpqhp_resource_sort_and_combine(&(resources->io_head)); 1471 rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head)); 1472 1473 return rc; 1474 } 1475 1476 1477 /* 1478 * cpqhp_destroy_resource_list 1479 * 1480 * Puts node back in the resource list pointed to by head 1481 */ 1482 void cpqhp_destroy_resource_list (struct resource_lists * resources) 1483 { 1484 struct pci_resource *res, *tres; 1485 1486 res = resources->io_head; 1487 resources->io_head = NULL; 1488 1489 while (res) { 1490 tres = res; 1491 res = res->next; 1492 kfree(tres); 1493 } 1494 1495 res = resources->mem_head; 1496 resources->mem_head = NULL; 1497 1498 while (res) { 1499 tres = res; 1500 res = res->next; 1501 kfree(tres); 1502 } 1503 1504 res = resources->p_mem_head; 1505 resources->p_mem_head = NULL; 1506 1507 while (res) { 1508 tres = res; 1509 res = res->next; 1510 kfree(tres); 1511 } 1512 1513 res = resources->bus_head; 1514 resources->bus_head = NULL; 1515 1516 while (res) { 1517 tres = res; 1518 res = res->next; 1519 kfree(tres); 1520 } 1521 } 1522 1523 1524 /* 1525 * cpqhp_destroy_board_resources 1526 * 1527 * Puts node back in the resource list pointed to by head 1528 */ 1529 void cpqhp_destroy_board_resources (struct pci_func * func) 1530 { 1531 struct pci_resource *res, *tres; 1532 1533 res = func->io_head; 1534 func->io_head = NULL; 1535 1536 while (res) { 1537 tres = res; 1538 res = res->next; 1539 kfree(tres); 1540 } 1541 1542 res = func->mem_head; 1543 func->mem_head = NULL; 1544 1545 while (res) { 1546 tres = res; 1547 res = res->next; 1548 kfree(tres); 1549 } 1550 1551 res = func->p_mem_head; 1552 func->p_mem_head = NULL; 1553 1554 while (res) { 1555 tres = res; 1556 res = res->next; 1557 kfree(tres); 1558 } 1559 1560 res = func->bus_head; 1561 func->bus_head = NULL; 1562 1563 while (res) { 1564 tres = res; 1565 res = res->next; 1566 kfree(tres); 1567 } 1568 } 1569 1570