1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Compaq Hot Plug Controller Driver
4 *
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
7 * Copyright (C) 2001 IBM Corp.
8 *
9 * All rights reserved.
10 *
11 * Send feedback to <greg@kroah.com>
12 *
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/slab.h>
19 #include <linux/workqueue.h>
20 #include <linux/proc_fs.h>
21 #include <linux/pci.h>
22 #include <linux/pci_hotplug.h>
23 #include "../pci.h"
24 #include "cpqphp.h"
25 #include "cpqphp_nvram.h"
26
27
28 u8 cpqhp_nic_irq;
29 u8 cpqhp_disk_irq;
30
31 static u16 unused_IRQ;
32
33 /*
34 * detect_HRT_floating_pointer
35 *
36 * find the Hot Plug Resource Table in the specified region of memory.
37 *
38 */
detect_HRT_floating_pointer(void __iomem * begin,void __iomem * end)39 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
40 {
41 void __iomem *fp;
42 void __iomem *endp;
43 u8 temp1, temp2, temp3, temp4;
44 int status = 0;
45
46 endp = (end - sizeof(struct hrt) + 1);
47
48 for (fp = begin; fp <= endp; fp += 16) {
49 temp1 = readb(fp + SIG0);
50 temp2 = readb(fp + SIG1);
51 temp3 = readb(fp + SIG2);
52 temp4 = readb(fp + SIG3);
53 if (temp1 == '$' &&
54 temp2 == 'H' &&
55 temp3 == 'R' &&
56 temp4 == 'T') {
57 status = 1;
58 break;
59 }
60 }
61
62 if (!status)
63 fp = NULL;
64
65 dbg("Discovered Hotplug Resource Table at %p\n", fp);
66 return fp;
67 }
68
69
cpqhp_configure_device(struct controller * ctrl,struct pci_func * func)70 int cpqhp_configure_device(struct controller *ctrl, struct pci_func *func)
71 {
72 struct pci_bus *child;
73 int num;
74
75 pci_lock_rescan_remove();
76
77 if (func->pci_dev == NULL)
78 func->pci_dev = pci_get_domain_bus_and_slot(0, func->bus,
79 PCI_DEVFN(func->device,
80 func->function));
81
82 /* No pci device, we need to create it then */
83 if (func->pci_dev == NULL) {
84 dbg("INFO: pci_dev still null\n");
85
86 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
87 if (num)
88 pci_bus_add_devices(ctrl->pci_dev->bus);
89
90 func->pci_dev = pci_get_domain_bus_and_slot(0, func->bus,
91 PCI_DEVFN(func->device,
92 func->function));
93 if (func->pci_dev == NULL) {
94 dbg("ERROR: pci_dev still null\n");
95 goto out;
96 }
97 }
98
99 if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
100 pci_hp_add_bridge(func->pci_dev);
101 child = func->pci_dev->subordinate;
102 if (child)
103 pci_bus_add_devices(child);
104 }
105
106 pci_dev_put(func->pci_dev);
107
108 out:
109 pci_unlock_rescan_remove();
110 return 0;
111 }
112
113
cpqhp_unconfigure_device(struct pci_func * func)114 int cpqhp_unconfigure_device(struct pci_func *func)
115 {
116 int j;
117
118 dbg("%s: bus/dev/func = %x/%x/%x\n", __func__, func->bus, func->device, func->function);
119
120 pci_lock_rescan_remove();
121 for (j = 0; j < 8 ; j++) {
122 struct pci_dev *temp = pci_get_domain_bus_and_slot(0,
123 func->bus,
124 PCI_DEVFN(func->device,
125 j));
126 if (temp) {
127 pci_dev_put(temp);
128 pci_stop_and_remove_bus_device(temp);
129 }
130 }
131 pci_unlock_rescan_remove();
132 return 0;
133 }
134
PCI_RefinedAccessConfig(struct pci_bus * bus,unsigned int devfn,u8 offset,u32 * value)135 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
136 {
137 u32 vendID = 0;
138 int ret;
139
140 ret = pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, &vendID);
141 if (ret != PCIBIOS_SUCCESSFUL)
142 return PCIBIOS_DEVICE_NOT_FOUND;
143 if (PCI_POSSIBLE_ERROR(vendID))
144 return PCIBIOS_DEVICE_NOT_FOUND;
145 return pci_bus_read_config_dword(bus, devfn, offset, value);
146 }
147
148
149 /*
150 * cpqhp_set_irq
151 *
152 * @bus_num: bus number of PCI device
153 * @dev_num: device number of PCI device
154 * @slot: pointer to u8 where slot number will be returned
155 */
cpqhp_set_irq(u8 bus_num,u8 dev_num,u8 int_pin,u8 irq_num)156 int cpqhp_set_irq(u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
157 {
158 int rc = 0;
159
160 if (cpqhp_legacy_mode) {
161 struct pci_dev *fakedev;
162 struct pci_bus *fakebus;
163 u16 temp_word;
164
165 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
166 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
167 if (!fakedev || !fakebus) {
168 kfree(fakedev);
169 kfree(fakebus);
170 return -ENOMEM;
171 }
172
173 fakedev->devfn = dev_num << 3;
174 fakedev->bus = fakebus;
175 fakebus->number = bus_num;
176 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
177 __func__, dev_num, bus_num, int_pin, irq_num);
178 rc = pcibios_set_irq_routing(fakedev, int_pin - 1, irq_num);
179 kfree(fakedev);
180 kfree(fakebus);
181 dbg("%s: rc %d\n", __func__, rc);
182 if (!rc)
183 return !rc;
184
185 /* set the Edge Level Control Register (ELCR) */
186 temp_word = inb(0x4d0);
187 temp_word |= inb(0x4d1) << 8;
188
189 temp_word |= 0x01 << irq_num;
190
191 /* This should only be for x86 as it sets the Edge Level
192 * Control Register
193 */
194 outb((u8)(temp_word & 0xFF), 0x4d0);
195 outb((u8)((temp_word & 0xFF00) >> 8), 0x4d1);
196 rc = 0;
197 }
198
199 return rc;
200 }
201
202
PCI_ScanBusForNonBridge(struct controller * ctrl,u8 bus_num,u8 * dev_num)203 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 *dev_num)
204 {
205 u16 tdevice;
206 u32 work;
207 int ret;
208 u8 tbus;
209
210 ctrl->pci_bus->number = bus_num;
211
212 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
213 /* Scan for access first */
214 ret = PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work);
215 if (ret)
216 continue;
217 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
218 /* Yep we got one. Not a bridge ? */
219 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
220 *dev_num = tdevice;
221 dbg("found it !\n");
222 return 0;
223 }
224 }
225 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
226 /* Scan for access first */
227 ret = PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work);
228 if (ret)
229 continue;
230 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
231 /* Yep we got one. bridge ? */
232 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
233 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
234 /* XXX: no recursion, wtf? */
235 dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
236 return 0;
237 }
238 }
239
240 return -1;
241 }
242
243
PCI_GetBusDevHelper(struct controller * ctrl,u8 * bus_num,u8 * dev_num,u8 slot,u8 nobridge)244 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
245 {
246 int loop, len;
247 u32 work;
248 u8 tbus, tdevice, tslot;
249
250 len = cpqhp_routing_table_length();
251 for (loop = 0; loop < len; ++loop) {
252 tbus = cpqhp_routing_table->slots[loop].bus;
253 tdevice = cpqhp_routing_table->slots[loop].devfn;
254 tslot = cpqhp_routing_table->slots[loop].slot;
255
256 if (tslot == slot) {
257 *bus_num = tbus;
258 *dev_num = tdevice;
259 ctrl->pci_bus->number = tbus;
260 pci_bus_read_config_dword(ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
261 if (!nobridge || PCI_POSSIBLE_ERROR(work))
262 return 0;
263
264 dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
265 pci_bus_read_config_dword(ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
266 dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
267
268 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
269 pci_bus_read_config_byte(ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
270 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
271 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
272 *bus_num = tbus;
273 return 0;
274 }
275 } else
276 return 0;
277 }
278 }
279 return -1;
280 }
281
282
cpqhp_get_bus_dev(struct controller * ctrl,u8 * bus_num,u8 * dev_num,u8 slot)283 int cpqhp_get_bus_dev(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot)
284 {
285 /* plain (bridges allowed) */
286 return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);
287 }
288
289
290 /* More PCI configuration routines; this time centered around hotplug
291 * controller
292 */
293
294
295 /*
296 * cpqhp_save_config
297 *
298 * Reads configuration for all slots in a PCI bus and saves info.
299 *
300 * Note: For non-hot plug buses, the slot # saved is the device #
301 *
302 * returns 0 if success
303 */
cpqhp_save_config(struct controller * ctrl,int busnumber,int is_hot_plug)304 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
305 {
306 long rc;
307 u8 class_code;
308 u8 header_type;
309 u32 ID;
310 u8 secondary_bus;
311 struct pci_func *new_slot;
312 int sub_bus;
313 int FirstSupported;
314 int LastSupported;
315 int max_functions;
316 int function;
317 u8 DevError;
318 int device = 0;
319 int cloop = 0;
320 int stop_it;
321 int index;
322 u16 devfn;
323
324 /* Decide which slots are supported */
325
326 if (is_hot_plug) {
327 /*
328 * is_hot_plug is the slot mask
329 */
330 FirstSupported = is_hot_plug >> 4;
331 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
332 } else {
333 FirstSupported = 0;
334 LastSupported = 0x1F;
335 }
336
337 /* Save PCI configuration space for all devices in supported slots */
338 ctrl->pci_bus->number = busnumber;
339 for (device = FirstSupported; device <= LastSupported; device++) {
340 ID = 0xFFFFFFFF;
341 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
342
343 if (ID == 0xFFFFFFFF) {
344 if (is_hot_plug) {
345 /* Setup slot structure with entry for empty
346 * slot
347 */
348 new_slot = cpqhp_slot_create(busnumber);
349 if (new_slot == NULL)
350 return 1;
351
352 new_slot->bus = (u8) busnumber;
353 new_slot->device = (u8) device;
354 new_slot->function = 0;
355 new_slot->is_a_board = 0;
356 new_slot->presence_save = 0;
357 new_slot->switch_save = 0;
358 }
359 continue;
360 }
361
362 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
363 if (rc)
364 return rc;
365
366 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
367 if (rc)
368 return rc;
369
370 /* If multi-function device, set max_functions to 8 */
371 if (header_type & 0x80)
372 max_functions = 8;
373 else
374 max_functions = 1;
375
376 function = 0;
377
378 do {
379 DevError = 0;
380 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
381 /* Recurse the subordinate bus
382 * get the subordinate bus number
383 */
384 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
385 if (rc) {
386 return rc;
387 } else {
388 sub_bus = (int) secondary_bus;
389
390 /* Save secondary bus cfg spc
391 * with this recursive call.
392 */
393 rc = cpqhp_save_config(ctrl, sub_bus, 0);
394 if (rc)
395 return rc;
396 ctrl->pci_bus->number = busnumber;
397 }
398 }
399
400 index = 0;
401 new_slot = cpqhp_slot_find(busnumber, device, index++);
402 while (new_slot &&
403 (new_slot->function != (u8) function))
404 new_slot = cpqhp_slot_find(busnumber, device, index++);
405
406 if (!new_slot) {
407 /* Setup slot structure. */
408 new_slot = cpqhp_slot_create(busnumber);
409 if (new_slot == NULL)
410 return 1;
411 }
412
413 new_slot->bus = (u8) busnumber;
414 new_slot->device = (u8) device;
415 new_slot->function = (u8) function;
416 new_slot->is_a_board = 1;
417 new_slot->switch_save = 0x10;
418 /* In case of unsupported board */
419 new_slot->status = DevError;
420 devfn = (new_slot->device << 3) | new_slot->function;
421 new_slot->pci_dev = pci_get_domain_bus_and_slot(0,
422 new_slot->bus, devfn);
423
424 for (cloop = 0; cloop < 0x20; cloop++) {
425 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) &(new_slot->config_space[cloop]));
426 if (rc)
427 return rc;
428 }
429
430 pci_dev_put(new_slot->pci_dev);
431
432 function++;
433
434 stop_it = 0;
435
436 /* this loop skips to the next present function
437 * reading in Class Code and Header type.
438 */
439 while ((function < max_functions) && (!stop_it)) {
440 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
441 if (ID == 0xFFFFFFFF) {
442 function++;
443 continue;
444 }
445 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
446 if (rc)
447 return rc;
448
449 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
450 if (rc)
451 return rc;
452
453 stop_it++;
454 }
455
456 } while (function < max_functions);
457 } /* End of FOR loop */
458
459 return 0;
460 }
461
462
463 /*
464 * cpqhp_save_slot_config
465 *
466 * Saves configuration info for all PCI devices in a given slot
467 * including subordinate buses.
468 *
469 * returns 0 if success
470 */
cpqhp_save_slot_config(struct controller * ctrl,struct pci_func * new_slot)471 int cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot)
472 {
473 long rc;
474 u8 class_code;
475 u8 header_type;
476 u32 ID;
477 u8 secondary_bus;
478 int sub_bus;
479 int max_functions;
480 int function = 0;
481 int cloop;
482 int stop_it;
483
484 ID = 0xFFFFFFFF;
485
486 ctrl->pci_bus->number = new_slot->bus;
487 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
488
489 if (ID == 0xFFFFFFFF)
490 return 2;
491
492 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
493 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
494
495 if (header_type & 0x80) /* Multi-function device */
496 max_functions = 8;
497 else
498 max_functions = 1;
499
500 while (function < max_functions) {
501 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
502 /* Recurse the subordinate bus */
503 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
504
505 sub_bus = (int) secondary_bus;
506
507 /* Save the config headers for the secondary
508 * bus.
509 */
510 rc = cpqhp_save_config(ctrl, sub_bus, 0);
511 if (rc)
512 return(rc);
513 ctrl->pci_bus->number = new_slot->bus;
514
515 }
516
517 new_slot->status = 0;
518
519 for (cloop = 0; cloop < 0x20; cloop++)
520 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) &(new_slot->config_space[cloop]));
521
522 function++;
523
524 stop_it = 0;
525
526 /* this loop skips to the next present function
527 * reading in the Class Code and the Header type.
528 */
529 while ((function < max_functions) && (!stop_it)) {
530 pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
531
532 if (ID == 0xFFFFFFFF)
533 function++;
534 else {
535 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
536 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
537 stop_it++;
538 }
539 }
540
541 }
542
543 return 0;
544 }
545
546
547 /*
548 * cpqhp_save_base_addr_length
549 *
550 * Saves the length of all base address registers for the
551 * specified slot. this is for hot plug REPLACE
552 *
553 * returns 0 if success
554 */
cpqhp_save_base_addr_length(struct controller * ctrl,struct pci_func * func)555 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func)
556 {
557 u8 cloop;
558 u8 header_type;
559 u8 secondary_bus;
560 u8 type;
561 int sub_bus;
562 u32 temp_register;
563 u32 base;
564 u32 rc;
565 struct pci_func *next;
566 int index = 0;
567 struct pci_bus *pci_bus = ctrl->pci_bus;
568 unsigned int devfn;
569
570 func = cpqhp_slot_find(func->bus, func->device, index++);
571
572 while (func != NULL) {
573 pci_bus->number = func->bus;
574 devfn = PCI_DEVFN(func->device, func->function);
575
576 /* Check for Bridge */
577 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
578
579 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
580 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
581
582 sub_bus = (int) secondary_bus;
583
584 next = cpqhp_slot_list[sub_bus];
585
586 while (next != NULL) {
587 rc = cpqhp_save_base_addr_length(ctrl, next);
588 if (rc)
589 return rc;
590
591 next = next->next;
592 }
593 pci_bus->number = func->bus;
594
595 /* FIXME: this loop is duplicated in the non-bridge
596 * case. The two could be rolled together Figure out
597 * IO and memory base lengths
598 */
599 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
600 temp_register = 0xFFFFFFFF;
601 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
602 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
603 /* If this register is implemented */
604 if (base) {
605 if (base & 0x01L) {
606 /* IO base
607 * set base = amount of IO space
608 * requested
609 */
610 base = base & 0xFFFFFFFE;
611 base = (~base) + 1;
612
613 type = 1;
614 } else {
615 /* memory base */
616 base = base & 0xFFFFFFF0;
617 base = (~base) + 1;
618
619 type = 0;
620 }
621 } else {
622 base = 0x0L;
623 type = 0;
624 }
625
626 /* Save information in slot structure */
627 func->base_length[(cloop - 0x10) >> 2] =
628 base;
629 func->base_type[(cloop - 0x10) >> 2] = type;
630
631 } /* End of base register loop */
632
633 } else if ((header_type & 0x7F) == 0x00) {
634 /* Figure out IO and memory base lengths */
635 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
636 temp_register = 0xFFFFFFFF;
637 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
638 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
639
640 /* If this register is implemented */
641 if (base) {
642 if (base & 0x01L) {
643 /* IO base
644 * base = amount of IO space
645 * requested
646 */
647 base = base & 0xFFFFFFFE;
648 base = (~base) + 1;
649
650 type = 1;
651 } else {
652 /* memory base
653 * base = amount of memory
654 * space requested
655 */
656 base = base & 0xFFFFFFF0;
657 base = (~base) + 1;
658
659 type = 0;
660 }
661 } else {
662 base = 0x0L;
663 type = 0;
664 }
665
666 /* Save information in slot structure */
667 func->base_length[(cloop - 0x10) >> 2] = base;
668 func->base_type[(cloop - 0x10) >> 2] = type;
669
670 } /* End of base register loop */
671
672 } else { /* Some other unknown header type */
673 }
674
675 /* find the next device in this slot */
676 func = cpqhp_slot_find(func->bus, func->device, index++);
677 }
678
679 return(0);
680 }
681
682
683 /*
684 * cpqhp_save_used_resources
685 *
686 * Stores used resource information for existing boards. this is
687 * for boards that were in the system when this driver was loaded.
688 * this function is for hot plug ADD
689 *
690 * returns 0 if success
691 */
cpqhp_save_used_resources(struct controller * ctrl,struct pci_func * func)692 int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func)
693 {
694 u8 cloop;
695 u8 header_type;
696 u8 secondary_bus;
697 u8 temp_byte;
698 u8 b_base;
699 u8 b_length;
700 u16 command;
701 u16 save_command;
702 u16 w_base;
703 u16 w_length;
704 u32 temp_register;
705 u32 save_base;
706 u32 base;
707 int index = 0;
708 struct pci_resource *mem_node;
709 struct pci_resource *p_mem_node;
710 struct pci_resource *io_node;
711 struct pci_resource *bus_node;
712 struct pci_bus *pci_bus = ctrl->pci_bus;
713 unsigned int devfn;
714
715 func = cpqhp_slot_find(func->bus, func->device, index++);
716
717 while ((func != NULL) && func->is_a_board) {
718 pci_bus->number = func->bus;
719 devfn = PCI_DEVFN(func->device, func->function);
720
721 /* Save the command register */
722 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
723
724 /* disable card */
725 command = 0x00;
726 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
727
728 /* Check for Bridge */
729 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
730
731 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
732 /* Clear Bridge Control Register */
733 command = 0x00;
734 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
735 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
736 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
737
738 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
739 if (!bus_node)
740 return -ENOMEM;
741
742 bus_node->base = secondary_bus;
743 bus_node->length = temp_byte - secondary_bus + 1;
744
745 bus_node->next = func->bus_head;
746 func->bus_head = bus_node;
747
748 /* Save IO base and Limit registers */
749 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
750 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
751
752 if ((b_base <= b_length) && (save_command & 0x01)) {
753 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
754 if (!io_node)
755 return -ENOMEM;
756
757 io_node->base = (b_base & 0xF0) << 8;
758 io_node->length = (b_length - b_base + 0x10) << 8;
759
760 io_node->next = func->io_head;
761 func->io_head = io_node;
762 }
763
764 /* Save memory base and Limit registers */
765 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
766 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
767
768 if ((w_base <= w_length) && (save_command & 0x02)) {
769 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
770 if (!mem_node)
771 return -ENOMEM;
772
773 mem_node->base = w_base << 16;
774 mem_node->length = (w_length - w_base + 0x10) << 16;
775
776 mem_node->next = func->mem_head;
777 func->mem_head = mem_node;
778 }
779
780 /* Save prefetchable memory base and Limit registers */
781 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
782 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
783
784 if ((w_base <= w_length) && (save_command & 0x02)) {
785 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
786 if (!p_mem_node)
787 return -ENOMEM;
788
789 p_mem_node->base = w_base << 16;
790 p_mem_node->length = (w_length - w_base + 0x10) << 16;
791
792 p_mem_node->next = func->p_mem_head;
793 func->p_mem_head = p_mem_node;
794 }
795 /* Figure out IO and memory base lengths */
796 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
797 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
798
799 temp_register = 0xFFFFFFFF;
800 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
801 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
802
803 temp_register = base;
804
805 /* If this register is implemented */
806 if (base) {
807 if (((base & 0x03L) == 0x01)
808 && (save_command & 0x01)) {
809 /* IO base
810 * set temp_register = amount
811 * of IO space requested
812 */
813 temp_register = base & 0xFFFFFFFE;
814 temp_register = (~temp_register) + 1;
815
816 io_node = kmalloc(sizeof(*io_node),
817 GFP_KERNEL);
818 if (!io_node)
819 return -ENOMEM;
820
821 io_node->base =
822 save_base & (~0x03L);
823 io_node->length = temp_register;
824
825 io_node->next = func->io_head;
826 func->io_head = io_node;
827 } else
828 if (((base & 0x0BL) == 0x08)
829 && (save_command & 0x02)) {
830 /* prefetchable memory base */
831 temp_register = base & 0xFFFFFFF0;
832 temp_register = (~temp_register) + 1;
833
834 p_mem_node = kmalloc(sizeof(*p_mem_node),
835 GFP_KERNEL);
836 if (!p_mem_node)
837 return -ENOMEM;
838
839 p_mem_node->base = save_base & (~0x0FL);
840 p_mem_node->length = temp_register;
841
842 p_mem_node->next = func->p_mem_head;
843 func->p_mem_head = p_mem_node;
844 } else
845 if (((base & 0x0BL) == 0x00)
846 && (save_command & 0x02)) {
847 /* prefetchable memory base */
848 temp_register = base & 0xFFFFFFF0;
849 temp_register = (~temp_register) + 1;
850
851 mem_node = kmalloc(sizeof(*mem_node),
852 GFP_KERNEL);
853 if (!mem_node)
854 return -ENOMEM;
855
856 mem_node->base = save_base & (~0x0FL);
857 mem_node->length = temp_register;
858
859 mem_node->next = func->mem_head;
860 func->mem_head = mem_node;
861 } else
862 return(1);
863 }
864 } /* End of base register loop */
865 /* Standard header */
866 } else if ((header_type & 0x7F) == 0x00) {
867 /* Figure out IO and memory base lengths */
868 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
869 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
870
871 temp_register = 0xFFFFFFFF;
872 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
873 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
874
875 temp_register = base;
876
877 /* If this register is implemented */
878 if (base) {
879 if (((base & 0x03L) == 0x01)
880 && (save_command & 0x01)) {
881 /* IO base
882 * set temp_register = amount
883 * of IO space requested
884 */
885 temp_register = base & 0xFFFFFFFE;
886 temp_register = (~temp_register) + 1;
887
888 io_node = kmalloc(sizeof(*io_node),
889 GFP_KERNEL);
890 if (!io_node)
891 return -ENOMEM;
892
893 io_node->base = save_base & (~0x01L);
894 io_node->length = temp_register;
895
896 io_node->next = func->io_head;
897 func->io_head = io_node;
898 } else
899 if (((base & 0x0BL) == 0x08)
900 && (save_command & 0x02)) {
901 /* prefetchable memory base */
902 temp_register = base & 0xFFFFFFF0;
903 temp_register = (~temp_register) + 1;
904
905 p_mem_node = kmalloc(sizeof(*p_mem_node),
906 GFP_KERNEL);
907 if (!p_mem_node)
908 return -ENOMEM;
909
910 p_mem_node->base = save_base & (~0x0FL);
911 p_mem_node->length = temp_register;
912
913 p_mem_node->next = func->p_mem_head;
914 func->p_mem_head = p_mem_node;
915 } else
916 if (((base & 0x0BL) == 0x00)
917 && (save_command & 0x02)) {
918 /* prefetchable memory base */
919 temp_register = base & 0xFFFFFFF0;
920 temp_register = (~temp_register) + 1;
921
922 mem_node = kmalloc(sizeof(*mem_node),
923 GFP_KERNEL);
924 if (!mem_node)
925 return -ENOMEM;
926
927 mem_node->base = save_base & (~0x0FL);
928 mem_node->length = temp_register;
929
930 mem_node->next = func->mem_head;
931 func->mem_head = mem_node;
932 } else
933 return(1);
934 }
935 } /* End of base register loop */
936 }
937
938 /* find the next device in this slot */
939 func = cpqhp_slot_find(func->bus, func->device, index++);
940 }
941
942 return 0;
943 }
944
945
946 /*
947 * cpqhp_configure_board
948 *
949 * Copies saved configuration information to one slot.
950 * this is called recursively for bridge devices.
951 * this is for hot plug REPLACE!
952 *
953 * returns 0 if success
954 */
cpqhp_configure_board(struct controller * ctrl,struct pci_func * func)955 int cpqhp_configure_board(struct controller *ctrl, struct pci_func *func)
956 {
957 int cloop;
958 u8 header_type;
959 u8 secondary_bus;
960 int sub_bus;
961 struct pci_func *next;
962 u32 temp;
963 u32 rc;
964 int index = 0;
965 struct pci_bus *pci_bus = ctrl->pci_bus;
966 unsigned int devfn;
967
968 func = cpqhp_slot_find(func->bus, func->device, index++);
969
970 while (func != NULL) {
971 pci_bus->number = func->bus;
972 devfn = PCI_DEVFN(func->device, func->function);
973
974 /* Start at the top of config space so that the control
975 * registers are programmed last
976 */
977 for (cloop = 0x3C; cloop > 0; cloop -= 4)
978 pci_bus_write_config_dword(pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
979
980 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
981
982 /* If this is a bridge device, restore subordinate devices */
983 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
984 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
985
986 sub_bus = (int) secondary_bus;
987
988 next = cpqhp_slot_list[sub_bus];
989
990 while (next != NULL) {
991 rc = cpqhp_configure_board(ctrl, next);
992 if (rc)
993 return rc;
994
995 next = next->next;
996 }
997 } else {
998
999 /* Check all the base Address Registers to make sure
1000 * they are the same. If not, the board is different.
1001 */
1002
1003 for (cloop = 16; cloop < 40; cloop += 4) {
1004 pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp);
1005
1006 if (temp != func->config_space[cloop >> 2]) {
1007 dbg("Config space compare failure!!! offset = %x\n", cloop);
1008 dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
1009 dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1010 return 1;
1011 }
1012 }
1013 }
1014
1015 func->configured = 1;
1016
1017 func = cpqhp_slot_find(func->bus, func->device, index++);
1018 }
1019
1020 return 0;
1021 }
1022
1023
1024 /*
1025 * cpqhp_valid_replace
1026 *
1027 * this function checks to see if a board is the same as the
1028 * one it is replacing. this check will detect if the device's
1029 * vendor or device id's are the same
1030 *
1031 * returns 0 if the board is the same nonzero otherwise
1032 */
cpqhp_valid_replace(struct controller * ctrl,struct pci_func * func)1033 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func)
1034 {
1035 u8 cloop;
1036 u8 header_type;
1037 u8 secondary_bus;
1038 u8 type;
1039 u32 temp_register = 0;
1040 u32 base;
1041 u32 rc;
1042 struct pci_func *next;
1043 int index = 0;
1044 struct pci_bus *pci_bus = ctrl->pci_bus;
1045 unsigned int devfn;
1046
1047 if (!func->is_a_board)
1048 return(ADD_NOT_SUPPORTED);
1049
1050 func = cpqhp_slot_find(func->bus, func->device, index++);
1051
1052 while (func != NULL) {
1053 pci_bus->number = func->bus;
1054 devfn = PCI_DEVFN(func->device, func->function);
1055
1056 pci_bus_read_config_dword(pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1057
1058 /* No adapter present */
1059 if (temp_register == 0xFFFFFFFF)
1060 return(NO_ADAPTER_PRESENT);
1061
1062 if (temp_register != func->config_space[0])
1063 return(ADAPTER_NOT_SAME);
1064
1065 /* Check for same revision number and class code */
1066 pci_bus_read_config_dword(pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1067
1068 /* Adapter not the same */
1069 if (temp_register != func->config_space[0x08 >> 2])
1070 return(ADAPTER_NOT_SAME);
1071
1072 /* Check for Bridge */
1073 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1074
1075 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1076 /* In order to continue checking, we must program the
1077 * bus registers in the bridge to respond to accesses
1078 * for its subordinate bus(es)
1079 */
1080
1081 temp_register = func->config_space[0x18 >> 2];
1082 pci_bus_write_config_dword(pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1083
1084 secondary_bus = (temp_register >> 8) & 0xFF;
1085
1086 next = cpqhp_slot_list[secondary_bus];
1087
1088 while (next != NULL) {
1089 rc = cpqhp_valid_replace(ctrl, next);
1090 if (rc)
1091 return rc;
1092
1093 next = next->next;
1094 }
1095
1096 }
1097 /* Check to see if it is a standard config header */
1098 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1099 /* Check subsystem vendor and ID */
1100 pci_bus_read_config_dword(pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1101
1102 if (temp_register != func->config_space[0x2C >> 2]) {
1103 /* If it's a SMART-2 and the register isn't
1104 * filled in, ignore the difference because
1105 * they just have an old rev of the firmware
1106 */
1107 if (!((func->config_space[0] == 0xAE100E11)
1108 && (temp_register == 0x00L)))
1109 return(ADAPTER_NOT_SAME);
1110 }
1111 /* Figure out IO and memory base lengths */
1112 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1113 temp_register = 0xFFFFFFFF;
1114 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
1115 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
1116
1117 /* If this register is implemented */
1118 if (base) {
1119 if (base & 0x01L) {
1120 /* IO base
1121 * set base = amount of IO
1122 * space requested
1123 */
1124 base = base & 0xFFFFFFFE;
1125 base = (~base) + 1;
1126
1127 type = 1;
1128 } else {
1129 /* memory base */
1130 base = base & 0xFFFFFFF0;
1131 base = (~base) + 1;
1132
1133 type = 0;
1134 }
1135 } else {
1136 base = 0x0L;
1137 type = 0;
1138 }
1139
1140 /* Check information in slot structure */
1141 if (func->base_length[(cloop - 0x10) >> 2] != base)
1142 return(ADAPTER_NOT_SAME);
1143
1144 if (func->base_type[(cloop - 0x10) >> 2] != type)
1145 return(ADAPTER_NOT_SAME);
1146
1147 } /* End of base register loop */
1148
1149 } /* End of (type 0 config space) else */
1150 else {
1151 /* this is not a type 0 or 1 config space header so
1152 * we don't know how to do it
1153 */
1154 return(DEVICE_TYPE_NOT_SUPPORTED);
1155 }
1156
1157 /* Get the next function */
1158 func = cpqhp_slot_find(func->bus, func->device, index++);
1159 }
1160
1161
1162 return 0;
1163 }
1164
1165
1166 /*
1167 * cpqhp_find_available_resources
1168 *
1169 * Finds available memory, IO, and IRQ resources for programming
1170 * devices which may be added to the system
1171 * this function is for hot plug ADD!
1172 *
1173 * returns 0 if success
1174 */
cpqhp_find_available_resources(struct controller * ctrl,void __iomem * rom_start)1175 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
1176 {
1177 u8 temp;
1178 u8 populated_slot;
1179 u8 bridged_slot;
1180 void __iomem *one_slot;
1181 void __iomem *rom_resource_table;
1182 struct pci_func *func = NULL;
1183 int i = 10, index;
1184 u32 temp_dword, rc;
1185 struct pci_resource *mem_node;
1186 struct pci_resource *p_mem_node;
1187 struct pci_resource *io_node;
1188 struct pci_resource *bus_node;
1189
1190 rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1191 dbg("rom_resource_table = %p\n", rom_resource_table);
1192
1193 if (rom_resource_table == NULL)
1194 return -ENODEV;
1195
1196 /* Sum all resources and setup resource maps */
1197 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1198 dbg("unused_IRQ = %x\n", unused_IRQ);
1199
1200 temp = 0;
1201 while (unused_IRQ) {
1202 if (unused_IRQ & 1) {
1203 cpqhp_disk_irq = temp;
1204 break;
1205 }
1206 unused_IRQ = unused_IRQ >> 1;
1207 temp++;
1208 }
1209
1210 dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1211 unused_IRQ = unused_IRQ >> 1;
1212 temp++;
1213
1214 while (unused_IRQ) {
1215 if (unused_IRQ & 1) {
1216 cpqhp_nic_irq = temp;
1217 break;
1218 }
1219 unused_IRQ = unused_IRQ >> 1;
1220 temp++;
1221 }
1222
1223 dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1224 unused_IRQ = readl(rom_resource_table + PCIIRQ);
1225
1226 temp = 0;
1227
1228 if (!cpqhp_nic_irq)
1229 cpqhp_nic_irq = ctrl->cfgspc_irq;
1230
1231 if (!cpqhp_disk_irq)
1232 cpqhp_disk_irq = ctrl->cfgspc_irq;
1233
1234 dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1235
1236 rc = compaq_nvram_load(rom_start, ctrl);
1237 if (rc)
1238 return rc;
1239
1240 one_slot = rom_resource_table + sizeof(struct hrt);
1241
1242 i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1243 dbg("number_of_entries = %d\n", i);
1244
1245 if (!readb(one_slot + SECONDARY_BUS))
1246 return 1;
1247
1248 dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1249
1250 while (i && readb(one_slot + SECONDARY_BUS)) {
1251 u8 dev_func = readb(one_slot + DEV_FUNC);
1252 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1253 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1254 u8 max_bus = readb(one_slot + MAX_BUS);
1255 u16 io_base = readw(one_slot + IO_BASE);
1256 u16 io_length = readw(one_slot + IO_LENGTH);
1257 u16 mem_base = readw(one_slot + MEM_BASE);
1258 u16 mem_length = readw(one_slot + MEM_LENGTH);
1259 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1260 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1261
1262 dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
1263 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1264 primary_bus, secondary_bus, max_bus);
1265
1266 /* If this entry isn't for our controller's bus, ignore it */
1267 if (primary_bus != ctrl->bus) {
1268 i--;
1269 one_slot += sizeof(struct slot_rt);
1270 continue;
1271 }
1272 /* find out if this entry is for an occupied slot */
1273 ctrl->pci_bus->number = primary_bus;
1274 pci_bus_read_config_dword(ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1275 dbg("temp_D_word = %x\n", temp_dword);
1276
1277 if (temp_dword != 0xFFFFFFFF) {
1278 index = 0;
1279 func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1280
1281 while (func && (func->function != (dev_func & 0x07))) {
1282 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1283 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1284 }
1285
1286 /* If we can't find a match, skip this table entry */
1287 if (!func) {
1288 i--;
1289 one_slot += sizeof(struct slot_rt);
1290 continue;
1291 }
1292 /* this may not work and shouldn't be used */
1293 if (secondary_bus != primary_bus)
1294 bridged_slot = 1;
1295 else
1296 bridged_slot = 0;
1297
1298 populated_slot = 1;
1299 } else {
1300 populated_slot = 0;
1301 bridged_slot = 0;
1302 }
1303
1304
1305 /* If we've got a valid IO base, use it */
1306
1307 temp_dword = io_base + io_length;
1308
1309 if ((io_base) && (temp_dword < 0x10000)) {
1310 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1311 if (!io_node)
1312 return -ENOMEM;
1313
1314 io_node->base = io_base;
1315 io_node->length = io_length;
1316
1317 dbg("found io_node(base, length) = %x, %x\n",
1318 io_node->base, io_node->length);
1319 dbg("populated slot =%d \n", populated_slot);
1320 if (!populated_slot) {
1321 io_node->next = ctrl->io_head;
1322 ctrl->io_head = io_node;
1323 } else {
1324 io_node->next = func->io_head;
1325 func->io_head = io_node;
1326 }
1327 }
1328
1329 /* If we've got a valid memory base, use it */
1330 temp_dword = mem_base + mem_length;
1331 if ((mem_base) && (temp_dword < 0x10000)) {
1332 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1333 if (!mem_node)
1334 return -ENOMEM;
1335
1336 mem_node->base = mem_base << 16;
1337
1338 mem_node->length = mem_length << 16;
1339
1340 dbg("found mem_node(base, length) = %x, %x\n",
1341 mem_node->base, mem_node->length);
1342 dbg("populated slot =%d \n", populated_slot);
1343 if (!populated_slot) {
1344 mem_node->next = ctrl->mem_head;
1345 ctrl->mem_head = mem_node;
1346 } else {
1347 mem_node->next = func->mem_head;
1348 func->mem_head = mem_node;
1349 }
1350 }
1351
1352 /* If we've got a valid prefetchable memory base, and
1353 * the base + length isn't greater than 0xFFFF
1354 */
1355 temp_dword = pre_mem_base + pre_mem_length;
1356 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1357 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1358 if (!p_mem_node)
1359 return -ENOMEM;
1360
1361 p_mem_node->base = pre_mem_base << 16;
1362
1363 p_mem_node->length = pre_mem_length << 16;
1364 dbg("found p_mem_node(base, length) = %x, %x\n",
1365 p_mem_node->base, p_mem_node->length);
1366 dbg("populated slot =%d \n", populated_slot);
1367
1368 if (!populated_slot) {
1369 p_mem_node->next = ctrl->p_mem_head;
1370 ctrl->p_mem_head = p_mem_node;
1371 } else {
1372 p_mem_node->next = func->p_mem_head;
1373 func->p_mem_head = p_mem_node;
1374 }
1375 }
1376
1377 /* If we've got a valid bus number, use it
1378 * The second condition is to ignore bus numbers on
1379 * populated slots that don't have PCI-PCI bridges
1380 */
1381 if (secondary_bus && (secondary_bus != primary_bus)) {
1382 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1383 if (!bus_node)
1384 return -ENOMEM;
1385
1386 bus_node->base = secondary_bus;
1387 bus_node->length = max_bus - secondary_bus + 1;
1388 dbg("found bus_node(base, length) = %x, %x\n",
1389 bus_node->base, bus_node->length);
1390 dbg("populated slot =%d \n", populated_slot);
1391 if (!populated_slot) {
1392 bus_node->next = ctrl->bus_head;
1393 ctrl->bus_head = bus_node;
1394 } else {
1395 bus_node->next = func->bus_head;
1396 func->bus_head = bus_node;
1397 }
1398 }
1399
1400 i--;
1401 one_slot += sizeof(struct slot_rt);
1402 }
1403
1404 /* If all of the following fail, we don't have any resources for
1405 * hot plug add
1406 */
1407 rc = 1;
1408 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1409 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1410 rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1411 rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1412
1413 return rc;
1414 }
1415
1416
1417 /*
1418 * cpqhp_return_board_resources
1419 *
1420 * this routine returns all resources allocated to a board to
1421 * the available pool.
1422 *
1423 * returns 0 if success
1424 */
cpqhp_return_board_resources(struct pci_func * func,struct resource_lists * resources)1425 int cpqhp_return_board_resources(struct pci_func *func, struct resource_lists *resources)
1426 {
1427 int rc = 0;
1428 struct pci_resource *node;
1429 struct pci_resource *t_node;
1430 dbg("%s\n", __func__);
1431
1432 if (!func)
1433 return 1;
1434
1435 node = func->io_head;
1436 func->io_head = NULL;
1437 while (node) {
1438 t_node = node->next;
1439 return_resource(&(resources->io_head), node);
1440 node = t_node;
1441 }
1442
1443 node = func->mem_head;
1444 func->mem_head = NULL;
1445 while (node) {
1446 t_node = node->next;
1447 return_resource(&(resources->mem_head), node);
1448 node = t_node;
1449 }
1450
1451 node = func->p_mem_head;
1452 func->p_mem_head = NULL;
1453 while (node) {
1454 t_node = node->next;
1455 return_resource(&(resources->p_mem_head), node);
1456 node = t_node;
1457 }
1458
1459 node = func->bus_head;
1460 func->bus_head = NULL;
1461 while (node) {
1462 t_node = node->next;
1463 return_resource(&(resources->bus_head), node);
1464 node = t_node;
1465 }
1466
1467 rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1468 rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1469 rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1470 rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1471
1472 return rc;
1473 }
1474
1475
1476 /*
1477 * cpqhp_destroy_resource_list
1478 *
1479 * Puts node back in the resource list pointed to by head
1480 */
cpqhp_destroy_resource_list(struct resource_lists * resources)1481 void cpqhp_destroy_resource_list(struct resource_lists *resources)
1482 {
1483 struct pci_resource *res, *tres;
1484
1485 res = resources->io_head;
1486 resources->io_head = NULL;
1487
1488 while (res) {
1489 tres = res;
1490 res = res->next;
1491 kfree(tres);
1492 }
1493
1494 res = resources->mem_head;
1495 resources->mem_head = NULL;
1496
1497 while (res) {
1498 tres = res;
1499 res = res->next;
1500 kfree(tres);
1501 }
1502
1503 res = resources->p_mem_head;
1504 resources->p_mem_head = NULL;
1505
1506 while (res) {
1507 tres = res;
1508 res = res->next;
1509 kfree(tres);
1510 }
1511
1512 res = resources->bus_head;
1513 resources->bus_head = NULL;
1514
1515 while (res) {
1516 tres = res;
1517 res = res->next;
1518 kfree(tres);
1519 }
1520 }
1521
1522
1523 /*
1524 * cpqhp_destroy_board_resources
1525 *
1526 * Puts node back in the resource list pointed to by head
1527 */
cpqhp_destroy_board_resources(struct pci_func * func)1528 void cpqhp_destroy_board_resources(struct pci_func *func)
1529 {
1530 struct pci_resource *res, *tres;
1531
1532 res = func->io_head;
1533 func->io_head = NULL;
1534
1535 while (res) {
1536 tres = res;
1537 res = res->next;
1538 kfree(tres);
1539 }
1540
1541 res = func->mem_head;
1542 func->mem_head = NULL;
1543
1544 while (res) {
1545 tres = res;
1546 res = res->next;
1547 kfree(tres);
1548 }
1549
1550 res = func->p_mem_head;
1551 func->p_mem_head = NULL;
1552
1553 while (res) {
1554 tres = res;
1555 res = res->next;
1556 kfree(tres);
1557 }
1558
1559 res = func->bus_head;
1560 func->bus_head = NULL;
1561
1562 while (res) {
1563 tres = res;
1564 res = res->next;
1565 kfree(tres);
1566 }
1567 }
1568