1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Compaq Hot Plug Controller Driver 4 * 5 * Copyright (C) 1995,2001 Compaq Computer Corporation 6 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> 7 * Copyright (C) 2001 IBM Corp. 8 * 9 * All rights reserved. 10 * 11 * Send feedback to <greg@kroah.com> 12 * 13 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support, 14 * Torben Mathiasen <torben.mathiasen@hp.com> 15 */ 16 17 #include <linux/module.h> 18 #include <linux/moduleparam.h> 19 #include <linux/kernel.h> 20 #include <linux/types.h> 21 #include <linux/proc_fs.h> 22 #include <linux/slab.h> 23 #include <linux/workqueue.h> 24 #include <linux/pci.h> 25 #include <linux/pci_hotplug.h> 26 #include <linux/init.h> 27 #include <linux/interrupt.h> 28 29 #include <linux/uaccess.h> 30 31 #include "cpqphp.h" 32 #include "cpqphp_nvram.h" 33 34 35 /* Global variables */ 36 int cpqhp_debug; 37 int cpqhp_legacy_mode; 38 struct controller *cpqhp_ctrl_list; /* = NULL */ 39 struct pci_func *cpqhp_slot_list[256]; 40 struct irq_routing_table *cpqhp_routing_table; 41 42 /* local variables */ 43 static void __iomem *smbios_table; 44 static void __iomem *smbios_start; 45 static void __iomem *cpqhp_rom_start; 46 static bool power_mode; 47 static bool debug; 48 static int initialized; 49 50 #define DRIVER_VERSION "0.9.8" 51 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>" 52 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver" 53 54 MODULE_AUTHOR(DRIVER_AUTHOR); 55 MODULE_DESCRIPTION(DRIVER_DESC); 56 MODULE_LICENSE("GPL"); 57 58 module_param(power_mode, bool, 0644); 59 MODULE_PARM_DESC(power_mode, "Power mode enabled or not"); 60 61 module_param(debug, bool, 0644); 62 MODULE_PARM_DESC(debug, "Debugging mode enabled or not"); 63 64 #define CPQHPC_MODULE_MINOR 208 65 66 static inline int is_slot64bit(struct slot *slot) 67 { 68 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0; 69 } 70 71 static inline int is_slot66mhz(struct slot *slot) 72 { 73 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0; 74 } 75 76 /** 77 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region. 78 * @begin: begin pointer for region to be scanned. 79 * @end: end pointer for region to be scanned. 80 * 81 * Returns pointer to the head of the SMBIOS tables (or %NULL). 82 */ 83 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end) 84 { 85 void __iomem *fp; 86 void __iomem *endp; 87 u8 temp1, temp2, temp3, temp4; 88 int status = 0; 89 90 endp = (end - sizeof(u32) + 1); 91 92 for (fp = begin; fp <= endp; fp += 16) { 93 temp1 = readb(fp); 94 temp2 = readb(fp+1); 95 temp3 = readb(fp+2); 96 temp4 = readb(fp+3); 97 if (temp1 == '_' && 98 temp2 == 'S' && 99 temp3 == 'M' && 100 temp4 == '_') { 101 status = 1; 102 break; 103 } 104 } 105 106 if (!status) 107 fp = NULL; 108 109 dbg("Discovered SMBIOS Entry point at %p\n", fp); 110 111 return fp; 112 } 113 114 /** 115 * init_SERR - Initializes the per slot SERR generation. 116 * @ctrl: controller to use 117 * 118 * For unexpected switch opens 119 */ 120 static int init_SERR(struct controller *ctrl) 121 { 122 u32 tempdword; 123 u32 number_of_slots; 124 u8 physical_slot; 125 126 if (!ctrl) 127 return 1; 128 129 tempdword = ctrl->first_slot; 130 131 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 132 /* Loop through slots */ 133 while (number_of_slots) { 134 physical_slot = tempdword; 135 writeb(0, ctrl->hpc_reg + SLOT_SERR); 136 tempdword++; 137 number_of_slots--; 138 } 139 140 return 0; 141 } 142 143 static int init_cpqhp_routing_table(void) 144 { 145 int len; 146 147 cpqhp_routing_table = pcibios_get_irq_routing_table(); 148 if (cpqhp_routing_table == NULL) 149 return -ENOMEM; 150 151 len = cpqhp_routing_table_length(); 152 if (len == 0) { 153 kfree(cpqhp_routing_table); 154 cpqhp_routing_table = NULL; 155 return -1; 156 } 157 158 return 0; 159 } 160 161 /* nice debugging output */ 162 static void pci_print_IRQ_route(void) 163 { 164 int len; 165 int loop; 166 u8 tbus, tdevice, tslot; 167 168 len = cpqhp_routing_table_length(); 169 170 dbg("bus dev func slot\n"); 171 for (loop = 0; loop < len; ++loop) { 172 tbus = cpqhp_routing_table->slots[loop].bus; 173 tdevice = cpqhp_routing_table->slots[loop].devfn; 174 tslot = cpqhp_routing_table->slots[loop].slot; 175 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot); 176 177 } 178 return; 179 } 180 181 182 /** 183 * get_subsequent_smbios_entry: get the next entry from bios table. 184 * @smbios_start: where to start in the SMBIOS table 185 * @smbios_table: location of the SMBIOS table 186 * @curr: %NULL or pointer to previously returned structure 187 * 188 * Gets the first entry if previous == NULL; 189 * otherwise, returns the next entry. 190 * Uses global SMBIOS Table pointer. 191 * 192 * Returns a pointer to an SMBIOS structure or NULL if none found. 193 */ 194 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start, 195 void __iomem *smbios_table, 196 void __iomem *curr) 197 { 198 u8 bail = 0; 199 u8 previous_byte = 1; 200 void __iomem *p_temp; 201 void __iomem *p_max; 202 203 if (!smbios_table || !curr) 204 return NULL; 205 206 /* set p_max to the end of the table */ 207 p_max = smbios_start + readw(smbios_table + ST_LENGTH); 208 209 p_temp = curr; 210 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH); 211 212 while ((p_temp < p_max) && !bail) { 213 /* Look for the double NULL terminator 214 * The first condition is the previous byte 215 * and the second is the curr 216 */ 217 if (!previous_byte && !(readb(p_temp))) 218 bail = 1; 219 220 previous_byte = readb(p_temp); 221 p_temp++; 222 } 223 224 if (p_temp < p_max) 225 return p_temp; 226 else 227 return NULL; 228 } 229 230 231 /** 232 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL 233 * @smbios_start: where to start in the SMBIOS table 234 * @smbios_table: location of the SMBIOS table 235 * @type: SMBIOS structure type to be returned 236 * @previous: %NULL or pointer to previously returned structure 237 * 238 * Gets the first entry of the specified type if previous == %NULL; 239 * Otherwise, returns the next entry of the given type. 240 * Uses global SMBIOS Table pointer. 241 * Uses get_subsequent_smbios_entry. 242 * 243 * Returns a pointer to an SMBIOS structure or %NULL if none found. 244 */ 245 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start, 246 void __iomem *smbios_table, 247 u8 type, 248 void __iomem *previous) 249 { 250 if (!smbios_table) 251 return NULL; 252 253 if (!previous) 254 previous = smbios_start; 255 else 256 previous = get_subsequent_smbios_entry(smbios_start, 257 smbios_table, previous); 258 259 while (previous) 260 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) 261 previous = get_subsequent_smbios_entry(smbios_start, 262 smbios_table, previous); 263 else 264 break; 265 266 return previous; 267 } 268 269 static void release_slot(struct hotplug_slot *hotplug_slot) 270 { 271 struct slot *slot = hotplug_slot->private; 272 273 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 274 275 kfree(slot->hotplug_slot->info); 276 kfree(slot->hotplug_slot); 277 kfree(slot); 278 } 279 280 static int ctrl_slot_cleanup(struct controller *ctrl) 281 { 282 struct slot *old_slot, *next_slot; 283 284 old_slot = ctrl->slot; 285 ctrl->slot = NULL; 286 287 while (old_slot) { 288 /* memory will be freed by the release_slot callback */ 289 next_slot = old_slot->next; 290 pci_hp_deregister(old_slot->hotplug_slot); 291 old_slot = next_slot; 292 } 293 294 cpqhp_remove_debugfs_files(ctrl); 295 296 /* Free IRQ associated with hot plug device */ 297 free_irq(ctrl->interrupt, ctrl); 298 /* Unmap the memory */ 299 iounmap(ctrl->hpc_reg); 300 /* Finally reclaim PCI mem */ 301 release_mem_region(pci_resource_start(ctrl->pci_dev, 0), 302 pci_resource_len(ctrl->pci_dev, 0)); 303 304 return 0; 305 } 306 307 308 /** 309 * get_slot_mapping - determine logical slot mapping for PCI device 310 * 311 * Won't work for more than one PCI-PCI bridge in a slot. 312 * 313 * @bus_num - bus number of PCI device 314 * @dev_num - device number of PCI device 315 * @slot - Pointer to u8 where slot number will be returned 316 * 317 * Output: SUCCESS or FAILURE 318 */ 319 static int 320 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) 321 { 322 u32 work; 323 long len; 324 long loop; 325 326 u8 tbus, tdevice, tslot, bridgeSlot; 327 328 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot); 329 330 bridgeSlot = 0xFF; 331 332 len = cpqhp_routing_table_length(); 333 for (loop = 0; loop < len; ++loop) { 334 tbus = cpqhp_routing_table->slots[loop].bus; 335 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3; 336 tslot = cpqhp_routing_table->slots[loop].slot; 337 338 if ((tbus == bus_num) && (tdevice == dev_num)) { 339 *slot = tslot; 340 return 0; 341 } else { 342 /* Did not get a match on the target PCI device. Check 343 * if the current IRQ table entry is a PCI-to-PCI 344 * bridge device. If so, and it's secondary bus 345 * matches the bus number for the target device, I need 346 * to save the bridge's slot number. If I can not find 347 * an entry for the target device, I will have to 348 * assume it's on the other side of the bridge, and 349 * assign it the bridge's slot. 350 */ 351 bus->number = tbus; 352 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), 353 PCI_CLASS_REVISION, &work); 354 355 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 356 pci_bus_read_config_dword(bus, 357 PCI_DEVFN(tdevice, 0), 358 PCI_PRIMARY_BUS, &work); 359 // See if bridge's secondary bus matches target bus. 360 if (((work >> 8) & 0x000000FF) == (long) bus_num) 361 bridgeSlot = tslot; 362 } 363 } 364 365 } 366 367 /* If we got here, we didn't find an entry in the IRQ mapping table for 368 * the target PCI device. If we did determine that the target device 369 * is on the other side of a PCI-to-PCI bridge, return the slot number 370 * for the bridge. 371 */ 372 if (bridgeSlot != 0xFF) { 373 *slot = bridgeSlot; 374 return 0; 375 } 376 /* Couldn't find an entry in the routing table for this PCI device */ 377 return -1; 378 } 379 380 381 /** 382 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off 383 * @ctrl: struct controller to use 384 * @func: PCI device/function info 385 * @status: LED control flag: 1 = LED on, 0 = LED off 386 */ 387 static int 388 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func, 389 u32 status) 390 { 391 u8 hp_slot; 392 393 if (func == NULL) 394 return 1; 395 396 hp_slot = func->device - ctrl->slot_device_offset; 397 398 /* Wait for exclusive access to hardware */ 399 mutex_lock(&ctrl->crit_sect); 400 401 if (status == 1) 402 amber_LED_on(ctrl, hp_slot); 403 else if (status == 0) 404 amber_LED_off(ctrl, hp_slot); 405 else { 406 /* Done with exclusive hardware access */ 407 mutex_unlock(&ctrl->crit_sect); 408 return 1; 409 } 410 411 set_SOGO(ctrl); 412 413 /* Wait for SOBS to be unset */ 414 wait_for_ctrl_irq(ctrl); 415 416 /* Done with exclusive hardware access */ 417 mutex_unlock(&ctrl->crit_sect); 418 419 return 0; 420 } 421 422 423 /** 424 * set_attention_status - Turns the Amber LED for a slot on or off 425 * @hotplug_slot: slot to change LED on 426 * @status: LED control flag 427 */ 428 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status) 429 { 430 struct pci_func *slot_func; 431 struct slot *slot = hotplug_slot->private; 432 struct controller *ctrl = slot->ctrl; 433 u8 bus; 434 u8 devfn; 435 u8 device; 436 u8 function; 437 438 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 439 440 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 441 return -ENODEV; 442 443 device = devfn >> 3; 444 function = devfn & 0x7; 445 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 446 447 slot_func = cpqhp_slot_find(bus, device, function); 448 if (!slot_func) 449 return -ENODEV; 450 451 return cpqhp_set_attention_status(ctrl, slot_func, status); 452 } 453 454 455 static int process_SI(struct hotplug_slot *hotplug_slot) 456 { 457 struct pci_func *slot_func; 458 struct slot *slot = hotplug_slot->private; 459 struct controller *ctrl = slot->ctrl; 460 u8 bus; 461 u8 devfn; 462 u8 device; 463 u8 function; 464 465 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 466 467 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 468 return -ENODEV; 469 470 device = devfn >> 3; 471 function = devfn & 0x7; 472 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 473 474 slot_func = cpqhp_slot_find(bus, device, function); 475 if (!slot_func) 476 return -ENODEV; 477 478 slot_func->bus = bus; 479 slot_func->device = device; 480 slot_func->function = function; 481 slot_func->configured = 0; 482 dbg("board_added(%p, %p)\n", slot_func, ctrl); 483 return cpqhp_process_SI(ctrl, slot_func); 484 } 485 486 487 static int process_SS(struct hotplug_slot *hotplug_slot) 488 { 489 struct pci_func *slot_func; 490 struct slot *slot = hotplug_slot->private; 491 struct controller *ctrl = slot->ctrl; 492 u8 bus; 493 u8 devfn; 494 u8 device; 495 u8 function; 496 497 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 498 499 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 500 return -ENODEV; 501 502 device = devfn >> 3; 503 function = devfn & 0x7; 504 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 505 506 slot_func = cpqhp_slot_find(bus, device, function); 507 if (!slot_func) 508 return -ENODEV; 509 510 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl); 511 return cpqhp_process_SS(ctrl, slot_func); 512 } 513 514 515 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value) 516 { 517 struct slot *slot = hotplug_slot->private; 518 struct controller *ctrl = slot->ctrl; 519 520 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 521 522 return cpqhp_hardware_test(ctrl, value); 523 } 524 525 526 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value) 527 { 528 struct slot *slot = hotplug_slot->private; 529 struct controller *ctrl = slot->ctrl; 530 531 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 532 533 *value = get_slot_enabled(ctrl, slot); 534 return 0; 535 } 536 537 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value) 538 { 539 struct slot *slot = hotplug_slot->private; 540 struct controller *ctrl = slot->ctrl; 541 542 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 543 544 *value = cpq_get_attention_status(ctrl, slot); 545 return 0; 546 } 547 548 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value) 549 { 550 struct slot *slot = hotplug_slot->private; 551 struct controller *ctrl = slot->ctrl; 552 553 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 554 555 *value = cpq_get_latch_status(ctrl, slot); 556 557 return 0; 558 } 559 560 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value) 561 { 562 struct slot *slot = hotplug_slot->private; 563 struct controller *ctrl = slot->ctrl; 564 565 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot)); 566 567 *value = get_presence_status(ctrl, slot); 568 569 return 0; 570 } 571 572 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = { 573 .set_attention_status = set_attention_status, 574 .enable_slot = process_SI, 575 .disable_slot = process_SS, 576 .hardware_test = hardware_test, 577 .get_power_status = get_power_status, 578 .get_attention_status = get_attention_status, 579 .get_latch_status = get_latch_status, 580 .get_adapter_status = get_adapter_status, 581 }; 582 583 #define SLOT_NAME_SIZE 10 584 585 static int ctrl_slot_setup(struct controller *ctrl, 586 void __iomem *smbios_start, 587 void __iomem *smbios_table) 588 { 589 struct slot *slot; 590 struct hotplug_slot *hotplug_slot; 591 struct hotplug_slot_info *hotplug_slot_info; 592 struct pci_bus *bus = ctrl->pci_bus; 593 u8 number_of_slots; 594 u8 slot_device; 595 u8 slot_number; 596 u8 ctrl_slot; 597 u32 tempdword; 598 char name[SLOT_NAME_SIZE]; 599 void __iomem *slot_entry = NULL; 600 int result; 601 602 dbg("%s\n", __func__); 603 604 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 605 606 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 607 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 608 slot_number = ctrl->first_slot; 609 610 while (number_of_slots) { 611 slot = kzalloc(sizeof(*slot), GFP_KERNEL); 612 if (!slot) { 613 result = -ENOMEM; 614 goto error; 615 } 616 617 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)), 618 GFP_KERNEL); 619 if (!slot->hotplug_slot) { 620 result = -ENOMEM; 621 goto error_slot; 622 } 623 hotplug_slot = slot->hotplug_slot; 624 625 hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)), 626 GFP_KERNEL); 627 if (!hotplug_slot->info) { 628 result = -ENOMEM; 629 goto error_hpslot; 630 } 631 hotplug_slot_info = hotplug_slot->info; 632 633 slot->ctrl = ctrl; 634 slot->bus = ctrl->bus; 635 slot->device = slot_device; 636 slot->number = slot_number; 637 dbg("slot->number = %u\n", slot->number); 638 639 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 640 slot_entry); 641 642 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != 643 slot->number)) { 644 slot_entry = get_SMBIOS_entry(smbios_start, 645 smbios_table, 9, slot_entry); 646 } 647 648 slot->p_sm_slot = slot_entry; 649 650 timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0); 651 slot->task_event.expires = jiffies + 5 * HZ; 652 653 /*FIXME: these capabilities aren't used but if they are 654 * they need to be correctly implemented 655 */ 656 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 657 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 658 659 if (is_slot64bit(slot)) 660 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 661 if (is_slot66mhz(slot)) 662 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 663 if (bus->cur_bus_speed == PCI_SPEED_66MHz) 664 slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 665 666 ctrl_slot = 667 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 668 669 /* Check presence */ 670 slot->capabilities |= 671 ((((~tempdword) >> 23) | 672 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 673 /* Check the switch state */ 674 slot->capabilities |= 675 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 676 /* Check the slot enable */ 677 slot->capabilities |= 678 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 679 680 /* register this slot with the hotplug pci core */ 681 hotplug_slot->release = &release_slot; 682 hotplug_slot->private = slot; 683 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number); 684 hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 685 686 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot); 687 hotplug_slot_info->attention_status = 688 cpq_get_attention_status(ctrl, slot); 689 hotplug_slot_info->latch_status = 690 cpq_get_latch_status(ctrl, slot); 691 hotplug_slot_info->adapter_status = 692 get_presence_status(ctrl, slot); 693 694 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n", 695 slot->bus, slot->device, 696 slot->number, ctrl->slot_device_offset, 697 slot_number); 698 result = pci_hp_register(hotplug_slot, 699 ctrl->pci_dev->bus, 700 slot->device, 701 name); 702 if (result) { 703 err("pci_hp_register failed with error %d\n", result); 704 goto error_info; 705 } 706 707 slot->next = ctrl->slot; 708 ctrl->slot = slot; 709 710 number_of_slots--; 711 slot_device++; 712 slot_number++; 713 } 714 715 return 0; 716 error_info: 717 kfree(hotplug_slot_info); 718 error_hpslot: 719 kfree(hotplug_slot); 720 error_slot: 721 kfree(slot); 722 error: 723 return result; 724 } 725 726 static int one_time_init(void) 727 { 728 int loop; 729 int retval = 0; 730 731 if (initialized) 732 return 0; 733 734 power_mode = 0; 735 736 retval = init_cpqhp_routing_table(); 737 if (retval) 738 goto error; 739 740 if (cpqhp_debug) 741 pci_print_IRQ_route(); 742 743 dbg("Initialize + Start the notification mechanism\n"); 744 745 retval = cpqhp_event_start_thread(); 746 if (retval) 747 goto error; 748 749 dbg("Initialize slot lists\n"); 750 for (loop = 0; loop < 256; loop++) 751 cpqhp_slot_list[loop] = NULL; 752 753 /* FIXME: We also need to hook the NMI handler eventually. 754 * this also needs to be worked with Christoph 755 * register_NMI_handler(); 756 */ 757 /* Map rom address */ 758 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN); 759 if (!cpqhp_rom_start) { 760 err("Could not ioremap memory region for ROM\n"); 761 retval = -EIO; 762 goto error; 763 } 764 765 /* Now, map the int15 entry point if we are on compaq specific 766 * hardware 767 */ 768 compaq_nvram_init(cpqhp_rom_start); 769 770 /* Map smbios table entry point structure */ 771 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start, 772 cpqhp_rom_start + ROM_PHY_LEN); 773 if (!smbios_table) { 774 err("Could not find the SMBIOS pointer in memory\n"); 775 retval = -EIO; 776 goto error_rom_start; 777 } 778 779 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS), 780 readw(smbios_table + ST_LENGTH)); 781 if (!smbios_start) { 782 err("Could not ioremap memory region taken from SMBIOS values\n"); 783 retval = -EIO; 784 goto error_smbios_start; 785 } 786 787 initialized = 1; 788 789 return retval; 790 791 error_smbios_start: 792 iounmap(smbios_start); 793 error_rom_start: 794 iounmap(cpqhp_rom_start); 795 error: 796 return retval; 797 } 798 799 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 800 { 801 u8 num_of_slots = 0; 802 u8 hp_slot = 0; 803 u8 device; 804 u8 bus_cap; 805 u16 temp_word; 806 u16 vendor_id; 807 u16 subsystem_vid; 808 u16 subsystem_deviceid; 809 u32 rc; 810 struct controller *ctrl; 811 struct pci_func *func; 812 struct pci_bus *bus; 813 int err; 814 815 err = pci_enable_device(pdev); 816 if (err) { 817 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n", 818 pci_name(pdev), err); 819 return err; 820 } 821 822 bus = pdev->subordinate; 823 if (!bus) { 824 pci_notice(pdev, "the device is not a bridge, skipping\n"); 825 rc = -ENODEV; 826 goto err_disable_device; 827 } 828 829 /* Need to read VID early b/c it's used to differentiate CPQ and INTC 830 * discovery 831 */ 832 vendor_id = pdev->vendor; 833 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) && 834 (vendor_id != PCI_VENDOR_ID_INTEL)) { 835 err(msg_HPC_non_compaq_or_intel); 836 rc = -ENODEV; 837 goto err_disable_device; 838 } 839 dbg("Vendor ID: %x\n", vendor_id); 840 841 dbg("revision: %d\n", pdev->revision); 842 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) { 843 err(msg_HPC_rev_error); 844 rc = -ENODEV; 845 goto err_disable_device; 846 } 847 848 /* Check for the proper subsystem IDs 849 * Intel uses a different SSID programming model than Compaq. 850 * For Intel, each SSID bit identifies a PHP capability. 851 * Also Intel HPCs may have RID=0. 852 */ 853 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) { 854 err(msg_HPC_not_supported); 855 rc = -ENODEV; 856 goto err_disable_device; 857 } 858 859 /* TODO: This code can be made to support non-Compaq or Intel 860 * subsystem IDs 861 */ 862 subsystem_vid = pdev->subsystem_vendor; 863 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 864 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 865 err(msg_HPC_non_compaq_or_intel); 866 rc = -ENODEV; 867 goto err_disable_device; 868 } 869 870 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL); 871 if (!ctrl) { 872 rc = -ENOMEM; 873 goto err_disable_device; 874 } 875 876 subsystem_deviceid = pdev->subsystem_device; 877 878 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid); 879 880 /* Set Vendor ID, so it can be accessed later from other 881 * functions 882 */ 883 ctrl->vendor_id = vendor_id; 884 885 switch (subsystem_vid) { 886 case PCI_VENDOR_ID_COMPAQ: 887 if (pdev->revision >= 0x13) { /* CIOBX */ 888 ctrl->push_flag = 1; 889 ctrl->slot_switch_type = 1; 890 ctrl->push_button = 1; 891 ctrl->pci_config_space = 1; 892 ctrl->defeature_PHP = 1; 893 ctrl->pcix_support = 1; 894 ctrl->pcix_speed_capability = 1; 895 pci_read_config_byte(pdev, 0x41, &bus_cap); 896 if (bus_cap & 0x80) { 897 dbg("bus max supports 133MHz PCI-X\n"); 898 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX; 899 break; 900 } 901 if (bus_cap & 0x40) { 902 dbg("bus max supports 100MHz PCI-X\n"); 903 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX; 904 break; 905 } 906 if (bus_cap & 0x20) { 907 dbg("bus max supports 66MHz PCI-X\n"); 908 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX; 909 break; 910 } 911 if (bus_cap & 0x10) { 912 dbg("bus max supports 66MHz PCI\n"); 913 bus->max_bus_speed = PCI_SPEED_66MHz; 914 break; 915 } 916 917 break; 918 } 919 920 switch (subsystem_deviceid) { 921 case PCI_SUB_HPC_ID: 922 /* Original 6500/7000 implementation */ 923 ctrl->slot_switch_type = 1; 924 bus->max_bus_speed = PCI_SPEED_33MHz; 925 ctrl->push_button = 0; 926 ctrl->pci_config_space = 1; 927 ctrl->defeature_PHP = 1; 928 ctrl->pcix_support = 0; 929 ctrl->pcix_speed_capability = 0; 930 break; 931 case PCI_SUB_HPC_ID2: 932 /* First Pushbutton implementation */ 933 ctrl->push_flag = 1; 934 ctrl->slot_switch_type = 1; 935 bus->max_bus_speed = PCI_SPEED_33MHz; 936 ctrl->push_button = 1; 937 ctrl->pci_config_space = 1; 938 ctrl->defeature_PHP = 1; 939 ctrl->pcix_support = 0; 940 ctrl->pcix_speed_capability = 0; 941 break; 942 case PCI_SUB_HPC_ID_INTC: 943 /* Third party (6500/7000) */ 944 ctrl->slot_switch_type = 1; 945 bus->max_bus_speed = PCI_SPEED_33MHz; 946 ctrl->push_button = 0; 947 ctrl->pci_config_space = 1; 948 ctrl->defeature_PHP = 1; 949 ctrl->pcix_support = 0; 950 ctrl->pcix_speed_capability = 0; 951 break; 952 case PCI_SUB_HPC_ID3: 953 /* First 66 Mhz implementation */ 954 ctrl->push_flag = 1; 955 ctrl->slot_switch_type = 1; 956 bus->max_bus_speed = PCI_SPEED_66MHz; 957 ctrl->push_button = 1; 958 ctrl->pci_config_space = 1; 959 ctrl->defeature_PHP = 1; 960 ctrl->pcix_support = 0; 961 ctrl->pcix_speed_capability = 0; 962 break; 963 case PCI_SUB_HPC_ID4: 964 /* First PCI-X implementation, 100MHz */ 965 ctrl->push_flag = 1; 966 ctrl->slot_switch_type = 1; 967 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX; 968 ctrl->push_button = 1; 969 ctrl->pci_config_space = 1; 970 ctrl->defeature_PHP = 1; 971 ctrl->pcix_support = 1; 972 ctrl->pcix_speed_capability = 0; 973 break; 974 default: 975 err(msg_HPC_not_supported); 976 rc = -ENODEV; 977 goto err_free_ctrl; 978 } 979 break; 980 981 case PCI_VENDOR_ID_INTEL: 982 /* Check for speed capability (0=33, 1=66) */ 983 if (subsystem_deviceid & 0x0001) 984 bus->max_bus_speed = PCI_SPEED_66MHz; 985 else 986 bus->max_bus_speed = PCI_SPEED_33MHz; 987 988 /* Check for push button */ 989 if (subsystem_deviceid & 0x0002) 990 ctrl->push_button = 0; 991 else 992 ctrl->push_button = 1; 993 994 /* Check for slot switch type (0=mechanical, 1=not mechanical) */ 995 if (subsystem_deviceid & 0x0004) 996 ctrl->slot_switch_type = 0; 997 else 998 ctrl->slot_switch_type = 1; 999 1000 /* PHP Status (0=De-feature PHP, 1=Normal operation) */ 1001 if (subsystem_deviceid & 0x0008) 1002 ctrl->defeature_PHP = 1; /* PHP supported */ 1003 else 1004 ctrl->defeature_PHP = 0; /* PHP not supported */ 1005 1006 /* Alternate Base Address Register Interface 1007 * (0=not supported, 1=supported) 1008 */ 1009 if (subsystem_deviceid & 0x0010) 1010 ctrl->alternate_base_address = 1; 1011 else 1012 ctrl->alternate_base_address = 0; 1013 1014 /* PCI Config Space Index (0=not supported, 1=supported) */ 1015 if (subsystem_deviceid & 0x0020) 1016 ctrl->pci_config_space = 1; 1017 else 1018 ctrl->pci_config_space = 0; 1019 1020 /* PCI-X support */ 1021 if (subsystem_deviceid & 0x0080) { 1022 ctrl->pcix_support = 1; 1023 if (subsystem_deviceid & 0x0040) 1024 /* 133MHz PCI-X if bit 7 is 1 */ 1025 ctrl->pcix_speed_capability = 1; 1026 else 1027 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */ 1028 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */ 1029 ctrl->pcix_speed_capability = 0; 1030 } else { 1031 /* Conventional PCI */ 1032 ctrl->pcix_support = 0; 1033 ctrl->pcix_speed_capability = 0; 1034 } 1035 break; 1036 1037 default: 1038 err(msg_HPC_not_supported); 1039 rc = -ENODEV; 1040 goto err_free_ctrl; 1041 } 1042 1043 /* Tell the user that we found one. */ 1044 info("Initializing the PCI hot plug controller residing on PCI bus %d\n", 1045 pdev->bus->number); 1046 1047 dbg("Hotplug controller capabilities:\n"); 1048 dbg(" speed_capability %d\n", bus->max_bus_speed); 1049 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ? 1050 "switch present" : "no switch"); 1051 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ? 1052 "PHP supported" : "PHP not supported"); 1053 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ? 1054 "supported" : "not supported"); 1055 dbg(" pci_config_space %s\n", ctrl->pci_config_space ? 1056 "supported" : "not supported"); 1057 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ? 1058 "supported" : "not supported"); 1059 dbg(" pcix_support %s\n", ctrl->pcix_support ? 1060 "supported" : "not supported"); 1061 1062 ctrl->pci_dev = pdev; 1063 pci_set_drvdata(pdev, ctrl); 1064 1065 /* make our own copy of the pci bus structure, 1066 * as we like tweaking it a lot */ 1067 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL); 1068 if (!ctrl->pci_bus) { 1069 err("out of memory\n"); 1070 rc = -ENOMEM; 1071 goto err_free_ctrl; 1072 } 1073 1074 ctrl->bus = pdev->bus->number; 1075 ctrl->rev = pdev->revision; 1076 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1077 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1078 1079 mutex_init(&ctrl->crit_sect); 1080 init_waitqueue_head(&ctrl->queue); 1081 1082 /* initialize our threads if they haven't already been started up */ 1083 rc = one_time_init(); 1084 if (rc) 1085 goto err_free_bus; 1086 1087 dbg("pdev = %p\n", pdev); 1088 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0)); 1089 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0)); 1090 1091 if (!request_mem_region(pci_resource_start(pdev, 0), 1092 pci_resource_len(pdev, 0), MY_NAME)) { 1093 err("cannot reserve MMIO region\n"); 1094 rc = -ENOMEM; 1095 goto err_free_bus; 1096 } 1097 1098 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0), 1099 pci_resource_len(pdev, 0)); 1100 if (!ctrl->hpc_reg) { 1101 err("cannot remap MMIO region %llx @ %llx\n", 1102 (unsigned long long)pci_resource_len(pdev, 0), 1103 (unsigned long long)pci_resource_start(pdev, 0)); 1104 rc = -ENODEV; 1105 goto err_free_mem_region; 1106 } 1107 1108 /* Check for 66Mhz operation */ 1109 bus->cur_bus_speed = get_controller_speed(ctrl); 1110 1111 1112 /******************************************************** 1113 * 1114 * Save configuration headers for this and 1115 * subordinate PCI buses 1116 * 1117 ********************************************************/ 1118 1119 /* find the physical slot number of the first hot plug slot */ 1120 1121 /* Get slot won't work for devices behind bridges, but 1122 * in this case it will always be called for the "base" 1123 * bus/dev/func of a slot. 1124 * CS: this is leveraging the PCIIRQ routing code from the kernel 1125 * (pci-pc.c: get_irq_routing_table) */ 1126 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number, 1127 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4), 1128 &(ctrl->first_slot)); 1129 dbg("get_slot_mapping: first_slot = %d, returned = %d\n", 1130 ctrl->first_slot, rc); 1131 if (rc) { 1132 err(msg_initialization_err, rc); 1133 goto err_iounmap; 1134 } 1135 1136 /* Store PCI Config Space for all devices on this bus */ 1137 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK)); 1138 if (rc) { 1139 err("%s: unable to save PCI configuration data, error %d\n", 1140 __func__, rc); 1141 goto err_iounmap; 1142 } 1143 1144 /* 1145 * Get IO, memory, and IRQ resources for new devices 1146 */ 1147 /* The next line is required for cpqhp_find_available_resources */ 1148 ctrl->interrupt = pdev->irq; 1149 if (ctrl->interrupt < 0x10) { 1150 cpqhp_legacy_mode = 1; 1151 dbg("System seems to be configured for Full Table Mapped MPS mode\n"); 1152 } 1153 1154 ctrl->cfgspc_irq = 0; 1155 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq); 1156 1157 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start); 1158 ctrl->add_support = !rc; 1159 if (rc) { 1160 dbg("cpqhp_find_available_resources = 0x%x\n", rc); 1161 err("unable to locate PCI configuration resources for hot plug add.\n"); 1162 goto err_iounmap; 1163 } 1164 1165 /* 1166 * Finish setting up the hot plug ctrl device 1167 */ 1168 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1169 dbg("NumSlots %d\n", ctrl->slot_device_offset); 1170 1171 ctrl->next_event = 0; 1172 1173 /* Setup the slot information structures */ 1174 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table); 1175 if (rc) { 1176 err(msg_initialization_err, 6); 1177 err("%s: unable to save PCI configuration data, error %d\n", 1178 __func__, rc); 1179 goto err_iounmap; 1180 } 1181 1182 /* Mask all general input interrupts */ 1183 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK); 1184 1185 /* set up the interrupt */ 1186 dbg("HPC interrupt = %d\n", ctrl->interrupt); 1187 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr, 1188 IRQF_SHARED, MY_NAME, ctrl)) { 1189 err("Can't get irq %d for the hotplug pci controller\n", 1190 ctrl->interrupt); 1191 rc = -ENODEV; 1192 goto err_iounmap; 1193 } 1194 1195 /* Enable Shift Out interrupt and clear it, also enable SERR on power 1196 * fault 1197 */ 1198 temp_word = readw(ctrl->hpc_reg + MISC); 1199 temp_word |= 0x4006; 1200 writew(temp_word, ctrl->hpc_reg + MISC); 1201 1202 /* Changed 05/05/97 to clear all interrupts at start */ 1203 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR); 1204 1205 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 1206 1207 writel(0x0L, ctrl->hpc_reg + INT_MASK); 1208 1209 if (!cpqhp_ctrl_list) { 1210 cpqhp_ctrl_list = ctrl; 1211 ctrl->next = NULL; 1212 } else { 1213 ctrl->next = cpqhp_ctrl_list; 1214 cpqhp_ctrl_list = ctrl; 1215 } 1216 1217 /* turn off empty slots here unless command line option "ON" set 1218 * Wait for exclusive access to hardware 1219 */ 1220 mutex_lock(&ctrl->crit_sect); 1221 1222 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 1223 1224 /* find first device number for the ctrl */ 1225 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1226 1227 while (num_of_slots) { 1228 dbg("num_of_slots: %d\n", num_of_slots); 1229 func = cpqhp_slot_find(ctrl->bus, device, 0); 1230 if (!func) 1231 break; 1232 1233 hp_slot = func->device - ctrl->slot_device_offset; 1234 dbg("hp_slot: %d\n", hp_slot); 1235 1236 /* We have to save the presence info for these slots */ 1237 temp_word = ctrl->ctrl_int_comp >> 16; 1238 func->presence_save = (temp_word >> hp_slot) & 0x01; 1239 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 1240 1241 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) 1242 func->switch_save = 0; 1243 else 1244 func->switch_save = 0x10; 1245 1246 if (!power_mode) 1247 if (!func->is_a_board) { 1248 green_LED_off(ctrl, hp_slot); 1249 slot_disable(ctrl, hp_slot); 1250 } 1251 1252 device++; 1253 num_of_slots--; 1254 } 1255 1256 if (!power_mode) { 1257 set_SOGO(ctrl); 1258 /* Wait for SOBS to be unset */ 1259 wait_for_ctrl_irq(ctrl); 1260 } 1261 1262 rc = init_SERR(ctrl); 1263 if (rc) { 1264 err("init_SERR failed\n"); 1265 mutex_unlock(&ctrl->crit_sect); 1266 goto err_free_irq; 1267 } 1268 1269 /* Done with exclusive hardware access */ 1270 mutex_unlock(&ctrl->crit_sect); 1271 1272 cpqhp_create_debugfs_files(ctrl); 1273 1274 return 0; 1275 1276 err_free_irq: 1277 free_irq(ctrl->interrupt, ctrl); 1278 err_iounmap: 1279 iounmap(ctrl->hpc_reg); 1280 err_free_mem_region: 1281 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 1282 err_free_bus: 1283 kfree(ctrl->pci_bus); 1284 err_free_ctrl: 1285 kfree(ctrl); 1286 err_disable_device: 1287 pci_disable_device(pdev); 1288 return rc; 1289 } 1290 1291 static void __exit unload_cpqphpd(void) 1292 { 1293 struct pci_func *next; 1294 struct pci_func *TempSlot; 1295 int loop; 1296 u32 rc; 1297 struct controller *ctrl; 1298 struct controller *tctrl; 1299 struct pci_resource *res; 1300 struct pci_resource *tres; 1301 1302 rc = compaq_nvram_store(cpqhp_rom_start); 1303 1304 ctrl = cpqhp_ctrl_list; 1305 1306 while (ctrl) { 1307 if (ctrl->hpc_reg) { 1308 u16 misc; 1309 rc = read_slot_enable(ctrl); 1310 1311 writeb(0, ctrl->hpc_reg + SLOT_SERR); 1312 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK); 1313 1314 misc = readw(ctrl->hpc_reg + MISC); 1315 misc &= 0xFFFD; 1316 writew(misc, ctrl->hpc_reg + MISC); 1317 } 1318 1319 ctrl_slot_cleanup(ctrl); 1320 1321 res = ctrl->io_head; 1322 while (res) { 1323 tres = res; 1324 res = res->next; 1325 kfree(tres); 1326 } 1327 1328 res = ctrl->mem_head; 1329 while (res) { 1330 tres = res; 1331 res = res->next; 1332 kfree(tres); 1333 } 1334 1335 res = ctrl->p_mem_head; 1336 while (res) { 1337 tres = res; 1338 res = res->next; 1339 kfree(tres); 1340 } 1341 1342 res = ctrl->bus_head; 1343 while (res) { 1344 tres = res; 1345 res = res->next; 1346 kfree(tres); 1347 } 1348 1349 kfree(ctrl->pci_bus); 1350 1351 tctrl = ctrl; 1352 ctrl = ctrl->next; 1353 kfree(tctrl); 1354 } 1355 1356 for (loop = 0; loop < 256; loop++) { 1357 next = cpqhp_slot_list[loop]; 1358 while (next != NULL) { 1359 res = next->io_head; 1360 while (res) { 1361 tres = res; 1362 res = res->next; 1363 kfree(tres); 1364 } 1365 1366 res = next->mem_head; 1367 while (res) { 1368 tres = res; 1369 res = res->next; 1370 kfree(tres); 1371 } 1372 1373 res = next->p_mem_head; 1374 while (res) { 1375 tres = res; 1376 res = res->next; 1377 kfree(tres); 1378 } 1379 1380 res = next->bus_head; 1381 while (res) { 1382 tres = res; 1383 res = res->next; 1384 kfree(tres); 1385 } 1386 1387 TempSlot = next; 1388 next = next->next; 1389 kfree(TempSlot); 1390 } 1391 } 1392 1393 /* Stop the notification mechanism */ 1394 if (initialized) 1395 cpqhp_event_stop_thread(); 1396 1397 /* unmap the rom address */ 1398 if (cpqhp_rom_start) 1399 iounmap(cpqhp_rom_start); 1400 if (smbios_start) 1401 iounmap(smbios_start); 1402 } 1403 1404 static const struct pci_device_id hpcd_pci_tbl[] = { 1405 { 1406 /* handle any PCI Hotplug controller */ 1407 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00), 1408 .class_mask = ~0, 1409 1410 /* no matter who makes it */ 1411 .vendor = PCI_ANY_ID, 1412 .device = PCI_ANY_ID, 1413 .subvendor = PCI_ANY_ID, 1414 .subdevice = PCI_ANY_ID, 1415 1416 }, { /* end: all zeroes */ } 1417 }; 1418 1419 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl); 1420 1421 static struct pci_driver cpqhpc_driver = { 1422 .name = "compaq_pci_hotplug", 1423 .id_table = hpcd_pci_tbl, 1424 .probe = cpqhpc_probe, 1425 /* remove: cpqhpc_remove_one, */ 1426 }; 1427 1428 static int __init cpqhpc_init(void) 1429 { 1430 int result; 1431 1432 cpqhp_debug = debug; 1433 1434 info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1435 cpqhp_initialize_debugfs(); 1436 result = pci_register_driver(&cpqhpc_driver); 1437 dbg("pci_register_driver = %d\n", result); 1438 return result; 1439 } 1440 1441 static void __exit cpqhpc_cleanup(void) 1442 { 1443 dbg("unload_cpqphpd()\n"); 1444 unload_cpqphpd(); 1445 1446 dbg("pci_unregister_driver\n"); 1447 pci_unregister_driver(&cpqhpc_driver); 1448 cpqhp_shutdown_debugfs(); 1449 } 1450 1451 module_init(cpqhpc_init); 1452 module_exit(cpqhpc_cleanup); 1453