1 /* 2 * Compaq Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> 6 * Copyright (C) 2001 IBM Corp. 7 * 8 * All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 18 * NON INFRINGEMENT. See the GNU General Public License for more 19 * details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Send feedback to <greg@kroah.com> 26 * 27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support, 28 * Torben Mathiasen <torben.mathiasen@hp.com> 29 * 30 */ 31 32 #include <linux/module.h> 33 #include <linux/moduleparam.h> 34 #include <linux/kernel.h> 35 #include <linux/types.h> 36 #include <linux/proc_fs.h> 37 #include <linux/slab.h> 38 #include <linux/workqueue.h> 39 #include <linux/pci.h> 40 #include <linux/pci_hotplug.h> 41 #include <linux/init.h> 42 #include <linux/interrupt.h> 43 44 #include <asm/uaccess.h> 45 46 #include "cpqphp.h" 47 #include "cpqphp_nvram.h" 48 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */ 49 50 51 /* Global variables */ 52 int cpqhp_debug; 53 int cpqhp_legacy_mode; 54 struct controller *cpqhp_ctrl_list; /* = NULL */ 55 struct pci_func *cpqhp_slot_list[256]; 56 57 /* local variables */ 58 static void __iomem *smbios_table; 59 static void __iomem *smbios_start; 60 static void __iomem *cpqhp_rom_start; 61 static int power_mode; 62 static int debug; 63 static int initialized; 64 65 #define DRIVER_VERSION "0.9.8" 66 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>" 67 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver" 68 69 MODULE_AUTHOR(DRIVER_AUTHOR); 70 MODULE_DESCRIPTION(DRIVER_DESC); 71 MODULE_LICENSE("GPL"); 72 73 module_param(power_mode, bool, 0644); 74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not"); 75 76 module_param(debug, bool, 0644); 77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not"); 78 79 #define CPQHPC_MODULE_MINOR 208 80 81 static int one_time_init (void); 82 static int set_attention_status (struct hotplug_slot *slot, u8 value); 83 static int process_SI (struct hotplug_slot *slot); 84 static int process_SS (struct hotplug_slot *slot); 85 static int hardware_test (struct hotplug_slot *slot, u32 value); 86 static int get_power_status (struct hotplug_slot *slot, u8 *value); 87 static int get_attention_status (struct hotplug_slot *slot, u8 *value); 88 static int get_latch_status (struct hotplug_slot *slot, u8 *value); 89 static int get_adapter_status (struct hotplug_slot *slot, u8 *value); 90 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 91 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 92 93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = { 94 .owner = THIS_MODULE, 95 .set_attention_status = set_attention_status, 96 .enable_slot = process_SI, 97 .disable_slot = process_SS, 98 .hardware_test = hardware_test, 99 .get_power_status = get_power_status, 100 .get_attention_status = get_attention_status, 101 .get_latch_status = get_latch_status, 102 .get_adapter_status = get_adapter_status, 103 .get_max_bus_speed = get_max_bus_speed, 104 .get_cur_bus_speed = get_cur_bus_speed, 105 }; 106 107 108 static inline int is_slot64bit(struct slot *slot) 109 { 110 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0; 111 } 112 113 static inline int is_slot66mhz(struct slot *slot) 114 { 115 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0; 116 } 117 118 /** 119 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region. 120 * 121 * @begin: begin pointer for region to be scanned. 122 * @end: end pointer for region to be scanned. 123 * 124 * Returns pointer to the head of the SMBIOS tables (or NULL) 125 * 126 */ 127 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end) 128 { 129 void __iomem *fp; 130 void __iomem *endp; 131 u8 temp1, temp2, temp3, temp4; 132 int status = 0; 133 134 endp = (end - sizeof(u32) + 1); 135 136 for (fp = begin; fp <= endp; fp += 16) { 137 temp1 = readb(fp); 138 temp2 = readb(fp+1); 139 temp3 = readb(fp+2); 140 temp4 = readb(fp+3); 141 if (temp1 == '_' && 142 temp2 == 'S' && 143 temp3 == 'M' && 144 temp4 == '_') { 145 status = 1; 146 break; 147 } 148 } 149 150 if (!status) 151 fp = NULL; 152 153 dbg("Discovered SMBIOS Entry point at %p\n", fp); 154 155 return fp; 156 } 157 158 /** 159 * init_SERR - Initializes the per slot SERR generation. 160 * 161 * For unexpected switch opens 162 * 163 */ 164 static int init_SERR(struct controller * ctrl) 165 { 166 u32 tempdword; 167 u32 number_of_slots; 168 u8 physical_slot; 169 170 if (!ctrl) 171 return 1; 172 173 tempdword = ctrl->first_slot; 174 175 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 176 // Loop through slots 177 while (number_of_slots) { 178 physical_slot = tempdword; 179 writeb(0, ctrl->hpc_reg + SLOT_SERR); 180 tempdword++; 181 number_of_slots--; 182 } 183 184 return 0; 185 } 186 187 188 /* nice debugging output */ 189 static int pci_print_IRQ_route (void) 190 { 191 struct irq_routing_table *routing_table; 192 int len; 193 int loop; 194 195 u8 tbus, tdevice, tslot; 196 197 routing_table = pcibios_get_irq_routing_table(); 198 if (routing_table == NULL) { 199 err("No BIOS Routing Table??? Not good\n"); 200 return -ENOMEM; 201 } 202 203 len = (routing_table->size - sizeof(struct irq_routing_table)) / 204 sizeof(struct irq_info); 205 // Make sure I got at least one entry 206 if (len == 0) { 207 kfree(routing_table); 208 return -1; 209 } 210 211 dbg("bus dev func slot\n"); 212 213 for (loop = 0; loop < len; ++loop) { 214 tbus = routing_table->slots[loop].bus; 215 tdevice = routing_table->slots[loop].devfn; 216 tslot = routing_table->slots[loop].slot; 217 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot); 218 219 } 220 kfree(routing_table); 221 return 0; 222 } 223 224 225 /** 226 * get_subsequent_smbios_entry: get the next entry from bios table. 227 * 228 * Gets the first entry if previous == NULL 229 * Otherwise, returns the next entry 230 * Uses global SMBIOS Table pointer 231 * 232 * @curr: %NULL or pointer to previously returned structure 233 * 234 * returns a pointer to an SMBIOS structure or NULL if none found 235 */ 236 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start, 237 void __iomem *smbios_table, 238 void __iomem *curr) 239 { 240 u8 bail = 0; 241 u8 previous_byte = 1; 242 void __iomem *p_temp; 243 void __iomem *p_max; 244 245 if (!smbios_table || !curr) 246 return(NULL); 247 248 // set p_max to the end of the table 249 p_max = smbios_start + readw(smbios_table + ST_LENGTH); 250 251 p_temp = curr; 252 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH); 253 254 while ((p_temp < p_max) && !bail) { 255 /* Look for the double NULL terminator 256 * The first condition is the previous byte 257 * and the second is the curr */ 258 if (!previous_byte && !(readb(p_temp))) { 259 bail = 1; 260 } 261 262 previous_byte = readb(p_temp); 263 p_temp++; 264 } 265 266 if (p_temp < p_max) { 267 return p_temp; 268 } else { 269 return NULL; 270 } 271 } 272 273 274 /** 275 * get_SMBIOS_entry 276 * 277 * @type:SMBIOS structure type to be returned 278 * @previous: %NULL or pointer to previously returned structure 279 * 280 * Gets the first entry of the specified type if previous == NULL 281 * Otherwise, returns the next entry of the given type. 282 * Uses global SMBIOS Table pointer 283 * Uses get_subsequent_smbios_entry 284 * 285 * returns a pointer to an SMBIOS structure or %NULL if none found 286 */ 287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start, 288 void __iomem *smbios_table, 289 u8 type, 290 void __iomem *previous) 291 { 292 if (!smbios_table) 293 return NULL; 294 295 if (!previous) { 296 previous = smbios_start; 297 } else { 298 previous = get_subsequent_smbios_entry(smbios_start, 299 smbios_table, previous); 300 } 301 302 while (previous) { 303 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) { 304 previous = get_subsequent_smbios_entry(smbios_start, 305 smbios_table, previous); 306 } else { 307 break; 308 } 309 } 310 311 return previous; 312 } 313 314 static void release_slot(struct hotplug_slot *hotplug_slot) 315 { 316 struct slot *slot = hotplug_slot->private; 317 318 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 319 320 kfree(slot->hotplug_slot->info); 321 kfree(slot->hotplug_slot->name); 322 kfree(slot->hotplug_slot); 323 kfree(slot); 324 } 325 326 static int ctrl_slot_setup(struct controller *ctrl, 327 void __iomem *smbios_start, 328 void __iomem *smbios_table) 329 { 330 struct slot *slot; 331 struct hotplug_slot *hotplug_slot; 332 struct hotplug_slot_info *hotplug_slot_info; 333 u8 number_of_slots; 334 u8 slot_device; 335 u8 slot_number; 336 u8 ctrl_slot; 337 u32 tempdword; 338 void __iomem *slot_entry= NULL; 339 int result = -ENOMEM; 340 341 dbg("%s\n", __FUNCTION__); 342 343 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 344 345 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 346 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 347 slot_number = ctrl->first_slot; 348 349 while (number_of_slots) { 350 slot = kzalloc(sizeof(*slot), GFP_KERNEL); 351 if (!slot) 352 goto error; 353 354 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)), 355 GFP_KERNEL); 356 if (!slot->hotplug_slot) 357 goto error_slot; 358 hotplug_slot = slot->hotplug_slot; 359 360 hotplug_slot->info = 361 kzalloc(sizeof(*(hotplug_slot->info)), 362 GFP_KERNEL); 363 if (!hotplug_slot->info) 364 goto error_hpslot; 365 hotplug_slot_info = hotplug_slot->info; 366 hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL); 367 368 if (!hotplug_slot->name) 369 goto error_info; 370 371 slot->ctrl = ctrl; 372 slot->bus = ctrl->bus; 373 slot->device = slot_device; 374 slot->number = slot_number; 375 dbg("slot->number = %d\n", slot->number); 376 377 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 378 slot_entry); 379 380 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != 381 slot->number)) { 382 slot_entry = get_SMBIOS_entry(smbios_start, 383 smbios_table, 9, slot_entry); 384 } 385 386 slot->p_sm_slot = slot_entry; 387 388 init_timer(&slot->task_event); 389 slot->task_event.expires = jiffies + 5 * HZ; 390 slot->task_event.function = cpqhp_pushbutton_thread; 391 392 //FIXME: these capabilities aren't used but if they are 393 // they need to be correctly implemented 394 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 395 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 396 397 if (is_slot64bit(slot)) 398 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 399 if (is_slot66mhz(slot)) 400 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 401 if (ctrl->speed == PCI_SPEED_66MHz) 402 slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 403 404 ctrl_slot = 405 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 406 407 // Check presence 408 slot->capabilities |= 409 ((((~tempdword) >> 23) | 410 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 411 // Check the switch state 412 slot->capabilities |= 413 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 414 // Check the slot enable 415 slot->capabilities |= 416 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 417 418 /* register this slot with the hotplug pci core */ 419 hotplug_slot->release = &release_slot; 420 hotplug_slot->private = slot; 421 make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot); 422 hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 423 424 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot); 425 hotplug_slot_info->attention_status = 426 cpq_get_attention_status(ctrl, slot); 427 hotplug_slot_info->latch_status = 428 cpq_get_latch_status(ctrl, slot); 429 hotplug_slot_info->adapter_status = 430 get_presence_status(ctrl, slot); 431 432 dbg("registering bus %d, dev %d, number %d, " 433 "ctrl->slot_device_offset %d, slot %d\n", 434 slot->bus, slot->device, 435 slot->number, ctrl->slot_device_offset, 436 slot_number); 437 result = pci_hp_register(hotplug_slot); 438 if (result) { 439 err("pci_hp_register failed with error %d\n", result); 440 goto error_name; 441 } 442 443 slot->next = ctrl->slot; 444 ctrl->slot = slot; 445 446 number_of_slots--; 447 slot_device++; 448 slot_number++; 449 } 450 451 return 0; 452 error_name: 453 kfree(hotplug_slot->name); 454 error_info: 455 kfree(hotplug_slot_info); 456 error_hpslot: 457 kfree(hotplug_slot); 458 error_slot: 459 kfree(slot); 460 error: 461 return result; 462 } 463 464 static int ctrl_slot_cleanup (struct controller * ctrl) 465 { 466 struct slot *old_slot, *next_slot; 467 468 old_slot = ctrl->slot; 469 ctrl->slot = NULL; 470 471 while (old_slot) { 472 /* memory will be freed by the release_slot callback */ 473 next_slot = old_slot->next; 474 pci_hp_deregister (old_slot->hotplug_slot); 475 old_slot = next_slot; 476 } 477 478 cpqhp_remove_debugfs_files(ctrl); 479 480 //Free IRQ associated with hot plug device 481 free_irq(ctrl->interrupt, ctrl); 482 //Unmap the memory 483 iounmap(ctrl->hpc_reg); 484 //Finally reclaim PCI mem 485 release_mem_region(pci_resource_start(ctrl->pci_dev, 0), 486 pci_resource_len(ctrl->pci_dev, 0)); 487 488 return(0); 489 } 490 491 492 //============================================================================ 493 // function: get_slot_mapping 494 // 495 // Description: Attempts to determine a logical slot mapping for a PCI 496 // device. Won't work for more than one PCI-PCI bridge 497 // in a slot. 498 // 499 // Input: u8 bus_num - bus number of PCI device 500 // u8 dev_num - device number of PCI device 501 // u8 *slot - Pointer to u8 where slot number will 502 // be returned 503 // 504 // Output: SUCCESS or FAILURE 505 //============================================================================= 506 static int 507 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) 508 { 509 struct irq_routing_table *PCIIRQRoutingInfoLength; 510 u32 work; 511 long len; 512 long loop; 513 514 u8 tbus, tdevice, tslot, bridgeSlot; 515 516 dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot); 517 518 bridgeSlot = 0xFF; 519 520 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table(); 521 if (!PCIIRQRoutingInfoLength) 522 return -1; 523 524 len = (PCIIRQRoutingInfoLength->size - 525 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 526 // Make sure I got at least one entry 527 if (len == 0) { 528 kfree(PCIIRQRoutingInfoLength); 529 return -1; 530 } 531 532 for (loop = 0; loop < len; ++loop) { 533 tbus = PCIIRQRoutingInfoLength->slots[loop].bus; 534 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3; 535 tslot = PCIIRQRoutingInfoLength->slots[loop].slot; 536 537 if ((tbus == bus_num) && (tdevice == dev_num)) { 538 *slot = tslot; 539 kfree(PCIIRQRoutingInfoLength); 540 return 0; 541 } else { 542 /* Did not get a match on the target PCI device. Check 543 * if the current IRQ table entry is a PCI-to-PCI bridge 544 * device. If so, and it's secondary bus matches the 545 * bus number for the target device, I need to save the 546 * bridge's slot number. If I can not find an entry for 547 * the target device, I will have to assume it's on the 548 * other side of the bridge, and assign it the bridge's 549 * slot. */ 550 bus->number = tbus; 551 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), 552 PCI_REVISION_ID, &work); 553 554 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 555 pci_bus_read_config_dword(bus, 556 PCI_DEVFN(tdevice, 0), 557 PCI_PRIMARY_BUS, &work); 558 // See if bridge's secondary bus matches target bus. 559 if (((work >> 8) & 0x000000FF) == (long) bus_num) { 560 bridgeSlot = tslot; 561 } 562 } 563 } 564 565 } 566 567 // If we got here, we didn't find an entry in the IRQ mapping table 568 // for the target PCI device. If we did determine that the target 569 // device is on the other side of a PCI-to-PCI bridge, return the 570 // slot number for the bridge. 571 if (bridgeSlot != 0xFF) { 572 *slot = bridgeSlot; 573 kfree(PCIIRQRoutingInfoLength); 574 return 0; 575 } 576 kfree(PCIIRQRoutingInfoLength); 577 // Couldn't find an entry in the routing table for this PCI device 578 return -1; 579 } 580 581 582 /** 583 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off 584 * 585 */ 586 static int 587 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func, 588 u32 status) 589 { 590 u8 hp_slot; 591 592 if (func == NULL) 593 return(1); 594 595 hp_slot = func->device - ctrl->slot_device_offset; 596 597 // Wait for exclusive access to hardware 598 mutex_lock(&ctrl->crit_sect); 599 600 if (status == 1) { 601 amber_LED_on (ctrl, hp_slot); 602 } else if (status == 0) { 603 amber_LED_off (ctrl, hp_slot); 604 } else { 605 // Done with exclusive hardware access 606 mutex_unlock(&ctrl->crit_sect); 607 return(1); 608 } 609 610 set_SOGO(ctrl); 611 612 // Wait for SOBS to be unset 613 wait_for_ctrl_irq (ctrl); 614 615 // Done with exclusive hardware access 616 mutex_unlock(&ctrl->crit_sect); 617 618 return(0); 619 } 620 621 622 /** 623 * set_attention_status - Turns the Amber LED for a slot on or off 624 * 625 */ 626 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status) 627 { 628 struct pci_func *slot_func; 629 struct slot *slot = hotplug_slot->private; 630 struct controller *ctrl = slot->ctrl; 631 u8 bus; 632 u8 devfn; 633 u8 device; 634 u8 function; 635 636 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 637 638 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 639 return -ENODEV; 640 641 device = devfn >> 3; 642 function = devfn & 0x7; 643 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 644 645 slot_func = cpqhp_slot_find(bus, device, function); 646 if (!slot_func) 647 return -ENODEV; 648 649 return cpqhp_set_attention_status(ctrl, slot_func, status); 650 } 651 652 653 static int process_SI(struct hotplug_slot *hotplug_slot) 654 { 655 struct pci_func *slot_func; 656 struct slot *slot = hotplug_slot->private; 657 struct controller *ctrl = slot->ctrl; 658 u8 bus; 659 u8 devfn; 660 u8 device; 661 u8 function; 662 663 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 664 665 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 666 return -ENODEV; 667 668 device = devfn >> 3; 669 function = devfn & 0x7; 670 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 671 672 slot_func = cpqhp_slot_find(bus, device, function); 673 if (!slot_func) 674 return -ENODEV; 675 676 slot_func->bus = bus; 677 slot_func->device = device; 678 slot_func->function = function; 679 slot_func->configured = 0; 680 dbg("board_added(%p, %p)\n", slot_func, ctrl); 681 return cpqhp_process_SI(ctrl, slot_func); 682 } 683 684 685 static int process_SS(struct hotplug_slot *hotplug_slot) 686 { 687 struct pci_func *slot_func; 688 struct slot *slot = hotplug_slot->private; 689 struct controller *ctrl = slot->ctrl; 690 u8 bus; 691 u8 devfn; 692 u8 device; 693 u8 function; 694 695 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 696 697 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 698 return -ENODEV; 699 700 device = devfn >> 3; 701 function = devfn & 0x7; 702 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 703 704 slot_func = cpqhp_slot_find(bus, device, function); 705 if (!slot_func) 706 return -ENODEV; 707 708 dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl); 709 return cpqhp_process_SS(ctrl, slot_func); 710 } 711 712 713 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value) 714 { 715 struct slot *slot = hotplug_slot->private; 716 struct controller *ctrl = slot->ctrl; 717 718 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 719 720 return cpqhp_hardware_test(ctrl, value); 721 } 722 723 724 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value) 725 { 726 struct slot *slot = hotplug_slot->private; 727 struct controller *ctrl = slot->ctrl; 728 729 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 730 731 *value = get_slot_enabled(ctrl, slot); 732 return 0; 733 } 734 735 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value) 736 { 737 struct slot *slot = hotplug_slot->private; 738 struct controller *ctrl = slot->ctrl; 739 740 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 741 742 *value = cpq_get_attention_status(ctrl, slot); 743 return 0; 744 } 745 746 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value) 747 { 748 struct slot *slot = hotplug_slot->private; 749 struct controller *ctrl = slot->ctrl; 750 751 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 752 753 *value = cpq_get_latch_status(ctrl, slot); 754 755 return 0; 756 } 757 758 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value) 759 { 760 struct slot *slot = hotplug_slot->private; 761 struct controller *ctrl = slot->ctrl; 762 763 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 764 765 *value = get_presence_status(ctrl, slot); 766 767 return 0; 768 } 769 770 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 771 { 772 struct slot *slot = hotplug_slot->private; 773 struct controller *ctrl = slot->ctrl; 774 775 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 776 777 *value = ctrl->speed_capability; 778 779 return 0; 780 } 781 782 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 783 { 784 struct slot *slot = hotplug_slot->private; 785 struct controller *ctrl = slot->ctrl; 786 787 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 788 789 *value = ctrl->speed; 790 791 return 0; 792 } 793 794 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 795 { 796 u8 num_of_slots = 0; 797 u8 hp_slot = 0; 798 u8 device; 799 u8 bus_cap; 800 u16 temp_word; 801 u16 vendor_id; 802 u16 subsystem_vid; 803 u16 subsystem_deviceid; 804 u32 rc; 805 struct controller *ctrl; 806 struct pci_func *func; 807 int err; 808 809 err = pci_enable_device(pdev); 810 if (err) { 811 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n", 812 pci_name(pdev), err); 813 return err; 814 } 815 816 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery 817 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 818 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) { 819 err(msg_HPC_non_compaq_or_intel); 820 rc = -ENODEV; 821 goto err_disable_device; 822 } 823 dbg("Vendor ID: %x\n", vendor_id); 824 825 dbg("revision: %d\n", pdev->revision); 826 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) { 827 err(msg_HPC_rev_error); 828 rc = -ENODEV; 829 goto err_disable_device; 830 } 831 832 /* Check for the proper subsytem ID's 833 * Intel uses a different SSID programming model than Compaq. 834 * For Intel, each SSID bit identifies a PHP capability. 835 * Also Intel HPC's may have RID=0. 836 */ 837 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 838 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs 839 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 840 if (rc) { 841 err("%s : pci_read_config_word failed\n", __FUNCTION__); 842 goto err_disable_device; 843 } 844 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 845 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 846 err(msg_HPC_non_compaq_or_intel); 847 rc = -ENODEV; 848 goto err_disable_device; 849 } 850 851 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL); 852 if (!ctrl) { 853 err("%s : out of memory\n", __FUNCTION__); 854 rc = -ENOMEM; 855 goto err_disable_device; 856 } 857 858 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid); 859 if (rc) { 860 err("%s : pci_read_config_word failed\n", __FUNCTION__); 861 goto err_free_ctrl; 862 } 863 864 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid); 865 866 /* Set Vendor ID, so it can be accessed later from other functions */ 867 ctrl->vendor_id = vendor_id; 868 869 switch (subsystem_vid) { 870 case PCI_VENDOR_ID_COMPAQ: 871 if (pdev->revision >= 0x13) { /* CIOBX */ 872 ctrl->push_flag = 1; 873 ctrl->slot_switch_type = 1; 874 ctrl->push_button = 1; 875 ctrl->pci_config_space = 1; 876 ctrl->defeature_PHP = 1; 877 ctrl->pcix_support = 1; 878 ctrl->pcix_speed_capability = 1; 879 pci_read_config_byte(pdev, 0x41, &bus_cap); 880 if (bus_cap & 0x80) { 881 dbg("bus max supports 133MHz PCI-X\n"); 882 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX; 883 break; 884 } 885 if (bus_cap & 0x40) { 886 dbg("bus max supports 100MHz PCI-X\n"); 887 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX; 888 break; 889 } 890 if (bus_cap & 20) { 891 dbg("bus max supports 66MHz PCI-X\n"); 892 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX; 893 break; 894 } 895 if (bus_cap & 10) { 896 dbg("bus max supports 66MHz PCI\n"); 897 ctrl->speed_capability = PCI_SPEED_66MHz; 898 break; 899 } 900 901 break; 902 } 903 904 switch (subsystem_deviceid) { 905 case PCI_SUB_HPC_ID: 906 /* Original 6500/7000 implementation */ 907 ctrl->slot_switch_type = 1; 908 ctrl->speed_capability = PCI_SPEED_33MHz; 909 ctrl->push_button = 0; 910 ctrl->pci_config_space = 1; 911 ctrl->defeature_PHP = 1; 912 ctrl->pcix_support = 0; 913 ctrl->pcix_speed_capability = 0; 914 break; 915 case PCI_SUB_HPC_ID2: 916 /* First Pushbutton implementation */ 917 ctrl->push_flag = 1; 918 ctrl->slot_switch_type = 1; 919 ctrl->speed_capability = PCI_SPEED_33MHz; 920 ctrl->push_button = 1; 921 ctrl->pci_config_space = 1; 922 ctrl->defeature_PHP = 1; 923 ctrl->pcix_support = 0; 924 ctrl->pcix_speed_capability = 0; 925 break; 926 case PCI_SUB_HPC_ID_INTC: 927 /* Third party (6500/7000) */ 928 ctrl->slot_switch_type = 1; 929 ctrl->speed_capability = PCI_SPEED_33MHz; 930 ctrl->push_button = 0; 931 ctrl->pci_config_space = 1; 932 ctrl->defeature_PHP = 1; 933 ctrl->pcix_support = 0; 934 ctrl->pcix_speed_capability = 0; 935 break; 936 case PCI_SUB_HPC_ID3: 937 /* First 66 Mhz implementation */ 938 ctrl->push_flag = 1; 939 ctrl->slot_switch_type = 1; 940 ctrl->speed_capability = PCI_SPEED_66MHz; 941 ctrl->push_button = 1; 942 ctrl->pci_config_space = 1; 943 ctrl->defeature_PHP = 1; 944 ctrl->pcix_support = 0; 945 ctrl->pcix_speed_capability = 0; 946 break; 947 case PCI_SUB_HPC_ID4: 948 /* First PCI-X implementation, 100MHz */ 949 ctrl->push_flag = 1; 950 ctrl->slot_switch_type = 1; 951 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX; 952 ctrl->push_button = 1; 953 ctrl->pci_config_space = 1; 954 ctrl->defeature_PHP = 1; 955 ctrl->pcix_support = 1; 956 ctrl->pcix_speed_capability = 0; 957 break; 958 default: 959 err(msg_HPC_not_supported); 960 rc = -ENODEV; 961 goto err_free_ctrl; 962 } 963 break; 964 965 case PCI_VENDOR_ID_INTEL: 966 /* Check for speed capability (0=33, 1=66) */ 967 if (subsystem_deviceid & 0x0001) { 968 ctrl->speed_capability = PCI_SPEED_66MHz; 969 } else { 970 ctrl->speed_capability = PCI_SPEED_33MHz; 971 } 972 973 /* Check for push button */ 974 if (subsystem_deviceid & 0x0002) { 975 /* no push button */ 976 ctrl->push_button = 0; 977 } else { 978 /* push button supported */ 979 ctrl->push_button = 1; 980 } 981 982 /* Check for slot switch type (0=mechanical, 1=not mechanical) */ 983 if (subsystem_deviceid & 0x0004) { 984 /* no switch */ 985 ctrl->slot_switch_type = 0; 986 } else { 987 /* switch */ 988 ctrl->slot_switch_type = 1; 989 } 990 991 /* PHP Status (0=De-feature PHP, 1=Normal operation) */ 992 if (subsystem_deviceid & 0x0008) { 993 ctrl->defeature_PHP = 1; // PHP supported 994 } else { 995 ctrl->defeature_PHP = 0; // PHP not supported 996 } 997 998 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */ 999 if (subsystem_deviceid & 0x0010) { 1000 ctrl->alternate_base_address = 1; // supported 1001 } else { 1002 ctrl->alternate_base_address = 0; // not supported 1003 } 1004 1005 /* PCI Config Space Index (0=not supported, 1=supported) */ 1006 if (subsystem_deviceid & 0x0020) { 1007 ctrl->pci_config_space = 1; // supported 1008 } else { 1009 ctrl->pci_config_space = 0; // not supported 1010 } 1011 1012 /* PCI-X support */ 1013 if (subsystem_deviceid & 0x0080) { 1014 /* PCI-X capable */ 1015 ctrl->pcix_support = 1; 1016 /* Frequency of operation in PCI-X mode */ 1017 if (subsystem_deviceid & 0x0040) { 1018 /* 133MHz PCI-X if bit 7 is 1 */ 1019 ctrl->pcix_speed_capability = 1; 1020 } else { 1021 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */ 1022 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */ 1023 ctrl->pcix_speed_capability = 0; 1024 } 1025 } else { 1026 /* Conventional PCI */ 1027 ctrl->pcix_support = 0; 1028 ctrl->pcix_speed_capability = 0; 1029 } 1030 break; 1031 1032 default: 1033 err(msg_HPC_not_supported); 1034 rc = -ENODEV; 1035 goto err_free_ctrl; 1036 } 1037 1038 } else { 1039 err(msg_HPC_not_supported); 1040 return -ENODEV; 1041 } 1042 1043 // Tell the user that we found one. 1044 info("Initializing the PCI hot plug controller residing on PCI bus %d\n", 1045 pdev->bus->number); 1046 1047 dbg("Hotplug controller capabilities:\n"); 1048 dbg(" speed_capability %d\n", ctrl->speed_capability); 1049 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ? 1050 "switch present" : "no switch"); 1051 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ? 1052 "PHP supported" : "PHP not supported"); 1053 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ? 1054 "supported" : "not supported"); 1055 dbg(" pci_config_space %s\n", ctrl->pci_config_space ? 1056 "supported" : "not supported"); 1057 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ? 1058 "supported" : "not supported"); 1059 dbg(" pcix_support %s\n", ctrl->pcix_support ? 1060 "supported" : "not supported"); 1061 1062 ctrl->pci_dev = pdev; 1063 pci_set_drvdata(pdev, ctrl); 1064 1065 /* make our own copy of the pci bus structure, 1066 * as we like tweaking it a lot */ 1067 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL); 1068 if (!ctrl->pci_bus) { 1069 err("out of memory\n"); 1070 rc = -ENOMEM; 1071 goto err_free_ctrl; 1072 } 1073 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus)); 1074 1075 ctrl->bus = pdev->bus->number; 1076 ctrl->rev = pdev->revision; 1077 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1078 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1079 1080 mutex_init(&ctrl->crit_sect); 1081 init_waitqueue_head(&ctrl->queue); 1082 1083 /* initialize our threads if they haven't already been started up */ 1084 rc = one_time_init(); 1085 if (rc) { 1086 goto err_free_bus; 1087 } 1088 1089 dbg("pdev = %p\n", pdev); 1090 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0)); 1091 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0)); 1092 1093 if (!request_mem_region(pci_resource_start(pdev, 0), 1094 pci_resource_len(pdev, 0), MY_NAME)) { 1095 err("cannot reserve MMIO region\n"); 1096 rc = -ENOMEM; 1097 goto err_free_bus; 1098 } 1099 1100 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0), 1101 pci_resource_len(pdev, 0)); 1102 if (!ctrl->hpc_reg) { 1103 err("cannot remap MMIO region %llx @ %llx\n", 1104 (unsigned long long)pci_resource_len(pdev, 0), 1105 (unsigned long long)pci_resource_start(pdev, 0)); 1106 rc = -ENODEV; 1107 goto err_free_mem_region; 1108 } 1109 1110 // Check for 66Mhz operation 1111 ctrl->speed = get_controller_speed(ctrl); 1112 1113 1114 /******************************************************** 1115 * 1116 * Save configuration headers for this and 1117 * subordinate PCI buses 1118 * 1119 ********************************************************/ 1120 1121 // find the physical slot number of the first hot plug slot 1122 1123 /* Get slot won't work for devices behind bridges, but 1124 * in this case it will always be called for the "base" 1125 * bus/dev/func of a slot. 1126 * CS: this is leveraging the PCIIRQ routing code from the kernel 1127 * (pci-pc.c: get_irq_routing_table) */ 1128 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number, 1129 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4), 1130 &(ctrl->first_slot)); 1131 dbg("get_slot_mapping: first_slot = %d, returned = %d\n", 1132 ctrl->first_slot, rc); 1133 if (rc) { 1134 err(msg_initialization_err, rc); 1135 goto err_iounmap; 1136 } 1137 1138 // Store PCI Config Space for all devices on this bus 1139 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK)); 1140 if (rc) { 1141 err("%s: unable to save PCI configuration data, error %d\n", 1142 __FUNCTION__, rc); 1143 goto err_iounmap; 1144 } 1145 1146 /* 1147 * Get IO, memory, and IRQ resources for new devices 1148 */ 1149 // The next line is required for cpqhp_find_available_resources 1150 ctrl->interrupt = pdev->irq; 1151 if (ctrl->interrupt < 0x10) { 1152 cpqhp_legacy_mode = 1; 1153 dbg("System seems to be configured for Full Table Mapped MPS mode\n"); 1154 } 1155 1156 ctrl->cfgspc_irq = 0; 1157 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq); 1158 1159 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start); 1160 ctrl->add_support = !rc; 1161 if (rc) { 1162 dbg("cpqhp_find_available_resources = 0x%x\n", rc); 1163 err("unable to locate PCI configuration resources for hot plug add.\n"); 1164 goto err_iounmap; 1165 } 1166 1167 /* 1168 * Finish setting up the hot plug ctrl device 1169 */ 1170 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1171 dbg("NumSlots %d \n", ctrl->slot_device_offset); 1172 1173 ctrl->next_event = 0; 1174 1175 /* Setup the slot information structures */ 1176 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table); 1177 if (rc) { 1178 err(msg_initialization_err, 6); 1179 err("%s: unable to save PCI configuration data, error %d\n", 1180 __FUNCTION__, rc); 1181 goto err_iounmap; 1182 } 1183 1184 /* Mask all general input interrupts */ 1185 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK); 1186 1187 /* set up the interrupt */ 1188 dbg("HPC interrupt = %d \n", ctrl->interrupt); 1189 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr, 1190 IRQF_SHARED, MY_NAME, ctrl)) { 1191 err("Can't get irq %d for the hotplug pci controller\n", 1192 ctrl->interrupt); 1193 rc = -ENODEV; 1194 goto err_iounmap; 1195 } 1196 1197 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */ 1198 temp_word = readw(ctrl->hpc_reg + MISC); 1199 temp_word |= 0x4006; 1200 writew(temp_word, ctrl->hpc_reg + MISC); 1201 1202 // Changed 05/05/97 to clear all interrupts at start 1203 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR); 1204 1205 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 1206 1207 writel(0x0L, ctrl->hpc_reg + INT_MASK); 1208 1209 if (!cpqhp_ctrl_list) { 1210 cpqhp_ctrl_list = ctrl; 1211 ctrl->next = NULL; 1212 } else { 1213 ctrl->next = cpqhp_ctrl_list; 1214 cpqhp_ctrl_list = ctrl; 1215 } 1216 1217 // turn off empty slots here unless command line option "ON" set 1218 // Wait for exclusive access to hardware 1219 mutex_lock(&ctrl->crit_sect); 1220 1221 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 1222 1223 // find first device number for the ctrl 1224 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1225 1226 while (num_of_slots) { 1227 dbg("num_of_slots: %d\n", num_of_slots); 1228 func = cpqhp_slot_find(ctrl->bus, device, 0); 1229 if (!func) 1230 break; 1231 1232 hp_slot = func->device - ctrl->slot_device_offset; 1233 dbg("hp_slot: %d\n", hp_slot); 1234 1235 // We have to save the presence info for these slots 1236 temp_word = ctrl->ctrl_int_comp >> 16; 1237 func->presence_save = (temp_word >> hp_slot) & 0x01; 1238 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 1239 1240 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) { 1241 func->switch_save = 0; 1242 } else { 1243 func->switch_save = 0x10; 1244 } 1245 1246 if (!power_mode) { 1247 if (!func->is_a_board) { 1248 green_LED_off(ctrl, hp_slot); 1249 slot_disable(ctrl, hp_slot); 1250 } 1251 } 1252 1253 device++; 1254 num_of_slots--; 1255 } 1256 1257 if (!power_mode) { 1258 set_SOGO(ctrl); 1259 // Wait for SOBS to be unset 1260 wait_for_ctrl_irq(ctrl); 1261 } 1262 1263 rc = init_SERR(ctrl); 1264 if (rc) { 1265 err("init_SERR failed\n"); 1266 mutex_unlock(&ctrl->crit_sect); 1267 goto err_free_irq; 1268 } 1269 1270 // Done with exclusive hardware access 1271 mutex_unlock(&ctrl->crit_sect); 1272 1273 cpqhp_create_debugfs_files(ctrl); 1274 1275 return 0; 1276 1277 err_free_irq: 1278 free_irq(ctrl->interrupt, ctrl); 1279 err_iounmap: 1280 iounmap(ctrl->hpc_reg); 1281 err_free_mem_region: 1282 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 1283 err_free_bus: 1284 kfree(ctrl->pci_bus); 1285 err_free_ctrl: 1286 kfree(ctrl); 1287 err_disable_device: 1288 pci_disable_device(pdev); 1289 return rc; 1290 } 1291 1292 1293 static int one_time_init(void) 1294 { 1295 int loop; 1296 int retval = 0; 1297 1298 if (initialized) 1299 return 0; 1300 1301 power_mode = 0; 1302 1303 retval = pci_print_IRQ_route(); 1304 if (retval) 1305 goto error; 1306 1307 dbg("Initialize + Start the notification mechanism \n"); 1308 1309 retval = cpqhp_event_start_thread(); 1310 if (retval) 1311 goto error; 1312 1313 dbg("Initialize slot lists\n"); 1314 for (loop = 0; loop < 256; loop++) { 1315 cpqhp_slot_list[loop] = NULL; 1316 } 1317 1318 // FIXME: We also need to hook the NMI handler eventually. 1319 // this also needs to be worked with Christoph 1320 // register_NMI_handler(); 1321 1322 // Map rom address 1323 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN); 1324 if (!cpqhp_rom_start) { 1325 err ("Could not ioremap memory region for ROM\n"); 1326 retval = -EIO; 1327 goto error; 1328 } 1329 1330 /* Now, map the int15 entry point if we are on compaq specific hardware */ 1331 compaq_nvram_init(cpqhp_rom_start); 1332 1333 /* Map smbios table entry point structure */ 1334 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start, 1335 cpqhp_rom_start + ROM_PHY_LEN); 1336 if (!smbios_table) { 1337 err ("Could not find the SMBIOS pointer in memory\n"); 1338 retval = -EIO; 1339 goto error_rom_start; 1340 } 1341 1342 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS), 1343 readw(smbios_table + ST_LENGTH)); 1344 if (!smbios_start) { 1345 err ("Could not ioremap memory region taken from SMBIOS values\n"); 1346 retval = -EIO; 1347 goto error_smbios_start; 1348 } 1349 1350 initialized = 1; 1351 1352 return retval; 1353 1354 error_smbios_start: 1355 iounmap(smbios_start); 1356 error_rom_start: 1357 iounmap(cpqhp_rom_start); 1358 error: 1359 return retval; 1360 } 1361 1362 1363 static void __exit unload_cpqphpd(void) 1364 { 1365 struct pci_func *next; 1366 struct pci_func *TempSlot; 1367 int loop; 1368 u32 rc; 1369 struct controller *ctrl; 1370 struct controller *tctrl; 1371 struct pci_resource *res; 1372 struct pci_resource *tres; 1373 1374 rc = compaq_nvram_store(cpqhp_rom_start); 1375 1376 ctrl = cpqhp_ctrl_list; 1377 1378 while (ctrl) { 1379 if (ctrl->hpc_reg) { 1380 u16 misc; 1381 rc = read_slot_enable (ctrl); 1382 1383 writeb(0, ctrl->hpc_reg + SLOT_SERR); 1384 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK); 1385 1386 misc = readw(ctrl->hpc_reg + MISC); 1387 misc &= 0xFFFD; 1388 writew(misc, ctrl->hpc_reg + MISC); 1389 } 1390 1391 ctrl_slot_cleanup(ctrl); 1392 1393 res = ctrl->io_head; 1394 while (res) { 1395 tres = res; 1396 res = res->next; 1397 kfree(tres); 1398 } 1399 1400 res = ctrl->mem_head; 1401 while (res) { 1402 tres = res; 1403 res = res->next; 1404 kfree(tres); 1405 } 1406 1407 res = ctrl->p_mem_head; 1408 while (res) { 1409 tres = res; 1410 res = res->next; 1411 kfree(tres); 1412 } 1413 1414 res = ctrl->bus_head; 1415 while (res) { 1416 tres = res; 1417 res = res->next; 1418 kfree(tres); 1419 } 1420 1421 kfree (ctrl->pci_bus); 1422 1423 tctrl = ctrl; 1424 ctrl = ctrl->next; 1425 kfree(tctrl); 1426 } 1427 1428 for (loop = 0; loop < 256; loop++) { 1429 next = cpqhp_slot_list[loop]; 1430 while (next != NULL) { 1431 res = next->io_head; 1432 while (res) { 1433 tres = res; 1434 res = res->next; 1435 kfree(tres); 1436 } 1437 1438 res = next->mem_head; 1439 while (res) { 1440 tres = res; 1441 res = res->next; 1442 kfree(tres); 1443 } 1444 1445 res = next->p_mem_head; 1446 while (res) { 1447 tres = res; 1448 res = res->next; 1449 kfree(tres); 1450 } 1451 1452 res = next->bus_head; 1453 while (res) { 1454 tres = res; 1455 res = res->next; 1456 kfree(tres); 1457 } 1458 1459 TempSlot = next; 1460 next = next->next; 1461 kfree(TempSlot); 1462 } 1463 } 1464 1465 // Stop the notification mechanism 1466 if (initialized) 1467 cpqhp_event_stop_thread(); 1468 1469 //unmap the rom address 1470 if (cpqhp_rom_start) 1471 iounmap(cpqhp_rom_start); 1472 if (smbios_start) 1473 iounmap(smbios_start); 1474 } 1475 1476 1477 1478 static struct pci_device_id hpcd_pci_tbl[] = { 1479 { 1480 /* handle any PCI Hotplug controller */ 1481 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00), 1482 .class_mask = ~0, 1483 1484 /* no matter who makes it */ 1485 .vendor = PCI_ANY_ID, 1486 .device = PCI_ANY_ID, 1487 .subvendor = PCI_ANY_ID, 1488 .subdevice = PCI_ANY_ID, 1489 1490 }, { /* end: all zeroes */ } 1491 }; 1492 1493 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl); 1494 1495 1496 1497 static struct pci_driver cpqhpc_driver = { 1498 .name = "compaq_pci_hotplug", 1499 .id_table = hpcd_pci_tbl, 1500 .probe = cpqhpc_probe, 1501 /* remove: cpqhpc_remove_one, */ 1502 }; 1503 1504 1505 1506 static int __init cpqhpc_init(void) 1507 { 1508 int result; 1509 1510 cpqhp_debug = debug; 1511 1512 info (DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1513 cpqhp_initialize_debugfs(); 1514 result = pci_register_driver(&cpqhpc_driver); 1515 dbg("pci_register_driver = %d\n", result); 1516 return result; 1517 } 1518 1519 1520 static void __exit cpqhpc_cleanup(void) 1521 { 1522 dbg("unload_cpqphpd()\n"); 1523 unload_cpqphpd(); 1524 1525 dbg("pci_unregister_driver\n"); 1526 pci_unregister_driver(&cpqhpc_driver); 1527 cpqhp_shutdown_debugfs(); 1528 } 1529 1530 1531 module_init(cpqhpc_init); 1532 module_exit(cpqhpc_cleanup); 1533 1534 1535