1 /* 2 * Compaq Hot Plug Controller Driver 3 * 4 * Copyright (C) 1995,2001 Compaq Computer Corporation 5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com> 6 * Copyright (C) 2001 IBM Corp. 7 * 8 * All rights reserved. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or (at 13 * your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 18 * NON INFRINGEMENT. See the GNU General Public License for more 19 * details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Send feedback to <greg@kroah.com> 26 * 27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support, 28 * Torben Mathiasen <torben.mathiasen@hp.com> 29 * 30 */ 31 32 #include <linux/config.h> 33 #include <linux/module.h> 34 #include <linux/moduleparam.h> 35 #include <linux/kernel.h> 36 #include <linux/types.h> 37 #include <linux/proc_fs.h> 38 #include <linux/slab.h> 39 #include <linux/workqueue.h> 40 #include <linux/pci.h> 41 #include <linux/init.h> 42 #include <linux/interrupt.h> 43 44 #include <asm/uaccess.h> 45 46 #include "cpqphp.h" 47 #include "cpqphp_nvram.h" 48 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */ 49 50 51 /* Global variables */ 52 int cpqhp_debug; 53 int cpqhp_legacy_mode; 54 struct controller *cpqhp_ctrl_list; /* = NULL */ 55 struct pci_func *cpqhp_slot_list[256]; 56 57 /* local variables */ 58 static void __iomem *smbios_table; 59 static void __iomem *smbios_start; 60 static void __iomem *cpqhp_rom_start; 61 static int power_mode; 62 static int debug; 63 static int initialized; 64 65 #define DRIVER_VERSION "0.9.8" 66 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>" 67 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver" 68 69 MODULE_AUTHOR(DRIVER_AUTHOR); 70 MODULE_DESCRIPTION(DRIVER_DESC); 71 MODULE_LICENSE("GPL"); 72 73 module_param(power_mode, bool, 0644); 74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not"); 75 76 module_param(debug, bool, 0644); 77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not"); 78 79 #define CPQHPC_MODULE_MINOR 208 80 81 static int one_time_init (void); 82 static int set_attention_status (struct hotplug_slot *slot, u8 value); 83 static int process_SI (struct hotplug_slot *slot); 84 static int process_SS (struct hotplug_slot *slot); 85 static int hardware_test (struct hotplug_slot *slot, u32 value); 86 static int get_power_status (struct hotplug_slot *slot, u8 *value); 87 static int get_attention_status (struct hotplug_slot *slot, u8 *value); 88 static int get_latch_status (struct hotplug_slot *slot, u8 *value); 89 static int get_adapter_status (struct hotplug_slot *slot, u8 *value); 90 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 91 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 92 93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = { 94 .owner = THIS_MODULE, 95 .set_attention_status = set_attention_status, 96 .enable_slot = process_SI, 97 .disable_slot = process_SS, 98 .hardware_test = hardware_test, 99 .get_power_status = get_power_status, 100 .get_attention_status = get_attention_status, 101 .get_latch_status = get_latch_status, 102 .get_adapter_status = get_adapter_status, 103 .get_max_bus_speed = get_max_bus_speed, 104 .get_cur_bus_speed = get_cur_bus_speed, 105 }; 106 107 108 static inline int is_slot64bit(struct slot *slot) 109 { 110 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0; 111 } 112 113 static inline int is_slot66mhz(struct slot *slot) 114 { 115 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0; 116 } 117 118 /** 119 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region. 120 * 121 * @begin: begin pointer for region to be scanned. 122 * @end: end pointer for region to be scanned. 123 * 124 * Returns pointer to the head of the SMBIOS tables (or NULL) 125 * 126 */ 127 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end) 128 { 129 void __iomem *fp; 130 void __iomem *endp; 131 u8 temp1, temp2, temp3, temp4; 132 int status = 0; 133 134 endp = (end - sizeof(u32) + 1); 135 136 for (fp = begin; fp <= endp; fp += 16) { 137 temp1 = readb(fp); 138 temp2 = readb(fp+1); 139 temp3 = readb(fp+2); 140 temp4 = readb(fp+3); 141 if (temp1 == '_' && 142 temp2 == 'S' && 143 temp3 == 'M' && 144 temp4 == '_') { 145 status = 1; 146 break; 147 } 148 } 149 150 if (!status) 151 fp = NULL; 152 153 dbg("Discovered SMBIOS Entry point at %p\n", fp); 154 155 return fp; 156 } 157 158 /** 159 * init_SERR - Initializes the per slot SERR generation. 160 * 161 * For unexpected switch opens 162 * 163 */ 164 static int init_SERR(struct controller * ctrl) 165 { 166 u32 tempdword; 167 u32 number_of_slots; 168 u8 physical_slot; 169 170 if (!ctrl) 171 return 1; 172 173 tempdword = ctrl->first_slot; 174 175 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 176 // Loop through slots 177 while (number_of_slots) { 178 physical_slot = tempdword; 179 writeb(0, ctrl->hpc_reg + SLOT_SERR); 180 tempdword++; 181 number_of_slots--; 182 } 183 184 return 0; 185 } 186 187 188 /* nice debugging output */ 189 static int pci_print_IRQ_route (void) 190 { 191 struct irq_routing_table *routing_table; 192 int len; 193 int loop; 194 195 u8 tbus, tdevice, tslot; 196 197 routing_table = pcibios_get_irq_routing_table(); 198 if (routing_table == NULL) { 199 err("No BIOS Routing Table??? Not good\n"); 200 return -ENOMEM; 201 } 202 203 len = (routing_table->size - sizeof(struct irq_routing_table)) / 204 sizeof(struct irq_info); 205 // Make sure I got at least one entry 206 if (len == 0) { 207 kfree(routing_table); 208 return -1; 209 } 210 211 dbg("bus dev func slot\n"); 212 213 for (loop = 0; loop < len; ++loop) { 214 tbus = routing_table->slots[loop].bus; 215 tdevice = routing_table->slots[loop].devfn; 216 tslot = routing_table->slots[loop].slot; 217 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot); 218 219 } 220 kfree(routing_table); 221 return 0; 222 } 223 224 225 /** 226 * get_subsequent_smbios_entry: get the next entry from bios table. 227 * 228 * Gets the first entry if previous == NULL 229 * Otherwise, returns the next entry 230 * Uses global SMBIOS Table pointer 231 * 232 * @curr: %NULL or pointer to previously returned structure 233 * 234 * returns a pointer to an SMBIOS structure or NULL if none found 235 */ 236 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start, 237 void __iomem *smbios_table, 238 void __iomem *curr) 239 { 240 u8 bail = 0; 241 u8 previous_byte = 1; 242 void __iomem *p_temp; 243 void __iomem *p_max; 244 245 if (!smbios_table || !curr) 246 return(NULL); 247 248 // set p_max to the end of the table 249 p_max = smbios_start + readw(smbios_table + ST_LENGTH); 250 251 p_temp = curr; 252 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH); 253 254 while ((p_temp < p_max) && !bail) { 255 /* Look for the double NULL terminator 256 * The first condition is the previous byte 257 * and the second is the curr */ 258 if (!previous_byte && !(readb(p_temp))) { 259 bail = 1; 260 } 261 262 previous_byte = readb(p_temp); 263 p_temp++; 264 } 265 266 if (p_temp < p_max) { 267 return p_temp; 268 } else { 269 return NULL; 270 } 271 } 272 273 274 /** 275 * get_SMBIOS_entry 276 * 277 * @type:SMBIOS structure type to be returned 278 * @previous: %NULL or pointer to previously returned structure 279 * 280 * Gets the first entry of the specified type if previous == NULL 281 * Otherwise, returns the next entry of the given type. 282 * Uses global SMBIOS Table pointer 283 * Uses get_subsequent_smbios_entry 284 * 285 * returns a pointer to an SMBIOS structure or %NULL if none found 286 */ 287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start, 288 void __iomem *smbios_table, 289 u8 type, 290 void __iomem *previous) 291 { 292 if (!smbios_table) 293 return NULL; 294 295 if (!previous) { 296 previous = smbios_start; 297 } else { 298 previous = get_subsequent_smbios_entry(smbios_start, 299 smbios_table, previous); 300 } 301 302 while (previous) { 303 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) { 304 previous = get_subsequent_smbios_entry(smbios_start, 305 smbios_table, previous); 306 } else { 307 break; 308 } 309 } 310 311 return previous; 312 } 313 314 static void release_slot(struct hotplug_slot *hotplug_slot) 315 { 316 struct slot *slot = hotplug_slot->private; 317 318 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 319 320 kfree(slot->hotplug_slot->info); 321 kfree(slot->hotplug_slot->name); 322 kfree(slot->hotplug_slot); 323 kfree(slot); 324 } 325 326 static int ctrl_slot_setup(struct controller *ctrl, 327 void __iomem *smbios_start, 328 void __iomem *smbios_table) 329 { 330 struct slot *slot; 331 struct hotplug_slot *hotplug_slot; 332 struct hotplug_slot_info *hotplug_slot_info; 333 u8 number_of_slots; 334 u8 slot_device; 335 u8 slot_number; 336 u8 ctrl_slot; 337 u32 tempdword; 338 void __iomem *slot_entry= NULL; 339 int result = -ENOMEM; 340 341 dbg("%s\n", __FUNCTION__); 342 343 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 344 345 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 346 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 347 slot_number = ctrl->first_slot; 348 349 while (number_of_slots) { 350 slot = kmalloc(sizeof(*slot), GFP_KERNEL); 351 if (!slot) 352 goto error; 353 354 memset(slot, 0, sizeof(struct slot)); 355 slot->hotplug_slot = kmalloc(sizeof(*(slot->hotplug_slot)), 356 GFP_KERNEL); 357 if (!slot->hotplug_slot) 358 goto error_slot; 359 hotplug_slot = slot->hotplug_slot; 360 memset(hotplug_slot, 0, sizeof(struct hotplug_slot)); 361 362 hotplug_slot->info = 363 kmalloc(sizeof(*(hotplug_slot->info)), 364 GFP_KERNEL); 365 if (!hotplug_slot->info) 366 goto error_hpslot; 367 hotplug_slot_info = hotplug_slot->info; 368 memset(hotplug_slot_info, 0, 369 sizeof(struct hotplug_slot_info)); 370 hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL); 371 372 if (!hotplug_slot->name) 373 goto error_info; 374 375 slot->ctrl = ctrl; 376 slot->bus = ctrl->bus; 377 slot->device = slot_device; 378 slot->number = slot_number; 379 dbg("slot->number = %d\n", slot->number); 380 381 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 382 slot_entry); 383 384 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != 385 slot->number)) { 386 slot_entry = get_SMBIOS_entry(smbios_start, 387 smbios_table, 9, slot_entry); 388 } 389 390 slot->p_sm_slot = slot_entry; 391 392 init_timer(&slot->task_event); 393 slot->task_event.expires = jiffies + 5 * HZ; 394 slot->task_event.function = cpqhp_pushbutton_thread; 395 396 //FIXME: these capabilities aren't used but if they are 397 // they need to be correctly implemented 398 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 399 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 400 401 if (is_slot64bit(slot)) 402 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 403 if (is_slot66mhz(slot)) 404 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 405 if (ctrl->speed == PCI_SPEED_66MHz) 406 slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 407 408 ctrl_slot = 409 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 410 411 // Check presence 412 slot->capabilities |= 413 ((((~tempdword) >> 23) | 414 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 415 // Check the switch state 416 slot->capabilities |= 417 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 418 // Check the slot enable 419 slot->capabilities |= 420 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 421 422 /* register this slot with the hotplug pci core */ 423 hotplug_slot->release = &release_slot; 424 hotplug_slot->private = slot; 425 make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot); 426 hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 427 428 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot); 429 hotplug_slot_info->attention_status = 430 cpq_get_attention_status(ctrl, slot); 431 hotplug_slot_info->latch_status = 432 cpq_get_latch_status(ctrl, slot); 433 hotplug_slot_info->adapter_status = 434 get_presence_status(ctrl, slot); 435 436 dbg("registering bus %d, dev %d, number %d, " 437 "ctrl->slot_device_offset %d, slot %d\n", 438 slot->bus, slot->device, 439 slot->number, ctrl->slot_device_offset, 440 slot_number); 441 result = pci_hp_register(hotplug_slot); 442 if (result) { 443 err("pci_hp_register failed with error %d\n", result); 444 goto error_name; 445 } 446 447 slot->next = ctrl->slot; 448 ctrl->slot = slot; 449 450 number_of_slots--; 451 slot_device++; 452 slot_number++; 453 } 454 455 return 0; 456 error_name: 457 kfree(hotplug_slot->name); 458 error_info: 459 kfree(hotplug_slot_info); 460 error_hpslot: 461 kfree(hotplug_slot); 462 error_slot: 463 kfree(slot); 464 error: 465 return result; 466 } 467 468 static int ctrl_slot_cleanup (struct controller * ctrl) 469 { 470 struct slot *old_slot, *next_slot; 471 472 old_slot = ctrl->slot; 473 ctrl->slot = NULL; 474 475 while (old_slot) { 476 /* memory will be freed by the release_slot callback */ 477 next_slot = old_slot->next; 478 pci_hp_deregister (old_slot->hotplug_slot); 479 old_slot = next_slot; 480 } 481 482 cpqhp_remove_debugfs_files(ctrl); 483 484 //Free IRQ associated with hot plug device 485 free_irq(ctrl->interrupt, ctrl); 486 //Unmap the memory 487 iounmap(ctrl->hpc_reg); 488 //Finally reclaim PCI mem 489 release_mem_region(pci_resource_start(ctrl->pci_dev, 0), 490 pci_resource_len(ctrl->pci_dev, 0)); 491 492 return(0); 493 } 494 495 496 //============================================================================ 497 // function: get_slot_mapping 498 // 499 // Description: Attempts to determine a logical slot mapping for a PCI 500 // device. Won't work for more than one PCI-PCI bridge 501 // in a slot. 502 // 503 // Input: u8 bus_num - bus number of PCI device 504 // u8 dev_num - device number of PCI device 505 // u8 *slot - Pointer to u8 where slot number will 506 // be returned 507 // 508 // Output: SUCCESS or FAILURE 509 //============================================================================= 510 static int 511 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) 512 { 513 struct irq_routing_table *PCIIRQRoutingInfoLength; 514 u32 work; 515 long len; 516 long loop; 517 518 u8 tbus, tdevice, tslot, bridgeSlot; 519 520 dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot); 521 522 bridgeSlot = 0xFF; 523 524 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table(); 525 if (!PCIIRQRoutingInfoLength) 526 return -1; 527 528 len = (PCIIRQRoutingInfoLength->size - 529 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 530 // Make sure I got at least one entry 531 if (len == 0) { 532 kfree(PCIIRQRoutingInfoLength); 533 return -1; 534 } 535 536 for (loop = 0; loop < len; ++loop) { 537 tbus = PCIIRQRoutingInfoLength->slots[loop].bus; 538 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3; 539 tslot = PCIIRQRoutingInfoLength->slots[loop].slot; 540 541 if ((tbus == bus_num) && (tdevice == dev_num)) { 542 *slot = tslot; 543 kfree(PCIIRQRoutingInfoLength); 544 return 0; 545 } else { 546 /* Did not get a match on the target PCI device. Check 547 * if the current IRQ table entry is a PCI-to-PCI bridge 548 * device. If so, and it's secondary bus matches the 549 * bus number for the target device, I need to save the 550 * bridge's slot number. If I can not find an entry for 551 * the target device, I will have to assume it's on the 552 * other side of the bridge, and assign it the bridge's 553 * slot. */ 554 bus->number = tbus; 555 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), 556 PCI_REVISION_ID, &work); 557 558 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 559 pci_bus_read_config_dword(bus, 560 PCI_DEVFN(tdevice, 0), 561 PCI_PRIMARY_BUS, &work); 562 // See if bridge's secondary bus matches target bus. 563 if (((work >> 8) & 0x000000FF) == (long) bus_num) { 564 bridgeSlot = tslot; 565 } 566 } 567 } 568 569 } 570 571 // If we got here, we didn't find an entry in the IRQ mapping table 572 // for the target PCI device. If we did determine that the target 573 // device is on the other side of a PCI-to-PCI bridge, return the 574 // slot number for the bridge. 575 if (bridgeSlot != 0xFF) { 576 *slot = bridgeSlot; 577 kfree(PCIIRQRoutingInfoLength); 578 return 0; 579 } 580 kfree(PCIIRQRoutingInfoLength); 581 // Couldn't find an entry in the routing table for this PCI device 582 return -1; 583 } 584 585 586 /** 587 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off 588 * 589 */ 590 static int 591 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func, 592 u32 status) 593 { 594 u8 hp_slot; 595 596 if (func == NULL) 597 return(1); 598 599 hp_slot = func->device - ctrl->slot_device_offset; 600 601 // Wait for exclusive access to hardware 602 down(&ctrl->crit_sect); 603 604 if (status == 1) { 605 amber_LED_on (ctrl, hp_slot); 606 } else if (status == 0) { 607 amber_LED_off (ctrl, hp_slot); 608 } else { 609 // Done with exclusive hardware access 610 up(&ctrl->crit_sect); 611 return(1); 612 } 613 614 set_SOGO(ctrl); 615 616 // Wait for SOBS to be unset 617 wait_for_ctrl_irq (ctrl); 618 619 // Done with exclusive hardware access 620 up(&ctrl->crit_sect); 621 622 return(0); 623 } 624 625 626 /** 627 * set_attention_status - Turns the Amber LED for a slot on or off 628 * 629 */ 630 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status) 631 { 632 struct pci_func *slot_func; 633 struct slot *slot = hotplug_slot->private; 634 struct controller *ctrl = slot->ctrl; 635 u8 bus; 636 u8 devfn; 637 u8 device; 638 u8 function; 639 640 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 641 642 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 643 return -ENODEV; 644 645 device = devfn >> 3; 646 function = devfn & 0x7; 647 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 648 649 slot_func = cpqhp_slot_find(bus, device, function); 650 if (!slot_func) 651 return -ENODEV; 652 653 return cpqhp_set_attention_status(ctrl, slot_func, status); 654 } 655 656 657 static int process_SI(struct hotplug_slot *hotplug_slot) 658 { 659 struct pci_func *slot_func; 660 struct slot *slot = hotplug_slot->private; 661 struct controller *ctrl = slot->ctrl; 662 u8 bus; 663 u8 devfn; 664 u8 device; 665 u8 function; 666 667 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 668 669 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 670 return -ENODEV; 671 672 device = devfn >> 3; 673 function = devfn & 0x7; 674 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 675 676 slot_func = cpqhp_slot_find(bus, device, function); 677 if (!slot_func) 678 return -ENODEV; 679 680 slot_func->bus = bus; 681 slot_func->device = device; 682 slot_func->function = function; 683 slot_func->configured = 0; 684 dbg("board_added(%p, %p)\n", slot_func, ctrl); 685 return cpqhp_process_SI(ctrl, slot_func); 686 } 687 688 689 static int process_SS(struct hotplug_slot *hotplug_slot) 690 { 691 struct pci_func *slot_func; 692 struct slot *slot = hotplug_slot->private; 693 struct controller *ctrl = slot->ctrl; 694 u8 bus; 695 u8 devfn; 696 u8 device; 697 u8 function; 698 699 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 700 701 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) 702 return -ENODEV; 703 704 device = devfn >> 3; 705 function = devfn & 0x7; 706 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function); 707 708 slot_func = cpqhp_slot_find(bus, device, function); 709 if (!slot_func) 710 return -ENODEV; 711 712 dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl); 713 return cpqhp_process_SS(ctrl, slot_func); 714 } 715 716 717 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value) 718 { 719 struct slot *slot = hotplug_slot->private; 720 struct controller *ctrl = slot->ctrl; 721 722 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 723 724 return cpqhp_hardware_test(ctrl, value); 725 } 726 727 728 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value) 729 { 730 struct slot *slot = hotplug_slot->private; 731 struct controller *ctrl = slot->ctrl; 732 733 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 734 735 *value = get_slot_enabled(ctrl, slot); 736 return 0; 737 } 738 739 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value) 740 { 741 struct slot *slot = hotplug_slot->private; 742 struct controller *ctrl = slot->ctrl; 743 744 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 745 746 *value = cpq_get_attention_status(ctrl, slot); 747 return 0; 748 } 749 750 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value) 751 { 752 struct slot *slot = hotplug_slot->private; 753 struct controller *ctrl = slot->ctrl; 754 755 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 756 757 *value = cpq_get_latch_status(ctrl, slot); 758 759 return 0; 760 } 761 762 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value) 763 { 764 struct slot *slot = hotplug_slot->private; 765 struct controller *ctrl = slot->ctrl; 766 767 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 768 769 *value = get_presence_status(ctrl, slot); 770 771 return 0; 772 } 773 774 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 775 { 776 struct slot *slot = hotplug_slot->private; 777 struct controller *ctrl = slot->ctrl; 778 779 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 780 781 *value = ctrl->speed_capability; 782 783 return 0; 784 } 785 786 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 787 { 788 struct slot *slot = hotplug_slot->private; 789 struct controller *ctrl = slot->ctrl; 790 791 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 792 793 *value = ctrl->speed; 794 795 return 0; 796 } 797 798 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 799 { 800 u8 num_of_slots = 0; 801 u8 hp_slot = 0; 802 u8 device; 803 u8 rev; 804 u8 bus_cap; 805 u16 temp_word; 806 u16 vendor_id; 807 u16 subsystem_vid; 808 u16 subsystem_deviceid; 809 u32 rc; 810 struct controller *ctrl; 811 struct pci_func *func; 812 int err; 813 814 err = pci_enable_device(pdev); 815 if (err) { 816 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n", 817 pci_name(pdev), err); 818 return err; 819 } 820 821 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery 822 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 823 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) { 824 err(msg_HPC_non_compaq_or_intel); 825 rc = -ENODEV; 826 goto err_disable_device; 827 } 828 dbg("Vendor ID: %x\n", vendor_id); 829 830 rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 831 dbg("revision: %d\n", rev); 832 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) { 833 err(msg_HPC_rev_error); 834 rc = -ENODEV; 835 goto err_disable_device; 836 } 837 838 /* Check for the proper subsytem ID's 839 * Intel uses a different SSID programming model than Compaq. 840 * For Intel, each SSID bit identifies a PHP capability. 841 * Also Intel HPC's may have RID=0. 842 */ 843 if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 844 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs 845 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 846 if (rc) { 847 err("%s : pci_read_config_word failed\n", __FUNCTION__); 848 goto err_disable_device; 849 } 850 dbg("Subsystem Vendor ID: %x\n", subsystem_vid); 851 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) { 852 err(msg_HPC_non_compaq_or_intel); 853 rc = -ENODEV; 854 goto err_disable_device; 855 } 856 857 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL); 858 if (!ctrl) { 859 err("%s : out of memory\n", __FUNCTION__); 860 rc = -ENOMEM; 861 goto err_disable_device; 862 } 863 memset(ctrl, 0, sizeof(struct controller)); 864 865 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid); 866 if (rc) { 867 err("%s : pci_read_config_word failed\n", __FUNCTION__); 868 goto err_free_ctrl; 869 } 870 871 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid); 872 873 /* Set Vendor ID, so it can be accessed later from other functions */ 874 ctrl->vendor_id = vendor_id; 875 876 switch (subsystem_vid) { 877 case PCI_VENDOR_ID_COMPAQ: 878 if (rev >= 0x13) { /* CIOBX */ 879 ctrl->push_flag = 1; 880 ctrl->slot_switch_type = 1; 881 ctrl->push_button = 1; 882 ctrl->pci_config_space = 1; 883 ctrl->defeature_PHP = 1; 884 ctrl->pcix_support = 1; 885 ctrl->pcix_speed_capability = 1; 886 pci_read_config_byte(pdev, 0x41, &bus_cap); 887 if (bus_cap & 0x80) { 888 dbg("bus max supports 133MHz PCI-X\n"); 889 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX; 890 break; 891 } 892 if (bus_cap & 0x40) { 893 dbg("bus max supports 100MHz PCI-X\n"); 894 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX; 895 break; 896 } 897 if (bus_cap & 20) { 898 dbg("bus max supports 66MHz PCI-X\n"); 899 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX; 900 break; 901 } 902 if (bus_cap & 10) { 903 dbg("bus max supports 66MHz PCI\n"); 904 ctrl->speed_capability = PCI_SPEED_66MHz; 905 break; 906 } 907 908 break; 909 } 910 911 switch (subsystem_deviceid) { 912 case PCI_SUB_HPC_ID: 913 /* Original 6500/7000 implementation */ 914 ctrl->slot_switch_type = 1; 915 ctrl->speed_capability = PCI_SPEED_33MHz; 916 ctrl->push_button = 0; 917 ctrl->pci_config_space = 1; 918 ctrl->defeature_PHP = 1; 919 ctrl->pcix_support = 0; 920 ctrl->pcix_speed_capability = 0; 921 break; 922 case PCI_SUB_HPC_ID2: 923 /* First Pushbutton implementation */ 924 ctrl->push_flag = 1; 925 ctrl->slot_switch_type = 1; 926 ctrl->speed_capability = PCI_SPEED_33MHz; 927 ctrl->push_button = 1; 928 ctrl->pci_config_space = 1; 929 ctrl->defeature_PHP = 1; 930 ctrl->pcix_support = 0; 931 ctrl->pcix_speed_capability = 0; 932 break; 933 case PCI_SUB_HPC_ID_INTC: 934 /* Third party (6500/7000) */ 935 ctrl->slot_switch_type = 1; 936 ctrl->speed_capability = PCI_SPEED_33MHz; 937 ctrl->push_button = 0; 938 ctrl->pci_config_space = 1; 939 ctrl->defeature_PHP = 1; 940 ctrl->pcix_support = 0; 941 ctrl->pcix_speed_capability = 0; 942 break; 943 case PCI_SUB_HPC_ID3: 944 /* First 66 Mhz implementation */ 945 ctrl->push_flag = 1; 946 ctrl->slot_switch_type = 1; 947 ctrl->speed_capability = PCI_SPEED_66MHz; 948 ctrl->push_button = 1; 949 ctrl->pci_config_space = 1; 950 ctrl->defeature_PHP = 1; 951 ctrl->pcix_support = 0; 952 ctrl->pcix_speed_capability = 0; 953 break; 954 case PCI_SUB_HPC_ID4: 955 /* First PCI-X implementation, 100MHz */ 956 ctrl->push_flag = 1; 957 ctrl->slot_switch_type = 1; 958 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX; 959 ctrl->push_button = 1; 960 ctrl->pci_config_space = 1; 961 ctrl->defeature_PHP = 1; 962 ctrl->pcix_support = 1; 963 ctrl->pcix_speed_capability = 0; 964 break; 965 default: 966 err(msg_HPC_not_supported); 967 rc = -ENODEV; 968 goto err_free_ctrl; 969 } 970 break; 971 972 case PCI_VENDOR_ID_INTEL: 973 /* Check for speed capability (0=33, 1=66) */ 974 if (subsystem_deviceid & 0x0001) { 975 ctrl->speed_capability = PCI_SPEED_66MHz; 976 } else { 977 ctrl->speed_capability = PCI_SPEED_33MHz; 978 } 979 980 /* Check for push button */ 981 if (subsystem_deviceid & 0x0002) { 982 /* no push button */ 983 ctrl->push_button = 0; 984 } else { 985 /* push button supported */ 986 ctrl->push_button = 1; 987 } 988 989 /* Check for slot switch type (0=mechanical, 1=not mechanical) */ 990 if (subsystem_deviceid & 0x0004) { 991 /* no switch */ 992 ctrl->slot_switch_type = 0; 993 } else { 994 /* switch */ 995 ctrl->slot_switch_type = 1; 996 } 997 998 /* PHP Status (0=De-feature PHP, 1=Normal operation) */ 999 if (subsystem_deviceid & 0x0008) { 1000 ctrl->defeature_PHP = 1; // PHP supported 1001 } else { 1002 ctrl->defeature_PHP = 0; // PHP not supported 1003 } 1004 1005 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */ 1006 if (subsystem_deviceid & 0x0010) { 1007 ctrl->alternate_base_address = 1; // supported 1008 } else { 1009 ctrl->alternate_base_address = 0; // not supported 1010 } 1011 1012 /* PCI Config Space Index (0=not supported, 1=supported) */ 1013 if (subsystem_deviceid & 0x0020) { 1014 ctrl->pci_config_space = 1; // supported 1015 } else { 1016 ctrl->pci_config_space = 0; // not supported 1017 } 1018 1019 /* PCI-X support */ 1020 if (subsystem_deviceid & 0x0080) { 1021 /* PCI-X capable */ 1022 ctrl->pcix_support = 1; 1023 /* Frequency of operation in PCI-X mode */ 1024 if (subsystem_deviceid & 0x0040) { 1025 /* 133MHz PCI-X if bit 7 is 1 */ 1026 ctrl->pcix_speed_capability = 1; 1027 } else { 1028 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */ 1029 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */ 1030 ctrl->pcix_speed_capability = 0; 1031 } 1032 } else { 1033 /* Conventional PCI */ 1034 ctrl->pcix_support = 0; 1035 ctrl->pcix_speed_capability = 0; 1036 } 1037 break; 1038 1039 default: 1040 err(msg_HPC_not_supported); 1041 rc = -ENODEV; 1042 goto err_free_ctrl; 1043 } 1044 1045 } else { 1046 err(msg_HPC_not_supported); 1047 return -ENODEV; 1048 } 1049 1050 // Tell the user that we found one. 1051 info("Initializing the PCI hot plug controller residing on PCI bus %d\n", 1052 pdev->bus->number); 1053 1054 dbg("Hotplug controller capabilities:\n"); 1055 dbg(" speed_capability %d\n", ctrl->speed_capability); 1056 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ? 1057 "switch present" : "no switch"); 1058 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ? 1059 "PHP supported" : "PHP not supported"); 1060 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ? 1061 "supported" : "not supported"); 1062 dbg(" pci_config_space %s\n", ctrl->pci_config_space ? 1063 "supported" : "not supported"); 1064 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ? 1065 "supported" : "not supported"); 1066 dbg(" pcix_support %s\n", ctrl->pcix_support ? 1067 "supported" : "not supported"); 1068 1069 ctrl->pci_dev = pdev; 1070 pci_set_drvdata(pdev, ctrl); 1071 1072 /* make our own copy of the pci bus structure, 1073 * as we like tweaking it a lot */ 1074 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL); 1075 if (!ctrl->pci_bus) { 1076 err("out of memory\n"); 1077 rc = -ENOMEM; 1078 goto err_free_ctrl; 1079 } 1080 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus)); 1081 1082 ctrl->bus = pdev->bus->number; 1083 ctrl->rev = rev; 1084 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1085 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1086 1087 init_MUTEX(&ctrl->crit_sect); 1088 init_waitqueue_head(&ctrl->queue); 1089 1090 /* initialize our threads if they haven't already been started up */ 1091 rc = one_time_init(); 1092 if (rc) { 1093 goto err_free_bus; 1094 } 1095 1096 dbg("pdev = %p\n", pdev); 1097 dbg("pci resource start %lx\n", pci_resource_start(pdev, 0)); 1098 dbg("pci resource len %lx\n", pci_resource_len(pdev, 0)); 1099 1100 if (!request_mem_region(pci_resource_start(pdev, 0), 1101 pci_resource_len(pdev, 0), MY_NAME)) { 1102 err("cannot reserve MMIO region\n"); 1103 rc = -ENOMEM; 1104 goto err_free_bus; 1105 } 1106 1107 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0), 1108 pci_resource_len(pdev, 0)); 1109 if (!ctrl->hpc_reg) { 1110 err("cannot remap MMIO region %lx @ %lx\n", 1111 pci_resource_len(pdev, 0), 1112 pci_resource_start(pdev, 0)); 1113 rc = -ENODEV; 1114 goto err_free_mem_region; 1115 } 1116 1117 // Check for 66Mhz operation 1118 ctrl->speed = get_controller_speed(ctrl); 1119 1120 1121 /******************************************************** 1122 * 1123 * Save configuration headers for this and 1124 * subordinate PCI buses 1125 * 1126 ********************************************************/ 1127 1128 // find the physical slot number of the first hot plug slot 1129 1130 /* Get slot won't work for devices behind bridges, but 1131 * in this case it will always be called for the "base" 1132 * bus/dev/func of a slot. 1133 * CS: this is leveraging the PCIIRQ routing code from the kernel 1134 * (pci-pc.c: get_irq_routing_table) */ 1135 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number, 1136 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4), 1137 &(ctrl->first_slot)); 1138 dbg("get_slot_mapping: first_slot = %d, returned = %d\n", 1139 ctrl->first_slot, rc); 1140 if (rc) { 1141 err(msg_initialization_err, rc); 1142 goto err_iounmap; 1143 } 1144 1145 // Store PCI Config Space for all devices on this bus 1146 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK)); 1147 if (rc) { 1148 err("%s: unable to save PCI configuration data, error %d\n", 1149 __FUNCTION__, rc); 1150 goto err_iounmap; 1151 } 1152 1153 /* 1154 * Get IO, memory, and IRQ resources for new devices 1155 */ 1156 // The next line is required for cpqhp_find_available_resources 1157 ctrl->interrupt = pdev->irq; 1158 if (ctrl->interrupt < 0x10) { 1159 cpqhp_legacy_mode = 1; 1160 dbg("System seems to be configured for Full Table Mapped MPS mode\n"); 1161 } 1162 1163 ctrl->cfgspc_irq = 0; 1164 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq); 1165 1166 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start); 1167 ctrl->add_support = !rc; 1168 if (rc) { 1169 dbg("cpqhp_find_available_resources = 0x%x\n", rc); 1170 err("unable to locate PCI configuration resources for hot plug add.\n"); 1171 goto err_iounmap; 1172 } 1173 1174 /* 1175 * Finish setting up the hot plug ctrl device 1176 */ 1177 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1178 dbg("NumSlots %d \n", ctrl->slot_device_offset); 1179 1180 ctrl->next_event = 0; 1181 1182 /* Setup the slot information structures */ 1183 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table); 1184 if (rc) { 1185 err(msg_initialization_err, 6); 1186 err("%s: unable to save PCI configuration data, error %d\n", 1187 __FUNCTION__, rc); 1188 goto err_iounmap; 1189 } 1190 1191 /* Mask all general input interrupts */ 1192 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK); 1193 1194 /* set up the interrupt */ 1195 dbg("HPC interrupt = %d \n", ctrl->interrupt); 1196 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr, 1197 SA_SHIRQ, MY_NAME, ctrl)) { 1198 err("Can't get irq %d for the hotplug pci controller\n", 1199 ctrl->interrupt); 1200 rc = -ENODEV; 1201 goto err_iounmap; 1202 } 1203 1204 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */ 1205 temp_word = readw(ctrl->hpc_reg + MISC); 1206 temp_word |= 0x4006; 1207 writew(temp_word, ctrl->hpc_reg + MISC); 1208 1209 // Changed 05/05/97 to clear all interrupts at start 1210 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR); 1211 1212 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 1213 1214 writel(0x0L, ctrl->hpc_reg + INT_MASK); 1215 1216 if (!cpqhp_ctrl_list) { 1217 cpqhp_ctrl_list = ctrl; 1218 ctrl->next = NULL; 1219 } else { 1220 ctrl->next = cpqhp_ctrl_list; 1221 cpqhp_ctrl_list = ctrl; 1222 } 1223 1224 // turn off empty slots here unless command line option "ON" set 1225 // Wait for exclusive access to hardware 1226 down(&ctrl->crit_sect); 1227 1228 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 1229 1230 // find first device number for the ctrl 1231 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1232 1233 while (num_of_slots) { 1234 dbg("num_of_slots: %d\n", num_of_slots); 1235 func = cpqhp_slot_find(ctrl->bus, device, 0); 1236 if (!func) 1237 break; 1238 1239 hp_slot = func->device - ctrl->slot_device_offset; 1240 dbg("hp_slot: %d\n", hp_slot); 1241 1242 // We have to save the presence info for these slots 1243 temp_word = ctrl->ctrl_int_comp >> 16; 1244 func->presence_save = (temp_word >> hp_slot) & 0x01; 1245 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 1246 1247 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) { 1248 func->switch_save = 0; 1249 } else { 1250 func->switch_save = 0x10; 1251 } 1252 1253 if (!power_mode) { 1254 if (!func->is_a_board) { 1255 green_LED_off(ctrl, hp_slot); 1256 slot_disable(ctrl, hp_slot); 1257 } 1258 } 1259 1260 device++; 1261 num_of_slots--; 1262 } 1263 1264 if (!power_mode) { 1265 set_SOGO(ctrl); 1266 // Wait for SOBS to be unset 1267 wait_for_ctrl_irq(ctrl); 1268 } 1269 1270 rc = init_SERR(ctrl); 1271 if (rc) { 1272 err("init_SERR failed\n"); 1273 up(&ctrl->crit_sect); 1274 goto err_free_irq; 1275 } 1276 1277 // Done with exclusive hardware access 1278 up(&ctrl->crit_sect); 1279 1280 cpqhp_create_debugfs_files(ctrl); 1281 1282 return 0; 1283 1284 err_free_irq: 1285 free_irq(ctrl->interrupt, ctrl); 1286 err_iounmap: 1287 iounmap(ctrl->hpc_reg); 1288 err_free_mem_region: 1289 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 1290 err_free_bus: 1291 kfree(ctrl->pci_bus); 1292 err_free_ctrl: 1293 kfree(ctrl); 1294 err_disable_device: 1295 pci_disable_device(pdev); 1296 return rc; 1297 } 1298 1299 1300 static int one_time_init(void) 1301 { 1302 int loop; 1303 int retval = 0; 1304 1305 if (initialized) 1306 return 0; 1307 1308 power_mode = 0; 1309 1310 retval = pci_print_IRQ_route(); 1311 if (retval) 1312 goto error; 1313 1314 dbg("Initialize + Start the notification mechanism \n"); 1315 1316 retval = cpqhp_event_start_thread(); 1317 if (retval) 1318 goto error; 1319 1320 dbg("Initialize slot lists\n"); 1321 for (loop = 0; loop < 256; loop++) { 1322 cpqhp_slot_list[loop] = NULL; 1323 } 1324 1325 // FIXME: We also need to hook the NMI handler eventually. 1326 // this also needs to be worked with Christoph 1327 // register_NMI_handler(); 1328 1329 // Map rom address 1330 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN); 1331 if (!cpqhp_rom_start) { 1332 err ("Could not ioremap memory region for ROM\n"); 1333 retval = -EIO; 1334 goto error; 1335 } 1336 1337 /* Now, map the int15 entry point if we are on compaq specific hardware */ 1338 compaq_nvram_init(cpqhp_rom_start); 1339 1340 /* Map smbios table entry point structure */ 1341 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start, 1342 cpqhp_rom_start + ROM_PHY_LEN); 1343 if (!smbios_table) { 1344 err ("Could not find the SMBIOS pointer in memory\n"); 1345 retval = -EIO; 1346 goto error_rom_start; 1347 } 1348 1349 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS), 1350 readw(smbios_table + ST_LENGTH)); 1351 if (!smbios_start) { 1352 err ("Could not ioremap memory region taken from SMBIOS values\n"); 1353 retval = -EIO; 1354 goto error_smbios_start; 1355 } 1356 1357 initialized = 1; 1358 1359 return retval; 1360 1361 error_smbios_start: 1362 iounmap(smbios_start); 1363 error_rom_start: 1364 iounmap(cpqhp_rom_start); 1365 error: 1366 return retval; 1367 } 1368 1369 1370 static void __exit unload_cpqphpd(void) 1371 { 1372 struct pci_func *next; 1373 struct pci_func *TempSlot; 1374 int loop; 1375 u32 rc; 1376 struct controller *ctrl; 1377 struct controller *tctrl; 1378 struct pci_resource *res; 1379 struct pci_resource *tres; 1380 1381 rc = compaq_nvram_store(cpqhp_rom_start); 1382 1383 ctrl = cpqhp_ctrl_list; 1384 1385 while (ctrl) { 1386 if (ctrl->hpc_reg) { 1387 u16 misc; 1388 rc = read_slot_enable (ctrl); 1389 1390 writeb(0, ctrl->hpc_reg + SLOT_SERR); 1391 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK); 1392 1393 misc = readw(ctrl->hpc_reg + MISC); 1394 misc &= 0xFFFD; 1395 writew(misc, ctrl->hpc_reg + MISC); 1396 } 1397 1398 ctrl_slot_cleanup(ctrl); 1399 1400 res = ctrl->io_head; 1401 while (res) { 1402 tres = res; 1403 res = res->next; 1404 kfree(tres); 1405 } 1406 1407 res = ctrl->mem_head; 1408 while (res) { 1409 tres = res; 1410 res = res->next; 1411 kfree(tres); 1412 } 1413 1414 res = ctrl->p_mem_head; 1415 while (res) { 1416 tres = res; 1417 res = res->next; 1418 kfree(tres); 1419 } 1420 1421 res = ctrl->bus_head; 1422 while (res) { 1423 tres = res; 1424 res = res->next; 1425 kfree(tres); 1426 } 1427 1428 kfree (ctrl->pci_bus); 1429 1430 tctrl = ctrl; 1431 ctrl = ctrl->next; 1432 kfree(tctrl); 1433 } 1434 1435 for (loop = 0; loop < 256; loop++) { 1436 next = cpqhp_slot_list[loop]; 1437 while (next != NULL) { 1438 res = next->io_head; 1439 while (res) { 1440 tres = res; 1441 res = res->next; 1442 kfree(tres); 1443 } 1444 1445 res = next->mem_head; 1446 while (res) { 1447 tres = res; 1448 res = res->next; 1449 kfree(tres); 1450 } 1451 1452 res = next->p_mem_head; 1453 while (res) { 1454 tres = res; 1455 res = res->next; 1456 kfree(tres); 1457 } 1458 1459 res = next->bus_head; 1460 while (res) { 1461 tres = res; 1462 res = res->next; 1463 kfree(tres); 1464 } 1465 1466 TempSlot = next; 1467 next = next->next; 1468 kfree(TempSlot); 1469 } 1470 } 1471 1472 // Stop the notification mechanism 1473 if (initialized) 1474 cpqhp_event_stop_thread(); 1475 1476 //unmap the rom address 1477 if (cpqhp_rom_start) 1478 iounmap(cpqhp_rom_start); 1479 if (smbios_start) 1480 iounmap(smbios_start); 1481 } 1482 1483 1484 1485 static struct pci_device_id hpcd_pci_tbl[] = { 1486 { 1487 /* handle any PCI Hotplug controller */ 1488 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00), 1489 .class_mask = ~0, 1490 1491 /* no matter who makes it */ 1492 .vendor = PCI_ANY_ID, 1493 .device = PCI_ANY_ID, 1494 .subvendor = PCI_ANY_ID, 1495 .subdevice = PCI_ANY_ID, 1496 1497 }, { /* end: all zeroes */ } 1498 }; 1499 1500 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl); 1501 1502 1503 1504 static struct pci_driver cpqhpc_driver = { 1505 .name = "compaq_pci_hotplug", 1506 .id_table = hpcd_pci_tbl, 1507 .probe = cpqhpc_probe, 1508 /* remove: cpqhpc_remove_one, */ 1509 }; 1510 1511 1512 1513 static int __init cpqhpc_init(void) 1514 { 1515 int result; 1516 1517 cpqhp_debug = debug; 1518 1519 info (DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1520 cpqhp_initialize_debugfs(); 1521 result = pci_register_driver(&cpqhpc_driver); 1522 dbg("pci_register_driver = %d\n", result); 1523 return result; 1524 } 1525 1526 1527 static void __exit cpqhpc_cleanup(void) 1528 { 1529 dbg("unload_cpqphpd()\n"); 1530 unload_cpqphpd(); 1531 1532 dbg("pci_unregister_driver\n"); 1533 pci_unregister_driver(&cpqhpc_driver); 1534 cpqhp_shutdown_debugfs(); 1535 } 1536 1537 1538 module_init(cpqhpc_init); 1539 module_exit(cpqhpc_cleanup); 1540 1541 1542