1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * PCI Endpoint *Controller* (EPC) library 4 * 5 * Copyright (C) 2017 Texas Instruments 6 * Author: Kishon Vijay Abraham I <kishon@ti.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/slab.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 14 #include <linux/pci-epc.h> 15 #include <linux/pci-epf.h> 16 #include <linux/pci-ep-cfs.h> 17 18 static struct class *pci_epc_class; 19 20 static void devm_pci_epc_release(struct device *dev, void *res) 21 { 22 struct pci_epc *epc = *(struct pci_epc **)res; 23 24 pci_epc_destroy(epc); 25 } 26 27 static int devm_pci_epc_match(struct device *dev, void *res, void *match_data) 28 { 29 struct pci_epc **epc = res; 30 31 return *epc == match_data; 32 } 33 34 /** 35 * pci_epc_put() - release the PCI endpoint controller 36 * @epc: epc returned by pci_epc_get() 37 * 38 * release the refcount the caller obtained by invoking pci_epc_get() 39 */ 40 void pci_epc_put(struct pci_epc *epc) 41 { 42 if (!epc || IS_ERR(epc)) 43 return; 44 45 module_put(epc->ops->owner); 46 put_device(&epc->dev); 47 } 48 EXPORT_SYMBOL_GPL(pci_epc_put); 49 50 /** 51 * pci_epc_get() - get the PCI endpoint controller 52 * @epc_name: device name of the endpoint controller 53 * 54 * Invoke to get struct pci_epc * corresponding to the device name of the 55 * endpoint controller 56 */ 57 struct pci_epc *pci_epc_get(const char *epc_name) 58 { 59 int ret = -EINVAL; 60 struct pci_epc *epc; 61 struct device *dev; 62 struct class_dev_iter iter; 63 64 class_dev_iter_init(&iter, pci_epc_class, NULL, NULL); 65 while ((dev = class_dev_iter_next(&iter))) { 66 if (strcmp(epc_name, dev_name(dev))) 67 continue; 68 69 epc = to_pci_epc(dev); 70 if (!try_module_get(epc->ops->owner)) { 71 ret = -EINVAL; 72 goto err; 73 } 74 75 class_dev_iter_exit(&iter); 76 get_device(&epc->dev); 77 return epc; 78 } 79 80 err: 81 class_dev_iter_exit(&iter); 82 return ERR_PTR(ret); 83 } 84 EXPORT_SYMBOL_GPL(pci_epc_get); 85 86 /** 87 * pci_epc_stop() - stop the PCI link 88 * @epc: the link of the EPC device that has to be stopped 89 * 90 * Invoke to stop the PCI link 91 */ 92 void pci_epc_stop(struct pci_epc *epc) 93 { 94 unsigned long flags; 95 96 if (IS_ERR(epc) || !epc->ops->stop) 97 return; 98 99 spin_lock_irqsave(&epc->lock, flags); 100 epc->ops->stop(epc); 101 spin_unlock_irqrestore(&epc->lock, flags); 102 } 103 EXPORT_SYMBOL_GPL(pci_epc_stop); 104 105 /** 106 * pci_epc_start() - start the PCI link 107 * @epc: the link of *this* EPC device has to be started 108 * 109 * Invoke to start the PCI link 110 */ 111 int pci_epc_start(struct pci_epc *epc) 112 { 113 int ret; 114 unsigned long flags; 115 116 if (IS_ERR(epc)) 117 return -EINVAL; 118 119 if (!epc->ops->start) 120 return 0; 121 122 spin_lock_irqsave(&epc->lock, flags); 123 ret = epc->ops->start(epc); 124 spin_unlock_irqrestore(&epc->lock, flags); 125 126 return ret; 127 } 128 EXPORT_SYMBOL_GPL(pci_epc_start); 129 130 /** 131 * pci_epc_raise_irq() - interrupt the host system 132 * @epc: the EPC device which has to interrupt the host 133 * @func_no: the endpoint function number in the EPC device 134 * @type: specify the type of interrupt; legacy or MSI 135 * @interrupt_num: the MSI interrupt number 136 * 137 * Invoke to raise an MSI or legacy interrupt 138 */ 139 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, 140 enum pci_epc_irq_type type, u8 interrupt_num) 141 { 142 int ret; 143 unsigned long flags; 144 145 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 146 return -EINVAL; 147 148 if (!epc->ops->raise_irq) 149 return 0; 150 151 spin_lock_irqsave(&epc->lock, flags); 152 ret = epc->ops->raise_irq(epc, func_no, type, interrupt_num); 153 spin_unlock_irqrestore(&epc->lock, flags); 154 155 return ret; 156 } 157 EXPORT_SYMBOL_GPL(pci_epc_raise_irq); 158 159 /** 160 * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated 161 * @epc: the EPC device to which MSI interrupts was requested 162 * @func_no: the endpoint function number in the EPC device 163 * 164 * Invoke to get the number of MSI interrupts allocated by the RC 165 */ 166 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no) 167 { 168 int interrupt; 169 unsigned long flags; 170 171 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 172 return 0; 173 174 if (!epc->ops->get_msi) 175 return 0; 176 177 spin_lock_irqsave(&epc->lock, flags); 178 interrupt = epc->ops->get_msi(epc, func_no); 179 spin_unlock_irqrestore(&epc->lock, flags); 180 181 if (interrupt < 0) 182 return 0; 183 184 interrupt = 1 << interrupt; 185 186 return interrupt; 187 } 188 EXPORT_SYMBOL_GPL(pci_epc_get_msi); 189 190 /** 191 * pci_epc_set_msi() - set the number of MSI interrupt numbers required 192 * @epc: the EPC device on which MSI has to be configured 193 * @func_no: the endpoint function number in the EPC device 194 * @interrupts: number of MSI interrupts required by the EPF 195 * 196 * Invoke to set the required number of MSI interrupts. 197 */ 198 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts) 199 { 200 int ret; 201 u8 encode_int; 202 unsigned long flags; 203 204 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 205 return -EINVAL; 206 207 if (!epc->ops->set_msi) 208 return 0; 209 210 encode_int = order_base_2(interrupts); 211 212 spin_lock_irqsave(&epc->lock, flags); 213 ret = epc->ops->set_msi(epc, func_no, encode_int); 214 spin_unlock_irqrestore(&epc->lock, flags); 215 216 return ret; 217 } 218 EXPORT_SYMBOL_GPL(pci_epc_set_msi); 219 220 /** 221 * pci_epc_unmap_addr() - unmap CPU address from PCI address 222 * @epc: the EPC device on which address is allocated 223 * @func_no: the endpoint function number in the EPC device 224 * @phys_addr: physical address of the local system 225 * 226 * Invoke to unmap the CPU address from PCI address. 227 */ 228 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, 229 phys_addr_t phys_addr) 230 { 231 unsigned long flags; 232 233 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 234 return; 235 236 if (!epc->ops->unmap_addr) 237 return; 238 239 spin_lock_irqsave(&epc->lock, flags); 240 epc->ops->unmap_addr(epc, func_no, phys_addr); 241 spin_unlock_irqrestore(&epc->lock, flags); 242 } 243 EXPORT_SYMBOL_GPL(pci_epc_unmap_addr); 244 245 /** 246 * pci_epc_map_addr() - map CPU address to PCI address 247 * @epc: the EPC device on which address is allocated 248 * @func_no: the endpoint function number in the EPC device 249 * @phys_addr: physical address of the local system 250 * @pci_addr: PCI address to which the physical address should be mapped 251 * @size: the size of the allocation 252 * 253 * Invoke to map CPU address with PCI address. 254 */ 255 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, 256 phys_addr_t phys_addr, u64 pci_addr, size_t size) 257 { 258 int ret; 259 unsigned long flags; 260 261 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 262 return -EINVAL; 263 264 if (!epc->ops->map_addr) 265 return 0; 266 267 spin_lock_irqsave(&epc->lock, flags); 268 ret = epc->ops->map_addr(epc, func_no, phys_addr, pci_addr, size); 269 spin_unlock_irqrestore(&epc->lock, flags); 270 271 return ret; 272 } 273 EXPORT_SYMBOL_GPL(pci_epc_map_addr); 274 275 /** 276 * pci_epc_clear_bar() - reset the BAR 277 * @epc: the EPC device for which the BAR has to be cleared 278 * @func_no: the endpoint function number in the EPC device 279 * @epf_bar: the struct epf_bar that contains the BAR information 280 * 281 * Invoke to reset the BAR of the endpoint device. 282 */ 283 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, 284 struct pci_epf_bar *epf_bar) 285 { 286 unsigned long flags; 287 288 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || 289 (epf_bar->barno == BAR_5 && 290 epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) 291 return; 292 293 if (!epc->ops->clear_bar) 294 return; 295 296 spin_lock_irqsave(&epc->lock, flags); 297 epc->ops->clear_bar(epc, func_no, epf_bar); 298 spin_unlock_irqrestore(&epc->lock, flags); 299 } 300 EXPORT_SYMBOL_GPL(pci_epc_clear_bar); 301 302 /** 303 * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space 304 * @epc: the EPC device on which BAR has to be configured 305 * @func_no: the endpoint function number in the EPC device 306 * @epf_bar: the struct epf_bar that contains the BAR information 307 * 308 * Invoke to configure the BAR of the endpoint device. 309 */ 310 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, 311 struct pci_epf_bar *epf_bar) 312 { 313 int ret; 314 unsigned long irq_flags; 315 int flags = epf_bar->flags; 316 317 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || 318 (epf_bar->barno == BAR_5 && 319 flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || 320 (flags & PCI_BASE_ADDRESS_SPACE_IO && 321 flags & PCI_BASE_ADDRESS_IO_MASK) || 322 (upper_32_bits(epf_bar->size) && 323 !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))) 324 return -EINVAL; 325 326 if (!epc->ops->set_bar) 327 return 0; 328 329 spin_lock_irqsave(&epc->lock, irq_flags); 330 ret = epc->ops->set_bar(epc, func_no, epf_bar); 331 spin_unlock_irqrestore(&epc->lock, irq_flags); 332 333 return ret; 334 } 335 EXPORT_SYMBOL_GPL(pci_epc_set_bar); 336 337 /** 338 * pci_epc_write_header() - write standard configuration header 339 * @epc: the EPC device to which the configuration header should be written 340 * @func_no: the endpoint function number in the EPC device 341 * @header: standard configuration header fields 342 * 343 * Invoke to write the configuration header to the endpoint controller. Every 344 * endpoint controller will have a dedicated location to which the standard 345 * configuration header would be written. The callback function should write 346 * the header fields to this dedicated location. 347 */ 348 int pci_epc_write_header(struct pci_epc *epc, u8 func_no, 349 struct pci_epf_header *header) 350 { 351 int ret; 352 unsigned long flags; 353 354 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 355 return -EINVAL; 356 357 if (!epc->ops->write_header) 358 return 0; 359 360 spin_lock_irqsave(&epc->lock, flags); 361 ret = epc->ops->write_header(epc, func_no, header); 362 spin_unlock_irqrestore(&epc->lock, flags); 363 364 return ret; 365 } 366 EXPORT_SYMBOL_GPL(pci_epc_write_header); 367 368 /** 369 * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller 370 * @epc: the EPC device to which the endpoint function should be added 371 * @epf: the endpoint function to be added 372 * 373 * A PCI endpoint device can have one or more functions. In the case of PCIe, 374 * the specification allows up to 8 PCIe endpoint functions. Invoke 375 * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller. 376 */ 377 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf) 378 { 379 unsigned long flags; 380 381 if (epf->epc) 382 return -EBUSY; 383 384 if (IS_ERR(epc)) 385 return -EINVAL; 386 387 if (epf->func_no > epc->max_functions - 1) 388 return -EINVAL; 389 390 epf->epc = epc; 391 392 spin_lock_irqsave(&epc->lock, flags); 393 list_add_tail(&epf->list, &epc->pci_epf); 394 spin_unlock_irqrestore(&epc->lock, flags); 395 396 return 0; 397 } 398 EXPORT_SYMBOL_GPL(pci_epc_add_epf); 399 400 /** 401 * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller 402 * @epc: the EPC device from which the endpoint function should be removed 403 * @epf: the endpoint function to be removed 404 * 405 * Invoke to remove PCI endpoint function from the endpoint controller. 406 */ 407 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf) 408 { 409 unsigned long flags; 410 411 if (!epc || IS_ERR(epc)) 412 return; 413 414 spin_lock_irqsave(&epc->lock, flags); 415 list_del(&epf->list); 416 spin_unlock_irqrestore(&epc->lock, flags); 417 } 418 EXPORT_SYMBOL_GPL(pci_epc_remove_epf); 419 420 /** 421 * pci_epc_linkup() - Notify the EPF device that EPC device has established a 422 * connection with the Root Complex. 423 * @epc: the EPC device which has established link with the host 424 * 425 * Invoke to Notify the EPF device that the EPC device has established a 426 * connection with the Root Complex. 427 */ 428 void pci_epc_linkup(struct pci_epc *epc) 429 { 430 unsigned long flags; 431 struct pci_epf *epf; 432 433 if (!epc || IS_ERR(epc)) 434 return; 435 436 spin_lock_irqsave(&epc->lock, flags); 437 list_for_each_entry(epf, &epc->pci_epf, list) 438 pci_epf_linkup(epf); 439 spin_unlock_irqrestore(&epc->lock, flags); 440 } 441 EXPORT_SYMBOL_GPL(pci_epc_linkup); 442 443 /** 444 * pci_epc_destroy() - destroy the EPC device 445 * @epc: the EPC device that has to be destroyed 446 * 447 * Invoke to destroy the PCI EPC device 448 */ 449 void pci_epc_destroy(struct pci_epc *epc) 450 { 451 pci_ep_cfs_remove_epc_group(epc->group); 452 device_unregister(&epc->dev); 453 kfree(epc); 454 } 455 EXPORT_SYMBOL_GPL(pci_epc_destroy); 456 457 /** 458 * devm_pci_epc_destroy() - destroy the EPC device 459 * @dev: device that wants to destroy the EPC 460 * @epc: the EPC device that has to be destroyed 461 * 462 * Invoke to destroy the devres associated with this 463 * pci_epc and destroy the EPC device. 464 */ 465 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc) 466 { 467 int r; 468 469 r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match, 470 epc); 471 dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n"); 472 } 473 EXPORT_SYMBOL_GPL(devm_pci_epc_destroy); 474 475 /** 476 * __pci_epc_create() - create a new endpoint controller (EPC) device 477 * @dev: device that is creating the new EPC 478 * @ops: function pointers for performing EPC operations 479 * @owner: the owner of the module that creates the EPC device 480 * 481 * Invoke to create a new EPC device and add it to pci_epc class. 482 */ 483 struct pci_epc * 484 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 485 struct module *owner) 486 { 487 int ret; 488 struct pci_epc *epc; 489 490 if (WARN_ON(!dev)) { 491 ret = -EINVAL; 492 goto err_ret; 493 } 494 495 epc = kzalloc(sizeof(*epc), GFP_KERNEL); 496 if (!epc) { 497 ret = -ENOMEM; 498 goto err_ret; 499 } 500 501 spin_lock_init(&epc->lock); 502 INIT_LIST_HEAD(&epc->pci_epf); 503 504 device_initialize(&epc->dev); 505 epc->dev.class = pci_epc_class; 506 epc->dev.parent = dev; 507 epc->ops = ops; 508 509 ret = dev_set_name(&epc->dev, "%s", dev_name(dev)); 510 if (ret) 511 goto put_dev; 512 513 ret = device_add(&epc->dev); 514 if (ret) 515 goto put_dev; 516 517 epc->group = pci_ep_cfs_add_epc_group(dev_name(dev)); 518 519 return epc; 520 521 put_dev: 522 put_device(&epc->dev); 523 kfree(epc); 524 525 err_ret: 526 return ERR_PTR(ret); 527 } 528 EXPORT_SYMBOL_GPL(__pci_epc_create); 529 530 /** 531 * __devm_pci_epc_create() - create a new endpoint controller (EPC) device 532 * @dev: device that is creating the new EPC 533 * @ops: function pointers for performing EPC operations 534 * @owner: the owner of the module that creates the EPC device 535 * 536 * Invoke to create a new EPC device and add it to pci_epc class. 537 * While at that, it also associates the device with the pci_epc using devres. 538 * On driver detach, release function is invoked on the devres data, 539 * then, devres data is freed. 540 */ 541 struct pci_epc * 542 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 543 struct module *owner) 544 { 545 struct pci_epc **ptr, *epc; 546 547 ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL); 548 if (!ptr) 549 return ERR_PTR(-ENOMEM); 550 551 epc = __pci_epc_create(dev, ops, owner); 552 if (!IS_ERR(epc)) { 553 *ptr = epc; 554 devres_add(dev, ptr); 555 } else { 556 devres_free(ptr); 557 } 558 559 return epc; 560 } 561 EXPORT_SYMBOL_GPL(__devm_pci_epc_create); 562 563 static int __init pci_epc_init(void) 564 { 565 pci_epc_class = class_create(THIS_MODULE, "pci_epc"); 566 if (IS_ERR(pci_epc_class)) { 567 pr_err("failed to create pci epc class --> %ld\n", 568 PTR_ERR(pci_epc_class)); 569 return PTR_ERR(pci_epc_class); 570 } 571 572 return 0; 573 } 574 module_init(pci_epc_init); 575 576 static void __exit pci_epc_exit(void) 577 { 578 class_destroy(pci_epc_class); 579 } 580 module_exit(pci_epc_exit); 581 582 MODULE_DESCRIPTION("PCI EPC Library"); 583 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>"); 584 MODULE_LICENSE("GPL v2"); 585