1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * PCI Endpoint *Controller* (EPC) library 4 * 5 * Copyright (C) 2017 Texas Instruments 6 * Author: Kishon Vijay Abraham I <kishon@ti.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/slab.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 14 #include <linux/pci-epc.h> 15 #include <linux/pci-epf.h> 16 #include <linux/pci-ep-cfs.h> 17 18 static struct class *pci_epc_class; 19 20 static void devm_pci_epc_release(struct device *dev, void *res) 21 { 22 struct pci_epc *epc = *(struct pci_epc **)res; 23 24 pci_epc_destroy(epc); 25 } 26 27 static int devm_pci_epc_match(struct device *dev, void *res, void *match_data) 28 { 29 struct pci_epc **epc = res; 30 31 return *epc == match_data; 32 } 33 34 /** 35 * pci_epc_put() - release the PCI endpoint controller 36 * @epc: epc returned by pci_epc_get() 37 * 38 * release the refcount the caller obtained by invoking pci_epc_get() 39 */ 40 void pci_epc_put(struct pci_epc *epc) 41 { 42 if (!epc || IS_ERR(epc)) 43 return; 44 45 module_put(epc->ops->owner); 46 put_device(&epc->dev); 47 } 48 EXPORT_SYMBOL_GPL(pci_epc_put); 49 50 /** 51 * pci_epc_get() - get the PCI endpoint controller 52 * @epc_name: device name of the endpoint controller 53 * 54 * Invoke to get struct pci_epc * corresponding to the device name of the 55 * endpoint controller 56 */ 57 struct pci_epc *pci_epc_get(const char *epc_name) 58 { 59 int ret = -EINVAL; 60 struct pci_epc *epc; 61 struct device *dev; 62 struct class_dev_iter iter; 63 64 class_dev_iter_init(&iter, pci_epc_class, NULL, NULL); 65 while ((dev = class_dev_iter_next(&iter))) { 66 if (strcmp(epc_name, dev_name(dev))) 67 continue; 68 69 epc = to_pci_epc(dev); 70 if (!try_module_get(epc->ops->owner)) { 71 ret = -EINVAL; 72 goto err; 73 } 74 75 class_dev_iter_exit(&iter); 76 get_device(&epc->dev); 77 return epc; 78 } 79 80 err: 81 class_dev_iter_exit(&iter); 82 return ERR_PTR(ret); 83 } 84 EXPORT_SYMBOL_GPL(pci_epc_get); 85 86 /** 87 * pci_epc_stop() - stop the PCI link 88 * @epc: the link of the EPC device that has to be stopped 89 * 90 * Invoke to stop the PCI link 91 */ 92 void pci_epc_stop(struct pci_epc *epc) 93 { 94 unsigned long flags; 95 96 if (IS_ERR(epc) || !epc->ops->stop) 97 return; 98 99 spin_lock_irqsave(&epc->lock, flags); 100 epc->ops->stop(epc); 101 spin_unlock_irqrestore(&epc->lock, flags); 102 } 103 EXPORT_SYMBOL_GPL(pci_epc_stop); 104 105 /** 106 * pci_epc_start() - start the PCI link 107 * @epc: the link of *this* EPC device has to be started 108 * 109 * Invoke to start the PCI link 110 */ 111 int pci_epc_start(struct pci_epc *epc) 112 { 113 int ret; 114 unsigned long flags; 115 116 if (IS_ERR(epc)) 117 return -EINVAL; 118 119 if (!epc->ops->start) 120 return 0; 121 122 spin_lock_irqsave(&epc->lock, flags); 123 ret = epc->ops->start(epc); 124 spin_unlock_irqrestore(&epc->lock, flags); 125 126 return ret; 127 } 128 EXPORT_SYMBOL_GPL(pci_epc_start); 129 130 /** 131 * pci_epc_raise_irq() - interrupt the host system 132 * @epc: the EPC device which has to interrupt the host 133 * @func_no: the endpoint function number in the EPC device 134 * @type: specify the type of interrupt; legacy or MSI 135 * @interrupt_num: the MSI interrupt number 136 * 137 * Invoke to raise an MSI or legacy interrupt 138 */ 139 int pci_epc_raise_irq(struct pci_epc *epc, u8 func_no, 140 enum pci_epc_irq_type type, u8 interrupt_num) 141 { 142 int ret; 143 unsigned long flags; 144 145 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 146 return -EINVAL; 147 148 if (!epc->ops->raise_irq) 149 return 0; 150 151 spin_lock_irqsave(&epc->lock, flags); 152 ret = epc->ops->raise_irq(epc, func_no, type, interrupt_num); 153 spin_unlock_irqrestore(&epc->lock, flags); 154 155 return ret; 156 } 157 EXPORT_SYMBOL_GPL(pci_epc_raise_irq); 158 159 /** 160 * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated 161 * @epc: the EPC device to which MSI interrupts was requested 162 * @func_no: the endpoint function number in the EPC device 163 * 164 * Invoke to get the number of MSI interrupts allocated by the RC 165 */ 166 int pci_epc_get_msi(struct pci_epc *epc, u8 func_no) 167 { 168 int interrupt; 169 unsigned long flags; 170 171 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 172 return 0; 173 174 if (!epc->ops->get_msi) 175 return 0; 176 177 spin_lock_irqsave(&epc->lock, flags); 178 interrupt = epc->ops->get_msi(epc, func_no); 179 spin_unlock_irqrestore(&epc->lock, flags); 180 181 if (interrupt < 0) 182 return 0; 183 184 interrupt = 1 << interrupt; 185 186 return interrupt; 187 } 188 EXPORT_SYMBOL_GPL(pci_epc_get_msi); 189 190 /** 191 * pci_epc_set_msi() - set the number of MSI interrupt numbers required 192 * @epc: the EPC device on which MSI has to be configured 193 * @func_no: the endpoint function number in the EPC device 194 * @interrupts: number of MSI interrupts required by the EPF 195 * 196 * Invoke to set the required number of MSI interrupts. 197 */ 198 int pci_epc_set_msi(struct pci_epc *epc, u8 func_no, u8 interrupts) 199 { 200 int ret; 201 u8 encode_int; 202 unsigned long flags; 203 204 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 205 return -EINVAL; 206 207 if (!epc->ops->set_msi) 208 return 0; 209 210 encode_int = order_base_2(interrupts); 211 212 spin_lock_irqsave(&epc->lock, flags); 213 ret = epc->ops->set_msi(epc, func_no, encode_int); 214 spin_unlock_irqrestore(&epc->lock, flags); 215 216 return ret; 217 } 218 EXPORT_SYMBOL_GPL(pci_epc_set_msi); 219 220 /** 221 * pci_epc_get_msix() - get the number of MSI-X interrupt numbers allocated 222 * @epc: the EPC device to which MSI-X interrupts was requested 223 * @func_no: the endpoint function number in the EPC device 224 * 225 * Invoke to get the number of MSI-X interrupts allocated by the RC 226 */ 227 int pci_epc_get_msix(struct pci_epc *epc, u8 func_no) 228 { 229 int interrupt; 230 unsigned long flags; 231 232 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 233 return 0; 234 235 if (!epc->ops->get_msix) 236 return 0; 237 238 spin_lock_irqsave(&epc->lock, flags); 239 interrupt = epc->ops->get_msix(epc, func_no); 240 spin_unlock_irqrestore(&epc->lock, flags); 241 242 if (interrupt < 0) 243 return 0; 244 245 return interrupt + 1; 246 } 247 EXPORT_SYMBOL_GPL(pci_epc_get_msix); 248 249 /** 250 * pci_epc_set_msix() - set the number of MSI-X interrupt numbers required 251 * @epc: the EPC device on which MSI-X has to be configured 252 * @func_no: the endpoint function number in the EPC device 253 * @interrupts: number of MSI-X interrupts required by the EPF 254 * 255 * Invoke to set the required number of MSI-X interrupts. 256 */ 257 int pci_epc_set_msix(struct pci_epc *epc, u8 func_no, u16 interrupts) 258 { 259 int ret; 260 unsigned long flags; 261 262 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || 263 interrupts < 1 || interrupts > 2048) 264 return -EINVAL; 265 266 if (!epc->ops->set_msix) 267 return 0; 268 269 spin_lock_irqsave(&epc->lock, flags); 270 ret = epc->ops->set_msix(epc, func_no, interrupts - 1); 271 spin_unlock_irqrestore(&epc->lock, flags); 272 273 return ret; 274 } 275 EXPORT_SYMBOL_GPL(pci_epc_set_msix); 276 277 /** 278 * pci_epc_unmap_addr() - unmap CPU address from PCI address 279 * @epc: the EPC device on which address is allocated 280 * @func_no: the endpoint function number in the EPC device 281 * @phys_addr: physical address of the local system 282 * 283 * Invoke to unmap the CPU address from PCI address. 284 */ 285 void pci_epc_unmap_addr(struct pci_epc *epc, u8 func_no, 286 phys_addr_t phys_addr) 287 { 288 unsigned long flags; 289 290 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 291 return; 292 293 if (!epc->ops->unmap_addr) 294 return; 295 296 spin_lock_irqsave(&epc->lock, flags); 297 epc->ops->unmap_addr(epc, func_no, phys_addr); 298 spin_unlock_irqrestore(&epc->lock, flags); 299 } 300 EXPORT_SYMBOL_GPL(pci_epc_unmap_addr); 301 302 /** 303 * pci_epc_map_addr() - map CPU address to PCI address 304 * @epc: the EPC device on which address is allocated 305 * @func_no: the endpoint function number in the EPC device 306 * @phys_addr: physical address of the local system 307 * @pci_addr: PCI address to which the physical address should be mapped 308 * @size: the size of the allocation 309 * 310 * Invoke to map CPU address with PCI address. 311 */ 312 int pci_epc_map_addr(struct pci_epc *epc, u8 func_no, 313 phys_addr_t phys_addr, u64 pci_addr, size_t size) 314 { 315 int ret; 316 unsigned long flags; 317 318 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 319 return -EINVAL; 320 321 if (!epc->ops->map_addr) 322 return 0; 323 324 spin_lock_irqsave(&epc->lock, flags); 325 ret = epc->ops->map_addr(epc, func_no, phys_addr, pci_addr, size); 326 spin_unlock_irqrestore(&epc->lock, flags); 327 328 return ret; 329 } 330 EXPORT_SYMBOL_GPL(pci_epc_map_addr); 331 332 /** 333 * pci_epc_clear_bar() - reset the BAR 334 * @epc: the EPC device for which the BAR has to be cleared 335 * @func_no: the endpoint function number in the EPC device 336 * @epf_bar: the struct epf_bar that contains the BAR information 337 * 338 * Invoke to reset the BAR of the endpoint device. 339 */ 340 void pci_epc_clear_bar(struct pci_epc *epc, u8 func_no, 341 struct pci_epf_bar *epf_bar) 342 { 343 unsigned long flags; 344 345 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || 346 (epf_bar->barno == BAR_5 && 347 epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)) 348 return; 349 350 if (!epc->ops->clear_bar) 351 return; 352 353 spin_lock_irqsave(&epc->lock, flags); 354 epc->ops->clear_bar(epc, func_no, epf_bar); 355 spin_unlock_irqrestore(&epc->lock, flags); 356 } 357 EXPORT_SYMBOL_GPL(pci_epc_clear_bar); 358 359 /** 360 * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space 361 * @epc: the EPC device on which BAR has to be configured 362 * @func_no: the endpoint function number in the EPC device 363 * @epf_bar: the struct epf_bar that contains the BAR information 364 * 365 * Invoke to configure the BAR of the endpoint device. 366 */ 367 int pci_epc_set_bar(struct pci_epc *epc, u8 func_no, 368 struct pci_epf_bar *epf_bar) 369 { 370 int ret; 371 unsigned long irq_flags; 372 int flags = epf_bar->flags; 373 374 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions || 375 (epf_bar->barno == BAR_5 && 376 flags & PCI_BASE_ADDRESS_MEM_TYPE_64) || 377 (flags & PCI_BASE_ADDRESS_SPACE_IO && 378 flags & PCI_BASE_ADDRESS_IO_MASK) || 379 (upper_32_bits(epf_bar->size) && 380 !(flags & PCI_BASE_ADDRESS_MEM_TYPE_64))) 381 return -EINVAL; 382 383 if (!epc->ops->set_bar) 384 return 0; 385 386 spin_lock_irqsave(&epc->lock, irq_flags); 387 ret = epc->ops->set_bar(epc, func_no, epf_bar); 388 spin_unlock_irqrestore(&epc->lock, irq_flags); 389 390 return ret; 391 } 392 EXPORT_SYMBOL_GPL(pci_epc_set_bar); 393 394 /** 395 * pci_epc_write_header() - write standard configuration header 396 * @epc: the EPC device to which the configuration header should be written 397 * @func_no: the endpoint function number in the EPC device 398 * @header: standard configuration header fields 399 * 400 * Invoke to write the configuration header to the endpoint controller. Every 401 * endpoint controller will have a dedicated location to which the standard 402 * configuration header would be written. The callback function should write 403 * the header fields to this dedicated location. 404 */ 405 int pci_epc_write_header(struct pci_epc *epc, u8 func_no, 406 struct pci_epf_header *header) 407 { 408 int ret; 409 unsigned long flags; 410 411 if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) 412 return -EINVAL; 413 414 if (!epc->ops->write_header) 415 return 0; 416 417 spin_lock_irqsave(&epc->lock, flags); 418 ret = epc->ops->write_header(epc, func_no, header); 419 spin_unlock_irqrestore(&epc->lock, flags); 420 421 return ret; 422 } 423 EXPORT_SYMBOL_GPL(pci_epc_write_header); 424 425 /** 426 * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller 427 * @epc: the EPC device to which the endpoint function should be added 428 * @epf: the endpoint function to be added 429 * 430 * A PCI endpoint device can have one or more functions. In the case of PCIe, 431 * the specification allows up to 8 PCIe endpoint functions. Invoke 432 * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller. 433 */ 434 int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf) 435 { 436 unsigned long flags; 437 438 if (epf->epc) 439 return -EBUSY; 440 441 if (IS_ERR(epc)) 442 return -EINVAL; 443 444 if (epf->func_no > epc->max_functions - 1) 445 return -EINVAL; 446 447 epf->epc = epc; 448 449 spin_lock_irqsave(&epc->lock, flags); 450 list_add_tail(&epf->list, &epc->pci_epf); 451 spin_unlock_irqrestore(&epc->lock, flags); 452 453 return 0; 454 } 455 EXPORT_SYMBOL_GPL(pci_epc_add_epf); 456 457 /** 458 * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller 459 * @epc: the EPC device from which the endpoint function should be removed 460 * @epf: the endpoint function to be removed 461 * 462 * Invoke to remove PCI endpoint function from the endpoint controller. 463 */ 464 void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf) 465 { 466 unsigned long flags; 467 468 if (!epc || IS_ERR(epc)) 469 return; 470 471 spin_lock_irqsave(&epc->lock, flags); 472 list_del(&epf->list); 473 spin_unlock_irqrestore(&epc->lock, flags); 474 } 475 EXPORT_SYMBOL_GPL(pci_epc_remove_epf); 476 477 /** 478 * pci_epc_linkup() - Notify the EPF device that EPC device has established a 479 * connection with the Root Complex. 480 * @epc: the EPC device which has established link with the host 481 * 482 * Invoke to Notify the EPF device that the EPC device has established a 483 * connection with the Root Complex. 484 */ 485 void pci_epc_linkup(struct pci_epc *epc) 486 { 487 unsigned long flags; 488 struct pci_epf *epf; 489 490 if (!epc || IS_ERR(epc)) 491 return; 492 493 spin_lock_irqsave(&epc->lock, flags); 494 list_for_each_entry(epf, &epc->pci_epf, list) 495 pci_epf_linkup(epf); 496 spin_unlock_irqrestore(&epc->lock, flags); 497 } 498 EXPORT_SYMBOL_GPL(pci_epc_linkup); 499 500 /** 501 * pci_epc_destroy() - destroy the EPC device 502 * @epc: the EPC device that has to be destroyed 503 * 504 * Invoke to destroy the PCI EPC device 505 */ 506 void pci_epc_destroy(struct pci_epc *epc) 507 { 508 pci_ep_cfs_remove_epc_group(epc->group); 509 device_unregister(&epc->dev); 510 kfree(epc); 511 } 512 EXPORT_SYMBOL_GPL(pci_epc_destroy); 513 514 /** 515 * devm_pci_epc_destroy() - destroy the EPC device 516 * @dev: device that wants to destroy the EPC 517 * @epc: the EPC device that has to be destroyed 518 * 519 * Invoke to destroy the devres associated with this 520 * pci_epc and destroy the EPC device. 521 */ 522 void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc) 523 { 524 int r; 525 526 r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match, 527 epc); 528 dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n"); 529 } 530 EXPORT_SYMBOL_GPL(devm_pci_epc_destroy); 531 532 /** 533 * __pci_epc_create() - create a new endpoint controller (EPC) device 534 * @dev: device that is creating the new EPC 535 * @ops: function pointers for performing EPC operations 536 * @owner: the owner of the module that creates the EPC device 537 * 538 * Invoke to create a new EPC device and add it to pci_epc class. 539 */ 540 struct pci_epc * 541 __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 542 struct module *owner) 543 { 544 int ret; 545 struct pci_epc *epc; 546 547 if (WARN_ON(!dev)) { 548 ret = -EINVAL; 549 goto err_ret; 550 } 551 552 epc = kzalloc(sizeof(*epc), GFP_KERNEL); 553 if (!epc) { 554 ret = -ENOMEM; 555 goto err_ret; 556 } 557 558 spin_lock_init(&epc->lock); 559 INIT_LIST_HEAD(&epc->pci_epf); 560 561 device_initialize(&epc->dev); 562 epc->dev.class = pci_epc_class; 563 epc->dev.parent = dev; 564 epc->ops = ops; 565 566 ret = dev_set_name(&epc->dev, "%s", dev_name(dev)); 567 if (ret) 568 goto put_dev; 569 570 ret = device_add(&epc->dev); 571 if (ret) 572 goto put_dev; 573 574 epc->group = pci_ep_cfs_add_epc_group(dev_name(dev)); 575 576 return epc; 577 578 put_dev: 579 put_device(&epc->dev); 580 kfree(epc); 581 582 err_ret: 583 return ERR_PTR(ret); 584 } 585 EXPORT_SYMBOL_GPL(__pci_epc_create); 586 587 /** 588 * __devm_pci_epc_create() - create a new endpoint controller (EPC) device 589 * @dev: device that is creating the new EPC 590 * @ops: function pointers for performing EPC operations 591 * @owner: the owner of the module that creates the EPC device 592 * 593 * Invoke to create a new EPC device and add it to pci_epc class. 594 * While at that, it also associates the device with the pci_epc using devres. 595 * On driver detach, release function is invoked on the devres data, 596 * then, devres data is freed. 597 */ 598 struct pci_epc * 599 __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, 600 struct module *owner) 601 { 602 struct pci_epc **ptr, *epc; 603 604 ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL); 605 if (!ptr) 606 return ERR_PTR(-ENOMEM); 607 608 epc = __pci_epc_create(dev, ops, owner); 609 if (!IS_ERR(epc)) { 610 *ptr = epc; 611 devres_add(dev, ptr); 612 } else { 613 devres_free(ptr); 614 } 615 616 return epc; 617 } 618 EXPORT_SYMBOL_GPL(__devm_pci_epc_create); 619 620 static int __init pci_epc_init(void) 621 { 622 pci_epc_class = class_create(THIS_MODULE, "pci_epc"); 623 if (IS_ERR(pci_epc_class)) { 624 pr_err("failed to create pci epc class --> %ld\n", 625 PTR_ERR(pci_epc_class)); 626 return PTR_ERR(pci_epc_class); 627 } 628 629 return 0; 630 } 631 module_init(pci_epc_init); 632 633 static void __exit pci_epc_exit(void) 634 { 635 class_destroy(pci_epc_class); 636 } 637 module_exit(pci_epc_exit); 638 639 MODULE_DESCRIPTION("PCI EPC Library"); 640 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>"); 641 MODULE_LICENSE("GPL v2"); 642