1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * Test driver to test endpoint functionality 4 * 5 * Copyright (C) 2017 Texas Instruments 6 * Author: Kishon Vijay Abraham I <kishon@ti.com> 7 */ 8 9 #include <linux/crc32.h> 10 #include <linux/delay.h> 11 #include <linux/io.h> 12 #include <linux/module.h> 13 #include <linux/slab.h> 14 #include <linux/pci_ids.h> 15 #include <linux/random.h> 16 17 #include <linux/pci-epc.h> 18 #include <linux/pci-epf.h> 19 #include <linux/pci_regs.h> 20 21 #define IRQ_TYPE_LEGACY 0 22 #define IRQ_TYPE_MSI 1 23 #define IRQ_TYPE_MSIX 2 24 25 #define COMMAND_RAISE_LEGACY_IRQ BIT(0) 26 #define COMMAND_RAISE_MSI_IRQ BIT(1) 27 #define COMMAND_RAISE_MSIX_IRQ BIT(2) 28 #define COMMAND_READ BIT(3) 29 #define COMMAND_WRITE BIT(4) 30 #define COMMAND_COPY BIT(5) 31 32 #define STATUS_READ_SUCCESS BIT(0) 33 #define STATUS_READ_FAIL BIT(1) 34 #define STATUS_WRITE_SUCCESS BIT(2) 35 #define STATUS_WRITE_FAIL BIT(3) 36 #define STATUS_COPY_SUCCESS BIT(4) 37 #define STATUS_COPY_FAIL BIT(5) 38 #define STATUS_IRQ_RAISED BIT(6) 39 #define STATUS_SRC_ADDR_INVALID BIT(7) 40 #define STATUS_DST_ADDR_INVALID BIT(8) 41 42 #define TIMER_RESOLUTION 1 43 44 static struct workqueue_struct *kpcitest_workqueue; 45 46 struct pci_epf_test { 47 void *reg[6]; 48 struct pci_epf *epf; 49 enum pci_barno test_reg_bar; 50 struct delayed_work cmd_handler; 51 const struct pci_epc_features *epc_features; 52 }; 53 54 struct pci_epf_test_reg { 55 u32 magic; 56 u32 command; 57 u32 status; 58 u64 src_addr; 59 u64 dst_addr; 60 u32 size; 61 u32 checksum; 62 u32 irq_type; 63 u32 irq_number; 64 } __packed; 65 66 static struct pci_epf_header test_header = { 67 .vendorid = PCI_ANY_ID, 68 .deviceid = PCI_ANY_ID, 69 .baseclass_code = PCI_CLASS_OTHERS, 70 .interrupt_pin = PCI_INTERRUPT_INTA, 71 }; 72 73 static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 }; 74 75 static int pci_epf_test_copy(struct pci_epf_test *epf_test) 76 { 77 int ret; 78 void __iomem *src_addr; 79 void __iomem *dst_addr; 80 phys_addr_t src_phys_addr; 81 phys_addr_t dst_phys_addr; 82 struct pci_epf *epf = epf_test->epf; 83 struct device *dev = &epf->dev; 84 struct pci_epc *epc = epf->epc; 85 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 86 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; 87 88 src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size); 89 if (!src_addr) { 90 dev_err(dev, "Failed to allocate source address\n"); 91 reg->status = STATUS_SRC_ADDR_INVALID; 92 ret = -ENOMEM; 93 goto err; 94 } 95 96 ret = pci_epc_map_addr(epc, epf->func_no, src_phys_addr, reg->src_addr, 97 reg->size); 98 if (ret) { 99 dev_err(dev, "Failed to map source address\n"); 100 reg->status = STATUS_SRC_ADDR_INVALID; 101 goto err_src_addr; 102 } 103 104 dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size); 105 if (!dst_addr) { 106 dev_err(dev, "Failed to allocate destination address\n"); 107 reg->status = STATUS_DST_ADDR_INVALID; 108 ret = -ENOMEM; 109 goto err_src_map_addr; 110 } 111 112 ret = pci_epc_map_addr(epc, epf->func_no, dst_phys_addr, reg->dst_addr, 113 reg->size); 114 if (ret) { 115 dev_err(dev, "Failed to map destination address\n"); 116 reg->status = STATUS_DST_ADDR_INVALID; 117 goto err_dst_addr; 118 } 119 120 memcpy(dst_addr, src_addr, reg->size); 121 122 pci_epc_unmap_addr(epc, epf->func_no, dst_phys_addr); 123 124 err_dst_addr: 125 pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size); 126 127 err_src_map_addr: 128 pci_epc_unmap_addr(epc, epf->func_no, src_phys_addr); 129 130 err_src_addr: 131 pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size); 132 133 err: 134 return ret; 135 } 136 137 static int pci_epf_test_read(struct pci_epf_test *epf_test) 138 { 139 int ret; 140 void __iomem *src_addr; 141 void *buf; 142 u32 crc32; 143 phys_addr_t phys_addr; 144 struct pci_epf *epf = epf_test->epf; 145 struct device *dev = &epf->dev; 146 struct pci_epc *epc = epf->epc; 147 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 148 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; 149 150 src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size); 151 if (!src_addr) { 152 dev_err(dev, "Failed to allocate address\n"); 153 reg->status = STATUS_SRC_ADDR_INVALID; 154 ret = -ENOMEM; 155 goto err; 156 } 157 158 ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->src_addr, 159 reg->size); 160 if (ret) { 161 dev_err(dev, "Failed to map address\n"); 162 reg->status = STATUS_SRC_ADDR_INVALID; 163 goto err_addr; 164 } 165 166 buf = kzalloc(reg->size, GFP_KERNEL); 167 if (!buf) { 168 ret = -ENOMEM; 169 goto err_map_addr; 170 } 171 172 memcpy_fromio(buf, src_addr, reg->size); 173 174 crc32 = crc32_le(~0, buf, reg->size); 175 if (crc32 != reg->checksum) 176 ret = -EIO; 177 178 kfree(buf); 179 180 err_map_addr: 181 pci_epc_unmap_addr(epc, epf->func_no, phys_addr); 182 183 err_addr: 184 pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size); 185 186 err: 187 return ret; 188 } 189 190 static int pci_epf_test_write(struct pci_epf_test *epf_test) 191 { 192 int ret; 193 void __iomem *dst_addr; 194 void *buf; 195 phys_addr_t phys_addr; 196 struct pci_epf *epf = epf_test->epf; 197 struct device *dev = &epf->dev; 198 struct pci_epc *epc = epf->epc; 199 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 200 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; 201 202 dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size); 203 if (!dst_addr) { 204 dev_err(dev, "Failed to allocate address\n"); 205 reg->status = STATUS_DST_ADDR_INVALID; 206 ret = -ENOMEM; 207 goto err; 208 } 209 210 ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->dst_addr, 211 reg->size); 212 if (ret) { 213 dev_err(dev, "Failed to map address\n"); 214 reg->status = STATUS_DST_ADDR_INVALID; 215 goto err_addr; 216 } 217 218 buf = kzalloc(reg->size, GFP_KERNEL); 219 if (!buf) { 220 ret = -ENOMEM; 221 goto err_map_addr; 222 } 223 224 get_random_bytes(buf, reg->size); 225 reg->checksum = crc32_le(~0, buf, reg->size); 226 227 memcpy_toio(dst_addr, buf, reg->size); 228 229 /* 230 * wait 1ms inorder for the write to complete. Without this delay L3 231 * error in observed in the host system. 232 */ 233 usleep_range(1000, 2000); 234 235 kfree(buf); 236 237 err_map_addr: 238 pci_epc_unmap_addr(epc, epf->func_no, phys_addr); 239 240 err_addr: 241 pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size); 242 243 err: 244 return ret; 245 } 246 247 static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq_type, 248 u16 irq) 249 { 250 struct pci_epf *epf = epf_test->epf; 251 struct device *dev = &epf->dev; 252 struct pci_epc *epc = epf->epc; 253 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 254 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; 255 256 reg->status |= STATUS_IRQ_RAISED; 257 258 switch (irq_type) { 259 case IRQ_TYPE_LEGACY: 260 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0); 261 break; 262 case IRQ_TYPE_MSI: 263 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq); 264 break; 265 case IRQ_TYPE_MSIX: 266 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSIX, irq); 267 break; 268 default: 269 dev_err(dev, "Failed to raise IRQ, unknown type\n"); 270 break; 271 } 272 } 273 274 static void pci_epf_test_cmd_handler(struct work_struct *work) 275 { 276 int ret; 277 int count; 278 u32 command; 279 struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test, 280 cmd_handler.work); 281 struct pci_epf *epf = epf_test->epf; 282 struct device *dev = &epf->dev; 283 struct pci_epc *epc = epf->epc; 284 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 285 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar]; 286 287 command = reg->command; 288 if (!command) 289 goto reset_handler; 290 291 reg->command = 0; 292 reg->status = 0; 293 294 if (reg->irq_type > IRQ_TYPE_MSIX) { 295 dev_err(dev, "Failed to detect IRQ type\n"); 296 goto reset_handler; 297 } 298 299 if (command & COMMAND_RAISE_LEGACY_IRQ) { 300 reg->status = STATUS_IRQ_RAISED; 301 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0); 302 goto reset_handler; 303 } 304 305 if (command & COMMAND_WRITE) { 306 ret = pci_epf_test_write(epf_test); 307 if (ret) 308 reg->status |= STATUS_WRITE_FAIL; 309 else 310 reg->status |= STATUS_WRITE_SUCCESS; 311 pci_epf_test_raise_irq(epf_test, reg->irq_type, 312 reg->irq_number); 313 goto reset_handler; 314 } 315 316 if (command & COMMAND_READ) { 317 ret = pci_epf_test_read(epf_test); 318 if (!ret) 319 reg->status |= STATUS_READ_SUCCESS; 320 else 321 reg->status |= STATUS_READ_FAIL; 322 pci_epf_test_raise_irq(epf_test, reg->irq_type, 323 reg->irq_number); 324 goto reset_handler; 325 } 326 327 if (command & COMMAND_COPY) { 328 ret = pci_epf_test_copy(epf_test); 329 if (!ret) 330 reg->status |= STATUS_COPY_SUCCESS; 331 else 332 reg->status |= STATUS_COPY_FAIL; 333 pci_epf_test_raise_irq(epf_test, reg->irq_type, 334 reg->irq_number); 335 goto reset_handler; 336 } 337 338 if (command & COMMAND_RAISE_MSI_IRQ) { 339 count = pci_epc_get_msi(epc, epf->func_no); 340 if (reg->irq_number > count || count <= 0) 341 goto reset_handler; 342 reg->status = STATUS_IRQ_RAISED; 343 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, 344 reg->irq_number); 345 goto reset_handler; 346 } 347 348 if (command & COMMAND_RAISE_MSIX_IRQ) { 349 count = pci_epc_get_msix(epc, epf->func_no); 350 if (reg->irq_number > count || count <= 0) 351 goto reset_handler; 352 reg->status = STATUS_IRQ_RAISED; 353 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSIX, 354 reg->irq_number); 355 goto reset_handler; 356 } 357 358 reset_handler: 359 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler, 360 msecs_to_jiffies(1)); 361 } 362 363 static void pci_epf_test_linkup(struct pci_epf *epf) 364 { 365 struct pci_epf_test *epf_test = epf_get_drvdata(epf); 366 367 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler, 368 msecs_to_jiffies(1)); 369 } 370 371 static void pci_epf_test_unbind(struct pci_epf *epf) 372 { 373 struct pci_epf_test *epf_test = epf_get_drvdata(epf); 374 struct pci_epc *epc = epf->epc; 375 struct pci_epf_bar *epf_bar; 376 int bar; 377 378 cancel_delayed_work(&epf_test->cmd_handler); 379 pci_epc_stop(epc); 380 for (bar = BAR_0; bar <= BAR_5; bar++) { 381 epf_bar = &epf->bar[bar]; 382 383 if (epf_test->reg[bar]) { 384 pci_epf_free_space(epf, epf_test->reg[bar], bar); 385 pci_epc_clear_bar(epc, epf->func_no, epf_bar); 386 } 387 } 388 } 389 390 static int pci_epf_test_set_bar(struct pci_epf *epf) 391 { 392 int bar; 393 int ret; 394 struct pci_epf_bar *epf_bar; 395 struct pci_epc *epc = epf->epc; 396 struct device *dev = &epf->dev; 397 struct pci_epf_test *epf_test = epf_get_drvdata(epf); 398 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 399 const struct pci_epc_features *epc_features; 400 401 epc_features = epf_test->epc_features; 402 403 for (bar = BAR_0; bar <= BAR_5; bar++) { 404 epf_bar = &epf->bar[bar]; 405 406 if (!!(epc_features->reserved_bar & (1 << bar))) 407 continue; 408 409 ret = pci_epc_set_bar(epc, epf->func_no, epf_bar); 410 if (ret) { 411 pci_epf_free_space(epf, epf_test->reg[bar], bar); 412 dev_err(dev, "Failed to set BAR%d\n", bar); 413 if (bar == test_reg_bar) 414 return ret; 415 } 416 /* 417 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 418 * if the specific implementation required a 64-bit BAR, 419 * even if we only requested a 32-bit BAR. 420 */ 421 if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) 422 bar++; 423 } 424 425 return 0; 426 } 427 428 static int pci_epf_test_alloc_space(struct pci_epf *epf) 429 { 430 struct pci_epf_test *epf_test = epf_get_drvdata(epf); 431 struct device *dev = &epf->dev; 432 struct pci_epf_bar *epf_bar; 433 void *base; 434 int bar; 435 enum pci_barno test_reg_bar = epf_test->test_reg_bar; 436 const struct pci_epc_features *epc_features; 437 438 epc_features = epf_test->epc_features; 439 440 base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg), 441 test_reg_bar); 442 if (!base) { 443 dev_err(dev, "Failed to allocated register space\n"); 444 return -ENOMEM; 445 } 446 epf_test->reg[test_reg_bar] = base; 447 448 for (bar = BAR_0; bar <= BAR_5; bar++) { 449 epf_bar = &epf->bar[bar]; 450 if (bar == test_reg_bar) 451 continue; 452 453 if (!!(epc_features->reserved_bar & (1 << bar))) 454 continue; 455 456 base = pci_epf_alloc_space(epf, bar_size[bar], bar); 457 if (!base) 458 dev_err(dev, "Failed to allocate space for BAR%d\n", 459 bar); 460 epf_test->reg[bar] = base; 461 if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) 462 bar++; 463 } 464 465 return 0; 466 } 467 468 static void pci_epf_configure_bar(struct pci_epf *epf, 469 const struct pci_epc_features *epc_features) 470 { 471 struct pci_epf_bar *epf_bar; 472 bool bar_fixed_64bit; 473 int i; 474 475 for (i = BAR_0; i <= BAR_5; i++) { 476 epf_bar = &epf->bar[i]; 477 bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 << i)); 478 if (bar_fixed_64bit) 479 epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64; 480 if (epc_features->bar_fixed_size[i]) 481 bar_size[i] = epc_features->bar_fixed_size[i]; 482 } 483 } 484 485 static int pci_epf_test_bind(struct pci_epf *epf) 486 { 487 int ret; 488 struct pci_epf_test *epf_test = epf_get_drvdata(epf); 489 struct pci_epf_header *header = epf->header; 490 const struct pci_epc_features *epc_features; 491 enum pci_barno test_reg_bar = BAR_0; 492 struct pci_epc *epc = epf->epc; 493 struct device *dev = &epf->dev; 494 bool linkup_notifier = false; 495 bool msix_capable = false; 496 bool msi_capable = true; 497 498 if (WARN_ON_ONCE(!epc)) 499 return -EINVAL; 500 501 epc_features = pci_epc_get_features(epc, epf->func_no); 502 if (epc_features) { 503 linkup_notifier = epc_features->linkup_notifier; 504 msix_capable = epc_features->msix_capable; 505 msi_capable = epc_features->msi_capable; 506 test_reg_bar = pci_epc_get_first_free_bar(epc_features); 507 pci_epf_configure_bar(epf, epc_features); 508 } 509 510 epf_test->test_reg_bar = test_reg_bar; 511 epf_test->epc_features = epc_features; 512 513 ret = pci_epc_write_header(epc, epf->func_no, header); 514 if (ret) { 515 dev_err(dev, "Configuration header write failed\n"); 516 return ret; 517 } 518 519 ret = pci_epf_test_alloc_space(epf); 520 if (ret) 521 return ret; 522 523 ret = pci_epf_test_set_bar(epf); 524 if (ret) 525 return ret; 526 527 if (msi_capable) { 528 ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts); 529 if (ret) { 530 dev_err(dev, "MSI configuration failed\n"); 531 return ret; 532 } 533 } 534 535 if (msix_capable) { 536 ret = pci_epc_set_msix(epc, epf->func_no, epf->msix_interrupts); 537 if (ret) { 538 dev_err(dev, "MSI-X configuration failed\n"); 539 return ret; 540 } 541 } 542 543 if (!linkup_notifier) 544 queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work); 545 546 return 0; 547 } 548 549 static const struct pci_epf_device_id pci_epf_test_ids[] = { 550 { 551 .name = "pci_epf_test", 552 }, 553 {}, 554 }; 555 556 static int pci_epf_test_probe(struct pci_epf *epf) 557 { 558 struct pci_epf_test *epf_test; 559 struct device *dev = &epf->dev; 560 561 epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL); 562 if (!epf_test) 563 return -ENOMEM; 564 565 epf->header = &test_header; 566 epf_test->epf = epf; 567 568 INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler); 569 570 epf_set_drvdata(epf, epf_test); 571 return 0; 572 } 573 574 static struct pci_epf_ops ops = { 575 .unbind = pci_epf_test_unbind, 576 .bind = pci_epf_test_bind, 577 .linkup = pci_epf_test_linkup, 578 }; 579 580 static struct pci_epf_driver test_driver = { 581 .driver.name = "pci_epf_test", 582 .probe = pci_epf_test_probe, 583 .id_table = pci_epf_test_ids, 584 .ops = &ops, 585 .owner = THIS_MODULE, 586 }; 587 588 static int __init pci_epf_test_init(void) 589 { 590 int ret; 591 592 kpcitest_workqueue = alloc_workqueue("kpcitest", 593 WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); 594 ret = pci_epf_register_driver(&test_driver); 595 if (ret) { 596 pr_err("Failed to register pci epf test driver --> %d\n", ret); 597 return ret; 598 } 599 600 return 0; 601 } 602 module_init(pci_epf_test_init); 603 604 static void __exit pci_epf_test_exit(void) 605 { 606 pci_epf_unregister_driver(&test_driver); 607 } 608 module_exit(pci_epf_test_exit); 609 610 MODULE_DESCRIPTION("PCI EPF TEST DRIVER"); 611 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>"); 612 MODULE_LICENSE("GPL v2"); 613