1 // SPDX-License-Identifier: GPL-2.0
2 /**
3  * Test driver to test endpoint functionality
4  *
5  * Copyright (C) 2017 Texas Instruments
6  * Author: Kishon Vijay Abraham I <kishon@ti.com>
7  */
8 
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
11 #include <linux/io.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/pci_ids.h>
15 #include <linux/random.h>
16 
17 #include <linux/pci-epc.h>
18 #include <linux/pci-epf.h>
19 #include <linux/pci_regs.h>
20 
21 #define IRQ_TYPE_LEGACY			0
22 #define IRQ_TYPE_MSI			1
23 #define IRQ_TYPE_MSIX			2
24 
25 #define COMMAND_RAISE_LEGACY_IRQ	BIT(0)
26 #define COMMAND_RAISE_MSI_IRQ		BIT(1)
27 #define COMMAND_RAISE_MSIX_IRQ		BIT(2)
28 #define COMMAND_READ			BIT(3)
29 #define COMMAND_WRITE			BIT(4)
30 #define COMMAND_COPY			BIT(5)
31 
32 #define STATUS_READ_SUCCESS		BIT(0)
33 #define STATUS_READ_FAIL		BIT(1)
34 #define STATUS_WRITE_SUCCESS		BIT(2)
35 #define STATUS_WRITE_FAIL		BIT(3)
36 #define STATUS_COPY_SUCCESS		BIT(4)
37 #define STATUS_COPY_FAIL		BIT(5)
38 #define STATUS_IRQ_RAISED		BIT(6)
39 #define STATUS_SRC_ADDR_INVALID		BIT(7)
40 #define STATUS_DST_ADDR_INVALID		BIT(8)
41 
42 #define TIMER_RESOLUTION		1
43 
44 static struct workqueue_struct *kpcitest_workqueue;
45 
46 struct pci_epf_test {
47 	void			*reg[PCI_STD_NUM_BARS];
48 	struct pci_epf		*epf;
49 	enum pci_barno		test_reg_bar;
50 	struct delayed_work	cmd_handler;
51 	const struct pci_epc_features *epc_features;
52 };
53 
54 struct pci_epf_test_reg {
55 	u32	magic;
56 	u32	command;
57 	u32	status;
58 	u64	src_addr;
59 	u64	dst_addr;
60 	u32	size;
61 	u32	checksum;
62 	u32	irq_type;
63 	u32	irq_number;
64 } __packed;
65 
66 static struct pci_epf_header test_header = {
67 	.vendorid	= PCI_ANY_ID,
68 	.deviceid	= PCI_ANY_ID,
69 	.baseclass_code = PCI_CLASS_OTHERS,
70 	.interrupt_pin	= PCI_INTERRUPT_INTA,
71 };
72 
73 static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
74 
75 static int pci_epf_test_copy(struct pci_epf_test *epf_test)
76 {
77 	int ret;
78 	void __iomem *src_addr;
79 	void __iomem *dst_addr;
80 	phys_addr_t src_phys_addr;
81 	phys_addr_t dst_phys_addr;
82 	struct pci_epf *epf = epf_test->epf;
83 	struct device *dev = &epf->dev;
84 	struct pci_epc *epc = epf->epc;
85 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
86 	struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
87 
88 	src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size);
89 	if (!src_addr) {
90 		dev_err(dev, "Failed to allocate source address\n");
91 		reg->status = STATUS_SRC_ADDR_INVALID;
92 		ret = -ENOMEM;
93 		goto err;
94 	}
95 
96 	ret = pci_epc_map_addr(epc, epf->func_no, src_phys_addr, reg->src_addr,
97 			       reg->size);
98 	if (ret) {
99 		dev_err(dev, "Failed to map source address\n");
100 		reg->status = STATUS_SRC_ADDR_INVALID;
101 		goto err_src_addr;
102 	}
103 
104 	dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size);
105 	if (!dst_addr) {
106 		dev_err(dev, "Failed to allocate destination address\n");
107 		reg->status = STATUS_DST_ADDR_INVALID;
108 		ret = -ENOMEM;
109 		goto err_src_map_addr;
110 	}
111 
112 	ret = pci_epc_map_addr(epc, epf->func_no, dst_phys_addr, reg->dst_addr,
113 			       reg->size);
114 	if (ret) {
115 		dev_err(dev, "Failed to map destination address\n");
116 		reg->status = STATUS_DST_ADDR_INVALID;
117 		goto err_dst_addr;
118 	}
119 
120 	memcpy(dst_addr, src_addr, reg->size);
121 
122 	pci_epc_unmap_addr(epc, epf->func_no, dst_phys_addr);
123 
124 err_dst_addr:
125 	pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
126 
127 err_src_map_addr:
128 	pci_epc_unmap_addr(epc, epf->func_no, src_phys_addr);
129 
130 err_src_addr:
131 	pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
132 
133 err:
134 	return ret;
135 }
136 
137 static int pci_epf_test_read(struct pci_epf_test *epf_test)
138 {
139 	int ret;
140 	void __iomem *src_addr;
141 	void *buf;
142 	u32 crc32;
143 	phys_addr_t phys_addr;
144 	struct pci_epf *epf = epf_test->epf;
145 	struct device *dev = &epf->dev;
146 	struct pci_epc *epc = epf->epc;
147 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
148 	struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
149 
150 	src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
151 	if (!src_addr) {
152 		dev_err(dev, "Failed to allocate address\n");
153 		reg->status = STATUS_SRC_ADDR_INVALID;
154 		ret = -ENOMEM;
155 		goto err;
156 	}
157 
158 	ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->src_addr,
159 			       reg->size);
160 	if (ret) {
161 		dev_err(dev, "Failed to map address\n");
162 		reg->status = STATUS_SRC_ADDR_INVALID;
163 		goto err_addr;
164 	}
165 
166 	buf = kzalloc(reg->size, GFP_KERNEL);
167 	if (!buf) {
168 		ret = -ENOMEM;
169 		goto err_map_addr;
170 	}
171 
172 	memcpy_fromio(buf, src_addr, reg->size);
173 
174 	crc32 = crc32_le(~0, buf, reg->size);
175 	if (crc32 != reg->checksum)
176 		ret = -EIO;
177 
178 	kfree(buf);
179 
180 err_map_addr:
181 	pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
182 
183 err_addr:
184 	pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
185 
186 err:
187 	return ret;
188 }
189 
190 static int pci_epf_test_write(struct pci_epf_test *epf_test)
191 {
192 	int ret;
193 	void __iomem *dst_addr;
194 	void *buf;
195 	phys_addr_t phys_addr;
196 	struct pci_epf *epf = epf_test->epf;
197 	struct device *dev = &epf->dev;
198 	struct pci_epc *epc = epf->epc;
199 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
200 	struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
201 
202 	dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
203 	if (!dst_addr) {
204 		dev_err(dev, "Failed to allocate address\n");
205 		reg->status = STATUS_DST_ADDR_INVALID;
206 		ret = -ENOMEM;
207 		goto err;
208 	}
209 
210 	ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->dst_addr,
211 			       reg->size);
212 	if (ret) {
213 		dev_err(dev, "Failed to map address\n");
214 		reg->status = STATUS_DST_ADDR_INVALID;
215 		goto err_addr;
216 	}
217 
218 	buf = kzalloc(reg->size, GFP_KERNEL);
219 	if (!buf) {
220 		ret = -ENOMEM;
221 		goto err_map_addr;
222 	}
223 
224 	get_random_bytes(buf, reg->size);
225 	reg->checksum = crc32_le(~0, buf, reg->size);
226 
227 	memcpy_toio(dst_addr, buf, reg->size);
228 
229 	/*
230 	 * wait 1ms inorder for the write to complete. Without this delay L3
231 	 * error in observed in the host system.
232 	 */
233 	usleep_range(1000, 2000);
234 
235 	kfree(buf);
236 
237 err_map_addr:
238 	pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
239 
240 err_addr:
241 	pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
242 
243 err:
244 	return ret;
245 }
246 
247 static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq_type,
248 				   u16 irq)
249 {
250 	struct pci_epf *epf = epf_test->epf;
251 	struct device *dev = &epf->dev;
252 	struct pci_epc *epc = epf->epc;
253 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
254 	struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
255 
256 	reg->status |= STATUS_IRQ_RAISED;
257 
258 	switch (irq_type) {
259 	case IRQ_TYPE_LEGACY:
260 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
261 		break;
262 	case IRQ_TYPE_MSI:
263 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
264 		break;
265 	case IRQ_TYPE_MSIX:
266 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSIX, irq);
267 		break;
268 	default:
269 		dev_err(dev, "Failed to raise IRQ, unknown type\n");
270 		break;
271 	}
272 }
273 
274 static void pci_epf_test_cmd_handler(struct work_struct *work)
275 {
276 	int ret;
277 	int count;
278 	u32 command;
279 	struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test,
280 						     cmd_handler.work);
281 	struct pci_epf *epf = epf_test->epf;
282 	struct device *dev = &epf->dev;
283 	struct pci_epc *epc = epf->epc;
284 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
285 	struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
286 
287 	command = reg->command;
288 	if (!command)
289 		goto reset_handler;
290 
291 	reg->command = 0;
292 	reg->status = 0;
293 
294 	if (reg->irq_type > IRQ_TYPE_MSIX) {
295 		dev_err(dev, "Failed to detect IRQ type\n");
296 		goto reset_handler;
297 	}
298 
299 	if (command & COMMAND_RAISE_LEGACY_IRQ) {
300 		reg->status = STATUS_IRQ_RAISED;
301 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
302 		goto reset_handler;
303 	}
304 
305 	if (command & COMMAND_WRITE) {
306 		ret = pci_epf_test_write(epf_test);
307 		if (ret)
308 			reg->status |= STATUS_WRITE_FAIL;
309 		else
310 			reg->status |= STATUS_WRITE_SUCCESS;
311 		pci_epf_test_raise_irq(epf_test, reg->irq_type,
312 				       reg->irq_number);
313 		goto reset_handler;
314 	}
315 
316 	if (command & COMMAND_READ) {
317 		ret = pci_epf_test_read(epf_test);
318 		if (!ret)
319 			reg->status |= STATUS_READ_SUCCESS;
320 		else
321 			reg->status |= STATUS_READ_FAIL;
322 		pci_epf_test_raise_irq(epf_test, reg->irq_type,
323 				       reg->irq_number);
324 		goto reset_handler;
325 	}
326 
327 	if (command & COMMAND_COPY) {
328 		ret = pci_epf_test_copy(epf_test);
329 		if (!ret)
330 			reg->status |= STATUS_COPY_SUCCESS;
331 		else
332 			reg->status |= STATUS_COPY_FAIL;
333 		pci_epf_test_raise_irq(epf_test, reg->irq_type,
334 				       reg->irq_number);
335 		goto reset_handler;
336 	}
337 
338 	if (command & COMMAND_RAISE_MSI_IRQ) {
339 		count = pci_epc_get_msi(epc, epf->func_no);
340 		if (reg->irq_number > count || count <= 0)
341 			goto reset_handler;
342 		reg->status = STATUS_IRQ_RAISED;
343 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI,
344 				  reg->irq_number);
345 		goto reset_handler;
346 	}
347 
348 	if (command & COMMAND_RAISE_MSIX_IRQ) {
349 		count = pci_epc_get_msix(epc, epf->func_no);
350 		if (reg->irq_number > count || count <= 0)
351 			goto reset_handler;
352 		reg->status = STATUS_IRQ_RAISED;
353 		pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSIX,
354 				  reg->irq_number);
355 		goto reset_handler;
356 	}
357 
358 reset_handler:
359 	queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
360 			   msecs_to_jiffies(1));
361 }
362 
363 static void pci_epf_test_linkup(struct pci_epf *epf)
364 {
365 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
366 
367 	queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
368 			   msecs_to_jiffies(1));
369 }
370 
371 static void pci_epf_test_unbind(struct pci_epf *epf)
372 {
373 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
374 	struct pci_epc *epc = epf->epc;
375 	struct pci_epf_bar *epf_bar;
376 	int bar;
377 
378 	cancel_delayed_work(&epf_test->cmd_handler);
379 	pci_epc_stop(epc);
380 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
381 		epf_bar = &epf->bar[bar];
382 
383 		if (epf_test->reg[bar]) {
384 			pci_epc_clear_bar(epc, epf->func_no, epf_bar);
385 			pci_epf_free_space(epf, epf_test->reg[bar], bar);
386 		}
387 	}
388 }
389 
390 static int pci_epf_test_set_bar(struct pci_epf *epf)
391 {
392 	int bar, add;
393 	int ret;
394 	struct pci_epf_bar *epf_bar;
395 	struct pci_epc *epc = epf->epc;
396 	struct device *dev = &epf->dev;
397 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
398 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
399 	const struct pci_epc_features *epc_features;
400 
401 	epc_features = epf_test->epc_features;
402 
403 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
404 		epf_bar = &epf->bar[bar];
405 		/*
406 		 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
407 		 * if the specific implementation required a 64-bit BAR,
408 		 * even if we only requested a 32-bit BAR.
409 		 */
410 		add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
411 
412 		if (!!(epc_features->reserved_bar & (1 << bar)))
413 			continue;
414 
415 		ret = pci_epc_set_bar(epc, epf->func_no, epf_bar);
416 		if (ret) {
417 			pci_epf_free_space(epf, epf_test->reg[bar], bar);
418 			dev_err(dev, "Failed to set BAR%d\n", bar);
419 			if (bar == test_reg_bar)
420 				return ret;
421 		}
422 	}
423 
424 	return 0;
425 }
426 
427 static int pci_epf_test_alloc_space(struct pci_epf *epf)
428 {
429 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
430 	struct device *dev = &epf->dev;
431 	struct pci_epf_bar *epf_bar;
432 	void *base;
433 	int bar, add;
434 	enum pci_barno test_reg_bar = epf_test->test_reg_bar;
435 	const struct pci_epc_features *epc_features;
436 	size_t test_reg_size;
437 
438 	epc_features = epf_test->epc_features;
439 
440 	if (epc_features->bar_fixed_size[test_reg_bar])
441 		test_reg_size = bar_size[test_reg_bar];
442 	else
443 		test_reg_size = sizeof(struct pci_epf_test_reg);
444 
445 	base = pci_epf_alloc_space(epf, test_reg_size,
446 				   test_reg_bar, epc_features->align);
447 	if (!base) {
448 		dev_err(dev, "Failed to allocated register space\n");
449 		return -ENOMEM;
450 	}
451 	epf_test->reg[test_reg_bar] = base;
452 
453 	for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
454 		epf_bar = &epf->bar[bar];
455 		add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
456 
457 		if (bar == test_reg_bar)
458 			continue;
459 
460 		if (!!(epc_features->reserved_bar & (1 << bar)))
461 			continue;
462 
463 		base = pci_epf_alloc_space(epf, bar_size[bar], bar,
464 					   epc_features->align);
465 		if (!base)
466 			dev_err(dev, "Failed to allocate space for BAR%d\n",
467 				bar);
468 		epf_test->reg[bar] = base;
469 	}
470 
471 	return 0;
472 }
473 
474 static void pci_epf_configure_bar(struct pci_epf *epf,
475 				  const struct pci_epc_features *epc_features)
476 {
477 	struct pci_epf_bar *epf_bar;
478 	bool bar_fixed_64bit;
479 	int i;
480 
481 	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
482 		epf_bar = &epf->bar[i];
483 		bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 << i));
484 		if (bar_fixed_64bit)
485 			epf_bar->flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
486 		if (epc_features->bar_fixed_size[i])
487 			bar_size[i] = epc_features->bar_fixed_size[i];
488 	}
489 }
490 
491 static int pci_epf_test_bind(struct pci_epf *epf)
492 {
493 	int ret;
494 	struct pci_epf_test *epf_test = epf_get_drvdata(epf);
495 	struct pci_epf_header *header = epf->header;
496 	const struct pci_epc_features *epc_features;
497 	enum pci_barno test_reg_bar = BAR_0;
498 	struct pci_epc *epc = epf->epc;
499 	struct device *dev = &epf->dev;
500 	bool linkup_notifier = false;
501 	bool msix_capable = false;
502 	bool msi_capable = true;
503 
504 	if (WARN_ON_ONCE(!epc))
505 		return -EINVAL;
506 
507 	epc_features = pci_epc_get_features(epc, epf->func_no);
508 	if (epc_features) {
509 		linkup_notifier = epc_features->linkup_notifier;
510 		msix_capable = epc_features->msix_capable;
511 		msi_capable = epc_features->msi_capable;
512 		test_reg_bar = pci_epc_get_first_free_bar(epc_features);
513 		pci_epf_configure_bar(epf, epc_features);
514 	}
515 
516 	epf_test->test_reg_bar = test_reg_bar;
517 	epf_test->epc_features = epc_features;
518 
519 	ret = pci_epc_write_header(epc, epf->func_no, header);
520 	if (ret) {
521 		dev_err(dev, "Configuration header write failed\n");
522 		return ret;
523 	}
524 
525 	ret = pci_epf_test_alloc_space(epf);
526 	if (ret)
527 		return ret;
528 
529 	ret = pci_epf_test_set_bar(epf);
530 	if (ret)
531 		return ret;
532 
533 	if (msi_capable) {
534 		ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
535 		if (ret) {
536 			dev_err(dev, "MSI configuration failed\n");
537 			return ret;
538 		}
539 	}
540 
541 	if (msix_capable) {
542 		ret = pci_epc_set_msix(epc, epf->func_no, epf->msix_interrupts);
543 		if (ret) {
544 			dev_err(dev, "MSI-X configuration failed\n");
545 			return ret;
546 		}
547 	}
548 
549 	if (!linkup_notifier)
550 		queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
551 
552 	return 0;
553 }
554 
555 static const struct pci_epf_device_id pci_epf_test_ids[] = {
556 	{
557 		.name = "pci_epf_test",
558 	},
559 	{},
560 };
561 
562 static int pci_epf_test_probe(struct pci_epf *epf)
563 {
564 	struct pci_epf_test *epf_test;
565 	struct device *dev = &epf->dev;
566 
567 	epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
568 	if (!epf_test)
569 		return -ENOMEM;
570 
571 	epf->header = &test_header;
572 	epf_test->epf = epf;
573 
574 	INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
575 
576 	epf_set_drvdata(epf, epf_test);
577 	return 0;
578 }
579 
580 static struct pci_epf_ops ops = {
581 	.unbind	= pci_epf_test_unbind,
582 	.bind	= pci_epf_test_bind,
583 	.linkup = pci_epf_test_linkup,
584 };
585 
586 static struct pci_epf_driver test_driver = {
587 	.driver.name	= "pci_epf_test",
588 	.probe		= pci_epf_test_probe,
589 	.id_table	= pci_epf_test_ids,
590 	.ops		= &ops,
591 	.owner		= THIS_MODULE,
592 };
593 
594 static int __init pci_epf_test_init(void)
595 {
596 	int ret;
597 
598 	kpcitest_workqueue = alloc_workqueue("kpcitest",
599 					     WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
600 	if (!kpcitest_workqueue) {
601 		pr_err("Failed to allocate the kpcitest work queue\n");
602 		return -ENOMEM;
603 	}
604 
605 	ret = pci_epf_register_driver(&test_driver);
606 	if (ret) {
607 		pr_err("Failed to register pci epf test driver --> %d\n", ret);
608 		return ret;
609 	}
610 
611 	return 0;
612 }
613 module_init(pci_epf_test_init);
614 
615 static void __exit pci_epf_test_exit(void)
616 {
617 	pci_epf_unregister_driver(&test_driver);
618 }
619 module_exit(pci_epf_test_exit);
620 
621 MODULE_DESCRIPTION("PCI EPF TEST DRIVER");
622 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
623 MODULE_LICENSE("GPL v2");
624