1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) Microsoft Corporation.
4  *
5  * Author:
6  *   Jake Oshins <jakeo@microsoft.com>
7  *
8  * This driver acts as a paravirtual front-end for PCI Express root buses.
9  * When a PCI Express function (either an entire device or an SR-IOV
10  * Virtual Function) is being passed through to the VM, this driver exposes
11  * a new bus to the guest VM.  This is modeled as a root PCI bus because
12  * no bridges are being exposed to the VM.  In fact, with a "Generation 2"
13  * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14  * until a device as been exposed using this driver.
15  *
16  * Each root PCI bus has its own PCI domain, which is called "Segment" in
17  * the PCI Firmware Specifications.  Thus while each device passed through
18  * to the VM using this front-end will appear at "device 0", the domain will
19  * be unique.  Typically, each bus will have one PCI function on it, though
20  * this driver does support more than one.
21  *
22  * In order to map the interrupts from the device through to the guest VM,
23  * this driver also implements an IRQ Domain, which handles interrupts (either
24  * MSI or MSI-X) associated with the functions on the bus.  As interrupts are
25  * set up, torn down, or reaffined, this driver communicates with the
26  * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27  * interrupt will be delivered to the correct virtual processor at the right
28  * vector.  This driver does not support level-triggered (line-based)
29  * interrupts, and will report that the Interrupt Line register in the
30  * function's configuration space is zero.
31  *
32  * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33  * facilities.  For instance, the configuration space of a function exposed
34  * by Hyper-V is mapped into a single page of memory space, and the
35  * read and write handlers for config space must be aware of this mechanism.
36  * Similarly, device setup and teardown involves messages sent to and from
37  * the PCI back-end driver in Hyper-V.
38  */
39 
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/semaphore.h>
45 #include <linux/irqdomain.h>
46 #include <asm/irqdomain.h>
47 #include <asm/apic.h>
48 #include <linux/irq.h>
49 #include <linux/msi.h>
50 #include <linux/hyperv.h>
51 #include <linux/refcount.h>
52 #include <asm/mshyperv.h>
53 
54 /*
55  * Protocol versions. The low word is the minor version, the high word the
56  * major version.
57  */
58 
59 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62 
63 enum pci_protocol_version_t {
64 	PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1),	/* Win10 */
65 	PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2),	/* RS1 */
66 	PCI_PROTOCOL_VERSION_1_3 = PCI_MAKE_VERSION(1, 3),	/* Vibranium */
67 };
68 
69 #define CPU_AFFINITY_ALL	-1ULL
70 
71 /*
72  * Supported protocol versions in the order of probing - highest go
73  * first.
74  */
75 static enum pci_protocol_version_t pci_protocol_versions[] = {
76 	PCI_PROTOCOL_VERSION_1_3,
77 	PCI_PROTOCOL_VERSION_1_2,
78 	PCI_PROTOCOL_VERSION_1_1,
79 };
80 
81 #define PCI_CONFIG_MMIO_LENGTH	0x2000
82 #define CFG_PAGE_OFFSET 0x1000
83 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
84 
85 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
86 
87 #define STATUS_REVISION_MISMATCH 0xC0000059
88 
89 /* space for 32bit serial number as string */
90 #define SLOT_NAME_SIZE 11
91 
92 /*
93  * Message Types
94  */
95 
96 enum pci_message_type {
97 	/*
98 	 * Version 1.1
99 	 */
100 	PCI_MESSAGE_BASE                = 0x42490000,
101 	PCI_BUS_RELATIONS               = PCI_MESSAGE_BASE + 0,
102 	PCI_QUERY_BUS_RELATIONS         = PCI_MESSAGE_BASE + 1,
103 	PCI_POWER_STATE_CHANGE          = PCI_MESSAGE_BASE + 4,
104 	PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
105 	PCI_QUERY_RESOURCE_RESOURCES    = PCI_MESSAGE_BASE + 6,
106 	PCI_BUS_D0ENTRY                 = PCI_MESSAGE_BASE + 7,
107 	PCI_BUS_D0EXIT                  = PCI_MESSAGE_BASE + 8,
108 	PCI_READ_BLOCK                  = PCI_MESSAGE_BASE + 9,
109 	PCI_WRITE_BLOCK                 = PCI_MESSAGE_BASE + 0xA,
110 	PCI_EJECT                       = PCI_MESSAGE_BASE + 0xB,
111 	PCI_QUERY_STOP                  = PCI_MESSAGE_BASE + 0xC,
112 	PCI_REENABLE                    = PCI_MESSAGE_BASE + 0xD,
113 	PCI_QUERY_STOP_FAILED           = PCI_MESSAGE_BASE + 0xE,
114 	PCI_EJECTION_COMPLETE           = PCI_MESSAGE_BASE + 0xF,
115 	PCI_RESOURCES_ASSIGNED          = PCI_MESSAGE_BASE + 0x10,
116 	PCI_RESOURCES_RELEASED          = PCI_MESSAGE_BASE + 0x11,
117 	PCI_INVALIDATE_BLOCK            = PCI_MESSAGE_BASE + 0x12,
118 	PCI_QUERY_PROTOCOL_VERSION      = PCI_MESSAGE_BASE + 0x13,
119 	PCI_CREATE_INTERRUPT_MESSAGE    = PCI_MESSAGE_BASE + 0x14,
120 	PCI_DELETE_INTERRUPT_MESSAGE    = PCI_MESSAGE_BASE + 0x15,
121 	PCI_RESOURCES_ASSIGNED2		= PCI_MESSAGE_BASE + 0x16,
122 	PCI_CREATE_INTERRUPT_MESSAGE2	= PCI_MESSAGE_BASE + 0x17,
123 	PCI_DELETE_INTERRUPT_MESSAGE2	= PCI_MESSAGE_BASE + 0x18, /* unused */
124 	PCI_BUS_RELATIONS2		= PCI_MESSAGE_BASE + 0x19,
125 	PCI_MESSAGE_MAXIMUM
126 };
127 
128 /*
129  * Structures defining the virtual PCI Express protocol.
130  */
131 
132 union pci_version {
133 	struct {
134 		u16 minor_version;
135 		u16 major_version;
136 	} parts;
137 	u32 version;
138 } __packed;
139 
140 /*
141  * Function numbers are 8-bits wide on Express, as interpreted through ARI,
142  * which is all this driver does.  This representation is the one used in
143  * Windows, which is what is expected when sending this back and forth with
144  * the Hyper-V parent partition.
145  */
146 union win_slot_encoding {
147 	struct {
148 		u32	dev:5;
149 		u32	func:3;
150 		u32	reserved:24;
151 	} bits;
152 	u32 slot;
153 } __packed;
154 
155 /*
156  * Pretty much as defined in the PCI Specifications.
157  */
158 struct pci_function_description {
159 	u16	v_id;	/* vendor ID */
160 	u16	d_id;	/* device ID */
161 	u8	rev;
162 	u8	prog_intf;
163 	u8	subclass;
164 	u8	base_class;
165 	u32	subsystem_id;
166 	union win_slot_encoding win_slot;
167 	u32	ser;	/* serial number */
168 } __packed;
169 
170 enum pci_device_description_flags {
171 	HV_PCI_DEVICE_FLAG_NONE			= 0x0,
172 	HV_PCI_DEVICE_FLAG_NUMA_AFFINITY	= 0x1,
173 };
174 
175 struct pci_function_description2 {
176 	u16	v_id;	/* vendor ID */
177 	u16	d_id;	/* device ID */
178 	u8	rev;
179 	u8	prog_intf;
180 	u8	subclass;
181 	u8	base_class;
182 	u32	subsystem_id;
183 	union	win_slot_encoding win_slot;
184 	u32	ser;	/* serial number */
185 	u32	flags;
186 	u16	virtual_numa_node;
187 	u16	reserved;
188 } __packed;
189 
190 /**
191  * struct hv_msi_desc
192  * @vector:		IDT entry
193  * @delivery_mode:	As defined in Intel's Programmer's
194  *			Reference Manual, Volume 3, Chapter 8.
195  * @vector_count:	Number of contiguous entries in the
196  *			Interrupt Descriptor Table that are
197  *			occupied by this Message-Signaled
198  *			Interrupt. For "MSI", as first defined
199  *			in PCI 2.2, this can be between 1 and
200  *			32. For "MSI-X," as first defined in PCI
201  *			3.0, this must be 1, as each MSI-X table
202  *			entry would have its own descriptor.
203  * @reserved:		Empty space
204  * @cpu_mask:		All the target virtual processors.
205  */
206 struct hv_msi_desc {
207 	u8	vector;
208 	u8	delivery_mode;
209 	u16	vector_count;
210 	u32	reserved;
211 	u64	cpu_mask;
212 } __packed;
213 
214 /**
215  * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
216  * @vector:		IDT entry
217  * @delivery_mode:	As defined in Intel's Programmer's
218  *			Reference Manual, Volume 3, Chapter 8.
219  * @vector_count:	Number of contiguous entries in the
220  *			Interrupt Descriptor Table that are
221  *			occupied by this Message-Signaled
222  *			Interrupt. For "MSI", as first defined
223  *			in PCI 2.2, this can be between 1 and
224  *			32. For "MSI-X," as first defined in PCI
225  *			3.0, this must be 1, as each MSI-X table
226  *			entry would have its own descriptor.
227  * @processor_count:	number of bits enabled in array.
228  * @processor_array:	All the target virtual processors.
229  */
230 struct hv_msi_desc2 {
231 	u8	vector;
232 	u8	delivery_mode;
233 	u16	vector_count;
234 	u16	processor_count;
235 	u16	processor_array[32];
236 } __packed;
237 
238 /**
239  * struct tran_int_desc
240  * @reserved:		unused, padding
241  * @vector_count:	same as in hv_msi_desc
242  * @data:		This is the "data payload" value that is
243  *			written by the device when it generates
244  *			a message-signaled interrupt, either MSI
245  *			or MSI-X.
246  * @address:		This is the address to which the data
247  *			payload is written on interrupt
248  *			generation.
249  */
250 struct tran_int_desc {
251 	u16	reserved;
252 	u16	vector_count;
253 	u32	data;
254 	u64	address;
255 } __packed;
256 
257 /*
258  * A generic message format for virtual PCI.
259  * Specific message formats are defined later in the file.
260  */
261 
262 struct pci_message {
263 	u32 type;
264 } __packed;
265 
266 struct pci_child_message {
267 	struct pci_message message_type;
268 	union win_slot_encoding wslot;
269 } __packed;
270 
271 struct pci_incoming_message {
272 	struct vmpacket_descriptor hdr;
273 	struct pci_message message_type;
274 } __packed;
275 
276 struct pci_response {
277 	struct vmpacket_descriptor hdr;
278 	s32 status;			/* negative values are failures */
279 } __packed;
280 
281 struct pci_packet {
282 	void (*completion_func)(void *context, struct pci_response *resp,
283 				int resp_packet_size);
284 	void *compl_ctxt;
285 
286 	struct pci_message message[];
287 };
288 
289 /*
290  * Specific message types supporting the PCI protocol.
291  */
292 
293 /*
294  * Version negotiation message. Sent from the guest to the host.
295  * The guest is free to try different versions until the host
296  * accepts the version.
297  *
298  * pci_version: The protocol version requested.
299  * is_last_attempt: If TRUE, this is the last version guest will request.
300  * reservedz: Reserved field, set to zero.
301  */
302 
303 struct pci_version_request {
304 	struct pci_message message_type;
305 	u32 protocol_version;
306 } __packed;
307 
308 /*
309  * Bus D0 Entry.  This is sent from the guest to the host when the virtual
310  * bus (PCI Express port) is ready for action.
311  */
312 
313 struct pci_bus_d0_entry {
314 	struct pci_message message_type;
315 	u32 reserved;
316 	u64 mmio_base;
317 } __packed;
318 
319 struct pci_bus_relations {
320 	struct pci_incoming_message incoming;
321 	u32 device_count;
322 	struct pci_function_description func[];
323 } __packed;
324 
325 struct pci_bus_relations2 {
326 	struct pci_incoming_message incoming;
327 	u32 device_count;
328 	struct pci_function_description2 func[];
329 } __packed;
330 
331 struct pci_q_res_req_response {
332 	struct vmpacket_descriptor hdr;
333 	s32 status;			/* negative values are failures */
334 	u32 probed_bar[PCI_STD_NUM_BARS];
335 } __packed;
336 
337 struct pci_set_power {
338 	struct pci_message message_type;
339 	union win_slot_encoding wslot;
340 	u32 power_state;		/* In Windows terms */
341 	u32 reserved;
342 } __packed;
343 
344 struct pci_set_power_response {
345 	struct vmpacket_descriptor hdr;
346 	s32 status;			/* negative values are failures */
347 	union win_slot_encoding wslot;
348 	u32 resultant_state;		/* In Windows terms */
349 	u32 reserved;
350 } __packed;
351 
352 struct pci_resources_assigned {
353 	struct pci_message message_type;
354 	union win_slot_encoding wslot;
355 	u8 memory_range[0x14][6];	/* not used here */
356 	u32 msi_descriptors;
357 	u32 reserved[4];
358 } __packed;
359 
360 struct pci_resources_assigned2 {
361 	struct pci_message message_type;
362 	union win_slot_encoding wslot;
363 	u8 memory_range[0x14][6];	/* not used here */
364 	u32 msi_descriptor_count;
365 	u8 reserved[70];
366 } __packed;
367 
368 struct pci_create_interrupt {
369 	struct pci_message message_type;
370 	union win_slot_encoding wslot;
371 	struct hv_msi_desc int_desc;
372 } __packed;
373 
374 struct pci_create_int_response {
375 	struct pci_response response;
376 	u32 reserved;
377 	struct tran_int_desc int_desc;
378 } __packed;
379 
380 struct pci_create_interrupt2 {
381 	struct pci_message message_type;
382 	union win_slot_encoding wslot;
383 	struct hv_msi_desc2 int_desc;
384 } __packed;
385 
386 struct pci_delete_interrupt {
387 	struct pci_message message_type;
388 	union win_slot_encoding wslot;
389 	struct tran_int_desc int_desc;
390 } __packed;
391 
392 /*
393  * Note: the VM must pass a valid block id, wslot and bytes_requested.
394  */
395 struct pci_read_block {
396 	struct pci_message message_type;
397 	u32 block_id;
398 	union win_slot_encoding wslot;
399 	u32 bytes_requested;
400 } __packed;
401 
402 struct pci_read_block_response {
403 	struct vmpacket_descriptor hdr;
404 	u32 status;
405 	u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
406 } __packed;
407 
408 /*
409  * Note: the VM must pass a valid block id, wslot and byte_count.
410  */
411 struct pci_write_block {
412 	struct pci_message message_type;
413 	u32 block_id;
414 	union win_slot_encoding wslot;
415 	u32 byte_count;
416 	u8 bytes[HV_CONFIG_BLOCK_SIZE_MAX];
417 } __packed;
418 
419 struct pci_dev_inval_block {
420 	struct pci_incoming_message incoming;
421 	union win_slot_encoding wslot;
422 	u64 block_mask;
423 } __packed;
424 
425 struct pci_dev_incoming {
426 	struct pci_incoming_message incoming;
427 	union win_slot_encoding wslot;
428 } __packed;
429 
430 struct pci_eject_response {
431 	struct pci_message message_type;
432 	union win_slot_encoding wslot;
433 	u32 status;
434 } __packed;
435 
436 static int pci_ring_size = (4 * PAGE_SIZE);
437 
438 /*
439  * Driver specific state.
440  */
441 
442 enum hv_pcibus_state {
443 	hv_pcibus_init = 0,
444 	hv_pcibus_probed,
445 	hv_pcibus_installed,
446 	hv_pcibus_removing,
447 	hv_pcibus_removed,
448 	hv_pcibus_maximum
449 };
450 
451 struct hv_pcibus_device {
452 	struct pci_sysdata sysdata;
453 	/* Protocol version negotiated with the host */
454 	enum pci_protocol_version_t protocol_version;
455 	enum hv_pcibus_state state;
456 	refcount_t remove_lock;
457 	struct hv_device *hdev;
458 	resource_size_t low_mmio_space;
459 	resource_size_t high_mmio_space;
460 	struct resource *mem_config;
461 	struct resource *low_mmio_res;
462 	struct resource *high_mmio_res;
463 	struct completion *survey_event;
464 	struct completion remove_event;
465 	struct pci_bus *pci_bus;
466 	spinlock_t config_lock;	/* Avoid two threads writing index page */
467 	spinlock_t device_list_lock;	/* Protect lists below */
468 	void __iomem *cfg_addr;
469 
470 	struct list_head resources_for_children;
471 
472 	struct list_head children;
473 	struct list_head dr_list;
474 
475 	struct msi_domain_info msi_info;
476 	struct msi_controller msi_chip;
477 	struct irq_domain *irq_domain;
478 
479 	spinlock_t retarget_msi_interrupt_lock;
480 
481 	struct workqueue_struct *wq;
482 
483 	/* Highest slot of child device with resources allocated */
484 	int wslot_res_allocated;
485 
486 	/* hypercall arg, must not cross page boundary */
487 	struct hv_retarget_device_interrupt retarget_msi_interrupt_params;
488 
489 	/*
490 	 * Don't put anything here: retarget_msi_interrupt_params must be last
491 	 */
492 };
493 
494 /*
495  * Tracks "Device Relations" messages from the host, which must be both
496  * processed in order and deferred so that they don't run in the context
497  * of the incoming packet callback.
498  */
499 struct hv_dr_work {
500 	struct work_struct wrk;
501 	struct hv_pcibus_device *bus;
502 };
503 
504 struct hv_pcidev_description {
505 	u16	v_id;	/* vendor ID */
506 	u16	d_id;	/* device ID */
507 	u8	rev;
508 	u8	prog_intf;
509 	u8	subclass;
510 	u8	base_class;
511 	u32	subsystem_id;
512 	union	win_slot_encoding win_slot;
513 	u32	ser;	/* serial number */
514 	u32	flags;
515 	u16	virtual_numa_node;
516 };
517 
518 struct hv_dr_state {
519 	struct list_head list_entry;
520 	u32 device_count;
521 	struct hv_pcidev_description func[];
522 };
523 
524 enum hv_pcichild_state {
525 	hv_pcichild_init = 0,
526 	hv_pcichild_requirements,
527 	hv_pcichild_resourced,
528 	hv_pcichild_ejecting,
529 	hv_pcichild_maximum
530 };
531 
532 struct hv_pci_dev {
533 	/* List protected by pci_rescan_remove_lock */
534 	struct list_head list_entry;
535 	refcount_t refs;
536 	enum hv_pcichild_state state;
537 	struct pci_slot *pci_slot;
538 	struct hv_pcidev_description desc;
539 	bool reported_missing;
540 	struct hv_pcibus_device *hbus;
541 	struct work_struct wrk;
542 
543 	void (*block_invalidate)(void *context, u64 block_mask);
544 	void *invalidate_context;
545 
546 	/*
547 	 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
548 	 * read it back, for each of the BAR offsets within config space.
549 	 */
550 	u32 probed_bar[PCI_STD_NUM_BARS];
551 };
552 
553 struct hv_pci_compl {
554 	struct completion host_event;
555 	s32 completion_status;
556 };
557 
558 static void hv_pci_onchannelcallback(void *context);
559 
560 /**
561  * hv_pci_generic_compl() - Invoked for a completion packet
562  * @context:		Set up by the sender of the packet.
563  * @resp:		The response packet
564  * @resp_packet_size:	Size in bytes of the packet
565  *
566  * This function is used to trigger an event and report status
567  * for any message for which the completion packet contains a
568  * status and nothing else.
569  */
570 static void hv_pci_generic_compl(void *context, struct pci_response *resp,
571 				 int resp_packet_size)
572 {
573 	struct hv_pci_compl *comp_pkt = context;
574 
575 	if (resp_packet_size >= offsetofend(struct pci_response, status))
576 		comp_pkt->completion_status = resp->status;
577 	else
578 		comp_pkt->completion_status = -1;
579 
580 	complete(&comp_pkt->host_event);
581 }
582 
583 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
584 						u32 wslot);
585 
586 static void get_pcichild(struct hv_pci_dev *hpdev)
587 {
588 	refcount_inc(&hpdev->refs);
589 }
590 
591 static void put_pcichild(struct hv_pci_dev *hpdev)
592 {
593 	if (refcount_dec_and_test(&hpdev->refs))
594 		kfree(hpdev);
595 }
596 
597 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
598 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
599 
600 /*
601  * There is no good way to get notified from vmbus_onoffer_rescind(),
602  * so let's use polling here, since this is not a hot path.
603  */
604 static int wait_for_response(struct hv_device *hdev,
605 			     struct completion *comp)
606 {
607 	while (true) {
608 		if (hdev->channel->rescind) {
609 			dev_warn_once(&hdev->device, "The device is gone.\n");
610 			return -ENODEV;
611 		}
612 
613 		if (wait_for_completion_timeout(comp, HZ / 10))
614 			break;
615 	}
616 
617 	return 0;
618 }
619 
620 /**
621  * devfn_to_wslot() - Convert from Linux PCI slot to Windows
622  * @devfn:	The Linux representation of PCI slot
623  *
624  * Windows uses a slightly different representation of PCI slot.
625  *
626  * Return: The Windows representation
627  */
628 static u32 devfn_to_wslot(int devfn)
629 {
630 	union win_slot_encoding wslot;
631 
632 	wslot.slot = 0;
633 	wslot.bits.dev = PCI_SLOT(devfn);
634 	wslot.bits.func = PCI_FUNC(devfn);
635 
636 	return wslot.slot;
637 }
638 
639 /**
640  * wslot_to_devfn() - Convert from Windows PCI slot to Linux
641  * @wslot:	The Windows representation of PCI slot
642  *
643  * Windows uses a slightly different representation of PCI slot.
644  *
645  * Return: The Linux representation
646  */
647 static int wslot_to_devfn(u32 wslot)
648 {
649 	union win_slot_encoding slot_no;
650 
651 	slot_no.slot = wslot;
652 	return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
653 }
654 
655 /*
656  * PCI Configuration Space for these root PCI buses is implemented as a pair
657  * of pages in memory-mapped I/O space.  Writing to the first page chooses
658  * the PCI function being written or read.  Once the first page has been
659  * written to, the following page maps in the entire configuration space of
660  * the function.
661  */
662 
663 /**
664  * _hv_pcifront_read_config() - Internal PCI config read
665  * @hpdev:	The PCI driver's representation of the device
666  * @where:	Offset within config space
667  * @size:	Size of the transfer
668  * @val:	Pointer to the buffer receiving the data
669  */
670 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
671 				     int size, u32 *val)
672 {
673 	unsigned long flags;
674 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
675 
676 	/*
677 	 * If the attempt is to read the IDs or the ROM BAR, simulate that.
678 	 */
679 	if (where + size <= PCI_COMMAND) {
680 		memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
681 	} else if (where >= PCI_CLASS_REVISION && where + size <=
682 		   PCI_CACHE_LINE_SIZE) {
683 		memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
684 		       PCI_CLASS_REVISION, size);
685 	} else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
686 		   PCI_ROM_ADDRESS) {
687 		memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
688 		       PCI_SUBSYSTEM_VENDOR_ID, size);
689 	} else if (where >= PCI_ROM_ADDRESS && where + size <=
690 		   PCI_CAPABILITY_LIST) {
691 		/* ROM BARs are unimplemented */
692 		*val = 0;
693 	} else if (where >= PCI_INTERRUPT_LINE && where + size <=
694 		   PCI_INTERRUPT_PIN) {
695 		/*
696 		 * Interrupt Line and Interrupt PIN are hard-wired to zero
697 		 * because this front-end only supports message-signaled
698 		 * interrupts.
699 		 */
700 		*val = 0;
701 	} else if (where + size <= CFG_PAGE_SIZE) {
702 		spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
703 		/* Choose the function to be read. (See comment above) */
704 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
705 		/* Make sure the function was chosen before we start reading. */
706 		mb();
707 		/* Read from that function's config space. */
708 		switch (size) {
709 		case 1:
710 			*val = readb(addr);
711 			break;
712 		case 2:
713 			*val = readw(addr);
714 			break;
715 		default:
716 			*val = readl(addr);
717 			break;
718 		}
719 		/*
720 		 * Make sure the read was done before we release the spinlock
721 		 * allowing consecutive reads/writes.
722 		 */
723 		mb();
724 		spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
725 	} else {
726 		dev_err(&hpdev->hbus->hdev->device,
727 			"Attempt to read beyond a function's config space.\n");
728 	}
729 }
730 
731 static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
732 {
733 	u16 ret;
734 	unsigned long flags;
735 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
736 			     PCI_VENDOR_ID;
737 
738 	spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
739 
740 	/* Choose the function to be read. (See comment above) */
741 	writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
742 	/* Make sure the function was chosen before we start reading. */
743 	mb();
744 	/* Read from that function's config space. */
745 	ret = readw(addr);
746 	/*
747 	 * mb() is not required here, because the spin_unlock_irqrestore()
748 	 * is a barrier.
749 	 */
750 
751 	spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
752 
753 	return ret;
754 }
755 
756 /**
757  * _hv_pcifront_write_config() - Internal PCI config write
758  * @hpdev:	The PCI driver's representation of the device
759  * @where:	Offset within config space
760  * @size:	Size of the transfer
761  * @val:	The data being transferred
762  */
763 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
764 				      int size, u32 val)
765 {
766 	unsigned long flags;
767 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
768 
769 	if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
770 	    where + size <= PCI_CAPABILITY_LIST) {
771 		/* SSIDs and ROM BARs are read-only */
772 	} else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
773 		spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
774 		/* Choose the function to be written. (See comment above) */
775 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
776 		/* Make sure the function was chosen before we start writing. */
777 		wmb();
778 		/* Write to that function's config space. */
779 		switch (size) {
780 		case 1:
781 			writeb(val, addr);
782 			break;
783 		case 2:
784 			writew(val, addr);
785 			break;
786 		default:
787 			writel(val, addr);
788 			break;
789 		}
790 		/*
791 		 * Make sure the write was done before we release the spinlock
792 		 * allowing consecutive reads/writes.
793 		 */
794 		mb();
795 		spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
796 	} else {
797 		dev_err(&hpdev->hbus->hdev->device,
798 			"Attempt to write beyond a function's config space.\n");
799 	}
800 }
801 
802 /**
803  * hv_pcifront_read_config() - Read configuration space
804  * @bus: PCI Bus structure
805  * @devfn: Device/function
806  * @where: Offset from base
807  * @size: Byte/word/dword
808  * @val: Value to be read
809  *
810  * Return: PCIBIOS_SUCCESSFUL on success
811  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
812  */
813 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
814 				   int where, int size, u32 *val)
815 {
816 	struct hv_pcibus_device *hbus =
817 		container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
818 	struct hv_pci_dev *hpdev;
819 
820 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
821 	if (!hpdev)
822 		return PCIBIOS_DEVICE_NOT_FOUND;
823 
824 	_hv_pcifront_read_config(hpdev, where, size, val);
825 
826 	put_pcichild(hpdev);
827 	return PCIBIOS_SUCCESSFUL;
828 }
829 
830 /**
831  * hv_pcifront_write_config() - Write configuration space
832  * @bus: PCI Bus structure
833  * @devfn: Device/function
834  * @where: Offset from base
835  * @size: Byte/word/dword
836  * @val: Value to be written to device
837  *
838  * Return: PCIBIOS_SUCCESSFUL on success
839  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
840  */
841 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
842 				    int where, int size, u32 val)
843 {
844 	struct hv_pcibus_device *hbus =
845 	    container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
846 	struct hv_pci_dev *hpdev;
847 
848 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
849 	if (!hpdev)
850 		return PCIBIOS_DEVICE_NOT_FOUND;
851 
852 	_hv_pcifront_write_config(hpdev, where, size, val);
853 
854 	put_pcichild(hpdev);
855 	return PCIBIOS_SUCCESSFUL;
856 }
857 
858 /* PCIe operations */
859 static struct pci_ops hv_pcifront_ops = {
860 	.read  = hv_pcifront_read_config,
861 	.write = hv_pcifront_write_config,
862 };
863 
864 /*
865  * Paravirtual backchannel
866  *
867  * Hyper-V SR-IOV provides a backchannel mechanism in software for
868  * communication between a VF driver and a PF driver.  These
869  * "configuration blocks" are similar in concept to PCI configuration space,
870  * but instead of doing reads and writes in 32-bit chunks through a very slow
871  * path, packets of up to 128 bytes can be sent or received asynchronously.
872  *
873  * Nearly every SR-IOV device contains just such a communications channel in
874  * hardware, so using this one in software is usually optional.  Using the
875  * software channel, however, allows driver implementers to leverage software
876  * tools that fuzz the communications channel looking for vulnerabilities.
877  *
878  * The usage model for these packets puts the responsibility for reading or
879  * writing on the VF driver.  The VF driver sends a read or a write packet,
880  * indicating which "block" is being referred to by number.
881  *
882  * If the PF driver wishes to initiate communication, it can "invalidate" one or
883  * more of the first 64 blocks.  This invalidation is delivered via a callback
884  * supplied by the VF driver by this driver.
885  *
886  * No protocol is implied, except that supplied by the PF and VF drivers.
887  */
888 
889 struct hv_read_config_compl {
890 	struct hv_pci_compl comp_pkt;
891 	void *buf;
892 	unsigned int len;
893 	unsigned int bytes_returned;
894 };
895 
896 /**
897  * hv_pci_read_config_compl() - Invoked when a response packet
898  * for a read config block operation arrives.
899  * @context:		Identifies the read config operation
900  * @resp:		The response packet itself
901  * @resp_packet_size:	Size in bytes of the response packet
902  */
903 static void hv_pci_read_config_compl(void *context, struct pci_response *resp,
904 				     int resp_packet_size)
905 {
906 	struct hv_read_config_compl *comp = context;
907 	struct pci_read_block_response *read_resp =
908 		(struct pci_read_block_response *)resp;
909 	unsigned int data_len, hdr_len;
910 
911 	hdr_len = offsetof(struct pci_read_block_response, bytes);
912 	if (resp_packet_size < hdr_len) {
913 		comp->comp_pkt.completion_status = -1;
914 		goto out;
915 	}
916 
917 	data_len = resp_packet_size - hdr_len;
918 	if (data_len > 0 && read_resp->status == 0) {
919 		comp->bytes_returned = min(comp->len, data_len);
920 		memcpy(comp->buf, read_resp->bytes, comp->bytes_returned);
921 	} else {
922 		comp->bytes_returned = 0;
923 	}
924 
925 	comp->comp_pkt.completion_status = read_resp->status;
926 out:
927 	complete(&comp->comp_pkt.host_event);
928 }
929 
930 /**
931  * hv_read_config_block() - Sends a read config block request to
932  * the back-end driver running in the Hyper-V parent partition.
933  * @pdev:		The PCI driver's representation for this device.
934  * @buf:		Buffer into which the config block will be copied.
935  * @len:		Size in bytes of buf.
936  * @block_id:		Identifies the config block which has been requested.
937  * @bytes_returned:	Size which came back from the back-end driver.
938  *
939  * Return: 0 on success, -errno on failure
940  */
941 int hv_read_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
942 			 unsigned int block_id, unsigned int *bytes_returned)
943 {
944 	struct hv_pcibus_device *hbus =
945 		container_of(pdev->bus->sysdata, struct hv_pcibus_device,
946 			     sysdata);
947 	struct {
948 		struct pci_packet pkt;
949 		char buf[sizeof(struct pci_read_block)];
950 	} pkt;
951 	struct hv_read_config_compl comp_pkt;
952 	struct pci_read_block *read_blk;
953 	int ret;
954 
955 	if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
956 		return -EINVAL;
957 
958 	init_completion(&comp_pkt.comp_pkt.host_event);
959 	comp_pkt.buf = buf;
960 	comp_pkt.len = len;
961 
962 	memset(&pkt, 0, sizeof(pkt));
963 	pkt.pkt.completion_func = hv_pci_read_config_compl;
964 	pkt.pkt.compl_ctxt = &comp_pkt;
965 	read_blk = (struct pci_read_block *)&pkt.pkt.message;
966 	read_blk->message_type.type = PCI_READ_BLOCK;
967 	read_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
968 	read_blk->block_id = block_id;
969 	read_blk->bytes_requested = len;
970 
971 	ret = vmbus_sendpacket(hbus->hdev->channel, read_blk,
972 			       sizeof(*read_blk), (unsigned long)&pkt.pkt,
973 			       VM_PKT_DATA_INBAND,
974 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
975 	if (ret)
976 		return ret;
977 
978 	ret = wait_for_response(hbus->hdev, &comp_pkt.comp_pkt.host_event);
979 	if (ret)
980 		return ret;
981 
982 	if (comp_pkt.comp_pkt.completion_status != 0 ||
983 	    comp_pkt.bytes_returned == 0) {
984 		dev_err(&hbus->hdev->device,
985 			"Read Config Block failed: 0x%x, bytes_returned=%d\n",
986 			comp_pkt.comp_pkt.completion_status,
987 			comp_pkt.bytes_returned);
988 		return -EIO;
989 	}
990 
991 	*bytes_returned = comp_pkt.bytes_returned;
992 	return 0;
993 }
994 
995 /**
996  * hv_pci_write_config_compl() - Invoked when a response packet for a write
997  * config block operation arrives.
998  * @context:		Identifies the write config operation
999  * @resp:		The response packet itself
1000  * @resp_packet_size:	Size in bytes of the response packet
1001  */
1002 static void hv_pci_write_config_compl(void *context, struct pci_response *resp,
1003 				      int resp_packet_size)
1004 {
1005 	struct hv_pci_compl *comp_pkt = context;
1006 
1007 	comp_pkt->completion_status = resp->status;
1008 	complete(&comp_pkt->host_event);
1009 }
1010 
1011 /**
1012  * hv_write_config_block() - Sends a write config block request to the
1013  * back-end driver running in the Hyper-V parent partition.
1014  * @pdev:		The PCI driver's representation for this device.
1015  * @buf:		Buffer from which the config block will	be copied.
1016  * @len:		Size in bytes of buf.
1017  * @block_id:		Identifies the config block which is being written.
1018  *
1019  * Return: 0 on success, -errno on failure
1020  */
1021 int hv_write_config_block(struct pci_dev *pdev, void *buf, unsigned int len,
1022 			  unsigned int block_id)
1023 {
1024 	struct hv_pcibus_device *hbus =
1025 		container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1026 			     sysdata);
1027 	struct {
1028 		struct pci_packet pkt;
1029 		char buf[sizeof(struct pci_write_block)];
1030 		u32 reserved;
1031 	} pkt;
1032 	struct hv_pci_compl comp_pkt;
1033 	struct pci_write_block *write_blk;
1034 	u32 pkt_size;
1035 	int ret;
1036 
1037 	if (len == 0 || len > HV_CONFIG_BLOCK_SIZE_MAX)
1038 		return -EINVAL;
1039 
1040 	init_completion(&comp_pkt.host_event);
1041 
1042 	memset(&pkt, 0, sizeof(pkt));
1043 	pkt.pkt.completion_func = hv_pci_write_config_compl;
1044 	pkt.pkt.compl_ctxt = &comp_pkt;
1045 	write_blk = (struct pci_write_block *)&pkt.pkt.message;
1046 	write_blk->message_type.type = PCI_WRITE_BLOCK;
1047 	write_blk->wslot.slot = devfn_to_wslot(pdev->devfn);
1048 	write_blk->block_id = block_id;
1049 	write_blk->byte_count = len;
1050 	memcpy(write_blk->bytes, buf, len);
1051 	pkt_size = offsetof(struct pci_write_block, bytes) + len;
1052 	/*
1053 	 * This quirk is required on some hosts shipped around 2018, because
1054 	 * these hosts don't check the pkt_size correctly (new hosts have been
1055 	 * fixed since early 2019). The quirk is also safe on very old hosts
1056 	 * and new hosts, because, on them, what really matters is the length
1057 	 * specified in write_blk->byte_count.
1058 	 */
1059 	pkt_size += sizeof(pkt.reserved);
1060 
1061 	ret = vmbus_sendpacket(hbus->hdev->channel, write_blk, pkt_size,
1062 			       (unsigned long)&pkt.pkt, VM_PKT_DATA_INBAND,
1063 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1064 	if (ret)
1065 		return ret;
1066 
1067 	ret = wait_for_response(hbus->hdev, &comp_pkt.host_event);
1068 	if (ret)
1069 		return ret;
1070 
1071 	if (comp_pkt.completion_status != 0) {
1072 		dev_err(&hbus->hdev->device,
1073 			"Write Config Block failed: 0x%x\n",
1074 			comp_pkt.completion_status);
1075 		return -EIO;
1076 	}
1077 
1078 	return 0;
1079 }
1080 
1081 /**
1082  * hv_register_block_invalidate() - Invoked when a config block invalidation
1083  * arrives from the back-end driver.
1084  * @pdev:		The PCI driver's representation for this device.
1085  * @context:		Identifies the device.
1086  * @block_invalidate:	Identifies all of the blocks being invalidated.
1087  *
1088  * Return: 0 on success, -errno on failure
1089  */
1090 int hv_register_block_invalidate(struct pci_dev *pdev, void *context,
1091 				 void (*block_invalidate)(void *context,
1092 							  u64 block_mask))
1093 {
1094 	struct hv_pcibus_device *hbus =
1095 		container_of(pdev->bus->sysdata, struct hv_pcibus_device,
1096 			     sysdata);
1097 	struct hv_pci_dev *hpdev;
1098 
1099 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1100 	if (!hpdev)
1101 		return -ENODEV;
1102 
1103 	hpdev->block_invalidate = block_invalidate;
1104 	hpdev->invalidate_context = context;
1105 
1106 	put_pcichild(hpdev);
1107 	return 0;
1108 
1109 }
1110 
1111 /* Interrupt management hooks */
1112 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
1113 			     struct tran_int_desc *int_desc)
1114 {
1115 	struct pci_delete_interrupt *int_pkt;
1116 	struct {
1117 		struct pci_packet pkt;
1118 		u8 buffer[sizeof(struct pci_delete_interrupt)];
1119 	} ctxt;
1120 
1121 	memset(&ctxt, 0, sizeof(ctxt));
1122 	int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
1123 	int_pkt->message_type.type =
1124 		PCI_DELETE_INTERRUPT_MESSAGE;
1125 	int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1126 	int_pkt->int_desc = *int_desc;
1127 	vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
1128 			 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
1129 	kfree(int_desc);
1130 }
1131 
1132 /**
1133  * hv_msi_free() - Free the MSI.
1134  * @domain:	The interrupt domain pointer
1135  * @info:	Extra MSI-related context
1136  * @irq:	Identifies the IRQ.
1137  *
1138  * The Hyper-V parent partition and hypervisor are tracking the
1139  * messages that are in use, keeping the interrupt redirection
1140  * table up to date.  This callback sends a message that frees
1141  * the IRT entry and related tracking nonsense.
1142  */
1143 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
1144 			unsigned int irq)
1145 {
1146 	struct hv_pcibus_device *hbus;
1147 	struct hv_pci_dev *hpdev;
1148 	struct pci_dev *pdev;
1149 	struct tran_int_desc *int_desc;
1150 	struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
1151 	struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
1152 
1153 	pdev = msi_desc_to_pci_dev(msi);
1154 	hbus = info->data;
1155 	int_desc = irq_data_get_irq_chip_data(irq_data);
1156 	if (!int_desc)
1157 		return;
1158 
1159 	irq_data->chip_data = NULL;
1160 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1161 	if (!hpdev) {
1162 		kfree(int_desc);
1163 		return;
1164 	}
1165 
1166 	hv_int_desc_free(hpdev, int_desc);
1167 	put_pcichild(hpdev);
1168 }
1169 
1170 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
1171 			   bool force)
1172 {
1173 	struct irq_data *parent = data->parent_data;
1174 
1175 	return parent->chip->irq_set_affinity(parent, dest, force);
1176 }
1177 
1178 static void hv_irq_mask(struct irq_data *data)
1179 {
1180 	pci_msi_mask_irq(data);
1181 }
1182 
1183 /**
1184  * hv_irq_unmask() - "Unmask" the IRQ by setting its current
1185  * affinity.
1186  * @data:	Describes the IRQ
1187  *
1188  * Build new a destination for the MSI and make a hypercall to
1189  * update the Interrupt Redirection Table. "Device Logical ID"
1190  * is built out of this PCI bus's instance GUID and the function
1191  * number of the device.
1192  */
1193 static void hv_irq_unmask(struct irq_data *data)
1194 {
1195 	struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
1196 	struct irq_cfg *cfg = irqd_cfg(data);
1197 	struct hv_retarget_device_interrupt *params;
1198 	struct hv_pcibus_device *hbus;
1199 	struct cpumask *dest;
1200 	cpumask_var_t tmp;
1201 	struct pci_bus *pbus;
1202 	struct pci_dev *pdev;
1203 	unsigned long flags;
1204 	u32 var_size = 0;
1205 	int cpu, nr_bank;
1206 	u64 res;
1207 
1208 	dest = irq_data_get_effective_affinity_mask(data);
1209 	pdev = msi_desc_to_pci_dev(msi_desc);
1210 	pbus = pdev->bus;
1211 	hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1212 
1213 	spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
1214 
1215 	params = &hbus->retarget_msi_interrupt_params;
1216 	memset(params, 0, sizeof(*params));
1217 	params->partition_id = HV_PARTITION_ID_SELF;
1218 	params->int_entry.source = 1; /* MSI(-X) */
1219 	hv_set_msi_entry_from_desc(&params->int_entry.msi_entry, msi_desc);
1220 	params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
1221 			   (hbus->hdev->dev_instance.b[4] << 16) |
1222 			   (hbus->hdev->dev_instance.b[7] << 8) |
1223 			   (hbus->hdev->dev_instance.b[6] & 0xf8) |
1224 			   PCI_FUNC(pdev->devfn);
1225 	params->int_target.vector = cfg->vector;
1226 
1227 	/*
1228 	 * Honoring apic->irq_delivery_mode set to dest_Fixed by
1229 	 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
1230 	 * spurious interrupt storm. Not doing so does not seem to have a
1231 	 * negative effect (yet?).
1232 	 */
1233 
1234 	if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
1235 		/*
1236 		 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
1237 		 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
1238 		 * with >64 VP support.
1239 		 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
1240 		 * is not sufficient for this hypercall.
1241 		 */
1242 		params->int_target.flags |=
1243 			HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
1244 
1245 		if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
1246 			res = 1;
1247 			goto exit_unlock;
1248 		}
1249 
1250 		cpumask_and(tmp, dest, cpu_online_mask);
1251 		nr_bank = cpumask_to_vpset(&params->int_target.vp_set, tmp);
1252 		free_cpumask_var(tmp);
1253 
1254 		if (nr_bank <= 0) {
1255 			res = 1;
1256 			goto exit_unlock;
1257 		}
1258 
1259 		/*
1260 		 * var-sized hypercall, var-size starts after vp_mask (thus
1261 		 * vp_set.format does not count, but vp_set.valid_bank_mask
1262 		 * does).
1263 		 */
1264 		var_size = 1 + nr_bank;
1265 	} else {
1266 		for_each_cpu_and(cpu, dest, cpu_online_mask) {
1267 			params->int_target.vp_mask |=
1268 				(1ULL << hv_cpu_number_to_vp_number(cpu));
1269 		}
1270 	}
1271 
1272 	res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
1273 			      params, NULL);
1274 
1275 exit_unlock:
1276 	spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
1277 
1278 	if (res) {
1279 		dev_err(&hbus->hdev->device,
1280 			"%s() failed: %#llx", __func__, res);
1281 		return;
1282 	}
1283 
1284 	pci_msi_unmask_irq(data);
1285 }
1286 
1287 struct compose_comp_ctxt {
1288 	struct hv_pci_compl comp_pkt;
1289 	struct tran_int_desc int_desc;
1290 };
1291 
1292 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1293 				 int resp_packet_size)
1294 {
1295 	struct compose_comp_ctxt *comp_pkt = context;
1296 	struct pci_create_int_response *int_resp =
1297 		(struct pci_create_int_response *)resp;
1298 
1299 	comp_pkt->comp_pkt.completion_status = resp->status;
1300 	comp_pkt->int_desc = int_resp->int_desc;
1301 	complete(&comp_pkt->comp_pkt.host_event);
1302 }
1303 
1304 static u32 hv_compose_msi_req_v1(
1305 	struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1306 	u32 slot, u8 vector)
1307 {
1308 	int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1309 	int_pkt->wslot.slot = slot;
1310 	int_pkt->int_desc.vector = vector;
1311 	int_pkt->int_desc.vector_count = 1;
1312 	int_pkt->int_desc.delivery_mode = dest_Fixed;
1313 
1314 	/*
1315 	 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1316 	 * hv_irq_unmask().
1317 	 */
1318 	int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1319 
1320 	return sizeof(*int_pkt);
1321 }
1322 
1323 static u32 hv_compose_msi_req_v2(
1324 	struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1325 	u32 slot, u8 vector)
1326 {
1327 	int cpu;
1328 
1329 	int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1330 	int_pkt->wslot.slot = slot;
1331 	int_pkt->int_desc.vector = vector;
1332 	int_pkt->int_desc.vector_count = 1;
1333 	int_pkt->int_desc.delivery_mode = dest_Fixed;
1334 
1335 	/*
1336 	 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1337 	 * by subsequent retarget in hv_irq_unmask().
1338 	 */
1339 	cpu = cpumask_first_and(affinity, cpu_online_mask);
1340 	int_pkt->int_desc.processor_array[0] =
1341 		hv_cpu_number_to_vp_number(cpu);
1342 	int_pkt->int_desc.processor_count = 1;
1343 
1344 	return sizeof(*int_pkt);
1345 }
1346 
1347 /**
1348  * hv_compose_msi_msg() - Supplies a valid MSI address/data
1349  * @data:	Everything about this MSI
1350  * @msg:	Buffer that is filled in by this function
1351  *
1352  * This function unpacks the IRQ looking for target CPU set, IDT
1353  * vector and mode and sends a message to the parent partition
1354  * asking for a mapping for that tuple in this partition.  The
1355  * response supplies a data value and address to which that data
1356  * should be written to trigger that interrupt.
1357  */
1358 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1359 {
1360 	struct irq_cfg *cfg = irqd_cfg(data);
1361 	struct hv_pcibus_device *hbus;
1362 	struct vmbus_channel *channel;
1363 	struct hv_pci_dev *hpdev;
1364 	struct pci_bus *pbus;
1365 	struct pci_dev *pdev;
1366 	struct cpumask *dest;
1367 	struct compose_comp_ctxt comp;
1368 	struct tran_int_desc *int_desc;
1369 	struct {
1370 		struct pci_packet pci_pkt;
1371 		union {
1372 			struct pci_create_interrupt v1;
1373 			struct pci_create_interrupt2 v2;
1374 		} int_pkts;
1375 	} __packed ctxt;
1376 
1377 	u32 size;
1378 	int ret;
1379 
1380 	pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1381 	dest = irq_data_get_effective_affinity_mask(data);
1382 	pbus = pdev->bus;
1383 	hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1384 	channel = hbus->hdev->channel;
1385 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1386 	if (!hpdev)
1387 		goto return_null_message;
1388 
1389 	/* Free any previous message that might have already been composed. */
1390 	if (data->chip_data) {
1391 		int_desc = data->chip_data;
1392 		data->chip_data = NULL;
1393 		hv_int_desc_free(hpdev, int_desc);
1394 	}
1395 
1396 	int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1397 	if (!int_desc)
1398 		goto drop_reference;
1399 
1400 	memset(&ctxt, 0, sizeof(ctxt));
1401 	init_completion(&comp.comp_pkt.host_event);
1402 	ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1403 	ctxt.pci_pkt.compl_ctxt = &comp;
1404 
1405 	switch (hbus->protocol_version) {
1406 	case PCI_PROTOCOL_VERSION_1_1:
1407 		size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1408 					dest,
1409 					hpdev->desc.win_slot.slot,
1410 					cfg->vector);
1411 		break;
1412 
1413 	case PCI_PROTOCOL_VERSION_1_2:
1414 	case PCI_PROTOCOL_VERSION_1_3:
1415 		size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1416 					dest,
1417 					hpdev->desc.win_slot.slot,
1418 					cfg->vector);
1419 		break;
1420 
1421 	default:
1422 		/* As we only negotiate protocol versions known to this driver,
1423 		 * this path should never hit. However, this is it not a hot
1424 		 * path so we print a message to aid future updates.
1425 		 */
1426 		dev_err(&hbus->hdev->device,
1427 			"Unexpected vPCI protocol, update driver.");
1428 		goto free_int_desc;
1429 	}
1430 
1431 	ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1432 			       size, (unsigned long)&ctxt.pci_pkt,
1433 			       VM_PKT_DATA_INBAND,
1434 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1435 	if (ret) {
1436 		dev_err(&hbus->hdev->device,
1437 			"Sending request for interrupt failed: 0x%x",
1438 			comp.comp_pkt.completion_status);
1439 		goto free_int_desc;
1440 	}
1441 
1442 	/*
1443 	 * Prevents hv_pci_onchannelcallback() from running concurrently
1444 	 * in the tasklet.
1445 	 */
1446 	tasklet_disable(&channel->callback_event);
1447 
1448 	/*
1449 	 * Since this function is called with IRQ locks held, can't
1450 	 * do normal wait for completion; instead poll.
1451 	 */
1452 	while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1453 		unsigned long flags;
1454 
1455 		/* 0xFFFF means an invalid PCI VENDOR ID. */
1456 		if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1457 			dev_err_once(&hbus->hdev->device,
1458 				     "the device has gone\n");
1459 			goto enable_tasklet;
1460 		}
1461 
1462 		/*
1463 		 * Make sure that the ring buffer data structure doesn't get
1464 		 * freed while we dereference the ring buffer pointer.  Test
1465 		 * for the channel's onchannel_callback being NULL within a
1466 		 * sched_lock critical section.  See also the inline comments
1467 		 * in vmbus_reset_channel_cb().
1468 		 */
1469 		spin_lock_irqsave(&channel->sched_lock, flags);
1470 		if (unlikely(channel->onchannel_callback == NULL)) {
1471 			spin_unlock_irqrestore(&channel->sched_lock, flags);
1472 			goto enable_tasklet;
1473 		}
1474 		hv_pci_onchannelcallback(hbus);
1475 		spin_unlock_irqrestore(&channel->sched_lock, flags);
1476 
1477 		if (hpdev->state == hv_pcichild_ejecting) {
1478 			dev_err_once(&hbus->hdev->device,
1479 				     "the device is being ejected\n");
1480 			goto enable_tasklet;
1481 		}
1482 
1483 		udelay(100);
1484 	}
1485 
1486 	tasklet_enable(&channel->callback_event);
1487 
1488 	if (comp.comp_pkt.completion_status < 0) {
1489 		dev_err(&hbus->hdev->device,
1490 			"Request for interrupt failed: 0x%x",
1491 			comp.comp_pkt.completion_status);
1492 		goto free_int_desc;
1493 	}
1494 
1495 	/*
1496 	 * Record the assignment so that this can be unwound later. Using
1497 	 * irq_set_chip_data() here would be appropriate, but the lock it takes
1498 	 * is already held.
1499 	 */
1500 	*int_desc = comp.int_desc;
1501 	data->chip_data = int_desc;
1502 
1503 	/* Pass up the result. */
1504 	msg->address_hi = comp.int_desc.address >> 32;
1505 	msg->address_lo = comp.int_desc.address & 0xffffffff;
1506 	msg->data = comp.int_desc.data;
1507 
1508 	put_pcichild(hpdev);
1509 	return;
1510 
1511 enable_tasklet:
1512 	tasklet_enable(&channel->callback_event);
1513 free_int_desc:
1514 	kfree(int_desc);
1515 drop_reference:
1516 	put_pcichild(hpdev);
1517 return_null_message:
1518 	msg->address_hi = 0;
1519 	msg->address_lo = 0;
1520 	msg->data = 0;
1521 }
1522 
1523 /* HW Interrupt Chip Descriptor */
1524 static struct irq_chip hv_msi_irq_chip = {
1525 	.name			= "Hyper-V PCIe MSI",
1526 	.irq_compose_msi_msg	= hv_compose_msi_msg,
1527 	.irq_set_affinity	= hv_set_affinity,
1528 	.irq_ack		= irq_chip_ack_parent,
1529 	.irq_mask		= hv_irq_mask,
1530 	.irq_unmask		= hv_irq_unmask,
1531 };
1532 
1533 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1534 						   msi_alloc_info_t *arg)
1535 {
1536 	return arg->msi_hwirq;
1537 }
1538 
1539 static struct msi_domain_ops hv_msi_ops = {
1540 	.get_hwirq	= hv_msi_domain_ops_get_hwirq,
1541 	.msi_prepare	= pci_msi_prepare,
1542 	.set_desc	= pci_msi_set_desc,
1543 	.msi_free	= hv_msi_free,
1544 };
1545 
1546 /**
1547  * hv_pcie_init_irq_domain() - Initialize IRQ domain
1548  * @hbus:	The root PCI bus
1549  *
1550  * This function creates an IRQ domain which will be used for
1551  * interrupts from devices that have been passed through.  These
1552  * devices only support MSI and MSI-X, not line-based interrupts
1553  * or simulations of line-based interrupts through PCIe's
1554  * fabric-layer messages.  Because interrupts are remapped, we
1555  * can support multi-message MSI here.
1556  *
1557  * Return: '0' on success and error value on failure
1558  */
1559 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1560 {
1561 	hbus->msi_info.chip = &hv_msi_irq_chip;
1562 	hbus->msi_info.ops = &hv_msi_ops;
1563 	hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1564 		MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1565 		MSI_FLAG_PCI_MSIX);
1566 	hbus->msi_info.handler = handle_edge_irq;
1567 	hbus->msi_info.handler_name = "edge";
1568 	hbus->msi_info.data = hbus;
1569 	hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1570 						     &hbus->msi_info,
1571 						     x86_vector_domain);
1572 	if (!hbus->irq_domain) {
1573 		dev_err(&hbus->hdev->device,
1574 			"Failed to build an MSI IRQ domain\n");
1575 		return -ENODEV;
1576 	}
1577 
1578 	return 0;
1579 }
1580 
1581 /**
1582  * get_bar_size() - Get the address space consumed by a BAR
1583  * @bar_val:	Value that a BAR returned after -1 was written
1584  *              to it.
1585  *
1586  * This function returns the size of the BAR, rounded up to 1
1587  * page.  It has to be rounded up because the hypervisor's page
1588  * table entry that maps the BAR into the VM can't specify an
1589  * offset within a page.  The invariant is that the hypervisor
1590  * must place any BARs of smaller than page length at the
1591  * beginning of a page.
1592  *
1593  * Return:	Size in bytes of the consumed MMIO space.
1594  */
1595 static u64 get_bar_size(u64 bar_val)
1596 {
1597 	return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1598 			PAGE_SIZE);
1599 }
1600 
1601 /**
1602  * survey_child_resources() - Total all MMIO requirements
1603  * @hbus:	Root PCI bus, as understood by this driver
1604  */
1605 static void survey_child_resources(struct hv_pcibus_device *hbus)
1606 {
1607 	struct hv_pci_dev *hpdev;
1608 	resource_size_t bar_size = 0;
1609 	unsigned long flags;
1610 	struct completion *event;
1611 	u64 bar_val;
1612 	int i;
1613 
1614 	/* If nobody is waiting on the answer, don't compute it. */
1615 	event = xchg(&hbus->survey_event, NULL);
1616 	if (!event)
1617 		return;
1618 
1619 	/* If the answer has already been computed, go with it. */
1620 	if (hbus->low_mmio_space || hbus->high_mmio_space) {
1621 		complete(event);
1622 		return;
1623 	}
1624 
1625 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1626 
1627 	/*
1628 	 * Due to an interesting quirk of the PCI spec, all memory regions
1629 	 * for a child device are a power of 2 in size and aligned in memory,
1630 	 * so it's sufficient to just add them up without tracking alignment.
1631 	 */
1632 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1633 		for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1634 			if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1635 				dev_err(&hbus->hdev->device,
1636 					"There's an I/O BAR in this list!\n");
1637 
1638 			if (hpdev->probed_bar[i] != 0) {
1639 				/*
1640 				 * A probed BAR has all the upper bits set that
1641 				 * can be changed.
1642 				 */
1643 
1644 				bar_val = hpdev->probed_bar[i];
1645 				if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1646 					bar_val |=
1647 					((u64)hpdev->probed_bar[++i] << 32);
1648 				else
1649 					bar_val |= 0xffffffff00000000ULL;
1650 
1651 				bar_size = get_bar_size(bar_val);
1652 
1653 				if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1654 					hbus->high_mmio_space += bar_size;
1655 				else
1656 					hbus->low_mmio_space += bar_size;
1657 			}
1658 		}
1659 	}
1660 
1661 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1662 	complete(event);
1663 }
1664 
1665 /**
1666  * prepopulate_bars() - Fill in BARs with defaults
1667  * @hbus:	Root PCI bus, as understood by this driver
1668  *
1669  * The core PCI driver code seems much, much happier if the BARs
1670  * for a device have values upon first scan. So fill them in.
1671  * The algorithm below works down from large sizes to small,
1672  * attempting to pack the assignments optimally. The assumption,
1673  * enforced in other parts of the code, is that the beginning of
1674  * the memory-mapped I/O space will be aligned on the largest
1675  * BAR size.
1676  */
1677 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1678 {
1679 	resource_size_t high_size = 0;
1680 	resource_size_t low_size = 0;
1681 	resource_size_t high_base = 0;
1682 	resource_size_t low_base = 0;
1683 	resource_size_t bar_size;
1684 	struct hv_pci_dev *hpdev;
1685 	unsigned long flags;
1686 	u64 bar_val;
1687 	u32 command;
1688 	bool high;
1689 	int i;
1690 
1691 	if (hbus->low_mmio_space) {
1692 		low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1693 		low_base = hbus->low_mmio_res->start;
1694 	}
1695 
1696 	if (hbus->high_mmio_space) {
1697 		high_size = 1ULL <<
1698 			(63 - __builtin_clzll(hbus->high_mmio_space));
1699 		high_base = hbus->high_mmio_res->start;
1700 	}
1701 
1702 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1703 
1704 	/*
1705 	 * Clear the memory enable bit, in case it's already set. This occurs
1706 	 * in the suspend path of hibernation, where the device is suspended,
1707 	 * resumed and suspended again: see hibernation_snapshot() and
1708 	 * hibernation_platform_enter().
1709 	 *
1710 	 * If the memory enable bit is already set, Hyper-V sliently ignores
1711 	 * the below BAR updates, and the related PCI device driver can not
1712 	 * work, because reading from the device register(s) always returns
1713 	 * 0xFFFFFFFF.
1714 	 */
1715 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1716 		_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2, &command);
1717 		command &= ~PCI_COMMAND_MEMORY;
1718 		_hv_pcifront_write_config(hpdev, PCI_COMMAND, 2, command);
1719 	}
1720 
1721 	/* Pick addresses for the BARs. */
1722 	do {
1723 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
1724 			for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1725 				bar_val = hpdev->probed_bar[i];
1726 				if (bar_val == 0)
1727 					continue;
1728 				high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1729 				if (high) {
1730 					bar_val |=
1731 						((u64)hpdev->probed_bar[i + 1]
1732 						 << 32);
1733 				} else {
1734 					bar_val |= 0xffffffffULL << 32;
1735 				}
1736 				bar_size = get_bar_size(bar_val);
1737 				if (high) {
1738 					if (high_size != bar_size) {
1739 						i++;
1740 						continue;
1741 					}
1742 					_hv_pcifront_write_config(hpdev,
1743 						PCI_BASE_ADDRESS_0 + (4 * i),
1744 						4,
1745 						(u32)(high_base & 0xffffff00));
1746 					i++;
1747 					_hv_pcifront_write_config(hpdev,
1748 						PCI_BASE_ADDRESS_0 + (4 * i),
1749 						4, (u32)(high_base >> 32));
1750 					high_base += bar_size;
1751 				} else {
1752 					if (low_size != bar_size)
1753 						continue;
1754 					_hv_pcifront_write_config(hpdev,
1755 						PCI_BASE_ADDRESS_0 + (4 * i),
1756 						4,
1757 						(u32)(low_base & 0xffffff00));
1758 					low_base += bar_size;
1759 				}
1760 			}
1761 			if (high_size <= 1 && low_size <= 1) {
1762 				/* Set the memory enable bit. */
1763 				_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1764 							 &command);
1765 				command |= PCI_COMMAND_MEMORY;
1766 				_hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1767 							  command);
1768 				break;
1769 			}
1770 		}
1771 
1772 		high_size >>= 1;
1773 		low_size >>= 1;
1774 	}  while (high_size || low_size);
1775 
1776 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1777 }
1778 
1779 /*
1780  * Assign entries in sysfs pci slot directory.
1781  *
1782  * Note that this function does not need to lock the children list
1783  * because it is called from pci_devices_present_work which
1784  * is serialized with hv_eject_device_work because they are on the
1785  * same ordered workqueue. Therefore hbus->children list will not change
1786  * even when pci_create_slot sleeps.
1787  */
1788 static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1789 {
1790 	struct hv_pci_dev *hpdev;
1791 	char name[SLOT_NAME_SIZE];
1792 	int slot_nr;
1793 
1794 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1795 		if (hpdev->pci_slot)
1796 			continue;
1797 
1798 		slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1799 		snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1800 		hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1801 					  name, NULL);
1802 		if (IS_ERR(hpdev->pci_slot)) {
1803 			pr_warn("pci_create slot %s failed\n", name);
1804 			hpdev->pci_slot = NULL;
1805 		}
1806 	}
1807 }
1808 
1809 /*
1810  * Remove entries in sysfs pci slot directory.
1811  */
1812 static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1813 {
1814 	struct hv_pci_dev *hpdev;
1815 
1816 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1817 		if (!hpdev->pci_slot)
1818 			continue;
1819 		pci_destroy_slot(hpdev->pci_slot);
1820 		hpdev->pci_slot = NULL;
1821 	}
1822 }
1823 
1824 /*
1825  * Set NUMA node for the devices on the bus
1826  */
1827 static void hv_pci_assign_numa_node(struct hv_pcibus_device *hbus)
1828 {
1829 	struct pci_dev *dev;
1830 	struct pci_bus *bus = hbus->pci_bus;
1831 	struct hv_pci_dev *hv_dev;
1832 
1833 	list_for_each_entry(dev, &bus->devices, bus_list) {
1834 		hv_dev = get_pcichild_wslot(hbus, devfn_to_wslot(dev->devfn));
1835 		if (!hv_dev)
1836 			continue;
1837 
1838 		if (hv_dev->desc.flags & HV_PCI_DEVICE_FLAG_NUMA_AFFINITY)
1839 			set_dev_node(&dev->dev, hv_dev->desc.virtual_numa_node);
1840 
1841 		put_pcichild(hv_dev);
1842 	}
1843 }
1844 
1845 /**
1846  * create_root_hv_pci_bus() - Expose a new root PCI bus
1847  * @hbus:	Root PCI bus, as understood by this driver
1848  *
1849  * Return: 0 on success, -errno on failure
1850  */
1851 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1852 {
1853 	/* Register the device */
1854 	hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1855 					    0, /* bus number is always zero */
1856 					    &hv_pcifront_ops,
1857 					    &hbus->sysdata,
1858 					    &hbus->resources_for_children);
1859 	if (!hbus->pci_bus)
1860 		return -ENODEV;
1861 
1862 	hbus->pci_bus->msi = &hbus->msi_chip;
1863 	hbus->pci_bus->msi->dev = &hbus->hdev->device;
1864 
1865 	pci_lock_rescan_remove();
1866 	pci_scan_child_bus(hbus->pci_bus);
1867 	hv_pci_assign_numa_node(hbus);
1868 	pci_bus_assign_resources(hbus->pci_bus);
1869 	hv_pci_assign_slots(hbus);
1870 	pci_bus_add_devices(hbus->pci_bus);
1871 	pci_unlock_rescan_remove();
1872 	hbus->state = hv_pcibus_installed;
1873 	return 0;
1874 }
1875 
1876 struct q_res_req_compl {
1877 	struct completion host_event;
1878 	struct hv_pci_dev *hpdev;
1879 };
1880 
1881 /**
1882  * q_resource_requirements() - Query Resource Requirements
1883  * @context:		The completion context.
1884  * @resp:		The response that came from the host.
1885  * @resp_packet_size:	The size in bytes of resp.
1886  *
1887  * This function is invoked on completion of a Query Resource
1888  * Requirements packet.
1889  */
1890 static void q_resource_requirements(void *context, struct pci_response *resp,
1891 				    int resp_packet_size)
1892 {
1893 	struct q_res_req_compl *completion = context;
1894 	struct pci_q_res_req_response *q_res_req =
1895 		(struct pci_q_res_req_response *)resp;
1896 	int i;
1897 
1898 	if (resp->status < 0) {
1899 		dev_err(&completion->hpdev->hbus->hdev->device,
1900 			"query resource requirements failed: %x\n",
1901 			resp->status);
1902 	} else {
1903 		for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1904 			completion->hpdev->probed_bar[i] =
1905 				q_res_req->probed_bar[i];
1906 		}
1907 	}
1908 
1909 	complete(&completion->host_event);
1910 }
1911 
1912 /**
1913  * new_pcichild_device() - Create a new child device
1914  * @hbus:	The internal struct tracking this root PCI bus.
1915  * @desc:	The information supplied so far from the host
1916  *              about the device.
1917  *
1918  * This function creates the tracking structure for a new child
1919  * device and kicks off the process of figuring out what it is.
1920  *
1921  * Return: Pointer to the new tracking struct
1922  */
1923 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1924 		struct hv_pcidev_description *desc)
1925 {
1926 	struct hv_pci_dev *hpdev;
1927 	struct pci_child_message *res_req;
1928 	struct q_res_req_compl comp_pkt;
1929 	struct {
1930 		struct pci_packet init_packet;
1931 		u8 buffer[sizeof(struct pci_child_message)];
1932 	} pkt;
1933 	unsigned long flags;
1934 	int ret;
1935 
1936 	hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1937 	if (!hpdev)
1938 		return NULL;
1939 
1940 	hpdev->hbus = hbus;
1941 
1942 	memset(&pkt, 0, sizeof(pkt));
1943 	init_completion(&comp_pkt.host_event);
1944 	comp_pkt.hpdev = hpdev;
1945 	pkt.init_packet.compl_ctxt = &comp_pkt;
1946 	pkt.init_packet.completion_func = q_resource_requirements;
1947 	res_req = (struct pci_child_message *)&pkt.init_packet.message;
1948 	res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1949 	res_req->wslot.slot = desc->win_slot.slot;
1950 
1951 	ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1952 			       sizeof(struct pci_child_message),
1953 			       (unsigned long)&pkt.init_packet,
1954 			       VM_PKT_DATA_INBAND,
1955 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1956 	if (ret)
1957 		goto error;
1958 
1959 	if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1960 		goto error;
1961 
1962 	hpdev->desc = *desc;
1963 	refcount_set(&hpdev->refs, 1);
1964 	get_pcichild(hpdev);
1965 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1966 
1967 	list_add_tail(&hpdev->list_entry, &hbus->children);
1968 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1969 	return hpdev;
1970 
1971 error:
1972 	kfree(hpdev);
1973 	return NULL;
1974 }
1975 
1976 /**
1977  * get_pcichild_wslot() - Find device from slot
1978  * @hbus:	Root PCI bus, as understood by this driver
1979  * @wslot:	Location on the bus
1980  *
1981  * This function looks up a PCI device and returns the internal
1982  * representation of it.  It acquires a reference on it, so that
1983  * the device won't be deleted while somebody is using it.  The
1984  * caller is responsible for calling put_pcichild() to release
1985  * this reference.
1986  *
1987  * Return:	Internal representation of a PCI device
1988  */
1989 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1990 					     u32 wslot)
1991 {
1992 	unsigned long flags;
1993 	struct hv_pci_dev *iter, *hpdev = NULL;
1994 
1995 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1996 	list_for_each_entry(iter, &hbus->children, list_entry) {
1997 		if (iter->desc.win_slot.slot == wslot) {
1998 			hpdev = iter;
1999 			get_pcichild(hpdev);
2000 			break;
2001 		}
2002 	}
2003 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2004 
2005 	return hpdev;
2006 }
2007 
2008 /**
2009  * pci_devices_present_work() - Handle new list of child devices
2010  * @work:	Work struct embedded in struct hv_dr_work
2011  *
2012  * "Bus Relations" is the Windows term for "children of this
2013  * bus."  The terminology is preserved here for people trying to
2014  * debug the interaction between Hyper-V and Linux.  This
2015  * function is called when the parent partition reports a list
2016  * of functions that should be observed under this PCI Express
2017  * port (bus).
2018  *
2019  * This function updates the list, and must tolerate being
2020  * called multiple times with the same information.  The typical
2021  * number of child devices is one, with very atypical cases
2022  * involving three or four, so the algorithms used here can be
2023  * simple and inefficient.
2024  *
2025  * It must also treat the omission of a previously observed device as
2026  * notification that the device no longer exists.
2027  *
2028  * Note that this function is serialized with hv_eject_device_work(),
2029  * because both are pushed to the ordered workqueue hbus->wq.
2030  */
2031 static void pci_devices_present_work(struct work_struct *work)
2032 {
2033 	u32 child_no;
2034 	bool found;
2035 	struct hv_pcidev_description *new_desc;
2036 	struct hv_pci_dev *hpdev;
2037 	struct hv_pcibus_device *hbus;
2038 	struct list_head removed;
2039 	struct hv_dr_work *dr_wrk;
2040 	struct hv_dr_state *dr = NULL;
2041 	unsigned long flags;
2042 
2043 	dr_wrk = container_of(work, struct hv_dr_work, wrk);
2044 	hbus = dr_wrk->bus;
2045 	kfree(dr_wrk);
2046 
2047 	INIT_LIST_HEAD(&removed);
2048 
2049 	/* Pull this off the queue and process it if it was the last one. */
2050 	spin_lock_irqsave(&hbus->device_list_lock, flags);
2051 	while (!list_empty(&hbus->dr_list)) {
2052 		dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
2053 				      list_entry);
2054 		list_del(&dr->list_entry);
2055 
2056 		/* Throw this away if the list still has stuff in it. */
2057 		if (!list_empty(&hbus->dr_list)) {
2058 			kfree(dr);
2059 			continue;
2060 		}
2061 	}
2062 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2063 
2064 	if (!dr) {
2065 		put_hvpcibus(hbus);
2066 		return;
2067 	}
2068 
2069 	/* First, mark all existing children as reported missing. */
2070 	spin_lock_irqsave(&hbus->device_list_lock, flags);
2071 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
2072 		hpdev->reported_missing = true;
2073 	}
2074 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2075 
2076 	/* Next, add back any reported devices. */
2077 	for (child_no = 0; child_no < dr->device_count; child_no++) {
2078 		found = false;
2079 		new_desc = &dr->func[child_no];
2080 
2081 		spin_lock_irqsave(&hbus->device_list_lock, flags);
2082 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
2083 			if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
2084 			    (hpdev->desc.v_id == new_desc->v_id) &&
2085 			    (hpdev->desc.d_id == new_desc->d_id) &&
2086 			    (hpdev->desc.ser == new_desc->ser)) {
2087 				hpdev->reported_missing = false;
2088 				found = true;
2089 			}
2090 		}
2091 		spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2092 
2093 		if (!found) {
2094 			hpdev = new_pcichild_device(hbus, new_desc);
2095 			if (!hpdev)
2096 				dev_err(&hbus->hdev->device,
2097 					"couldn't record a child device.\n");
2098 		}
2099 	}
2100 
2101 	/* Move missing children to a list on the stack. */
2102 	spin_lock_irqsave(&hbus->device_list_lock, flags);
2103 	do {
2104 		found = false;
2105 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
2106 			if (hpdev->reported_missing) {
2107 				found = true;
2108 				put_pcichild(hpdev);
2109 				list_move_tail(&hpdev->list_entry, &removed);
2110 				break;
2111 			}
2112 		}
2113 	} while (found);
2114 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2115 
2116 	/* Delete everything that should no longer exist. */
2117 	while (!list_empty(&removed)) {
2118 		hpdev = list_first_entry(&removed, struct hv_pci_dev,
2119 					 list_entry);
2120 		list_del(&hpdev->list_entry);
2121 
2122 		if (hpdev->pci_slot)
2123 			pci_destroy_slot(hpdev->pci_slot);
2124 
2125 		put_pcichild(hpdev);
2126 	}
2127 
2128 	switch (hbus->state) {
2129 	case hv_pcibus_installed:
2130 		/*
2131 		 * Tell the core to rescan bus
2132 		 * because there may have been changes.
2133 		 */
2134 		pci_lock_rescan_remove();
2135 		pci_scan_child_bus(hbus->pci_bus);
2136 		hv_pci_assign_numa_node(hbus);
2137 		hv_pci_assign_slots(hbus);
2138 		pci_unlock_rescan_remove();
2139 		break;
2140 
2141 	case hv_pcibus_init:
2142 	case hv_pcibus_probed:
2143 		survey_child_resources(hbus);
2144 		break;
2145 
2146 	default:
2147 		break;
2148 	}
2149 
2150 	put_hvpcibus(hbus);
2151 	kfree(dr);
2152 }
2153 
2154 /**
2155  * hv_pci_start_relations_work() - Queue work to start device discovery
2156  * @hbus:	Root PCI bus, as understood by this driver
2157  * @dr:		The list of children returned from host
2158  *
2159  * Return:  0 on success, -errno on failure
2160  */
2161 static int hv_pci_start_relations_work(struct hv_pcibus_device *hbus,
2162 				       struct hv_dr_state *dr)
2163 {
2164 	struct hv_dr_work *dr_wrk;
2165 	unsigned long flags;
2166 	bool pending_dr;
2167 
2168 	if (hbus->state == hv_pcibus_removing) {
2169 		dev_info(&hbus->hdev->device,
2170 			 "PCI VMBus BUS_RELATIONS: ignored\n");
2171 		return -ENOENT;
2172 	}
2173 
2174 	dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
2175 	if (!dr_wrk)
2176 		return -ENOMEM;
2177 
2178 	INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
2179 	dr_wrk->bus = hbus;
2180 
2181 	spin_lock_irqsave(&hbus->device_list_lock, flags);
2182 	/*
2183 	 * If pending_dr is true, we have already queued a work,
2184 	 * which will see the new dr. Otherwise, we need to
2185 	 * queue a new work.
2186 	 */
2187 	pending_dr = !list_empty(&hbus->dr_list);
2188 	list_add_tail(&dr->list_entry, &hbus->dr_list);
2189 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2190 
2191 	if (pending_dr) {
2192 		kfree(dr_wrk);
2193 	} else {
2194 		get_hvpcibus(hbus);
2195 		queue_work(hbus->wq, &dr_wrk->wrk);
2196 	}
2197 
2198 	return 0;
2199 }
2200 
2201 /**
2202  * hv_pci_devices_present() - Handle list of new children
2203  * @hbus:      Root PCI bus, as understood by this driver
2204  * @relations: Packet from host listing children
2205  *
2206  * Process a new list of devices on the bus. The list of devices is
2207  * discovered by VSP and sent to us via VSP message PCI_BUS_RELATIONS,
2208  * whenever a new list of devices for this bus appears.
2209  */
2210 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
2211 				   struct pci_bus_relations *relations)
2212 {
2213 	struct hv_dr_state *dr;
2214 	int i;
2215 
2216 	dr = kzalloc(struct_size(dr, func, relations->device_count),
2217 		     GFP_NOWAIT);
2218 	if (!dr)
2219 		return;
2220 
2221 	dr->device_count = relations->device_count;
2222 	for (i = 0; i < dr->device_count; i++) {
2223 		dr->func[i].v_id = relations->func[i].v_id;
2224 		dr->func[i].d_id = relations->func[i].d_id;
2225 		dr->func[i].rev = relations->func[i].rev;
2226 		dr->func[i].prog_intf = relations->func[i].prog_intf;
2227 		dr->func[i].subclass = relations->func[i].subclass;
2228 		dr->func[i].base_class = relations->func[i].base_class;
2229 		dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2230 		dr->func[i].win_slot = relations->func[i].win_slot;
2231 		dr->func[i].ser = relations->func[i].ser;
2232 	}
2233 
2234 	if (hv_pci_start_relations_work(hbus, dr))
2235 		kfree(dr);
2236 }
2237 
2238 /**
2239  * hv_pci_devices_present2() - Handle list of new children
2240  * @hbus:	Root PCI bus, as understood by this driver
2241  * @relations:	Packet from host listing children
2242  *
2243  * This function is the v2 version of hv_pci_devices_present()
2244  */
2245 static void hv_pci_devices_present2(struct hv_pcibus_device *hbus,
2246 				    struct pci_bus_relations2 *relations)
2247 {
2248 	struct hv_dr_state *dr;
2249 	int i;
2250 
2251 	dr = kzalloc(struct_size(dr, func, relations->device_count),
2252 		     GFP_NOWAIT);
2253 	if (!dr)
2254 		return;
2255 
2256 	dr->device_count = relations->device_count;
2257 	for (i = 0; i < dr->device_count; i++) {
2258 		dr->func[i].v_id = relations->func[i].v_id;
2259 		dr->func[i].d_id = relations->func[i].d_id;
2260 		dr->func[i].rev = relations->func[i].rev;
2261 		dr->func[i].prog_intf = relations->func[i].prog_intf;
2262 		dr->func[i].subclass = relations->func[i].subclass;
2263 		dr->func[i].base_class = relations->func[i].base_class;
2264 		dr->func[i].subsystem_id = relations->func[i].subsystem_id;
2265 		dr->func[i].win_slot = relations->func[i].win_slot;
2266 		dr->func[i].ser = relations->func[i].ser;
2267 		dr->func[i].flags = relations->func[i].flags;
2268 		dr->func[i].virtual_numa_node =
2269 			relations->func[i].virtual_numa_node;
2270 	}
2271 
2272 	if (hv_pci_start_relations_work(hbus, dr))
2273 		kfree(dr);
2274 }
2275 
2276 /**
2277  * hv_eject_device_work() - Asynchronously handles ejection
2278  * @work:	Work struct embedded in internal device struct
2279  *
2280  * This function handles ejecting a device.  Windows will
2281  * attempt to gracefully eject a device, waiting 60 seconds to
2282  * hear back from the guest OS that this completed successfully.
2283  * If this timer expires, the device will be forcibly removed.
2284  */
2285 static void hv_eject_device_work(struct work_struct *work)
2286 {
2287 	struct pci_eject_response *ejct_pkt;
2288 	struct hv_pcibus_device *hbus;
2289 	struct hv_pci_dev *hpdev;
2290 	struct pci_dev *pdev;
2291 	unsigned long flags;
2292 	int wslot;
2293 	struct {
2294 		struct pci_packet pkt;
2295 		u8 buffer[sizeof(struct pci_eject_response)];
2296 	} ctxt;
2297 
2298 	hpdev = container_of(work, struct hv_pci_dev, wrk);
2299 	hbus = hpdev->hbus;
2300 
2301 	WARN_ON(hpdev->state != hv_pcichild_ejecting);
2302 
2303 	/*
2304 	 * Ejection can come before or after the PCI bus has been set up, so
2305 	 * attempt to find it and tear down the bus state, if it exists.  This
2306 	 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
2307 	 * because hbus->pci_bus may not exist yet.
2308 	 */
2309 	wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
2310 	pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
2311 	if (pdev) {
2312 		pci_lock_rescan_remove();
2313 		pci_stop_and_remove_bus_device(pdev);
2314 		pci_dev_put(pdev);
2315 		pci_unlock_rescan_remove();
2316 	}
2317 
2318 	spin_lock_irqsave(&hbus->device_list_lock, flags);
2319 	list_del(&hpdev->list_entry);
2320 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
2321 
2322 	if (hpdev->pci_slot)
2323 		pci_destroy_slot(hpdev->pci_slot);
2324 
2325 	memset(&ctxt, 0, sizeof(ctxt));
2326 	ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
2327 	ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
2328 	ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
2329 	vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
2330 			 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
2331 			 VM_PKT_DATA_INBAND, 0);
2332 
2333 	/* For the get_pcichild() in hv_pci_eject_device() */
2334 	put_pcichild(hpdev);
2335 	/* For the two refs got in new_pcichild_device() */
2336 	put_pcichild(hpdev);
2337 	put_pcichild(hpdev);
2338 	/* hpdev has been freed. Do not use it any more. */
2339 
2340 	put_hvpcibus(hbus);
2341 }
2342 
2343 /**
2344  * hv_pci_eject_device() - Handles device ejection
2345  * @hpdev:	Internal device tracking struct
2346  *
2347  * This function is invoked when an ejection packet arrives.  It
2348  * just schedules work so that we don't re-enter the packet
2349  * delivery code handling the ejection.
2350  */
2351 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
2352 {
2353 	struct hv_pcibus_device *hbus = hpdev->hbus;
2354 	struct hv_device *hdev = hbus->hdev;
2355 
2356 	if (hbus->state == hv_pcibus_removing) {
2357 		dev_info(&hdev->device, "PCI VMBus EJECT: ignored\n");
2358 		return;
2359 	}
2360 
2361 	hpdev->state = hv_pcichild_ejecting;
2362 	get_pcichild(hpdev);
2363 	INIT_WORK(&hpdev->wrk, hv_eject_device_work);
2364 	get_hvpcibus(hbus);
2365 	queue_work(hbus->wq, &hpdev->wrk);
2366 }
2367 
2368 /**
2369  * hv_pci_onchannelcallback() - Handles incoming packets
2370  * @context:	Internal bus tracking struct
2371  *
2372  * This function is invoked whenever the host sends a packet to
2373  * this channel (which is private to this root PCI bus).
2374  */
2375 static void hv_pci_onchannelcallback(void *context)
2376 {
2377 	const int packet_size = 0x100;
2378 	int ret;
2379 	struct hv_pcibus_device *hbus = context;
2380 	u32 bytes_recvd;
2381 	u64 req_id;
2382 	struct vmpacket_descriptor *desc;
2383 	unsigned char *buffer;
2384 	int bufferlen = packet_size;
2385 	struct pci_packet *comp_packet;
2386 	struct pci_response *response;
2387 	struct pci_incoming_message *new_message;
2388 	struct pci_bus_relations *bus_rel;
2389 	struct pci_bus_relations2 *bus_rel2;
2390 	struct pci_dev_inval_block *inval;
2391 	struct pci_dev_incoming *dev_message;
2392 	struct hv_pci_dev *hpdev;
2393 
2394 	buffer = kmalloc(bufferlen, GFP_ATOMIC);
2395 	if (!buffer)
2396 		return;
2397 
2398 	while (1) {
2399 		ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
2400 					   bufferlen, &bytes_recvd, &req_id);
2401 
2402 		if (ret == -ENOBUFS) {
2403 			kfree(buffer);
2404 			/* Handle large packet */
2405 			bufferlen = bytes_recvd;
2406 			buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
2407 			if (!buffer)
2408 				return;
2409 			continue;
2410 		}
2411 
2412 		/* Zero length indicates there are no more packets. */
2413 		if (ret || !bytes_recvd)
2414 			break;
2415 
2416 		/*
2417 		 * All incoming packets must be at least as large as a
2418 		 * response.
2419 		 */
2420 		if (bytes_recvd <= sizeof(struct pci_response))
2421 			continue;
2422 		desc = (struct vmpacket_descriptor *)buffer;
2423 
2424 		switch (desc->type) {
2425 		case VM_PKT_COMP:
2426 
2427 			/*
2428 			 * The host is trusted, and thus it's safe to interpret
2429 			 * this transaction ID as a pointer.
2430 			 */
2431 			comp_packet = (struct pci_packet *)req_id;
2432 			response = (struct pci_response *)buffer;
2433 			comp_packet->completion_func(comp_packet->compl_ctxt,
2434 						     response,
2435 						     bytes_recvd);
2436 			break;
2437 
2438 		case VM_PKT_DATA_INBAND:
2439 
2440 			new_message = (struct pci_incoming_message *)buffer;
2441 			switch (new_message->message_type.type) {
2442 			case PCI_BUS_RELATIONS:
2443 
2444 				bus_rel = (struct pci_bus_relations *)buffer;
2445 				if (bytes_recvd <
2446 					struct_size(bus_rel, func,
2447 						    bus_rel->device_count)) {
2448 					dev_err(&hbus->hdev->device,
2449 						"bus relations too small\n");
2450 					break;
2451 				}
2452 
2453 				hv_pci_devices_present(hbus, bus_rel);
2454 				break;
2455 
2456 			case PCI_BUS_RELATIONS2:
2457 
2458 				bus_rel2 = (struct pci_bus_relations2 *)buffer;
2459 				if (bytes_recvd <
2460 					struct_size(bus_rel2, func,
2461 						    bus_rel2->device_count)) {
2462 					dev_err(&hbus->hdev->device,
2463 						"bus relations v2 too small\n");
2464 					break;
2465 				}
2466 
2467 				hv_pci_devices_present2(hbus, bus_rel2);
2468 				break;
2469 
2470 			case PCI_EJECT:
2471 
2472 				dev_message = (struct pci_dev_incoming *)buffer;
2473 				hpdev = get_pcichild_wslot(hbus,
2474 						      dev_message->wslot.slot);
2475 				if (hpdev) {
2476 					hv_pci_eject_device(hpdev);
2477 					put_pcichild(hpdev);
2478 				}
2479 				break;
2480 
2481 			case PCI_INVALIDATE_BLOCK:
2482 
2483 				inval = (struct pci_dev_inval_block *)buffer;
2484 				hpdev = get_pcichild_wslot(hbus,
2485 							   inval->wslot.slot);
2486 				if (hpdev) {
2487 					if (hpdev->block_invalidate) {
2488 						hpdev->block_invalidate(
2489 						    hpdev->invalidate_context,
2490 						    inval->block_mask);
2491 					}
2492 					put_pcichild(hpdev);
2493 				}
2494 				break;
2495 
2496 			default:
2497 				dev_warn(&hbus->hdev->device,
2498 					"Unimplemented protocol message %x\n",
2499 					new_message->message_type.type);
2500 				break;
2501 			}
2502 			break;
2503 
2504 		default:
2505 			dev_err(&hbus->hdev->device,
2506 				"unhandled packet type %d, tid %llx len %d\n",
2507 				desc->type, req_id, bytes_recvd);
2508 			break;
2509 		}
2510 	}
2511 
2512 	kfree(buffer);
2513 }
2514 
2515 /**
2516  * hv_pci_protocol_negotiation() - Set up protocol
2517  * @hdev:	VMBus's tracking struct for this root PCI bus
2518  *
2519  * This driver is intended to support running on Windows 10
2520  * (server) and later versions. It will not run on earlier
2521  * versions, as they assume that many of the operations which
2522  * Linux needs accomplished with a spinlock held were done via
2523  * asynchronous messaging via VMBus.  Windows 10 increases the
2524  * surface area of PCI emulation so that these actions can take
2525  * place by suspending a virtual processor for their duration.
2526  *
2527  * This function negotiates the channel protocol version,
2528  * failing if the host doesn't support the necessary protocol
2529  * level.
2530  */
2531 static int hv_pci_protocol_negotiation(struct hv_device *hdev,
2532 				       enum pci_protocol_version_t version[],
2533 				       int num_version)
2534 {
2535 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2536 	struct pci_version_request *version_req;
2537 	struct hv_pci_compl comp_pkt;
2538 	struct pci_packet *pkt;
2539 	int ret;
2540 	int i;
2541 
2542 	/*
2543 	 * Initiate the handshake with the host and negotiate
2544 	 * a version that the host can support. We start with the
2545 	 * highest version number and go down if the host cannot
2546 	 * support it.
2547 	 */
2548 	pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2549 	if (!pkt)
2550 		return -ENOMEM;
2551 
2552 	init_completion(&comp_pkt.host_event);
2553 	pkt->completion_func = hv_pci_generic_compl;
2554 	pkt->compl_ctxt = &comp_pkt;
2555 	version_req = (struct pci_version_request *)&pkt->message;
2556 	version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2557 
2558 	for (i = 0; i < num_version; i++) {
2559 		version_req->protocol_version = version[i];
2560 		ret = vmbus_sendpacket(hdev->channel, version_req,
2561 				sizeof(struct pci_version_request),
2562 				(unsigned long)pkt, VM_PKT_DATA_INBAND,
2563 				VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2564 		if (!ret)
2565 			ret = wait_for_response(hdev, &comp_pkt.host_event);
2566 
2567 		if (ret) {
2568 			dev_err(&hdev->device,
2569 				"PCI Pass-through VSP failed to request version: %d",
2570 				ret);
2571 			goto exit;
2572 		}
2573 
2574 		if (comp_pkt.completion_status >= 0) {
2575 			hbus->protocol_version = version[i];
2576 			dev_info(&hdev->device,
2577 				"PCI VMBus probing: Using version %#x\n",
2578 				hbus->protocol_version);
2579 			goto exit;
2580 		}
2581 
2582 		if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2583 			dev_err(&hdev->device,
2584 				"PCI Pass-through VSP failed version request: %#x",
2585 				comp_pkt.completion_status);
2586 			ret = -EPROTO;
2587 			goto exit;
2588 		}
2589 
2590 		reinit_completion(&comp_pkt.host_event);
2591 	}
2592 
2593 	dev_err(&hdev->device,
2594 		"PCI pass-through VSP failed to find supported version");
2595 	ret = -EPROTO;
2596 
2597 exit:
2598 	kfree(pkt);
2599 	return ret;
2600 }
2601 
2602 /**
2603  * hv_pci_free_bridge_windows() - Release memory regions for the
2604  * bus
2605  * @hbus:	Root PCI bus, as understood by this driver
2606  */
2607 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2608 {
2609 	/*
2610 	 * Set the resources back to the way they looked when they
2611 	 * were allocated by setting IORESOURCE_BUSY again.
2612 	 */
2613 
2614 	if (hbus->low_mmio_space && hbus->low_mmio_res) {
2615 		hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2616 		vmbus_free_mmio(hbus->low_mmio_res->start,
2617 				resource_size(hbus->low_mmio_res));
2618 	}
2619 
2620 	if (hbus->high_mmio_space && hbus->high_mmio_res) {
2621 		hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2622 		vmbus_free_mmio(hbus->high_mmio_res->start,
2623 				resource_size(hbus->high_mmio_res));
2624 	}
2625 }
2626 
2627 /**
2628  * hv_pci_allocate_bridge_windows() - Allocate memory regions
2629  * for the bus
2630  * @hbus:	Root PCI bus, as understood by this driver
2631  *
2632  * This function calls vmbus_allocate_mmio(), which is itself a
2633  * bit of a compromise.  Ideally, we might change the pnp layer
2634  * in the kernel such that it comprehends either PCI devices
2635  * which are "grandchildren of ACPI," with some intermediate bus
2636  * node (in this case, VMBus) or change it such that it
2637  * understands VMBus.  The pnp layer, however, has been declared
2638  * deprecated, and not subject to change.
2639  *
2640  * The workaround, implemented here, is to ask VMBus to allocate
2641  * MMIO space for this bus.  VMBus itself knows which ranges are
2642  * appropriate by looking at its own ACPI objects.  Then, after
2643  * these ranges are claimed, they're modified to look like they
2644  * would have looked if the ACPI and pnp code had allocated
2645  * bridge windows.  These descriptors have to exist in this form
2646  * in order to satisfy the code which will get invoked when the
2647  * endpoint PCI function driver calls request_mem_region() or
2648  * request_mem_region_exclusive().
2649  *
2650  * Return: 0 on success, -errno on failure
2651  */
2652 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2653 {
2654 	resource_size_t align;
2655 	int ret;
2656 
2657 	if (hbus->low_mmio_space) {
2658 		align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2659 		ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2660 					  (u64)(u32)0xffffffff,
2661 					  hbus->low_mmio_space,
2662 					  align, false);
2663 		if (ret) {
2664 			dev_err(&hbus->hdev->device,
2665 				"Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2666 				hbus->low_mmio_space);
2667 			return ret;
2668 		}
2669 
2670 		/* Modify this resource to become a bridge window. */
2671 		hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2672 		hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2673 		pci_add_resource(&hbus->resources_for_children,
2674 				 hbus->low_mmio_res);
2675 	}
2676 
2677 	if (hbus->high_mmio_space) {
2678 		align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2679 		ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2680 					  0x100000000, -1,
2681 					  hbus->high_mmio_space, align,
2682 					  false);
2683 		if (ret) {
2684 			dev_err(&hbus->hdev->device,
2685 				"Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2686 				hbus->high_mmio_space);
2687 			goto release_low_mmio;
2688 		}
2689 
2690 		/* Modify this resource to become a bridge window. */
2691 		hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2692 		hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2693 		pci_add_resource(&hbus->resources_for_children,
2694 				 hbus->high_mmio_res);
2695 	}
2696 
2697 	return 0;
2698 
2699 release_low_mmio:
2700 	if (hbus->low_mmio_res) {
2701 		vmbus_free_mmio(hbus->low_mmio_res->start,
2702 				resource_size(hbus->low_mmio_res));
2703 	}
2704 
2705 	return ret;
2706 }
2707 
2708 /**
2709  * hv_allocate_config_window() - Find MMIO space for PCI Config
2710  * @hbus:	Root PCI bus, as understood by this driver
2711  *
2712  * This function claims memory-mapped I/O space for accessing
2713  * configuration space for the functions on this bus.
2714  *
2715  * Return: 0 on success, -errno on failure
2716  */
2717 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2718 {
2719 	int ret;
2720 
2721 	/*
2722 	 * Set up a region of MMIO space to use for accessing configuration
2723 	 * space.
2724 	 */
2725 	ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2726 				  PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2727 	if (ret)
2728 		return ret;
2729 
2730 	/*
2731 	 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2732 	 * resource claims (those which cannot be overlapped) and the ranges
2733 	 * which are valid for the children of this bus, which are intended
2734 	 * to be overlapped by those children.  Set the flag on this claim
2735 	 * meaning that this region can't be overlapped.
2736 	 */
2737 
2738 	hbus->mem_config->flags |= IORESOURCE_BUSY;
2739 
2740 	return 0;
2741 }
2742 
2743 static void hv_free_config_window(struct hv_pcibus_device *hbus)
2744 {
2745 	vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2746 }
2747 
2748 static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs);
2749 
2750 /**
2751  * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2752  * @hdev:	VMBus's tracking struct for this root PCI bus
2753  *
2754  * Return: 0 on success, -errno on failure
2755  */
2756 static int hv_pci_enter_d0(struct hv_device *hdev)
2757 {
2758 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2759 	struct pci_bus_d0_entry *d0_entry;
2760 	struct hv_pci_compl comp_pkt;
2761 	struct pci_packet *pkt;
2762 	bool retry = true;
2763 	int ret;
2764 
2765 enter_d0_retry:
2766 	/*
2767 	 * Tell the host that the bus is ready to use, and moved into the
2768 	 * powered-on state.  This includes telling the host which region
2769 	 * of memory-mapped I/O space has been chosen for configuration space
2770 	 * access.
2771 	 */
2772 	pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2773 	if (!pkt)
2774 		return -ENOMEM;
2775 
2776 	init_completion(&comp_pkt.host_event);
2777 	pkt->completion_func = hv_pci_generic_compl;
2778 	pkt->compl_ctxt = &comp_pkt;
2779 	d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2780 	d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2781 	d0_entry->mmio_base = hbus->mem_config->start;
2782 
2783 	ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2784 			       (unsigned long)pkt, VM_PKT_DATA_INBAND,
2785 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2786 	if (!ret)
2787 		ret = wait_for_response(hdev, &comp_pkt.host_event);
2788 
2789 	if (ret)
2790 		goto exit;
2791 
2792 	/*
2793 	 * In certain case (Kdump) the pci device of interest was
2794 	 * not cleanly shut down and resource is still held on host
2795 	 * side, the host could return invalid device status.
2796 	 * We need to explicitly request host to release the resource
2797 	 * and try to enter D0 again.
2798 	 */
2799 	if (comp_pkt.completion_status < 0 && retry) {
2800 		retry = false;
2801 
2802 		dev_err(&hdev->device, "Retrying D0 Entry\n");
2803 
2804 		/*
2805 		 * Hv_pci_bus_exit() calls hv_send_resource_released()
2806 		 * to free up resources of its child devices.
2807 		 * In the kdump kernel we need to set the
2808 		 * wslot_res_allocated to 255 so it scans all child
2809 		 * devices to release resources allocated in the
2810 		 * normal kernel before panic happened.
2811 		 */
2812 		hbus->wslot_res_allocated = 255;
2813 
2814 		ret = hv_pci_bus_exit(hdev, true);
2815 
2816 		if (ret == 0) {
2817 			kfree(pkt);
2818 			goto enter_d0_retry;
2819 		}
2820 		dev_err(&hdev->device,
2821 			"Retrying D0 failed with ret %d\n", ret);
2822 	}
2823 
2824 	if (comp_pkt.completion_status < 0) {
2825 		dev_err(&hdev->device,
2826 			"PCI Pass-through VSP failed D0 Entry with status %x\n",
2827 			comp_pkt.completion_status);
2828 		ret = -EPROTO;
2829 		goto exit;
2830 	}
2831 
2832 	ret = 0;
2833 
2834 exit:
2835 	kfree(pkt);
2836 	return ret;
2837 }
2838 
2839 /**
2840  * hv_pci_query_relations() - Ask host to send list of child
2841  * devices
2842  * @hdev:	VMBus's tracking struct for this root PCI bus
2843  *
2844  * Return: 0 on success, -errno on failure
2845  */
2846 static int hv_pci_query_relations(struct hv_device *hdev)
2847 {
2848 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2849 	struct pci_message message;
2850 	struct completion comp;
2851 	int ret;
2852 
2853 	/* Ask the host to send along the list of child devices */
2854 	init_completion(&comp);
2855 	if (cmpxchg(&hbus->survey_event, NULL, &comp))
2856 		return -ENOTEMPTY;
2857 
2858 	memset(&message, 0, sizeof(message));
2859 	message.type = PCI_QUERY_BUS_RELATIONS;
2860 
2861 	ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2862 			       0, VM_PKT_DATA_INBAND, 0);
2863 	if (!ret)
2864 		ret = wait_for_response(hdev, &comp);
2865 
2866 	return ret;
2867 }
2868 
2869 /**
2870  * hv_send_resources_allocated() - Report local resource choices
2871  * @hdev:	VMBus's tracking struct for this root PCI bus
2872  *
2873  * The host OS is expecting to be sent a request as a message
2874  * which contains all the resources that the device will use.
2875  * The response contains those same resources, "translated"
2876  * which is to say, the values which should be used by the
2877  * hardware, when it delivers an interrupt.  (MMIO resources are
2878  * used in local terms.)  This is nice for Windows, and lines up
2879  * with the FDO/PDO split, which doesn't exist in Linux.  Linux
2880  * is deeply expecting to scan an emulated PCI configuration
2881  * space.  So this message is sent here only to drive the state
2882  * machine on the host forward.
2883  *
2884  * Return: 0 on success, -errno on failure
2885  */
2886 static int hv_send_resources_allocated(struct hv_device *hdev)
2887 {
2888 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2889 	struct pci_resources_assigned *res_assigned;
2890 	struct pci_resources_assigned2 *res_assigned2;
2891 	struct hv_pci_compl comp_pkt;
2892 	struct hv_pci_dev *hpdev;
2893 	struct pci_packet *pkt;
2894 	size_t size_res;
2895 	int wslot;
2896 	int ret;
2897 
2898 	size_res = (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2)
2899 			? sizeof(*res_assigned) : sizeof(*res_assigned2);
2900 
2901 	pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2902 	if (!pkt)
2903 		return -ENOMEM;
2904 
2905 	ret = 0;
2906 
2907 	for (wslot = 0; wslot < 256; wslot++) {
2908 		hpdev = get_pcichild_wslot(hbus, wslot);
2909 		if (!hpdev)
2910 			continue;
2911 
2912 		memset(pkt, 0, sizeof(*pkt) + size_res);
2913 		init_completion(&comp_pkt.host_event);
2914 		pkt->completion_func = hv_pci_generic_compl;
2915 		pkt->compl_ctxt = &comp_pkt;
2916 
2917 		if (hbus->protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2918 			res_assigned =
2919 				(struct pci_resources_assigned *)&pkt->message;
2920 			res_assigned->message_type.type =
2921 				PCI_RESOURCES_ASSIGNED;
2922 			res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2923 		} else {
2924 			res_assigned2 =
2925 				(struct pci_resources_assigned2 *)&pkt->message;
2926 			res_assigned2->message_type.type =
2927 				PCI_RESOURCES_ASSIGNED2;
2928 			res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2929 		}
2930 		put_pcichild(hpdev);
2931 
2932 		ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2933 				size_res, (unsigned long)pkt,
2934 				VM_PKT_DATA_INBAND,
2935 				VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2936 		if (!ret)
2937 			ret = wait_for_response(hdev, &comp_pkt.host_event);
2938 		if (ret)
2939 			break;
2940 
2941 		if (comp_pkt.completion_status < 0) {
2942 			ret = -EPROTO;
2943 			dev_err(&hdev->device,
2944 				"resource allocated returned 0x%x",
2945 				comp_pkt.completion_status);
2946 			break;
2947 		}
2948 
2949 		hbus->wslot_res_allocated = wslot;
2950 	}
2951 
2952 	kfree(pkt);
2953 	return ret;
2954 }
2955 
2956 /**
2957  * hv_send_resources_released() - Report local resources
2958  * released
2959  * @hdev:	VMBus's tracking struct for this root PCI bus
2960  *
2961  * Return: 0 on success, -errno on failure
2962  */
2963 static int hv_send_resources_released(struct hv_device *hdev)
2964 {
2965 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2966 	struct pci_child_message pkt;
2967 	struct hv_pci_dev *hpdev;
2968 	int wslot;
2969 	int ret;
2970 
2971 	for (wslot = hbus->wslot_res_allocated; wslot >= 0; wslot--) {
2972 		hpdev = get_pcichild_wslot(hbus, wslot);
2973 		if (!hpdev)
2974 			continue;
2975 
2976 		memset(&pkt, 0, sizeof(pkt));
2977 		pkt.message_type.type = PCI_RESOURCES_RELEASED;
2978 		pkt.wslot.slot = hpdev->desc.win_slot.slot;
2979 
2980 		put_pcichild(hpdev);
2981 
2982 		ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2983 				       VM_PKT_DATA_INBAND, 0);
2984 		if (ret)
2985 			return ret;
2986 
2987 		hbus->wslot_res_allocated = wslot - 1;
2988 	}
2989 
2990 	hbus->wslot_res_allocated = -1;
2991 
2992 	return 0;
2993 }
2994 
2995 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2996 {
2997 	refcount_inc(&hbus->remove_lock);
2998 }
2999 
3000 static void put_hvpcibus(struct hv_pcibus_device *hbus)
3001 {
3002 	if (refcount_dec_and_test(&hbus->remove_lock))
3003 		complete(&hbus->remove_event);
3004 }
3005 
3006 #define HVPCI_DOM_MAP_SIZE (64 * 1024)
3007 static DECLARE_BITMAP(hvpci_dom_map, HVPCI_DOM_MAP_SIZE);
3008 
3009 /*
3010  * PCI domain number 0 is used by emulated devices on Gen1 VMs, so define 0
3011  * as invalid for passthrough PCI devices of this driver.
3012  */
3013 #define HVPCI_DOM_INVALID 0
3014 
3015 /**
3016  * hv_get_dom_num() - Get a valid PCI domain number
3017  * Check if the PCI domain number is in use, and return another number if
3018  * it is in use.
3019  *
3020  * @dom: Requested domain number
3021  *
3022  * return: domain number on success, HVPCI_DOM_INVALID on failure
3023  */
3024 static u16 hv_get_dom_num(u16 dom)
3025 {
3026 	unsigned int i;
3027 
3028 	if (test_and_set_bit(dom, hvpci_dom_map) == 0)
3029 		return dom;
3030 
3031 	for_each_clear_bit(i, hvpci_dom_map, HVPCI_DOM_MAP_SIZE) {
3032 		if (test_and_set_bit(i, hvpci_dom_map) == 0)
3033 			return i;
3034 	}
3035 
3036 	return HVPCI_DOM_INVALID;
3037 }
3038 
3039 /**
3040  * hv_put_dom_num() - Mark the PCI domain number as free
3041  * @dom: Domain number to be freed
3042  */
3043 static void hv_put_dom_num(u16 dom)
3044 {
3045 	clear_bit(dom, hvpci_dom_map);
3046 }
3047 
3048 /**
3049  * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
3050  * @hdev:	VMBus's tracking struct for this root PCI bus
3051  * @dev_id:	Identifies the device itself
3052  *
3053  * Return: 0 on success, -errno on failure
3054  */
3055 static int hv_pci_probe(struct hv_device *hdev,
3056 			const struct hv_vmbus_device_id *dev_id)
3057 {
3058 	struct hv_pcibus_device *hbus;
3059 	u16 dom_req, dom;
3060 	char *name;
3061 	int ret;
3062 
3063 	/*
3064 	 * hv_pcibus_device contains the hypercall arguments for retargeting in
3065 	 * hv_irq_unmask(). Those must not cross a page boundary.
3066 	 */
3067 	BUILD_BUG_ON(sizeof(*hbus) > HV_HYP_PAGE_SIZE);
3068 
3069 	/*
3070 	 * With the recent 59bb47985c1d ("mm, sl[aou]b: guarantee natural
3071 	 * alignment for kmalloc(power-of-two)"), kzalloc() is able to allocate
3072 	 * a 4KB buffer that is guaranteed to be 4KB-aligned. Here the size and
3073 	 * alignment of hbus is important because hbus's field
3074 	 * retarget_msi_interrupt_params must not cross a 4KB page boundary.
3075 	 *
3076 	 * Here we prefer kzalloc to get_zeroed_page(), because a buffer
3077 	 * allocated by the latter is not tracked and scanned by kmemleak, and
3078 	 * hence kmemleak reports the pointer contained in the hbus buffer
3079 	 * (i.e. the hpdev struct, which is created in new_pcichild_device() and
3080 	 * is tracked by hbus->children) as memory leak (false positive).
3081 	 *
3082 	 * If the kernel doesn't have 59bb47985c1d, get_zeroed_page() *must* be
3083 	 * used to allocate the hbus buffer and we can avoid the kmemleak false
3084 	 * positive by using kmemleak_alloc() and kmemleak_free() to ask
3085 	 * kmemleak to track and scan the hbus buffer.
3086 	 */
3087 	hbus = kzalloc(HV_HYP_PAGE_SIZE, GFP_KERNEL);
3088 	if (!hbus)
3089 		return -ENOMEM;
3090 	hbus->state = hv_pcibus_init;
3091 	hbus->wslot_res_allocated = -1;
3092 
3093 	/*
3094 	 * The PCI bus "domain" is what is called "segment" in ACPI and other
3095 	 * specs. Pull it from the instance ID, to get something usually
3096 	 * unique. In rare cases of collision, we will find out another number
3097 	 * not in use.
3098 	 *
3099 	 * Note that, since this code only runs in a Hyper-V VM, Hyper-V
3100 	 * together with this guest driver can guarantee that (1) The only
3101 	 * domain used by Gen1 VMs for something that looks like a physical
3102 	 * PCI bus (which is actually emulated by the hypervisor) is domain 0.
3103 	 * (2) There will be no overlap between domains (after fixing possible
3104 	 * collisions) in the same VM.
3105 	 */
3106 	dom_req = hdev->dev_instance.b[5] << 8 | hdev->dev_instance.b[4];
3107 	dom = hv_get_dom_num(dom_req);
3108 
3109 	if (dom == HVPCI_DOM_INVALID) {
3110 		dev_err(&hdev->device,
3111 			"Unable to use dom# 0x%hx or other numbers", dom_req);
3112 		ret = -EINVAL;
3113 		goto free_bus;
3114 	}
3115 
3116 	if (dom != dom_req)
3117 		dev_info(&hdev->device,
3118 			 "PCI dom# 0x%hx has collision, using 0x%hx",
3119 			 dom_req, dom);
3120 
3121 	hbus->sysdata.domain = dom;
3122 
3123 	hbus->hdev = hdev;
3124 	refcount_set(&hbus->remove_lock, 1);
3125 	INIT_LIST_HEAD(&hbus->children);
3126 	INIT_LIST_HEAD(&hbus->dr_list);
3127 	INIT_LIST_HEAD(&hbus->resources_for_children);
3128 	spin_lock_init(&hbus->config_lock);
3129 	spin_lock_init(&hbus->device_list_lock);
3130 	spin_lock_init(&hbus->retarget_msi_interrupt_lock);
3131 	init_completion(&hbus->remove_event);
3132 	hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
3133 					   hbus->sysdata.domain);
3134 	if (!hbus->wq) {
3135 		ret = -ENOMEM;
3136 		goto free_dom;
3137 	}
3138 
3139 	ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3140 			 hv_pci_onchannelcallback, hbus);
3141 	if (ret)
3142 		goto destroy_wq;
3143 
3144 	hv_set_drvdata(hdev, hbus);
3145 
3146 	ret = hv_pci_protocol_negotiation(hdev, pci_protocol_versions,
3147 					  ARRAY_SIZE(pci_protocol_versions));
3148 	if (ret)
3149 		goto close;
3150 
3151 	ret = hv_allocate_config_window(hbus);
3152 	if (ret)
3153 		goto close;
3154 
3155 	hbus->cfg_addr = ioremap(hbus->mem_config->start,
3156 				 PCI_CONFIG_MMIO_LENGTH);
3157 	if (!hbus->cfg_addr) {
3158 		dev_err(&hdev->device,
3159 			"Unable to map a virtual address for config space\n");
3160 		ret = -ENOMEM;
3161 		goto free_config;
3162 	}
3163 
3164 	name = kasprintf(GFP_KERNEL, "%pUL", &hdev->dev_instance);
3165 	if (!name) {
3166 		ret = -ENOMEM;
3167 		goto unmap;
3168 	}
3169 
3170 	hbus->sysdata.fwnode = irq_domain_alloc_named_fwnode(name);
3171 	kfree(name);
3172 	if (!hbus->sysdata.fwnode) {
3173 		ret = -ENOMEM;
3174 		goto unmap;
3175 	}
3176 
3177 	ret = hv_pcie_init_irq_domain(hbus);
3178 	if (ret)
3179 		goto free_fwnode;
3180 
3181 	ret = hv_pci_query_relations(hdev);
3182 	if (ret)
3183 		goto free_irq_domain;
3184 
3185 	ret = hv_pci_enter_d0(hdev);
3186 	if (ret)
3187 		goto free_irq_domain;
3188 
3189 	ret = hv_pci_allocate_bridge_windows(hbus);
3190 	if (ret)
3191 		goto exit_d0;
3192 
3193 	ret = hv_send_resources_allocated(hdev);
3194 	if (ret)
3195 		goto free_windows;
3196 
3197 	prepopulate_bars(hbus);
3198 
3199 	hbus->state = hv_pcibus_probed;
3200 
3201 	ret = create_root_hv_pci_bus(hbus);
3202 	if (ret)
3203 		goto free_windows;
3204 
3205 	return 0;
3206 
3207 free_windows:
3208 	hv_pci_free_bridge_windows(hbus);
3209 exit_d0:
3210 	(void) hv_pci_bus_exit(hdev, true);
3211 free_irq_domain:
3212 	irq_domain_remove(hbus->irq_domain);
3213 free_fwnode:
3214 	irq_domain_free_fwnode(hbus->sysdata.fwnode);
3215 unmap:
3216 	iounmap(hbus->cfg_addr);
3217 free_config:
3218 	hv_free_config_window(hbus);
3219 close:
3220 	vmbus_close(hdev->channel);
3221 destroy_wq:
3222 	destroy_workqueue(hbus->wq);
3223 free_dom:
3224 	hv_put_dom_num(hbus->sysdata.domain);
3225 free_bus:
3226 	kfree(hbus);
3227 	return ret;
3228 }
3229 
3230 static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs)
3231 {
3232 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3233 	struct {
3234 		struct pci_packet teardown_packet;
3235 		u8 buffer[sizeof(struct pci_message)];
3236 	} pkt;
3237 	struct hv_dr_state *dr;
3238 	struct hv_pci_compl comp_pkt;
3239 	int ret;
3240 
3241 	/*
3242 	 * After the host sends the RESCIND_CHANNEL message, it doesn't
3243 	 * access the per-channel ringbuffer any longer.
3244 	 */
3245 	if (hdev->channel->rescind)
3246 		return 0;
3247 
3248 	if (!keep_devs) {
3249 		/* Delete any children which might still exist. */
3250 		dr = kzalloc(sizeof(*dr), GFP_KERNEL);
3251 		if (dr && hv_pci_start_relations_work(hbus, dr))
3252 			kfree(dr);
3253 	}
3254 
3255 	ret = hv_send_resources_released(hdev);
3256 	if (ret) {
3257 		dev_err(&hdev->device,
3258 			"Couldn't send resources released packet(s)\n");
3259 		return ret;
3260 	}
3261 
3262 	memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
3263 	init_completion(&comp_pkt.host_event);
3264 	pkt.teardown_packet.completion_func = hv_pci_generic_compl;
3265 	pkt.teardown_packet.compl_ctxt = &comp_pkt;
3266 	pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
3267 
3268 	ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
3269 			       sizeof(struct pci_message),
3270 			       (unsigned long)&pkt.teardown_packet,
3271 			       VM_PKT_DATA_INBAND,
3272 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
3273 	if (ret)
3274 		return ret;
3275 
3276 	if (wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ) == 0)
3277 		return -ETIMEDOUT;
3278 
3279 	return 0;
3280 }
3281 
3282 /**
3283  * hv_pci_remove() - Remove routine for this VMBus channel
3284  * @hdev:	VMBus's tracking struct for this root PCI bus
3285  *
3286  * Return: 0 on success, -errno on failure
3287  */
3288 static int hv_pci_remove(struct hv_device *hdev)
3289 {
3290 	struct hv_pcibus_device *hbus;
3291 	int ret;
3292 
3293 	hbus = hv_get_drvdata(hdev);
3294 	if (hbus->state == hv_pcibus_installed) {
3295 		/* Remove the bus from PCI's point of view. */
3296 		pci_lock_rescan_remove();
3297 		pci_stop_root_bus(hbus->pci_bus);
3298 		hv_pci_remove_slots(hbus);
3299 		pci_remove_root_bus(hbus->pci_bus);
3300 		pci_unlock_rescan_remove();
3301 		hbus->state = hv_pcibus_removed;
3302 	}
3303 
3304 	ret = hv_pci_bus_exit(hdev, false);
3305 
3306 	vmbus_close(hdev->channel);
3307 
3308 	iounmap(hbus->cfg_addr);
3309 	hv_free_config_window(hbus);
3310 	pci_free_resource_list(&hbus->resources_for_children);
3311 	hv_pci_free_bridge_windows(hbus);
3312 	irq_domain_remove(hbus->irq_domain);
3313 	irq_domain_free_fwnode(hbus->sysdata.fwnode);
3314 	put_hvpcibus(hbus);
3315 	wait_for_completion(&hbus->remove_event);
3316 	destroy_workqueue(hbus->wq);
3317 
3318 	hv_put_dom_num(hbus->sysdata.domain);
3319 
3320 	kfree(hbus);
3321 	return ret;
3322 }
3323 
3324 static int hv_pci_suspend(struct hv_device *hdev)
3325 {
3326 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3327 	enum hv_pcibus_state old_state;
3328 	int ret;
3329 
3330 	/*
3331 	 * hv_pci_suspend() must make sure there are no pending work items
3332 	 * before calling vmbus_close(), since it runs in a process context
3333 	 * as a callback in dpm_suspend().  When it starts to run, the channel
3334 	 * callback hv_pci_onchannelcallback(), which runs in a tasklet
3335 	 * context, can be still running concurrently and scheduling new work
3336 	 * items onto hbus->wq in hv_pci_devices_present() and
3337 	 * hv_pci_eject_device(), and the work item handlers can access the
3338 	 * vmbus channel, which can be being closed by hv_pci_suspend(), e.g.
3339 	 * the work item handler pci_devices_present_work() ->
3340 	 * new_pcichild_device() writes to the vmbus channel.
3341 	 *
3342 	 * To eliminate the race, hv_pci_suspend() disables the channel
3343 	 * callback tasklet, sets hbus->state to hv_pcibus_removing, and
3344 	 * re-enables the tasklet. This way, when hv_pci_suspend() proceeds,
3345 	 * it knows that no new work item can be scheduled, and then it flushes
3346 	 * hbus->wq and safely closes the vmbus channel.
3347 	 */
3348 	tasklet_disable(&hdev->channel->callback_event);
3349 
3350 	/* Change the hbus state to prevent new work items. */
3351 	old_state = hbus->state;
3352 	if (hbus->state == hv_pcibus_installed)
3353 		hbus->state = hv_pcibus_removing;
3354 
3355 	tasklet_enable(&hdev->channel->callback_event);
3356 
3357 	if (old_state != hv_pcibus_installed)
3358 		return -EINVAL;
3359 
3360 	flush_workqueue(hbus->wq);
3361 
3362 	ret = hv_pci_bus_exit(hdev, true);
3363 	if (ret)
3364 		return ret;
3365 
3366 	vmbus_close(hdev->channel);
3367 
3368 	return 0;
3369 }
3370 
3371 static int hv_pci_resume(struct hv_device *hdev)
3372 {
3373 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
3374 	enum pci_protocol_version_t version[1];
3375 	int ret;
3376 
3377 	hbus->state = hv_pcibus_init;
3378 
3379 	ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
3380 			 hv_pci_onchannelcallback, hbus);
3381 	if (ret)
3382 		return ret;
3383 
3384 	/* Only use the version that was in use before hibernation. */
3385 	version[0] = hbus->protocol_version;
3386 	ret = hv_pci_protocol_negotiation(hdev, version, 1);
3387 	if (ret)
3388 		goto out;
3389 
3390 	ret = hv_pci_query_relations(hdev);
3391 	if (ret)
3392 		goto out;
3393 
3394 	ret = hv_pci_enter_d0(hdev);
3395 	if (ret)
3396 		goto out;
3397 
3398 	ret = hv_send_resources_allocated(hdev);
3399 	if (ret)
3400 		goto out;
3401 
3402 	prepopulate_bars(hbus);
3403 
3404 	hbus->state = hv_pcibus_installed;
3405 	return 0;
3406 out:
3407 	vmbus_close(hdev->channel);
3408 	return ret;
3409 }
3410 
3411 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
3412 	/* PCI Pass-through Class ID */
3413 	/* 44C4F61D-4444-4400-9D52-802E27EDE19F */
3414 	{ HV_PCIE_GUID, },
3415 	{ },
3416 };
3417 
3418 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
3419 
3420 static struct hv_driver hv_pci_drv = {
3421 	.name		= "hv_pci",
3422 	.id_table	= hv_pci_id_table,
3423 	.probe		= hv_pci_probe,
3424 	.remove		= hv_pci_remove,
3425 	.suspend	= hv_pci_suspend,
3426 	.resume		= hv_pci_resume,
3427 };
3428 
3429 static void __exit exit_hv_pci_drv(void)
3430 {
3431 	vmbus_driver_unregister(&hv_pci_drv);
3432 
3433 	hvpci_block_ops.read_block = NULL;
3434 	hvpci_block_ops.write_block = NULL;
3435 	hvpci_block_ops.reg_blk_invalidate = NULL;
3436 }
3437 
3438 static int __init init_hv_pci_drv(void)
3439 {
3440 	/* Set the invalid domain number's bit, so it will not be used */
3441 	set_bit(HVPCI_DOM_INVALID, hvpci_dom_map);
3442 
3443 	/* Initialize PCI block r/w interface */
3444 	hvpci_block_ops.read_block = hv_read_config_block;
3445 	hvpci_block_ops.write_block = hv_write_config_block;
3446 	hvpci_block_ops.reg_blk_invalidate = hv_register_block_invalidate;
3447 
3448 	return vmbus_driver_register(&hv_pci_drv);
3449 }
3450 
3451 module_init(init_hv_pci_drv);
3452 module_exit(exit_hv_pci_drv);
3453 
3454 MODULE_DESCRIPTION("Hyper-V PCI");
3455 MODULE_LICENSE("GPL v2");
3456