1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) Microsoft Corporation.
4  *
5  * Author:
6  *   Jake Oshins <jakeo@microsoft.com>
7  *
8  * This driver acts as a paravirtual front-end for PCI Express root buses.
9  * When a PCI Express function (either an entire device or an SR-IOV
10  * Virtual Function) is being passed through to the VM, this driver exposes
11  * a new bus to the guest VM.  This is modeled as a root PCI bus because
12  * no bridges are being exposed to the VM.  In fact, with a "Generation 2"
13  * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
14  * until a device as been exposed using this driver.
15  *
16  * Each root PCI bus has its own PCI domain, which is called "Segment" in
17  * the PCI Firmware Specifications.  Thus while each device passed through
18  * to the VM using this front-end will appear at "device 0", the domain will
19  * be unique.  Typically, each bus will have one PCI function on it, though
20  * this driver does support more than one.
21  *
22  * In order to map the interrupts from the device through to the guest VM,
23  * this driver also implements an IRQ Domain, which handles interrupts (either
24  * MSI or MSI-X) associated with the functions on the bus.  As interrupts are
25  * set up, torn down, or reaffined, this driver communicates with the
26  * underlying hypervisor to adjust the mappings in the I/O MMU so that each
27  * interrupt will be delivered to the correct virtual processor at the right
28  * vector.  This driver does not support level-triggered (line-based)
29  * interrupts, and will report that the Interrupt Line register in the
30  * function's configuration space is zero.
31  *
32  * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
33  * facilities.  For instance, the configuration space of a function exposed
34  * by Hyper-V is mapped into a single page of memory space, and the
35  * read and write handlers for config space must be aware of this mechanism.
36  * Similarly, device setup and teardown involves messages sent to and from
37  * the PCI back-end driver in Hyper-V.
38  */
39 
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/semaphore.h>
45 #include <linux/irqdomain.h>
46 #include <asm/irqdomain.h>
47 #include <asm/apic.h>
48 #include <linux/irq.h>
49 #include <linux/msi.h>
50 #include <linux/hyperv.h>
51 #include <linux/refcount.h>
52 #include <asm/mshyperv.h>
53 
54 /*
55  * Protocol versions. The low word is the minor version, the high word the
56  * major version.
57  */
58 
59 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (minor)))
60 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
61 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
62 
63 enum pci_protocol_version_t {
64 	PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1),	/* Win10 */
65 	PCI_PROTOCOL_VERSION_1_2 = PCI_MAKE_VERSION(1, 2),	/* RS1 */
66 };
67 
68 #define CPU_AFFINITY_ALL	-1ULL
69 
70 /*
71  * Supported protocol versions in the order of probing - highest go
72  * first.
73  */
74 static enum pci_protocol_version_t pci_protocol_versions[] = {
75 	PCI_PROTOCOL_VERSION_1_2,
76 	PCI_PROTOCOL_VERSION_1_1,
77 };
78 
79 /*
80  * Protocol version negotiated by hv_pci_protocol_negotiation().
81  */
82 static enum pci_protocol_version_t pci_protocol_version;
83 
84 #define PCI_CONFIG_MMIO_LENGTH	0x2000
85 #define CFG_PAGE_OFFSET 0x1000
86 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
87 
88 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
89 
90 #define STATUS_REVISION_MISMATCH 0xC0000059
91 
92 /* space for 32bit serial number as string */
93 #define SLOT_NAME_SIZE 11
94 
95 /*
96  * Message Types
97  */
98 
99 enum pci_message_type {
100 	/*
101 	 * Version 1.1
102 	 */
103 	PCI_MESSAGE_BASE                = 0x42490000,
104 	PCI_BUS_RELATIONS               = PCI_MESSAGE_BASE + 0,
105 	PCI_QUERY_BUS_RELATIONS         = PCI_MESSAGE_BASE + 1,
106 	PCI_POWER_STATE_CHANGE          = PCI_MESSAGE_BASE + 4,
107 	PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
108 	PCI_QUERY_RESOURCE_RESOURCES    = PCI_MESSAGE_BASE + 6,
109 	PCI_BUS_D0ENTRY                 = PCI_MESSAGE_BASE + 7,
110 	PCI_BUS_D0EXIT                  = PCI_MESSAGE_BASE + 8,
111 	PCI_READ_BLOCK                  = PCI_MESSAGE_BASE + 9,
112 	PCI_WRITE_BLOCK                 = PCI_MESSAGE_BASE + 0xA,
113 	PCI_EJECT                       = PCI_MESSAGE_BASE + 0xB,
114 	PCI_QUERY_STOP                  = PCI_MESSAGE_BASE + 0xC,
115 	PCI_REENABLE                    = PCI_MESSAGE_BASE + 0xD,
116 	PCI_QUERY_STOP_FAILED           = PCI_MESSAGE_BASE + 0xE,
117 	PCI_EJECTION_COMPLETE           = PCI_MESSAGE_BASE + 0xF,
118 	PCI_RESOURCES_ASSIGNED          = PCI_MESSAGE_BASE + 0x10,
119 	PCI_RESOURCES_RELEASED          = PCI_MESSAGE_BASE + 0x11,
120 	PCI_INVALIDATE_BLOCK            = PCI_MESSAGE_BASE + 0x12,
121 	PCI_QUERY_PROTOCOL_VERSION      = PCI_MESSAGE_BASE + 0x13,
122 	PCI_CREATE_INTERRUPT_MESSAGE    = PCI_MESSAGE_BASE + 0x14,
123 	PCI_DELETE_INTERRUPT_MESSAGE    = PCI_MESSAGE_BASE + 0x15,
124 	PCI_RESOURCES_ASSIGNED2		= PCI_MESSAGE_BASE + 0x16,
125 	PCI_CREATE_INTERRUPT_MESSAGE2	= PCI_MESSAGE_BASE + 0x17,
126 	PCI_DELETE_INTERRUPT_MESSAGE2	= PCI_MESSAGE_BASE + 0x18, /* unused */
127 	PCI_MESSAGE_MAXIMUM
128 };
129 
130 /*
131  * Structures defining the virtual PCI Express protocol.
132  */
133 
134 union pci_version {
135 	struct {
136 		u16 minor_version;
137 		u16 major_version;
138 	} parts;
139 	u32 version;
140 } __packed;
141 
142 /*
143  * Function numbers are 8-bits wide on Express, as interpreted through ARI,
144  * which is all this driver does.  This representation is the one used in
145  * Windows, which is what is expected when sending this back and forth with
146  * the Hyper-V parent partition.
147  */
148 union win_slot_encoding {
149 	struct {
150 		u32	dev:5;
151 		u32	func:3;
152 		u32	reserved:24;
153 	} bits;
154 	u32 slot;
155 } __packed;
156 
157 /*
158  * Pretty much as defined in the PCI Specifications.
159  */
160 struct pci_function_description {
161 	u16	v_id;	/* vendor ID */
162 	u16	d_id;	/* device ID */
163 	u8	rev;
164 	u8	prog_intf;
165 	u8	subclass;
166 	u8	base_class;
167 	u32	subsystem_id;
168 	union win_slot_encoding win_slot;
169 	u32	ser;	/* serial number */
170 } __packed;
171 
172 /**
173  * struct hv_msi_desc
174  * @vector:		IDT entry
175  * @delivery_mode:	As defined in Intel's Programmer's
176  *			Reference Manual, Volume 3, Chapter 8.
177  * @vector_count:	Number of contiguous entries in the
178  *			Interrupt Descriptor Table that are
179  *			occupied by this Message-Signaled
180  *			Interrupt. For "MSI", as first defined
181  *			in PCI 2.2, this can be between 1 and
182  *			32. For "MSI-X," as first defined in PCI
183  *			3.0, this must be 1, as each MSI-X table
184  *			entry would have its own descriptor.
185  * @reserved:		Empty space
186  * @cpu_mask:		All the target virtual processors.
187  */
188 struct hv_msi_desc {
189 	u8	vector;
190 	u8	delivery_mode;
191 	u16	vector_count;
192 	u32	reserved;
193 	u64	cpu_mask;
194 } __packed;
195 
196 /**
197  * struct hv_msi_desc2 - 1.2 version of hv_msi_desc
198  * @vector:		IDT entry
199  * @delivery_mode:	As defined in Intel's Programmer's
200  *			Reference Manual, Volume 3, Chapter 8.
201  * @vector_count:	Number of contiguous entries in the
202  *			Interrupt Descriptor Table that are
203  *			occupied by this Message-Signaled
204  *			Interrupt. For "MSI", as first defined
205  *			in PCI 2.2, this can be between 1 and
206  *			32. For "MSI-X," as first defined in PCI
207  *			3.0, this must be 1, as each MSI-X table
208  *			entry would have its own descriptor.
209  * @processor_count:	number of bits enabled in array.
210  * @processor_array:	All the target virtual processors.
211  */
212 struct hv_msi_desc2 {
213 	u8	vector;
214 	u8	delivery_mode;
215 	u16	vector_count;
216 	u16	processor_count;
217 	u16	processor_array[32];
218 } __packed;
219 
220 /**
221  * struct tran_int_desc
222  * @reserved:		unused, padding
223  * @vector_count:	same as in hv_msi_desc
224  * @data:		This is the "data payload" value that is
225  *			written by the device when it generates
226  *			a message-signaled interrupt, either MSI
227  *			or MSI-X.
228  * @address:		This is the address to which the data
229  *			payload is written on interrupt
230  *			generation.
231  */
232 struct tran_int_desc {
233 	u16	reserved;
234 	u16	vector_count;
235 	u32	data;
236 	u64	address;
237 } __packed;
238 
239 /*
240  * A generic message format for virtual PCI.
241  * Specific message formats are defined later in the file.
242  */
243 
244 struct pci_message {
245 	u32 type;
246 } __packed;
247 
248 struct pci_child_message {
249 	struct pci_message message_type;
250 	union win_slot_encoding wslot;
251 } __packed;
252 
253 struct pci_incoming_message {
254 	struct vmpacket_descriptor hdr;
255 	struct pci_message message_type;
256 } __packed;
257 
258 struct pci_response {
259 	struct vmpacket_descriptor hdr;
260 	s32 status;			/* negative values are failures */
261 } __packed;
262 
263 struct pci_packet {
264 	void (*completion_func)(void *context, struct pci_response *resp,
265 				int resp_packet_size);
266 	void *compl_ctxt;
267 
268 	struct pci_message message[0];
269 };
270 
271 /*
272  * Specific message types supporting the PCI protocol.
273  */
274 
275 /*
276  * Version negotiation message. Sent from the guest to the host.
277  * The guest is free to try different versions until the host
278  * accepts the version.
279  *
280  * pci_version: The protocol version requested.
281  * is_last_attempt: If TRUE, this is the last version guest will request.
282  * reservedz: Reserved field, set to zero.
283  */
284 
285 struct pci_version_request {
286 	struct pci_message message_type;
287 	u32 protocol_version;
288 } __packed;
289 
290 /*
291  * Bus D0 Entry.  This is sent from the guest to the host when the virtual
292  * bus (PCI Express port) is ready for action.
293  */
294 
295 struct pci_bus_d0_entry {
296 	struct pci_message message_type;
297 	u32 reserved;
298 	u64 mmio_base;
299 } __packed;
300 
301 struct pci_bus_relations {
302 	struct pci_incoming_message incoming;
303 	u32 device_count;
304 	struct pci_function_description func[0];
305 } __packed;
306 
307 struct pci_q_res_req_response {
308 	struct vmpacket_descriptor hdr;
309 	s32 status;			/* negative values are failures */
310 	u32 probed_bar[6];
311 } __packed;
312 
313 struct pci_set_power {
314 	struct pci_message message_type;
315 	union win_slot_encoding wslot;
316 	u32 power_state;		/* In Windows terms */
317 	u32 reserved;
318 } __packed;
319 
320 struct pci_set_power_response {
321 	struct vmpacket_descriptor hdr;
322 	s32 status;			/* negative values are failures */
323 	union win_slot_encoding wslot;
324 	u32 resultant_state;		/* In Windows terms */
325 	u32 reserved;
326 } __packed;
327 
328 struct pci_resources_assigned {
329 	struct pci_message message_type;
330 	union win_slot_encoding wslot;
331 	u8 memory_range[0x14][6];	/* not used here */
332 	u32 msi_descriptors;
333 	u32 reserved[4];
334 } __packed;
335 
336 struct pci_resources_assigned2 {
337 	struct pci_message message_type;
338 	union win_slot_encoding wslot;
339 	u8 memory_range[0x14][6];	/* not used here */
340 	u32 msi_descriptor_count;
341 	u8 reserved[70];
342 } __packed;
343 
344 struct pci_create_interrupt {
345 	struct pci_message message_type;
346 	union win_slot_encoding wslot;
347 	struct hv_msi_desc int_desc;
348 } __packed;
349 
350 struct pci_create_int_response {
351 	struct pci_response response;
352 	u32 reserved;
353 	struct tran_int_desc int_desc;
354 } __packed;
355 
356 struct pci_create_interrupt2 {
357 	struct pci_message message_type;
358 	union win_slot_encoding wslot;
359 	struct hv_msi_desc2 int_desc;
360 } __packed;
361 
362 struct pci_delete_interrupt {
363 	struct pci_message message_type;
364 	union win_slot_encoding wslot;
365 	struct tran_int_desc int_desc;
366 } __packed;
367 
368 struct pci_dev_incoming {
369 	struct pci_incoming_message incoming;
370 	union win_slot_encoding wslot;
371 } __packed;
372 
373 struct pci_eject_response {
374 	struct pci_message message_type;
375 	union win_slot_encoding wslot;
376 	u32 status;
377 } __packed;
378 
379 static int pci_ring_size = (4 * PAGE_SIZE);
380 
381 /*
382  * Definitions or interrupt steering hypercall.
383  */
384 #define HV_PARTITION_ID_SELF		((u64)-1)
385 #define HVCALL_RETARGET_INTERRUPT	0x7e
386 
387 struct hv_interrupt_entry {
388 	u32	source;			/* 1 for MSI(-X) */
389 	u32	reserved1;
390 	u32	address;
391 	u32	data;
392 };
393 
394 /*
395  * flags for hv_device_interrupt_target.flags
396  */
397 #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST		1
398 #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET	2
399 
400 struct hv_device_interrupt_target {
401 	u32	vector;
402 	u32	flags;
403 	union {
404 		u64		 vp_mask;
405 		struct hv_vpset vp_set;
406 	};
407 };
408 
409 struct retarget_msi_interrupt {
410 	u64	partition_id;		/* use "self" */
411 	u64	device_id;
412 	struct hv_interrupt_entry int_entry;
413 	u64	reserved2;
414 	struct hv_device_interrupt_target int_target;
415 } __packed __aligned(8);
416 
417 /*
418  * Driver specific state.
419  */
420 
421 enum hv_pcibus_state {
422 	hv_pcibus_init = 0,
423 	hv_pcibus_probed,
424 	hv_pcibus_installed,
425 	hv_pcibus_removed,
426 	hv_pcibus_maximum
427 };
428 
429 struct hv_pcibus_device {
430 	struct pci_sysdata sysdata;
431 	enum hv_pcibus_state state;
432 	refcount_t remove_lock;
433 	struct hv_device *hdev;
434 	resource_size_t low_mmio_space;
435 	resource_size_t high_mmio_space;
436 	struct resource *mem_config;
437 	struct resource *low_mmio_res;
438 	struct resource *high_mmio_res;
439 	struct completion *survey_event;
440 	struct completion remove_event;
441 	struct pci_bus *pci_bus;
442 	spinlock_t config_lock;	/* Avoid two threads writing index page */
443 	spinlock_t device_list_lock;	/* Protect lists below */
444 	void __iomem *cfg_addr;
445 
446 	struct list_head resources_for_children;
447 
448 	struct list_head children;
449 	struct list_head dr_list;
450 
451 	struct msi_domain_info msi_info;
452 	struct msi_controller msi_chip;
453 	struct irq_domain *irq_domain;
454 
455 	spinlock_t retarget_msi_interrupt_lock;
456 
457 	struct workqueue_struct *wq;
458 
459 	/* hypercall arg, must not cross page boundary */
460 	struct retarget_msi_interrupt retarget_msi_interrupt_params;
461 
462 	/*
463 	 * Don't put anything here: retarget_msi_interrupt_params must be last
464 	 */
465 };
466 
467 /*
468  * Tracks "Device Relations" messages from the host, which must be both
469  * processed in order and deferred so that they don't run in the context
470  * of the incoming packet callback.
471  */
472 struct hv_dr_work {
473 	struct work_struct wrk;
474 	struct hv_pcibus_device *bus;
475 };
476 
477 struct hv_dr_state {
478 	struct list_head list_entry;
479 	u32 device_count;
480 	struct pci_function_description func[0];
481 };
482 
483 enum hv_pcichild_state {
484 	hv_pcichild_init = 0,
485 	hv_pcichild_requirements,
486 	hv_pcichild_resourced,
487 	hv_pcichild_ejecting,
488 	hv_pcichild_maximum
489 };
490 
491 struct hv_pci_dev {
492 	/* List protected by pci_rescan_remove_lock */
493 	struct list_head list_entry;
494 	refcount_t refs;
495 	enum hv_pcichild_state state;
496 	struct pci_slot *pci_slot;
497 	struct pci_function_description desc;
498 	bool reported_missing;
499 	struct hv_pcibus_device *hbus;
500 	struct work_struct wrk;
501 
502 	/*
503 	 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
504 	 * read it back, for each of the BAR offsets within config space.
505 	 */
506 	u32 probed_bar[6];
507 };
508 
509 struct hv_pci_compl {
510 	struct completion host_event;
511 	s32 completion_status;
512 };
513 
514 static void hv_pci_onchannelcallback(void *context);
515 
516 /**
517  * hv_pci_generic_compl() - Invoked for a completion packet
518  * @context:		Set up by the sender of the packet.
519  * @resp:		The response packet
520  * @resp_packet_size:	Size in bytes of the packet
521  *
522  * This function is used to trigger an event and report status
523  * for any message for which the completion packet contains a
524  * status and nothing else.
525  */
526 static void hv_pci_generic_compl(void *context, struct pci_response *resp,
527 				 int resp_packet_size)
528 {
529 	struct hv_pci_compl *comp_pkt = context;
530 
531 	if (resp_packet_size >= offsetofend(struct pci_response, status))
532 		comp_pkt->completion_status = resp->status;
533 	else
534 		comp_pkt->completion_status = -1;
535 
536 	complete(&comp_pkt->host_event);
537 }
538 
539 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
540 						u32 wslot);
541 
542 static void get_pcichild(struct hv_pci_dev *hpdev)
543 {
544 	refcount_inc(&hpdev->refs);
545 }
546 
547 static void put_pcichild(struct hv_pci_dev *hpdev)
548 {
549 	if (refcount_dec_and_test(&hpdev->refs))
550 		kfree(hpdev);
551 }
552 
553 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
554 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
555 
556 /*
557  * There is no good way to get notified from vmbus_onoffer_rescind(),
558  * so let's use polling here, since this is not a hot path.
559  */
560 static int wait_for_response(struct hv_device *hdev,
561 			     struct completion *comp)
562 {
563 	while (true) {
564 		if (hdev->channel->rescind) {
565 			dev_warn_once(&hdev->device, "The device is gone.\n");
566 			return -ENODEV;
567 		}
568 
569 		if (wait_for_completion_timeout(comp, HZ / 10))
570 			break;
571 	}
572 
573 	return 0;
574 }
575 
576 /**
577  * devfn_to_wslot() - Convert from Linux PCI slot to Windows
578  * @devfn:	The Linux representation of PCI slot
579  *
580  * Windows uses a slightly different representation of PCI slot.
581  *
582  * Return: The Windows representation
583  */
584 static u32 devfn_to_wslot(int devfn)
585 {
586 	union win_slot_encoding wslot;
587 
588 	wslot.slot = 0;
589 	wslot.bits.dev = PCI_SLOT(devfn);
590 	wslot.bits.func = PCI_FUNC(devfn);
591 
592 	return wslot.slot;
593 }
594 
595 /**
596  * wslot_to_devfn() - Convert from Windows PCI slot to Linux
597  * @wslot:	The Windows representation of PCI slot
598  *
599  * Windows uses a slightly different representation of PCI slot.
600  *
601  * Return: The Linux representation
602  */
603 static int wslot_to_devfn(u32 wslot)
604 {
605 	union win_slot_encoding slot_no;
606 
607 	slot_no.slot = wslot;
608 	return PCI_DEVFN(slot_no.bits.dev, slot_no.bits.func);
609 }
610 
611 /*
612  * PCI Configuration Space for these root PCI buses is implemented as a pair
613  * of pages in memory-mapped I/O space.  Writing to the first page chooses
614  * the PCI function being written or read.  Once the first page has been
615  * written to, the following page maps in the entire configuration space of
616  * the function.
617  */
618 
619 /**
620  * _hv_pcifront_read_config() - Internal PCI config read
621  * @hpdev:	The PCI driver's representation of the device
622  * @where:	Offset within config space
623  * @size:	Size of the transfer
624  * @val:	Pointer to the buffer receiving the data
625  */
626 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
627 				     int size, u32 *val)
628 {
629 	unsigned long flags;
630 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
631 
632 	/*
633 	 * If the attempt is to read the IDs or the ROM BAR, simulate that.
634 	 */
635 	if (where + size <= PCI_COMMAND) {
636 		memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
637 	} else if (where >= PCI_CLASS_REVISION && where + size <=
638 		   PCI_CACHE_LINE_SIZE) {
639 		memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
640 		       PCI_CLASS_REVISION, size);
641 	} else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
642 		   PCI_ROM_ADDRESS) {
643 		memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
644 		       PCI_SUBSYSTEM_VENDOR_ID, size);
645 	} else if (where >= PCI_ROM_ADDRESS && where + size <=
646 		   PCI_CAPABILITY_LIST) {
647 		/* ROM BARs are unimplemented */
648 		*val = 0;
649 	} else if (where >= PCI_INTERRUPT_LINE && where + size <=
650 		   PCI_INTERRUPT_PIN) {
651 		/*
652 		 * Interrupt Line and Interrupt PIN are hard-wired to zero
653 		 * because this front-end only supports message-signaled
654 		 * interrupts.
655 		 */
656 		*val = 0;
657 	} else if (where + size <= CFG_PAGE_SIZE) {
658 		spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
659 		/* Choose the function to be read. (See comment above) */
660 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
661 		/* Make sure the function was chosen before we start reading. */
662 		mb();
663 		/* Read from that function's config space. */
664 		switch (size) {
665 		case 1:
666 			*val = readb(addr);
667 			break;
668 		case 2:
669 			*val = readw(addr);
670 			break;
671 		default:
672 			*val = readl(addr);
673 			break;
674 		}
675 		/*
676 		 * Make sure the read was done before we release the spinlock
677 		 * allowing consecutive reads/writes.
678 		 */
679 		mb();
680 		spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
681 	} else {
682 		dev_err(&hpdev->hbus->hdev->device,
683 			"Attempt to read beyond a function's config space.\n");
684 	}
685 }
686 
687 static u16 hv_pcifront_get_vendor_id(struct hv_pci_dev *hpdev)
688 {
689 	u16 ret;
690 	unsigned long flags;
691 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET +
692 			     PCI_VENDOR_ID;
693 
694 	spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
695 
696 	/* Choose the function to be read. (See comment above) */
697 	writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
698 	/* Make sure the function was chosen before we start reading. */
699 	mb();
700 	/* Read from that function's config space. */
701 	ret = readw(addr);
702 	/*
703 	 * mb() is not required here, because the spin_unlock_irqrestore()
704 	 * is a barrier.
705 	 */
706 
707 	spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
708 
709 	return ret;
710 }
711 
712 /**
713  * _hv_pcifront_write_config() - Internal PCI config write
714  * @hpdev:	The PCI driver's representation of the device
715  * @where:	Offset within config space
716  * @size:	Size of the transfer
717  * @val:	The data being transferred
718  */
719 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
720 				      int size, u32 val)
721 {
722 	unsigned long flags;
723 	void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
724 
725 	if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
726 	    where + size <= PCI_CAPABILITY_LIST) {
727 		/* SSIDs and ROM BARs are read-only */
728 	} else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
729 		spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
730 		/* Choose the function to be written. (See comment above) */
731 		writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
732 		/* Make sure the function was chosen before we start writing. */
733 		wmb();
734 		/* Write to that function's config space. */
735 		switch (size) {
736 		case 1:
737 			writeb(val, addr);
738 			break;
739 		case 2:
740 			writew(val, addr);
741 			break;
742 		default:
743 			writel(val, addr);
744 			break;
745 		}
746 		/*
747 		 * Make sure the write was done before we release the spinlock
748 		 * allowing consecutive reads/writes.
749 		 */
750 		mb();
751 		spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
752 	} else {
753 		dev_err(&hpdev->hbus->hdev->device,
754 			"Attempt to write beyond a function's config space.\n");
755 	}
756 }
757 
758 /**
759  * hv_pcifront_read_config() - Read configuration space
760  * @bus: PCI Bus structure
761  * @devfn: Device/function
762  * @where: Offset from base
763  * @size: Byte/word/dword
764  * @val: Value to be read
765  *
766  * Return: PCIBIOS_SUCCESSFUL on success
767  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
768  */
769 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
770 				   int where, int size, u32 *val)
771 {
772 	struct hv_pcibus_device *hbus =
773 		container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
774 	struct hv_pci_dev *hpdev;
775 
776 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
777 	if (!hpdev)
778 		return PCIBIOS_DEVICE_NOT_FOUND;
779 
780 	_hv_pcifront_read_config(hpdev, where, size, val);
781 
782 	put_pcichild(hpdev);
783 	return PCIBIOS_SUCCESSFUL;
784 }
785 
786 /**
787  * hv_pcifront_write_config() - Write configuration space
788  * @bus: PCI Bus structure
789  * @devfn: Device/function
790  * @where: Offset from base
791  * @size: Byte/word/dword
792  * @val: Value to be written to device
793  *
794  * Return: PCIBIOS_SUCCESSFUL on success
795  *	   PCIBIOS_DEVICE_NOT_FOUND on failure
796  */
797 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
798 				    int where, int size, u32 val)
799 {
800 	struct hv_pcibus_device *hbus =
801 	    container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
802 	struct hv_pci_dev *hpdev;
803 
804 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
805 	if (!hpdev)
806 		return PCIBIOS_DEVICE_NOT_FOUND;
807 
808 	_hv_pcifront_write_config(hpdev, where, size, val);
809 
810 	put_pcichild(hpdev);
811 	return PCIBIOS_SUCCESSFUL;
812 }
813 
814 /* PCIe operations */
815 static struct pci_ops hv_pcifront_ops = {
816 	.read  = hv_pcifront_read_config,
817 	.write = hv_pcifront_write_config,
818 };
819 
820 /* Interrupt management hooks */
821 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
822 			     struct tran_int_desc *int_desc)
823 {
824 	struct pci_delete_interrupt *int_pkt;
825 	struct {
826 		struct pci_packet pkt;
827 		u8 buffer[sizeof(struct pci_delete_interrupt)];
828 	} ctxt;
829 
830 	memset(&ctxt, 0, sizeof(ctxt));
831 	int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
832 	int_pkt->message_type.type =
833 		PCI_DELETE_INTERRUPT_MESSAGE;
834 	int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
835 	int_pkt->int_desc = *int_desc;
836 	vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
837 			 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
838 	kfree(int_desc);
839 }
840 
841 /**
842  * hv_msi_free() - Free the MSI.
843  * @domain:	The interrupt domain pointer
844  * @info:	Extra MSI-related context
845  * @irq:	Identifies the IRQ.
846  *
847  * The Hyper-V parent partition and hypervisor are tracking the
848  * messages that are in use, keeping the interrupt redirection
849  * table up to date.  This callback sends a message that frees
850  * the IRT entry and related tracking nonsense.
851  */
852 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
853 			unsigned int irq)
854 {
855 	struct hv_pcibus_device *hbus;
856 	struct hv_pci_dev *hpdev;
857 	struct pci_dev *pdev;
858 	struct tran_int_desc *int_desc;
859 	struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
860 	struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
861 
862 	pdev = msi_desc_to_pci_dev(msi);
863 	hbus = info->data;
864 	int_desc = irq_data_get_irq_chip_data(irq_data);
865 	if (!int_desc)
866 		return;
867 
868 	irq_data->chip_data = NULL;
869 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
870 	if (!hpdev) {
871 		kfree(int_desc);
872 		return;
873 	}
874 
875 	hv_int_desc_free(hpdev, int_desc);
876 	put_pcichild(hpdev);
877 }
878 
879 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
880 			   bool force)
881 {
882 	struct irq_data *parent = data->parent_data;
883 
884 	return parent->chip->irq_set_affinity(parent, dest, force);
885 }
886 
887 static void hv_irq_mask(struct irq_data *data)
888 {
889 	pci_msi_mask_irq(data);
890 }
891 
892 /**
893  * hv_irq_unmask() - "Unmask" the IRQ by setting its current
894  * affinity.
895  * @data:	Describes the IRQ
896  *
897  * Build new a destination for the MSI and make a hypercall to
898  * update the Interrupt Redirection Table. "Device Logical ID"
899  * is built out of this PCI bus's instance GUID and the function
900  * number of the device.
901  */
902 static void hv_irq_unmask(struct irq_data *data)
903 {
904 	struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
905 	struct irq_cfg *cfg = irqd_cfg(data);
906 	struct retarget_msi_interrupt *params;
907 	struct hv_pcibus_device *hbus;
908 	struct cpumask *dest;
909 	cpumask_var_t tmp;
910 	struct pci_bus *pbus;
911 	struct pci_dev *pdev;
912 	unsigned long flags;
913 	u32 var_size = 0;
914 	int cpu, nr_bank;
915 	u64 res;
916 
917 	dest = irq_data_get_effective_affinity_mask(data);
918 	pdev = msi_desc_to_pci_dev(msi_desc);
919 	pbus = pdev->bus;
920 	hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
921 
922 	spin_lock_irqsave(&hbus->retarget_msi_interrupt_lock, flags);
923 
924 	params = &hbus->retarget_msi_interrupt_params;
925 	memset(params, 0, sizeof(*params));
926 	params->partition_id = HV_PARTITION_ID_SELF;
927 	params->int_entry.source = 1; /* MSI(-X) */
928 	params->int_entry.address = msi_desc->msg.address_lo;
929 	params->int_entry.data = msi_desc->msg.data;
930 	params->device_id = (hbus->hdev->dev_instance.b[5] << 24) |
931 			   (hbus->hdev->dev_instance.b[4] << 16) |
932 			   (hbus->hdev->dev_instance.b[7] << 8) |
933 			   (hbus->hdev->dev_instance.b[6] & 0xf8) |
934 			   PCI_FUNC(pdev->devfn);
935 	params->int_target.vector = cfg->vector;
936 
937 	/*
938 	 * Honoring apic->irq_delivery_mode set to dest_Fixed by
939 	 * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a
940 	 * spurious interrupt storm. Not doing so does not seem to have a
941 	 * negative effect (yet?).
942 	 */
943 
944 	if (pci_protocol_version >= PCI_PROTOCOL_VERSION_1_2) {
945 		/*
946 		 * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the
947 		 * HVCALL_RETARGET_INTERRUPT hypercall, which also coincides
948 		 * with >64 VP support.
949 		 * ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED
950 		 * is not sufficient for this hypercall.
951 		 */
952 		params->int_target.flags |=
953 			HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET;
954 
955 		if (!alloc_cpumask_var(&tmp, GFP_ATOMIC)) {
956 			res = 1;
957 			goto exit_unlock;
958 		}
959 
960 		cpumask_and(tmp, dest, cpu_online_mask);
961 		nr_bank = cpumask_to_vpset(&params->int_target.vp_set, tmp);
962 		free_cpumask_var(tmp);
963 
964 		if (nr_bank <= 0) {
965 			res = 1;
966 			goto exit_unlock;
967 		}
968 
969 		/*
970 		 * var-sized hypercall, var-size starts after vp_mask (thus
971 		 * vp_set.format does not count, but vp_set.valid_bank_mask
972 		 * does).
973 		 */
974 		var_size = 1 + nr_bank;
975 	} else {
976 		for_each_cpu_and(cpu, dest, cpu_online_mask) {
977 			params->int_target.vp_mask |=
978 				(1ULL << hv_cpu_number_to_vp_number(cpu));
979 		}
980 	}
981 
982 	res = hv_do_hypercall(HVCALL_RETARGET_INTERRUPT | (var_size << 17),
983 			      params, NULL);
984 
985 exit_unlock:
986 	spin_unlock_irqrestore(&hbus->retarget_msi_interrupt_lock, flags);
987 
988 	if (res) {
989 		dev_err(&hbus->hdev->device,
990 			"%s() failed: %#llx", __func__, res);
991 		return;
992 	}
993 
994 	pci_msi_unmask_irq(data);
995 }
996 
997 struct compose_comp_ctxt {
998 	struct hv_pci_compl comp_pkt;
999 	struct tran_int_desc int_desc;
1000 };
1001 
1002 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
1003 				 int resp_packet_size)
1004 {
1005 	struct compose_comp_ctxt *comp_pkt = context;
1006 	struct pci_create_int_response *int_resp =
1007 		(struct pci_create_int_response *)resp;
1008 
1009 	comp_pkt->comp_pkt.completion_status = resp->status;
1010 	comp_pkt->int_desc = int_resp->int_desc;
1011 	complete(&comp_pkt->comp_pkt.host_event);
1012 }
1013 
1014 static u32 hv_compose_msi_req_v1(
1015 	struct pci_create_interrupt *int_pkt, struct cpumask *affinity,
1016 	u32 slot, u8 vector)
1017 {
1018 	int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
1019 	int_pkt->wslot.slot = slot;
1020 	int_pkt->int_desc.vector = vector;
1021 	int_pkt->int_desc.vector_count = 1;
1022 	int_pkt->int_desc.delivery_mode = dest_Fixed;
1023 
1024 	/*
1025 	 * Create MSI w/ dummy vCPU set, overwritten by subsequent retarget in
1026 	 * hv_irq_unmask().
1027 	 */
1028 	int_pkt->int_desc.cpu_mask = CPU_AFFINITY_ALL;
1029 
1030 	return sizeof(*int_pkt);
1031 }
1032 
1033 static u32 hv_compose_msi_req_v2(
1034 	struct pci_create_interrupt2 *int_pkt, struct cpumask *affinity,
1035 	u32 slot, u8 vector)
1036 {
1037 	int cpu;
1038 
1039 	int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE2;
1040 	int_pkt->wslot.slot = slot;
1041 	int_pkt->int_desc.vector = vector;
1042 	int_pkt->int_desc.vector_count = 1;
1043 	int_pkt->int_desc.delivery_mode = dest_Fixed;
1044 
1045 	/*
1046 	 * Create MSI w/ dummy vCPU set targeting just one vCPU, overwritten
1047 	 * by subsequent retarget in hv_irq_unmask().
1048 	 */
1049 	cpu = cpumask_first_and(affinity, cpu_online_mask);
1050 	int_pkt->int_desc.processor_array[0] =
1051 		hv_cpu_number_to_vp_number(cpu);
1052 	int_pkt->int_desc.processor_count = 1;
1053 
1054 	return sizeof(*int_pkt);
1055 }
1056 
1057 /**
1058  * hv_compose_msi_msg() - Supplies a valid MSI address/data
1059  * @data:	Everything about this MSI
1060  * @msg:	Buffer that is filled in by this function
1061  *
1062  * This function unpacks the IRQ looking for target CPU set, IDT
1063  * vector and mode and sends a message to the parent partition
1064  * asking for a mapping for that tuple in this partition.  The
1065  * response supplies a data value and address to which that data
1066  * should be written to trigger that interrupt.
1067  */
1068 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1069 {
1070 	struct irq_cfg *cfg = irqd_cfg(data);
1071 	struct hv_pcibus_device *hbus;
1072 	struct hv_pci_dev *hpdev;
1073 	struct pci_bus *pbus;
1074 	struct pci_dev *pdev;
1075 	struct cpumask *dest;
1076 	unsigned long flags;
1077 	struct compose_comp_ctxt comp;
1078 	struct tran_int_desc *int_desc;
1079 	struct {
1080 		struct pci_packet pci_pkt;
1081 		union {
1082 			struct pci_create_interrupt v1;
1083 			struct pci_create_interrupt2 v2;
1084 		} int_pkts;
1085 	} __packed ctxt;
1086 
1087 	u32 size;
1088 	int ret;
1089 
1090 	pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
1091 	dest = irq_data_get_effective_affinity_mask(data);
1092 	pbus = pdev->bus;
1093 	hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
1094 	hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
1095 	if (!hpdev)
1096 		goto return_null_message;
1097 
1098 	/* Free any previous message that might have already been composed. */
1099 	if (data->chip_data) {
1100 		int_desc = data->chip_data;
1101 		data->chip_data = NULL;
1102 		hv_int_desc_free(hpdev, int_desc);
1103 	}
1104 
1105 	int_desc = kzalloc(sizeof(*int_desc), GFP_ATOMIC);
1106 	if (!int_desc)
1107 		goto drop_reference;
1108 
1109 	memset(&ctxt, 0, sizeof(ctxt));
1110 	init_completion(&comp.comp_pkt.host_event);
1111 	ctxt.pci_pkt.completion_func = hv_pci_compose_compl;
1112 	ctxt.pci_pkt.compl_ctxt = &comp;
1113 
1114 	switch (pci_protocol_version) {
1115 	case PCI_PROTOCOL_VERSION_1_1:
1116 		size = hv_compose_msi_req_v1(&ctxt.int_pkts.v1,
1117 					dest,
1118 					hpdev->desc.win_slot.slot,
1119 					cfg->vector);
1120 		break;
1121 
1122 	case PCI_PROTOCOL_VERSION_1_2:
1123 		size = hv_compose_msi_req_v2(&ctxt.int_pkts.v2,
1124 					dest,
1125 					hpdev->desc.win_slot.slot,
1126 					cfg->vector);
1127 		break;
1128 
1129 	default:
1130 		/* As we only negotiate protocol versions known to this driver,
1131 		 * this path should never hit. However, this is it not a hot
1132 		 * path so we print a message to aid future updates.
1133 		 */
1134 		dev_err(&hbus->hdev->device,
1135 			"Unexpected vPCI protocol, update driver.");
1136 		goto free_int_desc;
1137 	}
1138 
1139 	ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, &ctxt.int_pkts,
1140 			       size, (unsigned long)&ctxt.pci_pkt,
1141 			       VM_PKT_DATA_INBAND,
1142 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1143 	if (ret) {
1144 		dev_err(&hbus->hdev->device,
1145 			"Sending request for interrupt failed: 0x%x",
1146 			comp.comp_pkt.completion_status);
1147 		goto free_int_desc;
1148 	}
1149 
1150 	/*
1151 	 * Since this function is called with IRQ locks held, can't
1152 	 * do normal wait for completion; instead poll.
1153 	 */
1154 	while (!try_wait_for_completion(&comp.comp_pkt.host_event)) {
1155 		/* 0xFFFF means an invalid PCI VENDOR ID. */
1156 		if (hv_pcifront_get_vendor_id(hpdev) == 0xFFFF) {
1157 			dev_err_once(&hbus->hdev->device,
1158 				     "the device has gone\n");
1159 			goto free_int_desc;
1160 		}
1161 
1162 		/*
1163 		 * When the higher level interrupt code calls us with
1164 		 * interrupt disabled, we must poll the channel by calling
1165 		 * the channel callback directly when channel->target_cpu is
1166 		 * the current CPU. When the higher level interrupt code
1167 		 * calls us with interrupt enabled, let's add the
1168 		 * local_irq_save()/restore() to avoid race:
1169 		 * hv_pci_onchannelcallback() can also run in tasklet.
1170 		 */
1171 		local_irq_save(flags);
1172 
1173 		if (hbus->hdev->channel->target_cpu == smp_processor_id())
1174 			hv_pci_onchannelcallback(hbus);
1175 
1176 		local_irq_restore(flags);
1177 
1178 		if (hpdev->state == hv_pcichild_ejecting) {
1179 			dev_err_once(&hbus->hdev->device,
1180 				     "the device is being ejected\n");
1181 			goto free_int_desc;
1182 		}
1183 
1184 		udelay(100);
1185 	}
1186 
1187 	if (comp.comp_pkt.completion_status < 0) {
1188 		dev_err(&hbus->hdev->device,
1189 			"Request for interrupt failed: 0x%x",
1190 			comp.comp_pkt.completion_status);
1191 		goto free_int_desc;
1192 	}
1193 
1194 	/*
1195 	 * Record the assignment so that this can be unwound later. Using
1196 	 * irq_set_chip_data() here would be appropriate, but the lock it takes
1197 	 * is already held.
1198 	 */
1199 	*int_desc = comp.int_desc;
1200 	data->chip_data = int_desc;
1201 
1202 	/* Pass up the result. */
1203 	msg->address_hi = comp.int_desc.address >> 32;
1204 	msg->address_lo = comp.int_desc.address & 0xffffffff;
1205 	msg->data = comp.int_desc.data;
1206 
1207 	put_pcichild(hpdev);
1208 	return;
1209 
1210 free_int_desc:
1211 	kfree(int_desc);
1212 drop_reference:
1213 	put_pcichild(hpdev);
1214 return_null_message:
1215 	msg->address_hi = 0;
1216 	msg->address_lo = 0;
1217 	msg->data = 0;
1218 }
1219 
1220 /* HW Interrupt Chip Descriptor */
1221 static struct irq_chip hv_msi_irq_chip = {
1222 	.name			= "Hyper-V PCIe MSI",
1223 	.irq_compose_msi_msg	= hv_compose_msi_msg,
1224 	.irq_set_affinity	= hv_set_affinity,
1225 	.irq_ack		= irq_chip_ack_parent,
1226 	.irq_mask		= hv_irq_mask,
1227 	.irq_unmask		= hv_irq_unmask,
1228 };
1229 
1230 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
1231 						   msi_alloc_info_t *arg)
1232 {
1233 	return arg->msi_hwirq;
1234 }
1235 
1236 static struct msi_domain_ops hv_msi_ops = {
1237 	.get_hwirq	= hv_msi_domain_ops_get_hwirq,
1238 	.msi_prepare	= pci_msi_prepare,
1239 	.set_desc	= pci_msi_set_desc,
1240 	.msi_free	= hv_msi_free,
1241 };
1242 
1243 /**
1244  * hv_pcie_init_irq_domain() - Initialize IRQ domain
1245  * @hbus:	The root PCI bus
1246  *
1247  * This function creates an IRQ domain which will be used for
1248  * interrupts from devices that have been passed through.  These
1249  * devices only support MSI and MSI-X, not line-based interrupts
1250  * or simulations of line-based interrupts through PCIe's
1251  * fabric-layer messages.  Because interrupts are remapped, we
1252  * can support multi-message MSI here.
1253  *
1254  * Return: '0' on success and error value on failure
1255  */
1256 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
1257 {
1258 	hbus->msi_info.chip = &hv_msi_irq_chip;
1259 	hbus->msi_info.ops = &hv_msi_ops;
1260 	hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
1261 		MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
1262 		MSI_FLAG_PCI_MSIX);
1263 	hbus->msi_info.handler = handle_edge_irq;
1264 	hbus->msi_info.handler_name = "edge";
1265 	hbus->msi_info.data = hbus;
1266 	hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
1267 						     &hbus->msi_info,
1268 						     x86_vector_domain);
1269 	if (!hbus->irq_domain) {
1270 		dev_err(&hbus->hdev->device,
1271 			"Failed to build an MSI IRQ domain\n");
1272 		return -ENODEV;
1273 	}
1274 
1275 	return 0;
1276 }
1277 
1278 /**
1279  * get_bar_size() - Get the address space consumed by a BAR
1280  * @bar_val:	Value that a BAR returned after -1 was written
1281  *              to it.
1282  *
1283  * This function returns the size of the BAR, rounded up to 1
1284  * page.  It has to be rounded up because the hypervisor's page
1285  * table entry that maps the BAR into the VM can't specify an
1286  * offset within a page.  The invariant is that the hypervisor
1287  * must place any BARs of smaller than page length at the
1288  * beginning of a page.
1289  *
1290  * Return:	Size in bytes of the consumed MMIO space.
1291  */
1292 static u64 get_bar_size(u64 bar_val)
1293 {
1294 	return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1295 			PAGE_SIZE);
1296 }
1297 
1298 /**
1299  * survey_child_resources() - Total all MMIO requirements
1300  * @hbus:	Root PCI bus, as understood by this driver
1301  */
1302 static void survey_child_resources(struct hv_pcibus_device *hbus)
1303 {
1304 	struct hv_pci_dev *hpdev;
1305 	resource_size_t bar_size = 0;
1306 	unsigned long flags;
1307 	struct completion *event;
1308 	u64 bar_val;
1309 	int i;
1310 
1311 	/* If nobody is waiting on the answer, don't compute it. */
1312 	event = xchg(&hbus->survey_event, NULL);
1313 	if (!event)
1314 		return;
1315 
1316 	/* If the answer has already been computed, go with it. */
1317 	if (hbus->low_mmio_space || hbus->high_mmio_space) {
1318 		complete(event);
1319 		return;
1320 	}
1321 
1322 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1323 
1324 	/*
1325 	 * Due to an interesting quirk of the PCI spec, all memory regions
1326 	 * for a child device are a power of 2 in size and aligned in memory,
1327 	 * so it's sufficient to just add them up without tracking alignment.
1328 	 */
1329 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1330 		for (i = 0; i < 6; i++) {
1331 			if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1332 				dev_err(&hbus->hdev->device,
1333 					"There's an I/O BAR in this list!\n");
1334 
1335 			if (hpdev->probed_bar[i] != 0) {
1336 				/*
1337 				 * A probed BAR has all the upper bits set that
1338 				 * can be changed.
1339 				 */
1340 
1341 				bar_val = hpdev->probed_bar[i];
1342 				if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1343 					bar_val |=
1344 					((u64)hpdev->probed_bar[++i] << 32);
1345 				else
1346 					bar_val |= 0xffffffff00000000ULL;
1347 
1348 				bar_size = get_bar_size(bar_val);
1349 
1350 				if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1351 					hbus->high_mmio_space += bar_size;
1352 				else
1353 					hbus->low_mmio_space += bar_size;
1354 			}
1355 		}
1356 	}
1357 
1358 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1359 	complete(event);
1360 }
1361 
1362 /**
1363  * prepopulate_bars() - Fill in BARs with defaults
1364  * @hbus:	Root PCI bus, as understood by this driver
1365  *
1366  * The core PCI driver code seems much, much happier if the BARs
1367  * for a device have values upon first scan. So fill them in.
1368  * The algorithm below works down from large sizes to small,
1369  * attempting to pack the assignments optimally. The assumption,
1370  * enforced in other parts of the code, is that the beginning of
1371  * the memory-mapped I/O space will be aligned on the largest
1372  * BAR size.
1373  */
1374 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1375 {
1376 	resource_size_t high_size = 0;
1377 	resource_size_t low_size = 0;
1378 	resource_size_t high_base = 0;
1379 	resource_size_t low_base = 0;
1380 	resource_size_t bar_size;
1381 	struct hv_pci_dev *hpdev;
1382 	unsigned long flags;
1383 	u64 bar_val;
1384 	u32 command;
1385 	bool high;
1386 	int i;
1387 
1388 	if (hbus->low_mmio_space) {
1389 		low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1390 		low_base = hbus->low_mmio_res->start;
1391 	}
1392 
1393 	if (hbus->high_mmio_space) {
1394 		high_size = 1ULL <<
1395 			(63 - __builtin_clzll(hbus->high_mmio_space));
1396 		high_base = hbus->high_mmio_res->start;
1397 	}
1398 
1399 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1400 
1401 	/* Pick addresses for the BARs. */
1402 	do {
1403 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
1404 			for (i = 0; i < 6; i++) {
1405 				bar_val = hpdev->probed_bar[i];
1406 				if (bar_val == 0)
1407 					continue;
1408 				high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1409 				if (high) {
1410 					bar_val |=
1411 						((u64)hpdev->probed_bar[i + 1]
1412 						 << 32);
1413 				} else {
1414 					bar_val |= 0xffffffffULL << 32;
1415 				}
1416 				bar_size = get_bar_size(bar_val);
1417 				if (high) {
1418 					if (high_size != bar_size) {
1419 						i++;
1420 						continue;
1421 					}
1422 					_hv_pcifront_write_config(hpdev,
1423 						PCI_BASE_ADDRESS_0 + (4 * i),
1424 						4,
1425 						(u32)(high_base & 0xffffff00));
1426 					i++;
1427 					_hv_pcifront_write_config(hpdev,
1428 						PCI_BASE_ADDRESS_0 + (4 * i),
1429 						4, (u32)(high_base >> 32));
1430 					high_base += bar_size;
1431 				} else {
1432 					if (low_size != bar_size)
1433 						continue;
1434 					_hv_pcifront_write_config(hpdev,
1435 						PCI_BASE_ADDRESS_0 + (4 * i),
1436 						4,
1437 						(u32)(low_base & 0xffffff00));
1438 					low_base += bar_size;
1439 				}
1440 			}
1441 			if (high_size <= 1 && low_size <= 1) {
1442 				/* Set the memory enable bit. */
1443 				_hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1444 							 &command);
1445 				command |= PCI_COMMAND_MEMORY;
1446 				_hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1447 							  command);
1448 				break;
1449 			}
1450 		}
1451 
1452 		high_size >>= 1;
1453 		low_size >>= 1;
1454 	}  while (high_size || low_size);
1455 
1456 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1457 }
1458 
1459 /*
1460  * Assign entries in sysfs pci slot directory.
1461  *
1462  * Note that this function does not need to lock the children list
1463  * because it is called from pci_devices_present_work which
1464  * is serialized with hv_eject_device_work because they are on the
1465  * same ordered workqueue. Therefore hbus->children list will not change
1466  * even when pci_create_slot sleeps.
1467  */
1468 static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
1469 {
1470 	struct hv_pci_dev *hpdev;
1471 	char name[SLOT_NAME_SIZE];
1472 	int slot_nr;
1473 
1474 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1475 		if (hpdev->pci_slot)
1476 			continue;
1477 
1478 		slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
1479 		snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
1480 		hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
1481 					  name, NULL);
1482 		if (IS_ERR(hpdev->pci_slot)) {
1483 			pr_warn("pci_create slot %s failed\n", name);
1484 			hpdev->pci_slot = NULL;
1485 		}
1486 	}
1487 }
1488 
1489 /*
1490  * Remove entries in sysfs pci slot directory.
1491  */
1492 static void hv_pci_remove_slots(struct hv_pcibus_device *hbus)
1493 {
1494 	struct hv_pci_dev *hpdev;
1495 
1496 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1497 		if (!hpdev->pci_slot)
1498 			continue;
1499 		pci_destroy_slot(hpdev->pci_slot);
1500 		hpdev->pci_slot = NULL;
1501 	}
1502 }
1503 
1504 /**
1505  * create_root_hv_pci_bus() - Expose a new root PCI bus
1506  * @hbus:	Root PCI bus, as understood by this driver
1507  *
1508  * Return: 0 on success, -errno on failure
1509  */
1510 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1511 {
1512 	/* Register the device */
1513 	hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1514 					    0, /* bus number is always zero */
1515 					    &hv_pcifront_ops,
1516 					    &hbus->sysdata,
1517 					    &hbus->resources_for_children);
1518 	if (!hbus->pci_bus)
1519 		return -ENODEV;
1520 
1521 	hbus->pci_bus->msi = &hbus->msi_chip;
1522 	hbus->pci_bus->msi->dev = &hbus->hdev->device;
1523 
1524 	pci_lock_rescan_remove();
1525 	pci_scan_child_bus(hbus->pci_bus);
1526 	pci_bus_assign_resources(hbus->pci_bus);
1527 	hv_pci_assign_slots(hbus);
1528 	pci_bus_add_devices(hbus->pci_bus);
1529 	pci_unlock_rescan_remove();
1530 	hbus->state = hv_pcibus_installed;
1531 	return 0;
1532 }
1533 
1534 struct q_res_req_compl {
1535 	struct completion host_event;
1536 	struct hv_pci_dev *hpdev;
1537 };
1538 
1539 /**
1540  * q_resource_requirements() - Query Resource Requirements
1541  * @context:		The completion context.
1542  * @resp:		The response that came from the host.
1543  * @resp_packet_size:	The size in bytes of resp.
1544  *
1545  * This function is invoked on completion of a Query Resource
1546  * Requirements packet.
1547  */
1548 static void q_resource_requirements(void *context, struct pci_response *resp,
1549 				    int resp_packet_size)
1550 {
1551 	struct q_res_req_compl *completion = context;
1552 	struct pci_q_res_req_response *q_res_req =
1553 		(struct pci_q_res_req_response *)resp;
1554 	int i;
1555 
1556 	if (resp->status < 0) {
1557 		dev_err(&completion->hpdev->hbus->hdev->device,
1558 			"query resource requirements failed: %x\n",
1559 			resp->status);
1560 	} else {
1561 		for (i = 0; i < 6; i++) {
1562 			completion->hpdev->probed_bar[i] =
1563 				q_res_req->probed_bar[i];
1564 		}
1565 	}
1566 
1567 	complete(&completion->host_event);
1568 }
1569 
1570 /**
1571  * new_pcichild_device() - Create a new child device
1572  * @hbus:	The internal struct tracking this root PCI bus.
1573  * @desc:	The information supplied so far from the host
1574  *              about the device.
1575  *
1576  * This function creates the tracking structure for a new child
1577  * device and kicks off the process of figuring out what it is.
1578  *
1579  * Return: Pointer to the new tracking struct
1580  */
1581 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1582 		struct pci_function_description *desc)
1583 {
1584 	struct hv_pci_dev *hpdev;
1585 	struct pci_child_message *res_req;
1586 	struct q_res_req_compl comp_pkt;
1587 	struct {
1588 		struct pci_packet init_packet;
1589 		u8 buffer[sizeof(struct pci_child_message)];
1590 	} pkt;
1591 	unsigned long flags;
1592 	int ret;
1593 
1594 	hpdev = kzalloc(sizeof(*hpdev), GFP_KERNEL);
1595 	if (!hpdev)
1596 		return NULL;
1597 
1598 	hpdev->hbus = hbus;
1599 
1600 	memset(&pkt, 0, sizeof(pkt));
1601 	init_completion(&comp_pkt.host_event);
1602 	comp_pkt.hpdev = hpdev;
1603 	pkt.init_packet.compl_ctxt = &comp_pkt;
1604 	pkt.init_packet.completion_func = q_resource_requirements;
1605 	res_req = (struct pci_child_message *)&pkt.init_packet.message;
1606 	res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1607 	res_req->wslot.slot = desc->win_slot.slot;
1608 
1609 	ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1610 			       sizeof(struct pci_child_message),
1611 			       (unsigned long)&pkt.init_packet,
1612 			       VM_PKT_DATA_INBAND,
1613 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1614 	if (ret)
1615 		goto error;
1616 
1617 	if (wait_for_response(hbus->hdev, &comp_pkt.host_event))
1618 		goto error;
1619 
1620 	hpdev->desc = *desc;
1621 	refcount_set(&hpdev->refs, 1);
1622 	get_pcichild(hpdev);
1623 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1624 
1625 	list_add_tail(&hpdev->list_entry, &hbus->children);
1626 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1627 	return hpdev;
1628 
1629 error:
1630 	kfree(hpdev);
1631 	return NULL;
1632 }
1633 
1634 /**
1635  * get_pcichild_wslot() - Find device from slot
1636  * @hbus:	Root PCI bus, as understood by this driver
1637  * @wslot:	Location on the bus
1638  *
1639  * This function looks up a PCI device and returns the internal
1640  * representation of it.  It acquires a reference on it, so that
1641  * the device won't be deleted while somebody is using it.  The
1642  * caller is responsible for calling put_pcichild() to release
1643  * this reference.
1644  *
1645  * Return:	Internal representation of a PCI device
1646  */
1647 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1648 					     u32 wslot)
1649 {
1650 	unsigned long flags;
1651 	struct hv_pci_dev *iter, *hpdev = NULL;
1652 
1653 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1654 	list_for_each_entry(iter, &hbus->children, list_entry) {
1655 		if (iter->desc.win_slot.slot == wslot) {
1656 			hpdev = iter;
1657 			get_pcichild(hpdev);
1658 			break;
1659 		}
1660 	}
1661 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1662 
1663 	return hpdev;
1664 }
1665 
1666 /**
1667  * pci_devices_present_work() - Handle new list of child devices
1668  * @work:	Work struct embedded in struct hv_dr_work
1669  *
1670  * "Bus Relations" is the Windows term for "children of this
1671  * bus."  The terminology is preserved here for people trying to
1672  * debug the interaction between Hyper-V and Linux.  This
1673  * function is called when the parent partition reports a list
1674  * of functions that should be observed under this PCI Express
1675  * port (bus).
1676  *
1677  * This function updates the list, and must tolerate being
1678  * called multiple times with the same information.  The typical
1679  * number of child devices is one, with very atypical cases
1680  * involving three or four, so the algorithms used here can be
1681  * simple and inefficient.
1682  *
1683  * It must also treat the omission of a previously observed device as
1684  * notification that the device no longer exists.
1685  *
1686  * Note that this function is serialized with hv_eject_device_work(),
1687  * because both are pushed to the ordered workqueue hbus->wq.
1688  */
1689 static void pci_devices_present_work(struct work_struct *work)
1690 {
1691 	u32 child_no;
1692 	bool found;
1693 	struct pci_function_description *new_desc;
1694 	struct hv_pci_dev *hpdev;
1695 	struct hv_pcibus_device *hbus;
1696 	struct list_head removed;
1697 	struct hv_dr_work *dr_wrk;
1698 	struct hv_dr_state *dr = NULL;
1699 	unsigned long flags;
1700 
1701 	dr_wrk = container_of(work, struct hv_dr_work, wrk);
1702 	hbus = dr_wrk->bus;
1703 	kfree(dr_wrk);
1704 
1705 	INIT_LIST_HEAD(&removed);
1706 
1707 	/* Pull this off the queue and process it if it was the last one. */
1708 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1709 	while (!list_empty(&hbus->dr_list)) {
1710 		dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1711 				      list_entry);
1712 		list_del(&dr->list_entry);
1713 
1714 		/* Throw this away if the list still has stuff in it. */
1715 		if (!list_empty(&hbus->dr_list)) {
1716 			kfree(dr);
1717 			continue;
1718 		}
1719 	}
1720 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1721 
1722 	if (!dr) {
1723 		put_hvpcibus(hbus);
1724 		return;
1725 	}
1726 
1727 	/* First, mark all existing children as reported missing. */
1728 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1729 	list_for_each_entry(hpdev, &hbus->children, list_entry) {
1730 		hpdev->reported_missing = true;
1731 	}
1732 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1733 
1734 	/* Next, add back any reported devices. */
1735 	for (child_no = 0; child_no < dr->device_count; child_no++) {
1736 		found = false;
1737 		new_desc = &dr->func[child_no];
1738 
1739 		spin_lock_irqsave(&hbus->device_list_lock, flags);
1740 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
1741 			if ((hpdev->desc.win_slot.slot == new_desc->win_slot.slot) &&
1742 			    (hpdev->desc.v_id == new_desc->v_id) &&
1743 			    (hpdev->desc.d_id == new_desc->d_id) &&
1744 			    (hpdev->desc.ser == new_desc->ser)) {
1745 				hpdev->reported_missing = false;
1746 				found = true;
1747 			}
1748 		}
1749 		spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1750 
1751 		if (!found) {
1752 			hpdev = new_pcichild_device(hbus, new_desc);
1753 			if (!hpdev)
1754 				dev_err(&hbus->hdev->device,
1755 					"couldn't record a child device.\n");
1756 		}
1757 	}
1758 
1759 	/* Move missing children to a list on the stack. */
1760 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1761 	do {
1762 		found = false;
1763 		list_for_each_entry(hpdev, &hbus->children, list_entry) {
1764 			if (hpdev->reported_missing) {
1765 				found = true;
1766 				put_pcichild(hpdev);
1767 				list_move_tail(&hpdev->list_entry, &removed);
1768 				break;
1769 			}
1770 		}
1771 	} while (found);
1772 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1773 
1774 	/* Delete everything that should no longer exist. */
1775 	while (!list_empty(&removed)) {
1776 		hpdev = list_first_entry(&removed, struct hv_pci_dev,
1777 					 list_entry);
1778 		list_del(&hpdev->list_entry);
1779 
1780 		if (hpdev->pci_slot)
1781 			pci_destroy_slot(hpdev->pci_slot);
1782 
1783 		put_pcichild(hpdev);
1784 	}
1785 
1786 	switch (hbus->state) {
1787 	case hv_pcibus_installed:
1788 		/*
1789 		 * Tell the core to rescan bus
1790 		 * because there may have been changes.
1791 		 */
1792 		pci_lock_rescan_remove();
1793 		pci_scan_child_bus(hbus->pci_bus);
1794 		hv_pci_assign_slots(hbus);
1795 		pci_unlock_rescan_remove();
1796 		break;
1797 
1798 	case hv_pcibus_init:
1799 	case hv_pcibus_probed:
1800 		survey_child_resources(hbus);
1801 		break;
1802 
1803 	default:
1804 		break;
1805 	}
1806 
1807 	put_hvpcibus(hbus);
1808 	kfree(dr);
1809 }
1810 
1811 /**
1812  * hv_pci_devices_present() - Handles list of new children
1813  * @hbus:	Root PCI bus, as understood by this driver
1814  * @relations:	Packet from host listing children
1815  *
1816  * This function is invoked whenever a new list of devices for
1817  * this bus appears.
1818  */
1819 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
1820 				   struct pci_bus_relations *relations)
1821 {
1822 	struct hv_dr_state *dr;
1823 	struct hv_dr_work *dr_wrk;
1824 	unsigned long flags;
1825 	bool pending_dr;
1826 
1827 	dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
1828 	if (!dr_wrk)
1829 		return;
1830 
1831 	dr = kzalloc(offsetof(struct hv_dr_state, func) +
1832 		     (sizeof(struct pci_function_description) *
1833 		      (relations->device_count)), GFP_NOWAIT);
1834 	if (!dr)  {
1835 		kfree(dr_wrk);
1836 		return;
1837 	}
1838 
1839 	INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
1840 	dr_wrk->bus = hbus;
1841 	dr->device_count = relations->device_count;
1842 	if (dr->device_count != 0) {
1843 		memcpy(dr->func, relations->func,
1844 		       sizeof(struct pci_function_description) *
1845 		       dr->device_count);
1846 	}
1847 
1848 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1849 	/*
1850 	 * If pending_dr is true, we have already queued a work,
1851 	 * which will see the new dr. Otherwise, we need to
1852 	 * queue a new work.
1853 	 */
1854 	pending_dr = !list_empty(&hbus->dr_list);
1855 	list_add_tail(&dr->list_entry, &hbus->dr_list);
1856 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1857 
1858 	if (pending_dr) {
1859 		kfree(dr_wrk);
1860 	} else {
1861 		get_hvpcibus(hbus);
1862 		queue_work(hbus->wq, &dr_wrk->wrk);
1863 	}
1864 }
1865 
1866 /**
1867  * hv_eject_device_work() - Asynchronously handles ejection
1868  * @work:	Work struct embedded in internal device struct
1869  *
1870  * This function handles ejecting a device.  Windows will
1871  * attempt to gracefully eject a device, waiting 60 seconds to
1872  * hear back from the guest OS that this completed successfully.
1873  * If this timer expires, the device will be forcibly removed.
1874  */
1875 static void hv_eject_device_work(struct work_struct *work)
1876 {
1877 	struct pci_eject_response *ejct_pkt;
1878 	struct hv_pcibus_device *hbus;
1879 	struct hv_pci_dev *hpdev;
1880 	struct pci_dev *pdev;
1881 	unsigned long flags;
1882 	int wslot;
1883 	struct {
1884 		struct pci_packet pkt;
1885 		u8 buffer[sizeof(struct pci_eject_response)];
1886 	} ctxt;
1887 
1888 	hpdev = container_of(work, struct hv_pci_dev, wrk);
1889 	hbus = hpdev->hbus;
1890 
1891 	WARN_ON(hpdev->state != hv_pcichild_ejecting);
1892 
1893 	/*
1894 	 * Ejection can come before or after the PCI bus has been set up, so
1895 	 * attempt to find it and tear down the bus state, if it exists.  This
1896 	 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
1897 	 * because hbus->pci_bus may not exist yet.
1898 	 */
1899 	wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
1900 	pdev = pci_get_domain_bus_and_slot(hbus->sysdata.domain, 0, wslot);
1901 	if (pdev) {
1902 		pci_lock_rescan_remove();
1903 		pci_stop_and_remove_bus_device(pdev);
1904 		pci_dev_put(pdev);
1905 		pci_unlock_rescan_remove();
1906 	}
1907 
1908 	spin_lock_irqsave(&hbus->device_list_lock, flags);
1909 	list_del(&hpdev->list_entry);
1910 	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1911 
1912 	if (hpdev->pci_slot)
1913 		pci_destroy_slot(hpdev->pci_slot);
1914 
1915 	memset(&ctxt, 0, sizeof(ctxt));
1916 	ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1917 	ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
1918 	ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1919 	vmbus_sendpacket(hbus->hdev->channel, ejct_pkt,
1920 			 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
1921 			 VM_PKT_DATA_INBAND, 0);
1922 
1923 	/* For the get_pcichild() in hv_pci_eject_device() */
1924 	put_pcichild(hpdev);
1925 	/* For the two refs got in new_pcichild_device() */
1926 	put_pcichild(hpdev);
1927 	put_pcichild(hpdev);
1928 	/* hpdev has been freed. Do not use it any more. */
1929 
1930 	put_hvpcibus(hbus);
1931 }
1932 
1933 /**
1934  * hv_pci_eject_device() - Handles device ejection
1935  * @hpdev:	Internal device tracking struct
1936  *
1937  * This function is invoked when an ejection packet arrives.  It
1938  * just schedules work so that we don't re-enter the packet
1939  * delivery code handling the ejection.
1940  */
1941 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
1942 {
1943 	hpdev->state = hv_pcichild_ejecting;
1944 	get_pcichild(hpdev);
1945 	INIT_WORK(&hpdev->wrk, hv_eject_device_work);
1946 	get_hvpcibus(hpdev->hbus);
1947 	queue_work(hpdev->hbus->wq, &hpdev->wrk);
1948 }
1949 
1950 /**
1951  * hv_pci_onchannelcallback() - Handles incoming packets
1952  * @context:	Internal bus tracking struct
1953  *
1954  * This function is invoked whenever the host sends a packet to
1955  * this channel (which is private to this root PCI bus).
1956  */
1957 static void hv_pci_onchannelcallback(void *context)
1958 {
1959 	const int packet_size = 0x100;
1960 	int ret;
1961 	struct hv_pcibus_device *hbus = context;
1962 	u32 bytes_recvd;
1963 	u64 req_id;
1964 	struct vmpacket_descriptor *desc;
1965 	unsigned char *buffer;
1966 	int bufferlen = packet_size;
1967 	struct pci_packet *comp_packet;
1968 	struct pci_response *response;
1969 	struct pci_incoming_message *new_message;
1970 	struct pci_bus_relations *bus_rel;
1971 	struct pci_dev_incoming *dev_message;
1972 	struct hv_pci_dev *hpdev;
1973 
1974 	buffer = kmalloc(bufferlen, GFP_ATOMIC);
1975 	if (!buffer)
1976 		return;
1977 
1978 	while (1) {
1979 		ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
1980 					   bufferlen, &bytes_recvd, &req_id);
1981 
1982 		if (ret == -ENOBUFS) {
1983 			kfree(buffer);
1984 			/* Handle large packet */
1985 			bufferlen = bytes_recvd;
1986 			buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
1987 			if (!buffer)
1988 				return;
1989 			continue;
1990 		}
1991 
1992 		/* Zero length indicates there are no more packets. */
1993 		if (ret || !bytes_recvd)
1994 			break;
1995 
1996 		/*
1997 		 * All incoming packets must be at least as large as a
1998 		 * response.
1999 		 */
2000 		if (bytes_recvd <= sizeof(struct pci_response))
2001 			continue;
2002 		desc = (struct vmpacket_descriptor *)buffer;
2003 
2004 		switch (desc->type) {
2005 		case VM_PKT_COMP:
2006 
2007 			/*
2008 			 * The host is trusted, and thus it's safe to interpret
2009 			 * this transaction ID as a pointer.
2010 			 */
2011 			comp_packet = (struct pci_packet *)req_id;
2012 			response = (struct pci_response *)buffer;
2013 			comp_packet->completion_func(comp_packet->compl_ctxt,
2014 						     response,
2015 						     bytes_recvd);
2016 			break;
2017 
2018 		case VM_PKT_DATA_INBAND:
2019 
2020 			new_message = (struct pci_incoming_message *)buffer;
2021 			switch (new_message->message_type.type) {
2022 			case PCI_BUS_RELATIONS:
2023 
2024 				bus_rel = (struct pci_bus_relations *)buffer;
2025 				if (bytes_recvd <
2026 				    offsetof(struct pci_bus_relations, func) +
2027 				    (sizeof(struct pci_function_description) *
2028 				     (bus_rel->device_count))) {
2029 					dev_err(&hbus->hdev->device,
2030 						"bus relations too small\n");
2031 					break;
2032 				}
2033 
2034 				hv_pci_devices_present(hbus, bus_rel);
2035 				break;
2036 
2037 			case PCI_EJECT:
2038 
2039 				dev_message = (struct pci_dev_incoming *)buffer;
2040 				hpdev = get_pcichild_wslot(hbus,
2041 						      dev_message->wslot.slot);
2042 				if (hpdev) {
2043 					hv_pci_eject_device(hpdev);
2044 					put_pcichild(hpdev);
2045 				}
2046 				break;
2047 
2048 			default:
2049 				dev_warn(&hbus->hdev->device,
2050 					"Unimplemented protocol message %x\n",
2051 					new_message->message_type.type);
2052 				break;
2053 			}
2054 			break;
2055 
2056 		default:
2057 			dev_err(&hbus->hdev->device,
2058 				"unhandled packet type %d, tid %llx len %d\n",
2059 				desc->type, req_id, bytes_recvd);
2060 			break;
2061 		}
2062 	}
2063 
2064 	kfree(buffer);
2065 }
2066 
2067 /**
2068  * hv_pci_protocol_negotiation() - Set up protocol
2069  * @hdev:	VMBus's tracking struct for this root PCI bus
2070  *
2071  * This driver is intended to support running on Windows 10
2072  * (server) and later versions. It will not run on earlier
2073  * versions, as they assume that many of the operations which
2074  * Linux needs accomplished with a spinlock held were done via
2075  * asynchronous messaging via VMBus.  Windows 10 increases the
2076  * surface area of PCI emulation so that these actions can take
2077  * place by suspending a virtual processor for their duration.
2078  *
2079  * This function negotiates the channel protocol version,
2080  * failing if the host doesn't support the necessary protocol
2081  * level.
2082  */
2083 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
2084 {
2085 	struct pci_version_request *version_req;
2086 	struct hv_pci_compl comp_pkt;
2087 	struct pci_packet *pkt;
2088 	int ret;
2089 	int i;
2090 
2091 	/*
2092 	 * Initiate the handshake with the host and negotiate
2093 	 * a version that the host can support. We start with the
2094 	 * highest version number and go down if the host cannot
2095 	 * support it.
2096 	 */
2097 	pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
2098 	if (!pkt)
2099 		return -ENOMEM;
2100 
2101 	init_completion(&comp_pkt.host_event);
2102 	pkt->completion_func = hv_pci_generic_compl;
2103 	pkt->compl_ctxt = &comp_pkt;
2104 	version_req = (struct pci_version_request *)&pkt->message;
2105 	version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
2106 
2107 	for (i = 0; i < ARRAY_SIZE(pci_protocol_versions); i++) {
2108 		version_req->protocol_version = pci_protocol_versions[i];
2109 		ret = vmbus_sendpacket(hdev->channel, version_req,
2110 				sizeof(struct pci_version_request),
2111 				(unsigned long)pkt, VM_PKT_DATA_INBAND,
2112 				VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2113 		if (!ret)
2114 			ret = wait_for_response(hdev, &comp_pkt.host_event);
2115 
2116 		if (ret) {
2117 			dev_err(&hdev->device,
2118 				"PCI Pass-through VSP failed to request version: %d",
2119 				ret);
2120 			goto exit;
2121 		}
2122 
2123 		if (comp_pkt.completion_status >= 0) {
2124 			pci_protocol_version = pci_protocol_versions[i];
2125 			dev_info(&hdev->device,
2126 				"PCI VMBus probing: Using version %#x\n",
2127 				pci_protocol_version);
2128 			goto exit;
2129 		}
2130 
2131 		if (comp_pkt.completion_status != STATUS_REVISION_MISMATCH) {
2132 			dev_err(&hdev->device,
2133 				"PCI Pass-through VSP failed version request: %#x",
2134 				comp_pkt.completion_status);
2135 			ret = -EPROTO;
2136 			goto exit;
2137 		}
2138 
2139 		reinit_completion(&comp_pkt.host_event);
2140 	}
2141 
2142 	dev_err(&hdev->device,
2143 		"PCI pass-through VSP failed to find supported version");
2144 	ret = -EPROTO;
2145 
2146 exit:
2147 	kfree(pkt);
2148 	return ret;
2149 }
2150 
2151 /**
2152  * hv_pci_free_bridge_windows() - Release memory regions for the
2153  * bus
2154  * @hbus:	Root PCI bus, as understood by this driver
2155  */
2156 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
2157 {
2158 	/*
2159 	 * Set the resources back to the way they looked when they
2160 	 * were allocated by setting IORESOURCE_BUSY again.
2161 	 */
2162 
2163 	if (hbus->low_mmio_space && hbus->low_mmio_res) {
2164 		hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
2165 		vmbus_free_mmio(hbus->low_mmio_res->start,
2166 				resource_size(hbus->low_mmio_res));
2167 	}
2168 
2169 	if (hbus->high_mmio_space && hbus->high_mmio_res) {
2170 		hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
2171 		vmbus_free_mmio(hbus->high_mmio_res->start,
2172 				resource_size(hbus->high_mmio_res));
2173 	}
2174 }
2175 
2176 /**
2177  * hv_pci_allocate_bridge_windows() - Allocate memory regions
2178  * for the bus
2179  * @hbus:	Root PCI bus, as understood by this driver
2180  *
2181  * This function calls vmbus_allocate_mmio(), which is itself a
2182  * bit of a compromise.  Ideally, we might change the pnp layer
2183  * in the kernel such that it comprehends either PCI devices
2184  * which are "grandchildren of ACPI," with some intermediate bus
2185  * node (in this case, VMBus) or change it such that it
2186  * understands VMBus.  The pnp layer, however, has been declared
2187  * deprecated, and not subject to change.
2188  *
2189  * The workaround, implemented here, is to ask VMBus to allocate
2190  * MMIO space for this bus.  VMBus itself knows which ranges are
2191  * appropriate by looking at its own ACPI objects.  Then, after
2192  * these ranges are claimed, they're modified to look like they
2193  * would have looked if the ACPI and pnp code had allocated
2194  * bridge windows.  These descriptors have to exist in this form
2195  * in order to satisfy the code which will get invoked when the
2196  * endpoint PCI function driver calls request_mem_region() or
2197  * request_mem_region_exclusive().
2198  *
2199  * Return: 0 on success, -errno on failure
2200  */
2201 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
2202 {
2203 	resource_size_t align;
2204 	int ret;
2205 
2206 	if (hbus->low_mmio_space) {
2207 		align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
2208 		ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
2209 					  (u64)(u32)0xffffffff,
2210 					  hbus->low_mmio_space,
2211 					  align, false);
2212 		if (ret) {
2213 			dev_err(&hbus->hdev->device,
2214 				"Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
2215 				hbus->low_mmio_space);
2216 			return ret;
2217 		}
2218 
2219 		/* Modify this resource to become a bridge window. */
2220 		hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
2221 		hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
2222 		pci_add_resource(&hbus->resources_for_children,
2223 				 hbus->low_mmio_res);
2224 	}
2225 
2226 	if (hbus->high_mmio_space) {
2227 		align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
2228 		ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
2229 					  0x100000000, -1,
2230 					  hbus->high_mmio_space, align,
2231 					  false);
2232 		if (ret) {
2233 			dev_err(&hbus->hdev->device,
2234 				"Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
2235 				hbus->high_mmio_space);
2236 			goto release_low_mmio;
2237 		}
2238 
2239 		/* Modify this resource to become a bridge window. */
2240 		hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
2241 		hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
2242 		pci_add_resource(&hbus->resources_for_children,
2243 				 hbus->high_mmio_res);
2244 	}
2245 
2246 	return 0;
2247 
2248 release_low_mmio:
2249 	if (hbus->low_mmio_res) {
2250 		vmbus_free_mmio(hbus->low_mmio_res->start,
2251 				resource_size(hbus->low_mmio_res));
2252 	}
2253 
2254 	return ret;
2255 }
2256 
2257 /**
2258  * hv_allocate_config_window() - Find MMIO space for PCI Config
2259  * @hbus:	Root PCI bus, as understood by this driver
2260  *
2261  * This function claims memory-mapped I/O space for accessing
2262  * configuration space for the functions on this bus.
2263  *
2264  * Return: 0 on success, -errno on failure
2265  */
2266 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
2267 {
2268 	int ret;
2269 
2270 	/*
2271 	 * Set up a region of MMIO space to use for accessing configuration
2272 	 * space.
2273 	 */
2274 	ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
2275 				  PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
2276 	if (ret)
2277 		return ret;
2278 
2279 	/*
2280 	 * vmbus_allocate_mmio() gets used for allocating both device endpoint
2281 	 * resource claims (those which cannot be overlapped) and the ranges
2282 	 * which are valid for the children of this bus, which are intended
2283 	 * to be overlapped by those children.  Set the flag on this claim
2284 	 * meaning that this region can't be overlapped.
2285 	 */
2286 
2287 	hbus->mem_config->flags |= IORESOURCE_BUSY;
2288 
2289 	return 0;
2290 }
2291 
2292 static void hv_free_config_window(struct hv_pcibus_device *hbus)
2293 {
2294 	vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
2295 }
2296 
2297 /**
2298  * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
2299  * @hdev:	VMBus's tracking struct for this root PCI bus
2300  *
2301  * Return: 0 on success, -errno on failure
2302  */
2303 static int hv_pci_enter_d0(struct hv_device *hdev)
2304 {
2305 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2306 	struct pci_bus_d0_entry *d0_entry;
2307 	struct hv_pci_compl comp_pkt;
2308 	struct pci_packet *pkt;
2309 	int ret;
2310 
2311 	/*
2312 	 * Tell the host that the bus is ready to use, and moved into the
2313 	 * powered-on state.  This includes telling the host which region
2314 	 * of memory-mapped I/O space has been chosen for configuration space
2315 	 * access.
2316 	 */
2317 	pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
2318 	if (!pkt)
2319 		return -ENOMEM;
2320 
2321 	init_completion(&comp_pkt.host_event);
2322 	pkt->completion_func = hv_pci_generic_compl;
2323 	pkt->compl_ctxt = &comp_pkt;
2324 	d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
2325 	d0_entry->message_type.type = PCI_BUS_D0ENTRY;
2326 	d0_entry->mmio_base = hbus->mem_config->start;
2327 
2328 	ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
2329 			       (unsigned long)pkt, VM_PKT_DATA_INBAND,
2330 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2331 	if (!ret)
2332 		ret = wait_for_response(hdev, &comp_pkt.host_event);
2333 
2334 	if (ret)
2335 		goto exit;
2336 
2337 	if (comp_pkt.completion_status < 0) {
2338 		dev_err(&hdev->device,
2339 			"PCI Pass-through VSP failed D0 Entry with status %x\n",
2340 			comp_pkt.completion_status);
2341 		ret = -EPROTO;
2342 		goto exit;
2343 	}
2344 
2345 	ret = 0;
2346 
2347 exit:
2348 	kfree(pkt);
2349 	return ret;
2350 }
2351 
2352 /**
2353  * hv_pci_query_relations() - Ask host to send list of child
2354  * devices
2355  * @hdev:	VMBus's tracking struct for this root PCI bus
2356  *
2357  * Return: 0 on success, -errno on failure
2358  */
2359 static int hv_pci_query_relations(struct hv_device *hdev)
2360 {
2361 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2362 	struct pci_message message;
2363 	struct completion comp;
2364 	int ret;
2365 
2366 	/* Ask the host to send along the list of child devices */
2367 	init_completion(&comp);
2368 	if (cmpxchg(&hbus->survey_event, NULL, &comp))
2369 		return -ENOTEMPTY;
2370 
2371 	memset(&message, 0, sizeof(message));
2372 	message.type = PCI_QUERY_BUS_RELATIONS;
2373 
2374 	ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2375 			       0, VM_PKT_DATA_INBAND, 0);
2376 	if (!ret)
2377 		ret = wait_for_response(hdev, &comp);
2378 
2379 	return ret;
2380 }
2381 
2382 /**
2383  * hv_send_resources_allocated() - Report local resource choices
2384  * @hdev:	VMBus's tracking struct for this root PCI bus
2385  *
2386  * The host OS is expecting to be sent a request as a message
2387  * which contains all the resources that the device will use.
2388  * The response contains those same resources, "translated"
2389  * which is to say, the values which should be used by the
2390  * hardware, when it delivers an interrupt.  (MMIO resources are
2391  * used in local terms.)  This is nice for Windows, and lines up
2392  * with the FDO/PDO split, which doesn't exist in Linux.  Linux
2393  * is deeply expecting to scan an emulated PCI configuration
2394  * space.  So this message is sent here only to drive the state
2395  * machine on the host forward.
2396  *
2397  * Return: 0 on success, -errno on failure
2398  */
2399 static int hv_send_resources_allocated(struct hv_device *hdev)
2400 {
2401 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2402 	struct pci_resources_assigned *res_assigned;
2403 	struct pci_resources_assigned2 *res_assigned2;
2404 	struct hv_pci_compl comp_pkt;
2405 	struct hv_pci_dev *hpdev;
2406 	struct pci_packet *pkt;
2407 	size_t size_res;
2408 	u32 wslot;
2409 	int ret;
2410 
2411 	size_res = (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2)
2412 			? sizeof(*res_assigned) : sizeof(*res_assigned2);
2413 
2414 	pkt = kmalloc(sizeof(*pkt) + size_res, GFP_KERNEL);
2415 	if (!pkt)
2416 		return -ENOMEM;
2417 
2418 	ret = 0;
2419 
2420 	for (wslot = 0; wslot < 256; wslot++) {
2421 		hpdev = get_pcichild_wslot(hbus, wslot);
2422 		if (!hpdev)
2423 			continue;
2424 
2425 		memset(pkt, 0, sizeof(*pkt) + size_res);
2426 		init_completion(&comp_pkt.host_event);
2427 		pkt->completion_func = hv_pci_generic_compl;
2428 		pkt->compl_ctxt = &comp_pkt;
2429 
2430 		if (pci_protocol_version < PCI_PROTOCOL_VERSION_1_2) {
2431 			res_assigned =
2432 				(struct pci_resources_assigned *)&pkt->message;
2433 			res_assigned->message_type.type =
2434 				PCI_RESOURCES_ASSIGNED;
2435 			res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2436 		} else {
2437 			res_assigned2 =
2438 				(struct pci_resources_assigned2 *)&pkt->message;
2439 			res_assigned2->message_type.type =
2440 				PCI_RESOURCES_ASSIGNED2;
2441 			res_assigned2->wslot.slot = hpdev->desc.win_slot.slot;
2442 		}
2443 		put_pcichild(hpdev);
2444 
2445 		ret = vmbus_sendpacket(hdev->channel, &pkt->message,
2446 				size_res, (unsigned long)pkt,
2447 				VM_PKT_DATA_INBAND,
2448 				VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2449 		if (!ret)
2450 			ret = wait_for_response(hdev, &comp_pkt.host_event);
2451 		if (ret)
2452 			break;
2453 
2454 		if (comp_pkt.completion_status < 0) {
2455 			ret = -EPROTO;
2456 			dev_err(&hdev->device,
2457 				"resource allocated returned 0x%x",
2458 				comp_pkt.completion_status);
2459 			break;
2460 		}
2461 	}
2462 
2463 	kfree(pkt);
2464 	return ret;
2465 }
2466 
2467 /**
2468  * hv_send_resources_released() - Report local resources
2469  * released
2470  * @hdev:	VMBus's tracking struct for this root PCI bus
2471  *
2472  * Return: 0 on success, -errno on failure
2473  */
2474 static int hv_send_resources_released(struct hv_device *hdev)
2475 {
2476 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2477 	struct pci_child_message pkt;
2478 	struct hv_pci_dev *hpdev;
2479 	u32 wslot;
2480 	int ret;
2481 
2482 	for (wslot = 0; wslot < 256; wslot++) {
2483 		hpdev = get_pcichild_wslot(hbus, wslot);
2484 		if (!hpdev)
2485 			continue;
2486 
2487 		memset(&pkt, 0, sizeof(pkt));
2488 		pkt.message_type.type = PCI_RESOURCES_RELEASED;
2489 		pkt.wslot.slot = hpdev->desc.win_slot.slot;
2490 
2491 		put_pcichild(hpdev);
2492 
2493 		ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2494 				       VM_PKT_DATA_INBAND, 0);
2495 		if (ret)
2496 			return ret;
2497 	}
2498 
2499 	return 0;
2500 }
2501 
2502 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2503 {
2504 	refcount_inc(&hbus->remove_lock);
2505 }
2506 
2507 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2508 {
2509 	if (refcount_dec_and_test(&hbus->remove_lock))
2510 		complete(&hbus->remove_event);
2511 }
2512 
2513 /**
2514  * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2515  * @hdev:	VMBus's tracking struct for this root PCI bus
2516  * @dev_id:	Identifies the device itself
2517  *
2518  * Return: 0 on success, -errno on failure
2519  */
2520 static int hv_pci_probe(struct hv_device *hdev,
2521 			const struct hv_vmbus_device_id *dev_id)
2522 {
2523 	struct hv_pcibus_device *hbus;
2524 	int ret;
2525 
2526 	/*
2527 	 * hv_pcibus_device contains the hypercall arguments for retargeting in
2528 	 * hv_irq_unmask(). Those must not cross a page boundary.
2529 	 */
2530 	BUILD_BUG_ON(sizeof(*hbus) > PAGE_SIZE);
2531 
2532 	hbus = (struct hv_pcibus_device *)get_zeroed_page(GFP_KERNEL);
2533 	if (!hbus)
2534 		return -ENOMEM;
2535 	hbus->state = hv_pcibus_init;
2536 
2537 	/*
2538 	 * The PCI bus "domain" is what is called "segment" in ACPI and
2539 	 * other specs.  Pull it from the instance ID, to get something
2540 	 * unique.  Bytes 8 and 9 are what is used in Windows guests, so
2541 	 * do the same thing for consistency.  Note that, since this code
2542 	 * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
2543 	 * that (1) the only domain in use for something that looks like
2544 	 * a physical PCI bus (which is actually emulated by the
2545 	 * hypervisor) is domain 0 and (2) there will be no overlap
2546 	 * between domains derived from these instance IDs in the same
2547 	 * VM.
2548 	 */
2549 	hbus->sysdata.domain = hdev->dev_instance.b[9] |
2550 			       hdev->dev_instance.b[8] << 8;
2551 
2552 	hbus->hdev = hdev;
2553 	refcount_set(&hbus->remove_lock, 1);
2554 	INIT_LIST_HEAD(&hbus->children);
2555 	INIT_LIST_HEAD(&hbus->dr_list);
2556 	INIT_LIST_HEAD(&hbus->resources_for_children);
2557 	spin_lock_init(&hbus->config_lock);
2558 	spin_lock_init(&hbus->device_list_lock);
2559 	spin_lock_init(&hbus->retarget_msi_interrupt_lock);
2560 	init_completion(&hbus->remove_event);
2561 	hbus->wq = alloc_ordered_workqueue("hv_pci_%x", 0,
2562 					   hbus->sysdata.domain);
2563 	if (!hbus->wq) {
2564 		ret = -ENOMEM;
2565 		goto free_bus;
2566 	}
2567 
2568 	ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2569 			 hv_pci_onchannelcallback, hbus);
2570 	if (ret)
2571 		goto destroy_wq;
2572 
2573 	hv_set_drvdata(hdev, hbus);
2574 
2575 	ret = hv_pci_protocol_negotiation(hdev);
2576 	if (ret)
2577 		goto close;
2578 
2579 	ret = hv_allocate_config_window(hbus);
2580 	if (ret)
2581 		goto close;
2582 
2583 	hbus->cfg_addr = ioremap(hbus->mem_config->start,
2584 				 PCI_CONFIG_MMIO_LENGTH);
2585 	if (!hbus->cfg_addr) {
2586 		dev_err(&hdev->device,
2587 			"Unable to map a virtual address for config space\n");
2588 		ret = -ENOMEM;
2589 		goto free_config;
2590 	}
2591 
2592 	hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
2593 	if (!hbus->sysdata.fwnode) {
2594 		ret = -ENOMEM;
2595 		goto unmap;
2596 	}
2597 
2598 	ret = hv_pcie_init_irq_domain(hbus);
2599 	if (ret)
2600 		goto free_fwnode;
2601 
2602 	ret = hv_pci_query_relations(hdev);
2603 	if (ret)
2604 		goto free_irq_domain;
2605 
2606 	ret = hv_pci_enter_d0(hdev);
2607 	if (ret)
2608 		goto free_irq_domain;
2609 
2610 	ret = hv_pci_allocate_bridge_windows(hbus);
2611 	if (ret)
2612 		goto free_irq_domain;
2613 
2614 	ret = hv_send_resources_allocated(hdev);
2615 	if (ret)
2616 		goto free_windows;
2617 
2618 	prepopulate_bars(hbus);
2619 
2620 	hbus->state = hv_pcibus_probed;
2621 
2622 	ret = create_root_hv_pci_bus(hbus);
2623 	if (ret)
2624 		goto free_windows;
2625 
2626 	return 0;
2627 
2628 free_windows:
2629 	hv_pci_free_bridge_windows(hbus);
2630 free_irq_domain:
2631 	irq_domain_remove(hbus->irq_domain);
2632 free_fwnode:
2633 	irq_domain_free_fwnode(hbus->sysdata.fwnode);
2634 unmap:
2635 	iounmap(hbus->cfg_addr);
2636 free_config:
2637 	hv_free_config_window(hbus);
2638 close:
2639 	vmbus_close(hdev->channel);
2640 destroy_wq:
2641 	destroy_workqueue(hbus->wq);
2642 free_bus:
2643 	free_page((unsigned long)hbus);
2644 	return ret;
2645 }
2646 
2647 static void hv_pci_bus_exit(struct hv_device *hdev)
2648 {
2649 	struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2650 	struct {
2651 		struct pci_packet teardown_packet;
2652 		u8 buffer[sizeof(struct pci_message)];
2653 	} pkt;
2654 	struct pci_bus_relations relations;
2655 	struct hv_pci_compl comp_pkt;
2656 	int ret;
2657 
2658 	/*
2659 	 * After the host sends the RESCIND_CHANNEL message, it doesn't
2660 	 * access the per-channel ringbuffer any longer.
2661 	 */
2662 	if (hdev->channel->rescind)
2663 		return;
2664 
2665 	/* Delete any children which might still exist. */
2666 	memset(&relations, 0, sizeof(relations));
2667 	hv_pci_devices_present(hbus, &relations);
2668 
2669 	ret = hv_send_resources_released(hdev);
2670 	if (ret)
2671 		dev_err(&hdev->device,
2672 			"Couldn't send resources released packet(s)\n");
2673 
2674 	memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
2675 	init_completion(&comp_pkt.host_event);
2676 	pkt.teardown_packet.completion_func = hv_pci_generic_compl;
2677 	pkt.teardown_packet.compl_ctxt = &comp_pkt;
2678 	pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
2679 
2680 	ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
2681 			       sizeof(struct pci_message),
2682 			       (unsigned long)&pkt.teardown_packet,
2683 			       VM_PKT_DATA_INBAND,
2684 			       VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2685 	if (!ret)
2686 		wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
2687 }
2688 
2689 /**
2690  * hv_pci_remove() - Remove routine for this VMBus channel
2691  * @hdev:	VMBus's tracking struct for this root PCI bus
2692  *
2693  * Return: 0 on success, -errno on failure
2694  */
2695 static int hv_pci_remove(struct hv_device *hdev)
2696 {
2697 	struct hv_pcibus_device *hbus;
2698 
2699 	hbus = hv_get_drvdata(hdev);
2700 	if (hbus->state == hv_pcibus_installed) {
2701 		/* Remove the bus from PCI's point of view. */
2702 		pci_lock_rescan_remove();
2703 		pci_stop_root_bus(hbus->pci_bus);
2704 		pci_remove_root_bus(hbus->pci_bus);
2705 		hv_pci_remove_slots(hbus);
2706 		pci_unlock_rescan_remove();
2707 		hbus->state = hv_pcibus_removed;
2708 	}
2709 
2710 	hv_pci_bus_exit(hdev);
2711 
2712 	vmbus_close(hdev->channel);
2713 
2714 	iounmap(hbus->cfg_addr);
2715 	hv_free_config_window(hbus);
2716 	pci_free_resource_list(&hbus->resources_for_children);
2717 	hv_pci_free_bridge_windows(hbus);
2718 	irq_domain_remove(hbus->irq_domain);
2719 	irq_domain_free_fwnode(hbus->sysdata.fwnode);
2720 	put_hvpcibus(hbus);
2721 	wait_for_completion(&hbus->remove_event);
2722 	destroy_workqueue(hbus->wq);
2723 	free_page((unsigned long)hbus);
2724 	return 0;
2725 }
2726 
2727 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
2728 	/* PCI Pass-through Class ID */
2729 	/* 44C4F61D-4444-4400-9D52-802E27EDE19F */
2730 	{ HV_PCIE_GUID, },
2731 	{ },
2732 };
2733 
2734 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
2735 
2736 static struct hv_driver hv_pci_drv = {
2737 	.name		= "hv_pci",
2738 	.id_table	= hv_pci_id_table,
2739 	.probe		= hv_pci_probe,
2740 	.remove		= hv_pci_remove,
2741 };
2742 
2743 static void __exit exit_hv_pci_drv(void)
2744 {
2745 	vmbus_driver_unregister(&hv_pci_drv);
2746 }
2747 
2748 static int __init init_hv_pci_drv(void)
2749 {
2750 	return vmbus_driver_register(&hv_pci_drv);
2751 }
2752 
2753 module_init(init_hv_pci_drv);
2754 module_exit(exit_hv_pci_drv);
2755 
2756 MODULE_DESCRIPTION("Hyper-V PCI");
2757 MODULE_LICENSE("GPL v2");
2758