1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * PCIe controller EP driver for Freescale Layerscape SoCs 4 * 5 * Copyright (C) 2018 NXP Semiconductor. 6 * 7 * Author: Xiaowei Bao <xiaowei.bao@nxp.com> 8 */ 9 10 #include <linux/kernel.h> 11 #include <linux/init.h> 12 #include <linux/of_pci.h> 13 #include <linux/of_platform.h> 14 #include <linux/of_address.h> 15 #include <linux/pci.h> 16 #include <linux/platform_device.h> 17 #include <linux/resource.h> 18 19 #include "pcie-designware.h" 20 21 #define PCIE_DBI2_OFFSET 0x1000 /* DBI2 base address*/ 22 23 #define to_ls_pcie_ep(x) dev_get_drvdata((x)->dev) 24 25 struct ls_pcie_ep_drvdata { 26 u32 func_offset; 27 const struct dw_pcie_ep_ops *ops; 28 const struct dw_pcie_ops *dw_pcie_ops; 29 }; 30 31 struct ls_pcie_ep { 32 struct dw_pcie *pci; 33 struct pci_epc_features *ls_epc; 34 const struct ls_pcie_ep_drvdata *drvdata; 35 }; 36 37 static int ls_pcie_establish_link(struct dw_pcie *pci) 38 { 39 return 0; 40 } 41 42 static const struct dw_pcie_ops dw_ls_pcie_ep_ops = { 43 .start_link = ls_pcie_establish_link, 44 }; 45 46 static const struct pci_epc_features* 47 ls_pcie_ep_get_features(struct dw_pcie_ep *ep) 48 { 49 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); 50 struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci); 51 52 return pcie->ls_epc; 53 } 54 55 static void ls_pcie_ep_init(struct dw_pcie_ep *ep) 56 { 57 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); 58 struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci); 59 struct dw_pcie_ep_func *ep_func; 60 enum pci_barno bar; 61 62 ep_func = dw_pcie_ep_get_func_from_ep(ep, 0); 63 if (!ep_func) 64 return; 65 66 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) 67 dw_pcie_ep_reset_bar(pci, bar); 68 69 pcie->ls_epc->msi_capable = ep_func->msi_cap ? true : false; 70 pcie->ls_epc->msix_capable = ep_func->msix_cap ? true : false; 71 } 72 73 static int ls_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, 74 enum pci_epc_irq_type type, u16 interrupt_num) 75 { 76 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); 77 78 switch (type) { 79 case PCI_EPC_IRQ_LEGACY: 80 return dw_pcie_ep_raise_legacy_irq(ep, func_no); 81 case PCI_EPC_IRQ_MSI: 82 return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num); 83 case PCI_EPC_IRQ_MSIX: 84 return dw_pcie_ep_raise_msix_irq_doorbell(ep, func_no, 85 interrupt_num); 86 default: 87 dev_err(pci->dev, "UNKNOWN IRQ type\n"); 88 return -EINVAL; 89 } 90 } 91 92 static unsigned int ls_pcie_ep_func_conf_select(struct dw_pcie_ep *ep, 93 u8 func_no) 94 { 95 struct dw_pcie *pci = to_dw_pcie_from_ep(ep); 96 struct ls_pcie_ep *pcie = to_ls_pcie_ep(pci); 97 98 WARN_ON(func_no && !pcie->drvdata->func_offset); 99 return pcie->drvdata->func_offset * func_no; 100 } 101 102 static const struct dw_pcie_ep_ops ls_pcie_ep_ops = { 103 .ep_init = ls_pcie_ep_init, 104 .raise_irq = ls_pcie_ep_raise_irq, 105 .get_features = ls_pcie_ep_get_features, 106 .func_conf_select = ls_pcie_ep_func_conf_select, 107 }; 108 109 static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = { 110 .ops = &ls_pcie_ep_ops, 111 .dw_pcie_ops = &dw_ls_pcie_ep_ops, 112 }; 113 114 static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = { 115 .func_offset = 0x20000, 116 .ops = &ls_pcie_ep_ops, 117 .dw_pcie_ops = &dw_ls_pcie_ep_ops, 118 }; 119 120 static const struct of_device_id ls_pcie_ep_of_match[] = { 121 { .compatible = "fsl,ls1046a-pcie-ep", .data = &ls1_ep_drvdata }, 122 { .compatible = "fsl,ls1088a-pcie-ep", .data = &ls2_ep_drvdata }, 123 { .compatible = "fsl,ls2088a-pcie-ep", .data = &ls2_ep_drvdata }, 124 { }, 125 }; 126 127 static int __init ls_add_pcie_ep(struct ls_pcie_ep *pcie, 128 struct platform_device *pdev) 129 { 130 struct dw_pcie *pci = pcie->pci; 131 struct device *dev = pci->dev; 132 struct dw_pcie_ep *ep; 133 struct resource *res; 134 int ret; 135 136 ep = &pci->ep; 137 ep->ops = pcie->drvdata->ops; 138 139 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space"); 140 if (!res) 141 return -EINVAL; 142 143 ep->phys_base = res->start; 144 ep->addr_size = resource_size(res); 145 146 ret = dw_pcie_ep_init(ep); 147 if (ret) { 148 dev_err(dev, "failed to initialize endpoint\n"); 149 return ret; 150 } 151 152 return 0; 153 } 154 155 static int __init ls_pcie_ep_probe(struct platform_device *pdev) 156 { 157 struct device *dev = &pdev->dev; 158 struct dw_pcie *pci; 159 struct ls_pcie_ep *pcie; 160 struct pci_epc_features *ls_epc; 161 struct resource *dbi_base; 162 int ret; 163 164 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); 165 if (!pcie) 166 return -ENOMEM; 167 168 pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL); 169 if (!pci) 170 return -ENOMEM; 171 172 ls_epc = devm_kzalloc(dev, sizeof(*ls_epc), GFP_KERNEL); 173 if (!ls_epc) 174 return -ENOMEM; 175 176 pcie->drvdata = of_device_get_match_data(dev); 177 178 pci->dev = dev; 179 pci->ops = pcie->drvdata->dw_pcie_ops; 180 181 ls_epc->bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4), 182 183 pcie->pci = pci; 184 pcie->ls_epc = ls_epc; 185 186 dbi_base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); 187 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); 188 if (IS_ERR(pci->dbi_base)) 189 return PTR_ERR(pci->dbi_base); 190 191 pci->dbi_base2 = pci->dbi_base + PCIE_DBI2_OFFSET; 192 193 platform_set_drvdata(pdev, pcie); 194 195 ret = ls_add_pcie_ep(pcie, pdev); 196 197 return ret; 198 } 199 200 static struct platform_driver ls_pcie_ep_driver = { 201 .driver = { 202 .name = "layerscape-pcie-ep", 203 .of_match_table = ls_pcie_ep_of_match, 204 .suppress_bind_attrs = true, 205 }, 206 }; 207 builtin_platform_driver_probe(ls_pcie_ep_driver, ls_pcie_ep_probe); 208